diff --git a/.metadata/.ide.log b/.metadata/.ide.log
index 93d180e..66906e3 100644
--- a/.metadata/.ide.log
+++ b/.metadata/.ide.log
@@ -310,3 +310,1627 @@
 2025-09-20 00:18:22,983 [INFO] IntegrityCheckThread:100 - exiting critical section [integrity check]
 2025-09-20 00:18:22,983 [INFO] IntegrityCheckThread:103 - End integrity checks thread
 2025-09-20 00:28:55,985 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 
+2025-09-20 02:01:19,323 [INFO] Activator:176 - 
+
+
+2025-09-20 02:01:19,326 [INFO] Activator:177 - !SESSION log4j initialized
+2025-09-20 02:01:29,979 [INFO] LogOutputStream:77 - [STDOUT_REDIRECT] 
+2025-09-20 02:01:34,491 [INFO] ApplicationProperties:184 - Using Application install path: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659
+2025-09-20 02:01:34,519 [INFO] DbMcusXml:78 - Set database path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//mcu/
+2025-09-20 02:01:34,519 [INFO] ApiDb:274 - Set plugin database path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//plugins/boardmanager/
+2025-09-20 02:01:34,520 [WARN] ApiDb:259 - Overriding images path with different value:  => /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//plugins/mcufinder/images/
+2025-09-20 02:01:34,525 [INFO] ApiDb:250 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/
+2025-09-20 02:01:34,527 [INFO] DbMcusAds:125 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/
+2025-09-20 02:01:34,530 [INFO] CrossReferenceDbSqlite:203 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/cs/
+2025-09-20 02:01:34,757 [INFO] RulesReader:64 - Compatibility file has been processed (317 Rules)
+2025-09-20 02:01:34,903 [INFO] DbMcusXml:78 - Set database path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//mcu/
+2025-09-20 02:01:34,903 [INFO] ApiDb:274 - Set plugin database path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//plugins/boardmanager/
+2025-09-20 02:01:34,903 [INFO] ApiDb:261 - Set plugin images path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//plugins/mcufinder/images/
+2025-09-20 02:01:34,904 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-09-20 02:01:34,904 [INFO] ApiDb:250 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/
+2025-09-20 02:01:34,904 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-09-20 02:01:34,904 [INFO] DbMcusAds:125 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/
+2025-09-20 02:01:34,904 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-09-20 02:01:34,905 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-09-20 02:01:34,905 [INFO] CrossReferenceDbSqlite:203 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/cs/
+2025-09-20 02:01:35,033 [INFO] MainPanel:274 - HeapMemory: 268435456
+2025-09-20 02:01:35,440 [INFO] DbMcusXml:78 - Set database path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//mcu/
+2025-09-20 02:01:35,441 [INFO] ApiDb:274 - Set plugin database path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//plugins/boardmanager/
+2025-09-20 02:01:35,441 [INFO] ApiDb:261 - Set plugin images path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//plugins/mcufinder/images/
+2025-09-20 02:01:35,442 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-09-20 02:01:35,442 [INFO] ApiDb:250 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/
+2025-09-20 02:01:35,442 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-09-20 02:01:35,443 [INFO] DbMcusAds:125 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/
+2025-09-20 02:01:35,443 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-09-20 02:01:35,443 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-09-20 02:01:35,443 [INFO] CrossReferenceDbSqlite:203 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/cs/
+2025-09-20 02:01:35,480 [INFO] ApplicationProperties:184 - Using Application install path: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659
+2025-09-20 02:01:35,483 [INFO] PluginManage:196 - Search for loadable plugins [exclusion list=, ]
+2025-09-20 02:01:35,487 [INFO] PluginManage:310 - Check plugin analytics
+2025-09-20 02:01:36,187 [INFO] AnalyticsPlugin:253 - Accepted Software Licenses: STM32CubeMX.6.15.0
+2025-09-20 02:01:36,187 [INFO] AnalyticsPlugin:255 - Accepted CMSIS Pack Licenses: 
+2025-09-20 02:01:36,188 [INFO] AnalyticsPlugin:257 - Accepted Firmware Licenses: FW.F4.1.28.0
+2025-09-20 02:01:36,204 [INFO] PluginManage:359 - Loaded plugin analytics (category:tool,tabindex:-1)
+2025-09-20 02:01:36,211 [INFO] PluginManage:310 - Check plugin cadmodel
+2025-09-20 02:01:36,229 [INFO] CADModel:105 - Init CAD model plugin
+2025-09-20 02:01:36,229 [INFO] PluginManage:359 - Loaded plugin cadmodel (category:power,tabindex:5)
+2025-09-20 02:01:36,230 [INFO] PluginManage:310 - Check plugin clock
+2025-09-20 02:01:36,264 [INFO] PluginManage:359 - Loaded plugin clock (category:base,tabindex:2)
+2025-09-20 02:01:36,265 [INFO] PluginManage:310 - Check plugin ddr
+2025-09-20 02:01:36,271 [INFO] PluginManage:359 - Loaded plugin ddr (category:tool,tabindex:6)
+2025-09-20 02:01:36,273 [INFO] PluginManage:310 - Check plugin filemanager
+2025-09-20 02:01:36,733 [INFO] PluginManage:359 - Loaded plugin filemanager (category:base,tabindex:10)
+2025-09-20 02:01:36,734 [INFO] PluginManage:310 - Check plugin ipmanager
+2025-09-20 02:01:36,755 [INFO] PluginManage:359 - Loaded plugin ipmanager (category:base,tabindex:5)
+2025-09-20 02:01:36,756 [INFO] PluginManage:310 - Check plugin lpbam
+2025-09-20 02:01:36,776 [INFO] PluginManage:359 - Loaded plugin lpbam (category:base,tabindex:0)
+2025-09-20 02:01:36,776 [INFO] PluginManage:310 - Check plugin memorymap
+2025-09-20 02:01:36,805 [INFO] PluginManage:359 - Loaded plugin memorymap (category:base,tabindex:4)
+2025-09-20 02:01:36,805 [INFO] PluginManage:310 - Check plugin pinoutandconfiguration
+2025-09-20 02:01:36,837 [INFO] PluginManage:359 - Loaded plugin pinoutandconfiguration (category:base,tabindex:1)
+2025-09-20 02:01:36,840 [INFO] PluginManage:310 - Check plugin pinoutconfig
+2025-09-20 02:01:37,068 [WARN] SupportedApi:132 - Cannot load RTOS API schema: s4s-elt-must-match.1: The content of 'definitions' must match (annotation?, (simpleType | complexType)?, (unique | key | keyref)*)). A problem was found starting at: attribute.
+2025-09-20 02:01:37,335 [INFO] PluginManage:359 - Loaded plugin pinoutconfig (category:base,tabindex:0)
+2025-09-20 02:01:37,335 [INFO] PluginManage:310 - Check plugin power
+2025-09-20 02:01:37,351 [INFO] PluginManage:359 - Loaded plugin power (category:power,tabindex:4)
+2025-09-20 02:01:37,352 [INFO] PluginManage:310 - Check plugin projectmanager
+2025-09-20 02:01:37,387 [INFO] PluginManage:359 - Loaded plugin projectmanager (category:projectmanager,tabindex:4)
+2025-09-20 02:01:37,387 [INFO] PluginManage:310 - Check plugin rif
+2025-09-20 02:01:37,404 [INFO] PluginManage:359 - Loaded plugin rif (category:base,tabindex:3)
+2025-09-20 02:01:37,405 [INFO] PluginManage:310 - Check plugin thirdparty
+2025-09-20 02:01:37,639 [INFO] PluginManage:359 - Loaded plugin thirdparty (category:base,tabindex:-1)
+2025-09-20 02:01:37,638 [WARN] IntegrityCheckThread:84 - waiting for thirdparty lock release [integrity check]
+2025-09-20 02:01:37,639 [INFO] PluginManage:310 - Check plugin tools
+2025-09-20 02:01:37,639 [INFO] IntegrityCheckThread:86 - entering critical section [integrity check]
+2025-09-20 02:01:37,640 [INFO] ThirdPartyUpdaterWithRetryManager:70 - Updater plugin not ready yet. [1/15]
+2025-09-20 02:01:37,643 [INFO] PluginManage:359 - Loaded plugin tools (category:base,tabindex:7)
+2025-09-20 02:01:37,643 [INFO] PluginManage:310 - Check plugin tutovideos
+2025-09-20 02:01:37,977 [INFO] PluginManage:359 - Loaded plugin tutovideos (category:base,tabindex:-1)
+2025-09-20 02:01:37,977 [INFO] PluginManage:310 - Check plugin updater
+2025-09-20 02:01:38,014 [INFO] PluginManage:359 - Loaded plugin updater (category:base,tabindex:12)
+2025-09-20 02:01:38,014 [INFO] PluginManage:310 - Check plugin userauth
+2025-09-20 02:01:38,021 [INFO] UserAuth:118 - Init User Auth plugin
+2025-09-20 02:01:38,024 [INFO] PluginManage:359 - Loaded plugin userauth (category:base,tabindex:14)
+2025-09-20 02:01:38,025 [INFO] PluginManage:283 - PluginManage : Loaded plugins [18]
+2025-09-20 02:01:38,300 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-09-20 02:01:38,407 [INFO] CADModel:165 - CPN selected for project level
+2025-09-20 02:01:38,407 [INFO] CADModel:114 - Register for checkConnection events
+2025-09-20 02:01:38,425 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,426 [INFO] PluginManager:220 - loadIPPluginJar : add gtzc
+2025-09-20 02:01:38,434 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,434 [INFO] PluginManager:220 - loadIPPluginJar : add usbx
+2025-09-20 02:01:38,436 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,436 [INFO] PluginManager:220 - loadIPPluginJar : add fatfs
+2025-09-20 02:01:38,440 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,441 [INFO] PluginManager:220 - loadIPPluginJar : add i2c
+2025-09-20 02:01:38,443 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,443 [INFO] PluginManager:220 - loadIPPluginJar : add tim
+2025-09-20 02:01:38,445 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,445 [INFO] PluginManager:220 - loadIPPluginJar : add quadspi
+2025-09-20 02:01:38,450 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,450 [INFO] PluginManager:220 - loadIPPluginJar : add ipddr
+2025-09-20 02:01:38,456 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,456 [INFO] PluginManager:220 - loadIPPluginJar : add i2s
+2025-09-20 02:01:38,461 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,462 [INFO] PluginManager:220 - loadIPPluginJar : add openamp
+2025-09-20 02:01:38,465 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,465 [INFO] PluginManager:220 - loadIPPluginJar : add i3c
+2025-09-20 02:01:38,468 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,468 [INFO] PluginManager:220 - loadIPPluginJar : add ucpd
+2025-09-20 02:01:38,471 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,471 [INFO] PluginManager:220 - loadIPPluginJar : add cryp
+2025-09-20 02:01:38,474 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,474 [INFO] PluginManager:220 - loadIPPluginJar : add comp
+2025-09-20 02:01:38,477 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,477 [INFO] PluginManager:220 - loadIPPluginJar : add spi
+2025-09-20 02:01:38,482 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,483 [INFO] PluginManager:220 - loadIPPluginJar : add touchsensing
+2025-09-20 02:01:38,488 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,488 [INFO] PluginManager:220 - loadIPPluginJar : add can
+2025-09-20 02:01:38,493 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,493 [INFO] PluginManager:220 - loadIPPluginJar : add aes
+2025-09-20 02:01:38,505 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,505 [INFO] PluginManager:220 - loadIPPluginJar : add adc
+2025-09-20 02:01:38,510 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,511 [INFO] PluginManager:220 - loadIPPluginJar : add nvic
+2025-09-20 02:01:38,519 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,520 [INFO] PluginManager:220 - loadIPPluginJar : add freertos
+2025-09-20 02:01:38,531 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,532 [INFO] PluginManager:220 - loadIPPluginJar : add dma
+2025-09-20 02:01:38,536 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,536 [INFO] PluginManager:220 - loadIPPluginJar : add resmgrutility
+2025-09-20 02:01:38,540 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,541 [INFO] PluginManager:220 - loadIPPluginJar : add pdm2pcm
+2025-09-20 02:01:38,544 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,544 [INFO] PluginManager:220 - loadIPPluginJar : add hash
+2025-09-20 02:01:38,547 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,548 [INFO] PluginManager:220 - loadIPPluginJar : add dfsdm
+2025-09-20 02:01:38,550 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,551 [INFO] PluginManager:220 - loadIPPluginJar : add radio
+2025-09-20 02:01:38,563 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,568 [INFO] PluginManager:220 - loadIPPluginJar : add plateformsettings
+2025-09-20 02:01:38,576 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,576 [INFO] PluginManager:220 - loadIPPluginJar : add gic
+2025-09-20 02:01:38,578 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,578 [INFO] PluginManager:220 - loadIPPluginJar : add ltdc
+2025-09-20 02:01:38,580 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,581 [INFO] PluginManager:220 - loadIPPluginJar : add tracer_emb
+2025-09-20 02:01:38,585 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,585 [INFO] PluginManager:220 - loadIPPluginJar : add lorawan
+2025-09-20 02:01:38,588 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,589 [INFO] PluginManager:220 - loadIPPluginJar : add tsc
+2025-09-20 02:01:38,592 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,593 [INFO] PluginManager:220 - loadIPPluginJar : add ts
+2025-09-20 02:01:38,595 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,595 [INFO] PluginManager:220 - loadIPPluginJar : add gfxmmu
+2025-09-20 02:01:38,598 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,599 [INFO] PluginManager:220 - loadIPPluginJar : add dma3
+2025-09-20 02:01:38,602 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,602 [INFO] PluginManager:220 - loadIPPluginJar : add ddr_ctrl_phy
+2025-09-20 02:01:38,604 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,605 [INFO] PluginManager:220 - loadIPPluginJar : add genericplugin
+2025-09-20 02:01:38,608 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,609 [INFO] PluginManager:220 - loadIPPluginJar : add opamp
+2025-09-20 02:01:38,620 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,621 [INFO] PluginManager:220 - loadIPPluginJar : add stm32_wpan
+2025-09-20 02:01:38,626 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,627 [INFO] PluginManager:220 - loadIPPluginJar : add usart
+2025-09-20 02:01:38,631 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,631 [INFO] PluginManager:220 - loadIPPluginJar : add sai
+2025-09-20 02:01:38,642 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,643 [INFO] PluginManager:220 - loadIPPluginJar : add linkedlist
+2025-09-20 02:01:38,647 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,647 [INFO] PluginManager:220 - loadIPPluginJar : add extmemmanager
+2025-09-20 02:01:38,656 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,657 [INFO] PluginManager:220 - loadIPPluginJar : add fmc
+2025-09-20 02:01:38,664 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,664 [INFO] PluginManager:220 - loadIPPluginJar : add gpio
+2025-09-20 02:01:38,674 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:01:38,674 [INFO] PluginManager:220 - loadIPPluginJar : add mdma
+2025-09-20 02:01:38,813 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-09-20 02:01:38,875 [INFO] RulesReader:64 - Compatibility file has been processed (317 Rules)
+2025-09-20 02:01:38,906 [INFO] RulesReader:64 - Compatibility file has been processed (317 Rules)
+2025-09-20 02:01:38,926 [INFO] CADModel:165 - CPN selected for project level
+2025-09-20 02:01:38,927 [INFO] CADModel:114 - Register for checkConnection events
+2025-09-20 02:01:38,927 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-09-20 02:01:38,927 [ERROR] CADModel:125 - Updater not yet initialized, retry later 
+2025-09-20 02:01:39,268 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-09-20 02:01:39,271 [INFO] CADModel:165 - CPN selected for project level
+2025-09-20 02:01:39,271 [INFO] CADModel:114 - Register for checkConnection events
+2025-09-20 02:01:39,272 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-09-20 02:01:39,272 [ERROR] CADModel:125 - Updater not yet initialized, retry later 
+2025-09-20 02:01:39,280 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-09-20 02:01:39,649 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-09-20 02:01:39,663 [INFO] DbMcusAds:53 - JSON generation date=Tue Jul 08 03:14:23 CDT 2025 (1751962463524)
+2025-09-20 02:01:39,663 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-09-20 02:01:39,743 [WARN] DetailPanel:346 - Failed to get advertising image, set to default
+2025-09-20 02:01:39,904 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-09-20 02:01:39,907 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-09-20 02:01:39,907 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-09-20 02:01:39,907 [WARN] DetailPanel:346 - Failed to get advertising image, set to default
+2025-09-20 02:01:39,909 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-09-20 02:01:39,978 [ERROR] Updater:1198 - MainUpdater not yet initialized. External WinMGr cannot be set.
+2025-09-20 02:01:39,981 [INFO] Updater:1134 - Updater Version found : 6.15.0
+2025-09-20 02:01:40,011 [INFO] ApplicationProperties:184 - Using Application install path: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659
+2025-09-20 02:01:40,640 [INFO] ThirdPartyUpdaterWithRetryManager:70 - Updater plugin not ready yet. [2/15]
+2025-09-20 02:01:40,942 [INFO] MainUpdater:2872 - connection check result : 10
+2025-09-20 02:01:40,943 [INFO] MainUpdater:289 - Updater Check For Update Now.
+2025-09-20 02:01:40,943 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-09-20 02:01:40,951 [INFO] McuFinderGlobals:63 - Set McuFinder mode to 2 (CubeIDE integrated)
+2025-09-20 02:01:40,952 [INFO] UserAuth:487 - Internet connection configuration mode: 1
+2025-09-20 02:01:40,982 [INFO] JxBrowserEngine:152 - Initiate JxBrowser Engine with user profile folder
+2025-09-20 02:01:41,258 [INFO] CheckServerUpdateThread:120 - End of CheckServer Thread
+2025-09-20 02:01:42,340 [INFO] WebApp:169 - Instantiating new browser for Auth
+2025-09-20 02:01:44,133 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-SNS-MOTENVWB1.1.4.0
+2025-09-20 02:01:44,181 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-ATR-ASTRA1.2.0.2
+2025-09-20 02:01:44,214 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-SMBUS.2.1.0
+2025-09-20 02:01:44,229 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-ST60.1.0.0
+2025-09-20 02:01:44,387 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-F7.1.1.0
+2025-09-20 02:01:44,458 [WARN] PackLoader:240 - Cannot read IP mode file for WES.I-CUBE-Cesium.1.4.0
+2025-09-20 02:01:44,561 [WARN] PackLoader:240 - Cannot read IP mode file for Infineon.AIROC-Wi-Fi-Bluetooth-STM32.1.7.1
+2025-09-20 02:01:44,738 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-H7.3.4.0
+2025-09-20 02:01:44,797 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-DISPLAY.3.0.0
+2025-09-20 02:01:44,839 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-NFC10.1.0.0
+2025-09-20 02:01:44,871 [WARN] PackLoader:240 - Cannot read IP mode file for emotas.I-CUBE-CANOPEN.1.3.0
+2025-09-20 02:01:44,914 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-SNS-STBOX1.2.1.0
+2025-09-20 02:01:44,948 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-SNS-SMARTAG2.1.2.0
+2025-09-20 02:01:44,958 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-SNS-FLIGHT1.5.1.0
+2025-09-20 02:01:44,988 [INFO] LogOutputStream:77 - [STDOUT_REDIRECT] 1 : Invalid condition id : UX_CORESTACK_Condition cause : null
+2025-09-20 02:01:44,991 [INFO] LogOutputStream:77 - [STDOUT_REDIRECT] 1 : Invalid condition id : UX_CORESTACK_Condition cause : null
+2025-09-20 02:01:44,992 [INFO] LogOutputStream:77 - [STDOUT_REDIRECT] 1 : Invalid condition id : UX_CORESTACK_Condition cause : null
+2025-09-20 02:01:44,992 [INFO] LogOutputStream:77 - [STDOUT_REDIRECT] 1 : Invalid condition id : UX_CORESTACK_Condition cause : null
+2025-09-20 02:01:44,993 [INFO] LogOutputStream:77 - [STDOUT_REDIRECT] 1 : Invalid condition id : UX_CORESTACK_Condition cause : null
+2025-09-20 02:01:45,005 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-WL.2.0.0
+2025-09-20 02:01:45,185 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-SNS-MOTENV1.5.0.0
+2025-09-20 02:01:45,207 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-BLE2.3.3.0
+2025-09-20 02:01:45,226 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-NFC9.1.0.0
+2025-09-20 02:01:45,245 [WARN] PackLoader:240 - Cannot read IP mode file for wolfSSL.I-CUBE-wolfSSL.5.8.2
+2025-09-20 02:01:45,256 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-BLE1.7.1.0
+2025-09-20 02:01:45,261 [INFO] WebApp:463 - Apply proxy settings
+2025-09-20 02:01:45,263 [INFO] WebApp:548 - Chromium requires no authentication
+2025-09-20 02:01:45,264 [WARN] PackLoader:240 - Cannot read IP mode file for wolfSSL.I-CUBE-wolfMQTT.1.19.2
+2025-09-20 02:01:45,281 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-EEPRMA1.5.2.0
+2025-09-20 02:01:45,314 [INFO] WebApp:491 - Direct internet connection detected
+2025-09-20 02:01:45,345 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-G0.1.1.0
+2025-09-20 02:01:45,376 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-SAFEA1.1.2.2
+2025-09-20 02:01:45,405 [INFO] WebApp:900 - Register for checkConnection events
+2025-09-20 02:01:45,406 [INFO] WebApp:463 - Apply proxy settings
+2025-09-20 02:01:45,406 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-NFC4.3.0.0
+2025-09-20 02:01:45,406 [INFO] WebApp:548 - Chromium requires no authentication
+2025-09-20 02:01:45,407 [INFO] WebApp:491 - Direct internet connection detected
+2025-09-20 02:01:45,444 [WARN] PackLoader:240 - Cannot read IP mode file for EmbeddedOffice.I-CUBE-FS-RTOS.1.0.1
+2025-09-20 02:01:45,459 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-WB05N.2.0.0
+2025-09-20 02:01:45,470 [WARN] PackLoader:240 - Cannot read IP mode file for wolfSSL.I-CUBE-wolfTPM.3.8.0
+2025-09-20 02:01:45,485 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-TCPP.4.2.0
+2025-09-20 02:01:45,500 [WARN] PackLoader:240 - Cannot read IP mode file for RealThread.X-CUBE-RT-Thread_Nano.4.1.1
+2025-09-20 02:01:45,507 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-ATR-SIGFOX1.3.2.0
+2025-09-20 02:01:45,517 [WARN] PackLoader:240 - Cannot read IP mode file for ITTIA_DB.I-CUBE-ITTIADB.8.9.0
+2025-09-20 02:01:45,531 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-ST67W61.1.0.0
+2025-09-20 02:01:45,543 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AI.10.2.0
+2025-09-20 02:01:45,618 [WARN] PackLoader:240 - Cannot read IP mode file for SEGGER.I-CUBE-embOS.1.3.1
+2025-09-20 02:01:45,842 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0
+2025-09-20 02:01:46,193 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-MEMS1.11.3.0
+2025-09-20 02:01:46,341 [INFO] WebApp:225 - Starting web application
+2025-09-20 02:01:46,342 [INFO] WebApp:593 - Web application path used /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659/db/plugins/mcufinder/reactClient1/index.html
+2025-09-20 02:01:46,427 [INFO] WebApp:191 - Connection restablished
+2025-09-20 02:01:47,072 [INFO] UserAuth:487 - Internet connection configuration mode: 1
+2025-09-20 02:01:47,279 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-PM33A1.1.0.0
+2025-09-20 02:01:47,330 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-F4.1.1.0
+2025-09-20 02:01:47,352 [WARN] PackLoader:240 - Cannot read IP mode file for Avnet-IotConnect.X-CUBE-IoTC-DA16k-PMOD.1.0.0
+2025-09-20 02:01:47,377 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-ISPU.2.1.0
+2025-09-20 02:01:47,398 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-NFC12.1.0.0
+2025-09-20 02:01:47,515 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-L5.2.0.0
+2025-09-20 02:01:47,564 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-NFC6.3.1.0
+2025-09-20 02:01:47,603 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-FREERTOS.1.3.1
+2025-09-20 02:01:47,616 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-SNS-STAIOTCFT.1.0.0
+2025-09-20 02:01:47,632 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-DPower.1.3.0
+2025-09-20 02:01:47,689 [WARN] ConditionMgr:438 - getConditionDescription Invalid condition id : LAN8742 Phy interface Condition cause : null
+2025-09-20 02:01:47,691 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-L4.2.0.0
+2025-09-20 02:01:47,695 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : LAN8742 Phy interface Condition cause : null
+2025-09-20 02:01:47,696 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : LAN8742 Phy interface Condition cause : null
+2025-09-20 02:01:47,698 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : LAN8742 Phy interface Condition cause : null
+2025-09-20 02:01:47,718 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-SFXS2LP1.4.0.0
+2025-09-20 02:01:47,754 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-BLEMGR.4.1.0
+2025-09-20 02:01:47,792 [WARN] ConditionMgr:438 - getConditionDescription Invalid condition id : UX DEVICE CLASS RTOS Condition cause : null
+2025-09-20 02:01:47,792 [WARN] ConditionMgr:438 - getConditionDescription Invalid condition id : UX DEVICE CLASS RTOS Condition cause : null
+2025-09-20 02:01:47,799 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-WB.2.0.0
+2025-09-20 02:01:47,800 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : UX DEVICE CLASS RTOS Condition cause : null
+2025-09-20 02:01:47,801 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : UX DEVICE CLASS RTOS Condition cause : null
+2025-09-20 02:01:47,803 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : UX DEVICE CLASS RTOS Condition cause : null
+2025-09-20 02:01:47,805 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : UX DEVICE CLASS RTOS Condition cause : null
+2025-09-20 02:01:47,805 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : UX DEVICE CLASS RTOS Condition cause : null
+2025-09-20 02:01:47,818 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-GNSS1.7.0.1
+2025-09-20 02:01:47,834 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-TOUCHGFX.4.25.0
+2025-09-20 02:01:47,843 [WARN] ConditionMgr:438 - getConditionDescription Invalid condition id : Cortex-A Device cause : null
+2025-09-20 02:01:47,884 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : Cortex-A Device cause : null
+2025-09-20 02:01:47,884 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : Cortex-A Device cause : null
+2025-09-20 02:01:47,885 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : Cortex-A Device cause : null
+2025-09-20 02:01:47,913 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-SUBG2.5.0.0
+2025-09-20 02:01:47,982 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-H7RS.1.1.0
+2025-09-20 02:01:47,996 [WARN] PackLoader:240 - Cannot read IP mode file for Cesanta.I-CUBE-Mongoose.7.13.0
+2025-09-20 02:01:48,036 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-G4.2.0.0
+2025-09-20 02:01:48,047 [WARN] PackLoader:240 - Cannot read IP mode file for wolfSSL.I-CUBE-wolfSSH.1.4.20
+2025-09-20 02:01:48,113 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-NFC7.2.0.0
+2025-09-20 02:01:48,162 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-IPS.3.1.0
+2025-09-20 02:01:48,187 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-ALS.1.0.2
+2025-09-20 02:01:48,200 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-STSE01.1.0.0
+2025-09-20 02:01:48,214 [WARN] PackLoader:240 - Cannot read IP mode file for portGmbH.I-Cube-SoM-uGOAL.1.1.0
+2025-09-20 02:01:48,242 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-TOF1.3.4.3
+2025-09-20 02:01:48,277 [INFO] ThirdParty:978 - Integrity check success = true
+2025-09-20 02:01:48,278 [INFO] IntegrityCheckThread:100 - exiting critical section [integrity check]
+2025-09-20 02:01:48,278 [INFO] IntegrityCheckThread:103 - End integrity checks thread
+2025-09-20 02:03:14,349 [INFO] McuFinderGlobals:63 - Set McuFinder mode to 2 (CubeIDE integrated)
+2025-09-20 02:03:14,354 [INFO] MainUpdater:2872 - connection check result : 10
+2025-09-20 02:03:14,354 [INFO] MainUpdater:2872 - connection check result : 10
+2025-09-20 02:03:14,411 [INFO] MicroXplorer:468 - Change Database Path : 
+2025-09-20 02:03:14,412 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-09-20 02:03:14,424 [WARN] ThirdParty:871 - waiting for thirdparty lock release [close project]
+2025-09-20 02:03:14,424 [INFO] ThirdParty:873 - entering critical section [close project]
+2025-09-20 02:03:14,427 [INFO] ThirdParty:883 - exiting critical section [close project]
+2025-09-20 02:03:14,434 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-09-20 02:03:14,438 [INFO] UtilMem:75 - Begin LoadConfig() Used Memory: 520691672 Bytes (655360000)
+2025-09-20 02:03:14,442 [INFO] MicroXplorer:468 - Change Database Path : 
+2025-09-20 02:03:14,443 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-09-20 02:03:14,443 [INFO] OpenFileManager:355 - Change cursor
+2025-09-20 02:03:14,500 [INFO] Mcu:2029 - Initializing MCU STM32F429ZITx STM32F429ZITx STM32F429ZIT6
+2025-09-20 02:03:22,938 [INFO] Context:786 - Trying to add GPIOservice into a context  which must be forbidden
+2025-09-20 02:03:25,714 [INFO] ImportTextPane:234 - (OptionalMessage_ERROR) Pin98 (VP_RIF_VS_RIF1) cannot be retrieved for this MCU
+2025-09-20 02:03:26,345 [INFO] RtosManager:558 - Registered RTOS mode: class=CMSIS, group=RTOS, mode=CMSIS_V1, owner=FREERTOS
+2025-09-20 02:03:26,345 [INFO] RtosManager:558 - Registered RTOS mode: class=CMSIS, group=RTOS2, mode=CMSIS_V2, owner=FREERTOS
+2025-09-20 02:03:26,346 [INFO] RtosManager:558 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V1, owner=FREERTOS
+2025-09-20 02:03:26,346 [INFO] RtosManager:558 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V2, owner=FREERTOS
+2025-09-20 02:03:26,347 [WARN] ModelIntegratedComponent:184 - Missing modes for component STMicroelectronics:FreeRTOS:0.0.1:STMicroelectronics:RTOS:FreeRTOS:Core:::10.2.0:
+2025-09-20 02:03:26,472 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,472 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,473 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,473 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,473 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,473 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,473 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,476 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,476 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,476 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,479 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,479 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,479 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,480 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,480 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,480 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,480 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,480 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,481 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,484 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,484 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,487 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,487 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,488 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,488 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,488 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,488 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,489 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,489 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,489 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,489 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,490 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,490 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,490 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,490 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:03:26,491 [WARN] ModelPack:524 - Component already loaded: STMicroelectronics:HAL Drivers:0.0.0:STMicroelectronics:Device:STMicro_Driver:XSPI:HAL::0.0.1:HAL_XSPI
+2025-09-20 02:03:27,037 [INFO] ThirdPartyModel:298 - Start build external matchings
+2025-09-20 02:03:28,578 [INFO] ThirdPartyModel:316 - End build external matchings
+2025-09-20 02:03:28,617 [INFO] RtosManager:1018 - Current active RTOS is FREERTOS [Cortex-M4NS]
+2025-09-20 02:03:28,646 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:03:28,649 [INFO] ImportTextPane:234 - (OptionalMessage_ERROR) IP (RCC) : Invalid parameter (FamilyName)
+2025-09-20 02:03:28,651 [INFO] ImportTextPane:234 - (OptionalMessage_ERROR) IP (RCC) : Parameter (RTCHSEDivFreq_Value) has invalid value (4000000)
+2025-09-20 02:03:29,571 [INFO] ApiDb:581 - Connected to CubeFinder SQLite database (/home/ja/.stmcufinder/plugins/mcufinder/mcu/cube-finder-db.db)
+2025-09-20 02:03:29,751 [INFO] ApiDb:668 - CubeFinder database Data Model version=2.1
+2025-09-20 02:03:29,752 [INFO] ApiDb:669 - CubeFinder database Configuration version=3.0.39
+2025-09-20 02:03:29,752 [INFO] ApiDb:670 - CubeFinder database generation date=2025-08-25 (1756130511)
+2025-09-20 02:03:29,753 [INFO] ApiDb:671 - CubeFinder database FW Pack versions=[FP-ATR-ASTRA1_V2.0.0, FP-SNS-FLIGHT1_V5.1.0, FP-SNS-MOTENV1_V5.0.0, FP-SNS-MOTENVWB1_V1.4.0, FP-SNS-SMARTAG2_V1.2.0, FP-SNS-STBOX1_V2.1.0, STM32Cube_FW_C0_V1.4.0, STM32Cube_FW_F4_V1.28.3, STM32Cube_FW_F7_V1.17.4, STM32Cube_FW_G0_V1.6.2, STM32Cube_FW_G4_V1.6.1, STM32Cube_FW_H5_V1.5.0, STM32Cube_FW_H7RS_V1.2.0, STM32Cube_FW_H7_V1.12.1, STM32Cube_FW_L0_V1.12.2, STM32Cube_FW_L4_V1.18.1, STM32Cube_FW_L5_V1.5.1, STM32Cube_FW_N6_V1.2.0, STM32Cube_FW_U0_V1.3.0, STM32Cube_FW_U3_V1.2.0, STM32Cube_FW_U5_V1.8.0, STM32Cube_FW_WB0_V1.3.0, STM32Cube_FW_WBA_V1.7.0, STM32Cube_FW_WB_V1.23.0, STM32Cube_FW_WL3_V1.2.0, STM32Cube_FW_WL_V1.3.1, X-CUBE-ALGOBUILD_V1.4.0, X-CUBE-ALS_V1.0.2, X-CUBE-AZRTOS-F4_V1.1.0, X-CUBE-AZRTOS-F7_V1.1.0, X-CUBE-AZRTOS-G0_V1.1.0, X-CUBE-AZRTOS-G4_V2.0.0, X-CUBE-AZRTOS-H7RS_V1.1.0, X-CUBE-AZRTOS-H7_V3.4.0, X-CUBE-AZRTOS-L4_V2.0.0, X-CUBE-AZRTOS-L5_V2.0.0, X-CUBE-AZRTOS-WB_V2.0.0, X-CUBE-AZRTOS-WL_V2.0.0, X-CUBE-BLE1_V7.1.0, X-CUBE-BLE2_V3.3.0, X-CUBE-BLEMGR_V4.1.0, X-CUBE-EEPRMA1_V5.2.0, X-CUBE-FREERTOS_V1.3.1, X-CUBE-GNSS1_V6.0.0, X-CUBE-MEMS1_V11.3.0, X-CUBE-NFC4_V3.0.0, X-CUBE-NFC7_V2.0.0, X-CUBE-SFXS2LP1_V4.0.0, X-CUBE-ST67W61_V1.0.0, X-CUBE-SUBG2_V5.0.0, X-CUBE-TOF1_V3.4.3]
+2025-09-20 02:03:29,999 [INFO] DbBoardsSqlite:226 - include board P-NUCLEO-WB55-NUCLEO as a kit item of type 'Nucleo-64'
+2025-09-20 02:03:30,000 [INFO] DbBoardsSqlite:226 - include board P-NUCLEO-WB55-USBDONGLE as a kit item of type 'Nucleo USB Dongle'
+2025-09-20 02:03:30,001 [INFO] DbBoardsSqlite:226 - include board STEVAL-IDP005V1 as a kit item of type 'Evaluation Board'
+2025-09-20 02:03:30,002 [INFO] DbBoardsSqlite:226 - include board STEVAL-IDP005V2 as a kit item of type 'Evaluation Board'
+2025-09-20 02:03:30,232 [INFO] ApiDb:240 - Found 880 in-development CPN: [B-G473E-ZEST1S, B-WB1M-WPAN1, B-WBA5M-WPAN, B-WL5M-SUBG1, NUCLEO-C031C6, NUCLEO-C051C8, NUCLEO-C071RB, NUCLEO-C092RC, NUCLEO-H503RB, NUCLEO-H533RE, NUCLEO-H563ZI, NUCLEO-H7S3L8, NUCLEO-N657X0-Q, NUCLEO-U031R8, NUCLEO-U083RC, NUCLEO-U385RG-Q, NUCLEO-U545RE-Q, NUCLEO-U5A5ZJ-Q, NUCLEO-WB05KZ, NUCLEO-WB07CC, NUCLEO-WB09KE, NUCLEO-WBA52CG, NUCLEO-WBA55CG, NUCLEO-WL33CC1, NUCLEO-WL33CC2, STEVAL-PROTEUS1, STEVAL-SMARTAG2, STEVAL-STWINBX1, STM320518-EVAL, STM32C0116-DK, STM32C011D6Y3TR, STM32C011D6Y6TR, STM32C011F4P3, STM32C011F4P6, STM32C011F4U3, STM32C011F4U6TR, STM32C011F6P3, STM32C011F6P6, STM32C011F6U3, STM32C011F6U6TR, STM32C011J4M3, STM32C011J4M6, STM32C011J6M3, STM32C011J6M6, STM32C0316-DK, STM32C031C4T3, STM32C031C4T6, STM32C031C4U3, STM32C031C4U6, STM32C031C6T3, STM32C031C6T6, STM32C031C6U3, STM32C031C6U6, STM32C031F4P3, STM32C031F4P6, STM32C031F6P3, STM32C031F6P6, STM32C031G4U3, STM32C031G4U6, STM32C031G6U3, STM32C031G6U6, STM32C031K4T3, STM32C031K4T6, STM32C031K4U3, STM32C031K4U6, STM32C031K6T3, STM32C031K6T6, STM32C031K6U3, STM32C031K6U6, STM32C051C6T6, STM32C051C6U6, STM32C051C8T6, STM32C051C8U6, STM32C051D8Y6TR, STM32C051F6P6, STM32C051F8P6, STM32C051G6U6, STM32C051G8U6, STM32C051K6T6, STM32C051K6U6, STM32C051K8T6, STM32C071C8T6, STM32C071C8T6N, STM32C071C8U6, STM32C071C8U6N, STM32C071CBT6, STM32C071CBT6N, STM32C071CBU6, STM32C071CBU6N, STM32C071F8P6, STM32C071F8P6N, STM32C071FBP6, STM32C071FBP6N, STM32C071FBY6TR, STM32C071G8U6, STM32C071G8U6N, STM32C071GBU6, STM32C071GBU6N, STM32C071K8T6, STM32C071K8T6N, STM32C071K8U6, STM32C071K8U6N, STM32C071KBT6, STM32C071KBT6N, STM32C071KBU6, STM32C071KBU6N, STM32C071R8T6, STM32C071R8T6N, STM32C071RBI6N, STM32C071RBT6, STM32C071RBT6N, STM32C091CBT6, STM32C091CBU6, STM32C091CCT6, STM32C091CCU6, STM32C091ECY6TR, STM32C091FBP6, STM32C091FCP6, STM32C091GBU6, STM32C091GCU6, STM32C091KBT6, STM32C091KBU6, STM32C091KCT6, STM32C091KCU6, STM32C091RBT6, STM32C091RCI6, STM32C091RCT6, STM32C092CBT6, STM32C092CBU6, STM32C092CCT6, STM32C092CCU6, STM32C092ECY6TR, STM32C092FBP6, STM32C092FCP6, STM32C092GBU6, STM32C092GCU6, STM32C092KBT6, STM32C092KBU6, STM32C092KCT6, STM32C092KCU6, STM32C092RBT6, STM32C092RCI6, STM32C092RCT6, STM32G071K8TXN, STM32G071K8UXN, STM32G081GBU6N, STM32G081KBT6N, STM32G081KBUXN, STM32G0B1CCT6N, STM32G0B1KCT6, STM32G0B1NEY6TR, STM32G0B1RCT6N, STM32G0C1CCT6, STM32G0C1CCT6N, STM32G0C1CCU6N, STM32G0C1CET6N, STM32G0C1CEU6N, STM32G0C1KCT6, STM32G0C1NEY6TR, STM32G0C1RCI6N, STM32G0C1RCT6N, STM32G0C1REI6N, STM32G0C1RET6N, STM32G0C1VCI6, STM32G0C1VEI6, STM32G411C6T3, STM32G411C6T6, STM32G411C6U3, STM32G411C6U6, STM32G411C8T3, STM32G411C8T6, STM32G411C8U3, STM32G411C8U6, STM32G411CBT3, STM32G411CBT6, STM32G411CBU3, STM32G411CBU6, STM32G411K6T3, STM32G411K6T6, STM32G411K6U3, STM32G411K6U6, STM32G411K8T3, STM32G411K8T6, STM32G411K8U3, STM32G411K8U6, STM32G411KBT3, STM32G411KBT6, STM32G411KBU3, STM32G411KBU6, STM32G411M6T3, STM32G411M6T6, STM32G411M8T3, STM32G411M8T6, STM32G411MBT3, STM32G411MBT6, STM32G411R6T3, STM32G411R6T6, STM32G411R8T3, STM32G411R8T6, STM32G411RBT3, STM32G411RBT6, STM32G414CBT3, STM32G414CBT6, STM32G414CBU3, STM32G414CBU6, STM32G414CCT3, STM32G414CCT6, STM32G414CCU3, STM32G414CCU6, STM32G414MBT3, STM32G414MBT6, STM32G414MCT3, STM32G414MCT6, STM32G414RBT3, STM32G414RBT6, STM32G414RCT3, STM32G414RCT6, STM32G414VBT3, STM32G414VBT6, STM32G414VCT3, STM32G414VCT6, STM32G431CBT3Z, STM32G431RBT3Z, STM32G471CCT6, STM32G471CCU6, STM32G471CET3, STM32G471CET6, STM32G471CEU3, STM32G471CEU6, STM32G471MCT6, STM32G471MET3, STM32G471MET6, STM32G471MEY6TR, STM32G471QCT6, STM32G471QET3, STM32G471RCT6, STM32G471RET3, STM32G471RET6, STM32G471VCH6, STM32G471VCI6, STM32G471VCT6, STM32G471VEH3, STM32G471VEH6, STM32G471VEI3, STM32G471VEI6, STM32G471VET3, STM32G471VET6, STM32G473QET3Z, STM32G473RET3Z, STM32G474CCT6, STM32G491RET3Z, STM32H503CBT6, STM32H503CBU6, STM32H503EBY6TR, STM32H503KBU6, STM32H503RBT6, STM32H523CCT6, STM32H523CCU6, STM32H523CET6, STM32H523CEU6, STM32H523HEY6TR, STM32H523RCT6, STM32H523RET6, STM32H523VCI6, STM32H523VCT6, STM32H523VEI6, STM32H523VET6, STM32H523ZCJ6, STM32H523ZCT6, STM32H523ZEJ6, STM32H523ZET6, STM32H533CET6, STM32H533CEU6, STM32H533HEY6TR, STM32H533RET6, STM32H533VEI6, STM32H533VET6, STM32H533ZEJ6, STM32H533ZET6, STM32H562AGI6, STM32H562AII6, STM32H562IGK6, STM32H562IGT6, STM32H562IIK6, STM32H562IIT6, STM32H562RGT6, STM32H562RGV6, STM32H562RIT6, STM32H562RIV6, STM32H562VGT6, STM32H562VIT6, STM32H562ZGT6, STM32H562ZIT6, STM32H563AGI6, STM32H563AII3Q, STM32H563AII6, STM32H563IGK6, STM32H563IGT6, STM32H563IIK3Q, STM32H563IIK6, STM32H563IIT3Q, STM32H563IIT6, STM32H563MIY3QTR, STM32H563RGT6, STM32H563RGV6, STM32H563RIT6, STM32H563RIV6, STM32H563VGT6, STM32H563VIT3Q, STM32H563VIT6, STM32H563ZGT6, STM32H563ZIT3Q, STM32H563ZIT6, STM32H573AII3Q, STM32H573AII6, STM32H573I-DK, STM32H573IIK3Q, STM32H573IIK6, STM32H573IIT3Q, STM32H573IIT6, STM32H573MIY3QTR, STM32H573RIT6, STM32H573RIV6, STM32H573VIT3Q, STM32H573VIT6, STM32H573ZIT3Q, STM32H573ZIT6, STM32H7R3A8I6, STM32H7R3I8K6, STM32H7R3I8T6, STM32H7R3L8H6, STM32H7R3L8H6H, STM32H7R3R8V6, STM32H7R3V8H6, STM32H7R3V8T6, STM32H7R3V8Y6TR, STM32H7R3Z8J6, STM32H7R3Z8T6, STM32H7R7A8I6, STM32H7R7I8K6, STM32H7R7I8T6, STM32H7R7L8H6, STM32H7R7L8H6H, STM32H7R7Z8J6, STM32H7S3A8I6, STM32H7S3I8K6, STM32H7S3I8T6, STM32H7S3L8H6, STM32H7S3L8H6H, STM32H7S3R8V6, STM32H7S3V8H6, STM32H7S3V8T6, STM32H7S3V8Y6TR, STM32H7S3Z8J6, STM32H7S3Z8T6, STM32H7S78-DK, STM32H7S7A8I6, STM32H7S7I8K6, STM32H7S7I8T6, STM32H7S7L8H6, STM32H7S7L8H6H, STM32H7S7Z8J6, STM32L4R5QGI6STR, STM32MP131AAE3, STM32MP131AAF3, STM32MP131AAG3, STM32MP131CAE3, STM32MP131CAF3, STM32MP131CAG3, STM32MP131DAE7, STM32MP131DAF7, STM32MP131DAG7, STM32MP131FAE7, STM32MP131FAF7, STM32MP131FAG7, STM32MP133AAE3, STM32MP133AAF3, STM32MP133AAG3, STM32MP133CAE3, STM32MP133CAF3, STM32MP133CAG3, STM32MP133DAE7, STM32MP133DAF7, STM32MP133DAG7, STM32MP133FAE7, STM32MP133FAF7, STM32MP133FAG7, STM32MP135AAE3, STM32MP135AAF3, STM32MP135AAG3, STM32MP135CAE3, STM32MP135CAF3, STM32MP135CAG3, STM32MP135DAE7, STM32MP135DAF7, STM32MP135DAG7, STM32MP135F-DK, STM32MP135FAE7, STM32MP135FAF7, STM32MP135FAF7T, STM32MP135FAF7U, STM32MP135FAG7, STM32MP211AAL3, STM32MP211AAM3, STM32MP211AAN3, STM32MP211AAO3, STM32MP211CAL3, STM32MP211CAM3, STM32MP211CAN3, STM32MP211CAO3, STM32MP211DAL3, STM32MP211DAM3, STM32MP211DAN3, STM32MP211DAO3, STM32MP211FAL3, STM32MP211FAM3, STM32MP211FAN3, STM32MP211FAO3, STM32MP213AAL3, STM32MP213AAM3, STM32MP213AAN3, STM32MP213AAO3, STM32MP213CAL3, STM32MP213CAM3, STM32MP213CAN3, STM32MP213CAO3, STM32MP213DAL3, STM32MP213DAM3, STM32MP213DAN3, STM32MP213DAO3, STM32MP213FAL3, STM32MP213FAM3, STM32MP213FAN3, STM32MP213FAO3, STM32MP215AAL3, STM32MP215AAM3, STM32MP215AAN3, STM32MP215AAO3, STM32MP215CAL3, STM32MP215CAM3, STM32MP215CAN3, STM32MP215CAO3, STM32MP215DAL3, STM32MP215DAM3, STM32MP215DAN3, STM32MP215DAO3, STM32MP215F-DK, STM32MP215FAL3, STM32MP215FAM3, STM32MP215FAN3, STM32MP215FAO3, STM32MP231AAJ3, STM32MP231AAK3, STM32MP231AAL3, STM32MP231CAJ3, STM32MP231CAK3, STM32MP231CAL3, STM32MP231DAJ3, STM32MP231DAK3, STM32MP231DAL3, STM32MP231FAJ3, STM32MP231FAK3, STM32MP231FAL3, STM32MP233AAJ3, STM32MP233AAK3, STM32MP233AAL3, STM32MP233CAJ3, STM32MP233CAK3, STM32MP233CAL3, STM32MP233DAJ3, STM32MP233DAK3, STM32MP233DAL3, STM32MP233FAJ3, STM32MP233FAK3, STM32MP233FAL3, STM32MP235AAJ3, STM32MP235AAK3, STM32MP235AAL3, STM32MP235CAJ3, STM32MP235CAK3, STM32MP235CAL3, STM32MP235DAJ3, STM32MP235DAK3, STM32MP235DAL3, STM32MP235FAJ3, STM32MP235FAK3, STM32MP235FAL3, STM32MP251AAI3, STM32MP251AAK3, STM32MP251AAL3, STM32MP251CAI3, STM32MP251CAK3, STM32MP251CAL3, STM32MP251DAI3, STM32MP251DAK3, STM32MP251DAL3, STM32MP251FAI3, STM32MP251FAK3, STM32MP251FAL3, STM32MP253AAI3, STM32MP253AAK3, STM32MP253AAL3, STM32MP253CAI3, STM32MP253CAK3, STM32MP253CAL3, STM32MP253DAI3, STM32MP253DAK3, STM32MP253DAL3, STM32MP253FAI3, STM32MP253FAK3, STM32MP253FAL3, STM32MP255AAI3, STM32MP255AAK3, STM32MP255AAL3, STM32MP255CAI3, STM32MP255CAK3, STM32MP255CAL3, STM32MP255DAI3, STM32MP255DAK3, STM32MP255DAL3, STM32MP255FAI3, STM32MP255FAK3, STM32MP255FAL3, STM32MP257AAI3, STM32MP257AAK3, STM32MP257AAL3, STM32MP257CAI3, STM32MP257CAK3, STM32MP257CAL3, STM32MP257DAI3, STM32MP257DAK3, STM32MP257DAL3, STM32MP257F-DK, STM32MP257F-EV1, STM32MP257FAI3, STM32MP257FAK3, STM32MP257FAL3, STM32N645A0H3Q, STM32N645B0H3Q, STM32N645I0H3Q, STM32N645L0H3Q, STM32N645X0H3Q, STM32N645Z0H3Q, STM32N647A0H3Q, STM32N647B0H3Q, STM32N647I0H3Q, STM32N647L0H3Q, STM32N647X0H3Q, STM32N647Z0H3Q, STM32N655A0H3Q, STM32N655B0H3Q, STM32N655I0H3Q, STM32N655L0H3Q, STM32N655X0H3Q, STM32N655Z0H3Q, STM32N6570-DK, STM32N657A0H3Q, STM32N657B0H3Q, STM32N657I0H3Q, STM32N657L0H3Q, STM32N657X0H3Q, STM32N657Z0H3Q, STM32U031C6T6, STM32U031C6U6, STM32U031C8T6, STM32U031C8U6, STM32U031F4P6, STM32U031F6P6, STM32U031F8P6, STM32U031G6Y6TR, STM32U031G8Y6TR, STM32U031K4U6, STM32U031K6U6, STM32U031K8U6, STM32U031R6I6, STM32U031R6T6, STM32U031R8I6, STM32U031R8T6, STM32U073C8T6, STM32U073C8U6, STM32U073CBT6, STM32U073CBU6, STM32U073CCT6, STM32U073CCU6, STM32U073H8Y6TR, STM32U073HBY6TR, STM32U073HCY6TR, STM32U073K8U6, STM32U073KBU6, STM32U073KCU6, STM32U073M8I6, STM32U073M8T6, STM32U073MBI6, STM32U073MBT6, STM32U073MCI6, STM32U073MCT6, STM32U073R8I6, STM32U073R8T6, STM32U073RBI6, STM32U073RBT6, STM32U073RCI6, STM32U073RCT6, STM32U083C-DK, STM32U083CCT6, STM32U083CCU6, STM32U083HCY6TR, STM32U083KCU6, STM32U083MCI6, STM32U083MCT6, STM32U083RCI6, STM32U083RCT6, STM32U375CET6, STM32U375CET6Q, STM32U375CEU6, STM32U375CEU6Q, STM32U375CEY6QTR, STM32U375CGT6, STM32U375CGT6Q, STM32U375CGU6, STM32U375CGU6Q, STM32U375CGY6QTR, STM32U375KEU6, STM32U375KGU6, STM32U375REI6, STM32U375REI6Q, STM32U375RET6, STM32U375RET6Q, STM32U375REY6GTR, STM32U375REY6QTR, STM32U375RGI6, STM32U375RGI6Q, STM32U375RGT6, STM32U375RGT6Q, STM32U375RGY6GTR, STM32U375RGY6QTR, STM32U375VEI6, STM32U375VEI6Q, STM32U375VET6, STM32U375VET6Q, STM32U375VGI6, STM32U375VGI6Q, STM32U375VGT6, STM32U375VGT6Q, STM32U385CGT6, STM32U385CGT6Q, STM32U385CGU6, STM32U385CGU6Q, STM32U385CGY6QTR, STM32U385KGU6, STM32U385RGI6, STM32U385RGI6Q, STM32U385RGT6, STM32U385RGT6Q, STM32U385RGY6GTR, STM32U385RGY6QTR, STM32U385VGI6, STM32U385VGI6Q, STM32U385VGT6, STM32U385VGT6Q, STM32U535CBT6, STM32U535CBT6Q, STM32U535CBU6, STM32U535CBU6Q, STM32U535CCT6, STM32U535CCT6Q, STM32U535CCU6, STM32U535CCU6Q, STM32U535CET6, STM32U535CET6Q, STM32U535CEU6, STM32U535CEU6Q, STM32U535JEY6QTR, STM32U535NCY6QTR, STM32U535NEY6QTR, STM32U535RBI6, STM32U535RBI6Q, STM32U535RBT6, STM32U535RBT6Q, STM32U535RCI6, STM32U535RCI6Q, STM32U535RCT6, STM32U535RCT6Q, STM32U535REI6, STM32U535REI6Q, STM32U535RET6, STM32U535RET6Q, STM32U535VCI6, STM32U535VCI6Q, STM32U535VCT6, STM32U535VCT6Q, STM32U535VEI6, STM32U535VEI6Q, STM32U535VET6, STM32U535VET6Q, STM32U545CET6, STM32U545CET6Q, STM32U545CEU6, STM32U545CEU6Q, STM32U545JEY6QTR, STM32U545NEY6QTR, STM32U545REI6, STM32U545REI6Q, STM32U545RET6, STM32U545RET6Q, STM32U545VEI6, STM32U545VEI6Q, STM32U545VET6, STM32U545VET6Q, STM32U595AIH6, STM32U595AIH6Q, STM32U595AJH6, STM32U595AJH6Q, STM32U595QII6, STM32U595QII6Q, STM32U595QJI6, STM32U595QJI6Q, STM32U595RIT6, STM32U595RIT6Q, STM32U595RJT6, STM32U595RJT6Q, STM32U595VIT6, STM32U595VIT6Q, STM32U595VJT6, STM32U595VJT6Q, STM32U595ZIT6, STM32U595ZIT6Q, STM32U595ZIY6QTR, STM32U595ZJT6, STM32U595ZJT6Q, STM32U595ZJY6QTR, STM32U599BJY6QTR, STM32U599NIH6Q, STM32U599NJH6Q, STM32U599VIT6Q, STM32U599VJT6, STM32U599VJT6Q, STM32U599ZIT6Q, STM32U599ZIY6QTR, STM32U599ZJT6Q, STM32U599ZJY6QTR, STM32U5A5AJH6, STM32U5A5AJH6Q, STM32U5A5QII3Q , STM32U5A5QJI6, STM32U5A5QJI6Q, STM32U5A5RJT6, STM32U5A5RJT6Q, STM32U5A5VJT6, STM32U5A5VJT6Q, STM32U5A5ZJT6, STM32U5A5ZJT6Q, STM32U5A5ZJY6QTR, STM32U5A9BJY6QTR, STM32U5A9J-DK, STM32U5A9NJH6Q, STM32U5A9VJT6Q, STM32U5A9ZJT6Q, STM32U5A9ZJY6QTR, STM32U5F7VIT6, STM32U5F7VIT6Q, STM32U5F7VJT6, STM32U5F7VJT6Q, STM32U5F9BJY6QTR, STM32U5F9NJH6Q, STM32U5F9VIT6Q, STM32U5F9VJT6Q, STM32U5F9ZIJ6QTR, STM32U5F9ZIT6Q, STM32U5F9ZJJ6QTR, STM32U5F9ZJT6Q, STM32U5G7VJT6, STM32U5G7VJT6Q, STM32U5G9BJY6QTR, STM32U5G9J-DK1, STM32U5G9J-DK2, STM32U5G9NJH6Q, STM32U5G9VJT6Q, STM32U5G9ZJJ6QTR, STM32U5G9ZJT6Q, STM32WB05KZV6TR, STM32WB05KZV7TR, STM32WB05TZF6TR, STM32WB05TZF7TR, STM32WB06CCF6TR, STM32WB06CCF7TR, STM32WB06CCV6TR, STM32WB06CCV7TR, STM32WB06KCV6TR, STM32WB06KCV7TR, STM32WB07CCF6TR, STM32WB07CCF7TR, STM32WB07CCV6TR, STM32WB07CCV7TR, STM32WB07KCV6TR, STM32WB07KCV7TR, STM32WB09KEV6TR, STM32WB09KEV7TR, STM32WB09TEF6TR, STM32WB09TEF7TR, STM32WB1MMCH6, STM32WBA50KGU6, STM32WBA50KGU6TR, STM32WBA52CEU6, STM32WBA52CEU6TR, STM32WBA52CEU7, STM32WBA52CEU7TR, STM32WBA52CGU6, STM32WBA52CGU6TR, STM32WBA52CGU6U, STM32WBA52CGU7, STM32WBA52CGU7TR, STM32WBA52KEU6, STM32WBA52KEU6TR, STM32WBA52KGU6, STM32WBA52KGU6TR, STM32WBA54CEU6, STM32WBA54CEU6TR, STM32WBA54CEU7, STM32WBA54CEU7TR, STM32WBA54CGU6, STM32WBA54CGU6TR, STM32WBA54CGU7, STM32WBA54CGU7TR, STM32WBA54KEU6, STM32WBA54KEU6TR, STM32WBA54KEU7, STM32WBA54KEU7TR, STM32WBA54KGU6, STM32WBA54KGU6TR, STM32WBA54KGU7, STM32WBA54KGU7TR, STM32WBA55CEU6, STM32WBA55CEU6TR, STM32WBA55CEU7, STM32WBA55CEU7TR, STM32WBA55CGU6, STM32WBA55CGU6TR, STM32WBA55CGU6U, STM32WBA55CGU7, STM32WBA55CGU7TR, STM32WBA55G-DK1, STM32WBA55HEF6, STM32WBA55HEF7, STM32WBA55HGF6, STM32WBA55HGF7, STM32WBA55UEI6, STM32WBA55UEI6TR, STM32WBA55UEI7, STM32WBA55UEI7TR, STM32WBA55UGI6, STM32WBA55UGI6TR, STM32WBA55UGI7, STM32WBA55UGI7TR, STM32WBA5MMGH6TR, STM32WBA62MGF6, STM32WBA62MIF6, STM32WBA65MGF7, STM32WBA65MIF6, STM32WBA65MIF7, STM32WL30K8V6, STM32WL30KBV6, STM32WL31C8V6, STM32WL31CBV6, STM32WL31K8V6, STM32WL31KBV6, STM32WL33C8V6, STM32WL33C8V6X, STM32WL33CBV6, STM32WL33CBV6X, STM32WL33CCV6, STM32WL33CCV6A, STM32WL33CCV6X, STM32WL33K8V7, STM32WL33K8V7X, STM32WL33KBV7 , STM32WL33KBV7X, STM32WL33KCV7, STM32WL33KCV7X, STM32WL5MOCH6, STM32WL5MOCH6TR]
+2025-09-20 02:03:30,602 [INFO] BoardInfo:889 - No configuration file found for board P-NUCLEO-WB55
+2025-09-20 02:03:30,604 [INFO] DbBoards:161 - Kit is not supported: P-NUCLEO-WB55
+2025-09-20 02:03:30,614 [INFO] BoardInfo:889 - No configuration file found for board STEVAL-BFA001V1B
+2025-09-20 02:03:30,615 [INFO] DbBoards:161 - Kit is not supported: STEVAL-BFA001V1B
+2025-09-20 02:03:30,619 [INFO] BoardInfo:889 - No configuration file found for board STEVAL-BFA001V2B
+2025-09-20 02:03:30,620 [INFO] DbBoards:161 - Kit is not supported: STEVAL-BFA001V2B
+2025-09-20 02:03:31,030 [INFO] DbBoards:168 - Found 212 boards, 209 are supported
+2025-09-20 02:03:31,030 [INFO] DbBoards:169 - Found 212 boards, 43 of them is supported for  Bsp
+2025-09-20 02:03:31,039 [INFO] ApiDb:668 - CubeFinder database Data Model version=2.1
+2025-09-20 02:03:31,039 [INFO] ApiDb:669 - CubeFinder database Configuration version=3.0.39
+2025-09-20 02:03:31,040 [INFO] ApiDb:670 - CubeFinder database generation date=2025-08-25 (1756130511)
+2025-09-20 02:03:31,040 [INFO] ApiDb:671 - CubeFinder database FW Pack versions=[FP-ATR-ASTRA1_V2.0.0, FP-SNS-FLIGHT1_V5.1.0, FP-SNS-MOTENV1_V5.0.0, FP-SNS-MOTENVWB1_V1.4.0, FP-SNS-SMARTAG2_V1.2.0, FP-SNS-STBOX1_V2.1.0, STM32Cube_FW_C0_V1.4.0, STM32Cube_FW_F4_V1.28.3, STM32Cube_FW_F7_V1.17.4, STM32Cube_FW_G0_V1.6.2, STM32Cube_FW_G4_V1.6.1, STM32Cube_FW_H5_V1.5.0, STM32Cube_FW_H7RS_V1.2.0, STM32Cube_FW_H7_V1.12.1, STM32Cube_FW_L0_V1.12.2, STM32Cube_FW_L4_V1.18.1, STM32Cube_FW_L5_V1.5.1, STM32Cube_FW_N6_V1.2.0, STM32Cube_FW_U0_V1.3.0, STM32Cube_FW_U3_V1.2.0, STM32Cube_FW_U5_V1.8.0, STM32Cube_FW_WB0_V1.3.0, STM32Cube_FW_WBA_V1.7.0, STM32Cube_FW_WB_V1.23.0, STM32Cube_FW_WL3_V1.2.0, STM32Cube_FW_WL_V1.3.1, X-CUBE-ALGOBUILD_V1.4.0, X-CUBE-ALS_V1.0.2, X-CUBE-AZRTOS-F4_V1.1.0, X-CUBE-AZRTOS-F7_V1.1.0, X-CUBE-AZRTOS-G0_V1.1.0, X-CUBE-AZRTOS-G4_V2.0.0, X-CUBE-AZRTOS-H7RS_V1.1.0, X-CUBE-AZRTOS-H7_V3.4.0, X-CUBE-AZRTOS-L4_V2.0.0, X-CUBE-AZRTOS-L5_V2.0.0, X-CUBE-AZRTOS-WB_V2.0.0, X-CUBE-AZRTOS-WL_V2.0.0, X-CUBE-BLE1_V7.1.0, X-CUBE-BLE2_V3.3.0, X-CUBE-BLEMGR_V4.1.0, X-CUBE-EEPRMA1_V5.2.0, X-CUBE-FREERTOS_V1.3.1, X-CUBE-GNSS1_V6.0.0, X-CUBE-MEMS1_V11.3.0, X-CUBE-NFC4_V3.0.0, X-CUBE-NFC7_V2.0.0, X-CUBE-SFXS2LP1_V4.0.0, X-CUBE-ST67W61_V1.0.0, X-CUBE-SUBG2_V5.0.0, X-CUBE-TOF1_V3.4.3]
+2025-09-20 02:03:38,146 [INFO] ApiDb:240 - Found 880 in-development CPN: [B-G473E-ZEST1S, B-WB1M-WPAN1, B-WBA5M-WPAN, B-WL5M-SUBG1, NUCLEO-C031C6, NUCLEO-C051C8, NUCLEO-C071RB, NUCLEO-C092RC, NUCLEO-H503RB, NUCLEO-H533RE, NUCLEO-H563ZI, NUCLEO-H7S3L8, NUCLEO-N657X0-Q, NUCLEO-U031R8, NUCLEO-U083RC, NUCLEO-U385RG-Q, NUCLEO-U545RE-Q, NUCLEO-U5A5ZJ-Q, NUCLEO-WB05KZ, NUCLEO-WB07CC, NUCLEO-WB09KE, NUCLEO-WBA52CG, NUCLEO-WBA55CG, NUCLEO-WL33CC1, NUCLEO-WL33CC2, STEVAL-PROTEUS1, STEVAL-SMARTAG2, STEVAL-STWINBX1, STM320518-EVAL, STM32C0116-DK, STM32C011D6Y3TR, STM32C011D6Y6TR, STM32C011F4P3, STM32C011F4P6, STM32C011F4U3, STM32C011F4U6TR, STM32C011F6P3, STM32C011F6P6, STM32C011F6U3, STM32C011F6U6TR, STM32C011J4M3, STM32C011J4M6, STM32C011J6M3, STM32C011J6M6, STM32C0316-DK, STM32C031C4T3, STM32C031C4T6, STM32C031C4U3, STM32C031C4U6, STM32C031C6T3, STM32C031C6T6, STM32C031C6U3, STM32C031C6U6, STM32C031F4P3, STM32C031F4P6, STM32C031F6P3, STM32C031F6P6, STM32C031G4U3, STM32C031G4U6, STM32C031G6U3, STM32C031G6U6, STM32C031K4T3, STM32C031K4T6, STM32C031K4U3, STM32C031K4U6, STM32C031K6T3, STM32C031K6T6, STM32C031K6U3, STM32C031K6U6, STM32C051C6T6, STM32C051C6U6, STM32C051C8T6, STM32C051C8U6, STM32C051D8Y6TR, STM32C051F6P6, STM32C051F8P6, STM32C051G6U6, STM32C051G8U6, STM32C051K6T6, STM32C051K6U6, STM32C051K8T6, STM32C071C8T6, STM32C071C8T6N, STM32C071C8U6, STM32C071C8U6N, STM32C071CBT6, STM32C071CBT6N, STM32C071CBU6, STM32C071CBU6N, STM32C071F8P6, STM32C071F8P6N, STM32C071FBP6, STM32C071FBP6N, STM32C071FBY6TR, STM32C071G8U6, STM32C071G8U6N, STM32C071GBU6, STM32C071GBU6N, STM32C071K8T6, STM32C071K8T6N, STM32C071K8U6, STM32C071K8U6N, STM32C071KBT6, STM32C071KBT6N, STM32C071KBU6, STM32C071KBU6N, STM32C071R8T6, STM32C071R8T6N, STM32C071RBI6N, STM32C071RBT6, STM32C071RBT6N, STM32C091CBT6, STM32C091CBU6, STM32C091CCT6, STM32C091CCU6, STM32C091ECY6TR, STM32C091FBP6, STM32C091FCP6, STM32C091GBU6, STM32C091GCU6, STM32C091KBT6, STM32C091KBU6, STM32C091KCT6, STM32C091KCU6, STM32C091RBT6, STM32C091RCI6, STM32C091RCT6, STM32C092CBT6, STM32C092CBU6, STM32C092CCT6, STM32C092CCU6, STM32C092ECY6TR, STM32C092FBP6, STM32C092FCP6, STM32C092GBU6, STM32C092GCU6, STM32C092KBT6, STM32C092KBU6, STM32C092KCT6, STM32C092KCU6, STM32C092RBT6, STM32C092RCI6, STM32C092RCT6, STM32G071K8TXN, STM32G071K8UXN, STM32G081GBU6N, STM32G081KBT6N, STM32G081KBUXN, STM32G0B1CCT6N, STM32G0B1KCT6, STM32G0B1NEY6TR, STM32G0B1RCT6N, STM32G0C1CCT6, STM32G0C1CCT6N, STM32G0C1CCU6N, STM32G0C1CET6N, STM32G0C1CEU6N, STM32G0C1KCT6, STM32G0C1NEY6TR, STM32G0C1RCI6N, STM32G0C1RCT6N, STM32G0C1REI6N, STM32G0C1RET6N, STM32G0C1VCI6, STM32G0C1VEI6, STM32G411C6T3, STM32G411C6T6, STM32G411C6U3, STM32G411C6U6, STM32G411C8T3, STM32G411C8T6, STM32G411C8U3, STM32G411C8U6, STM32G411CBT3, STM32G411CBT6, STM32G411CBU3, STM32G411CBU6, STM32G411K6T3, STM32G411K6T6, STM32G411K6U3, STM32G411K6U6, STM32G411K8T3, STM32G411K8T6, STM32G411K8U3, STM32G411K8U6, STM32G411KBT3, STM32G411KBT6, STM32G411KBU3, STM32G411KBU6, STM32G411M6T3, STM32G411M6T6, STM32G411M8T3, STM32G411M8T6, STM32G411MBT3, STM32G411MBT6, STM32G411R6T3, STM32G411R6T6, STM32G411R8T3, STM32G411R8T6, STM32G411RBT3, STM32G411RBT6, STM32G414CBT3, STM32G414CBT6, STM32G414CBU3, STM32G414CBU6, STM32G414CCT3, STM32G414CCT6, STM32G414CCU3, STM32G414CCU6, STM32G414MBT3, STM32G414MBT6, STM32G414MCT3, STM32G414MCT6, STM32G414RBT3, STM32G414RBT6, STM32G414RCT3, STM32G414RCT6, STM32G414VBT3, STM32G414VBT6, STM32G414VCT3, STM32G414VCT6, STM32G431CBT3Z, STM32G431RBT3Z, STM32G471CCT6, STM32G471CCU6, STM32G471CET3, STM32G471CET6, STM32G471CEU3, STM32G471CEU6, STM32G471MCT6, STM32G471MET3, STM32G471MET6, STM32G471MEY6TR, STM32G471QCT6, STM32G471QET3, STM32G471RCT6, STM32G471RET3, STM32G471RET6, STM32G471VCH6, STM32G471VCI6, STM32G471VCT6, STM32G471VEH3, STM32G471VEH6, STM32G471VEI3, STM32G471VEI6, STM32G471VET3, STM32G471VET6, STM32G473QET3Z, STM32G473RET3Z, STM32G474CCT6, STM32G491RET3Z, STM32H503CBT6, STM32H503CBU6, STM32H503EBY6TR, STM32H503KBU6, STM32H503RBT6, STM32H523CCT6, STM32H523CCU6, STM32H523CET6, STM32H523CEU6, STM32H523HEY6TR, STM32H523RCT6, STM32H523RET6, STM32H523VCI6, STM32H523VCT6, STM32H523VEI6, STM32H523VET6, STM32H523ZCJ6, STM32H523ZCT6, STM32H523ZEJ6, STM32H523ZET6, STM32H533CET6, STM32H533CEU6, STM32H533HEY6TR, STM32H533RET6, STM32H533VEI6, STM32H533VET6, STM32H533ZEJ6, STM32H533ZET6, STM32H562AGI6, STM32H562AII6, STM32H562IGK6, STM32H562IGT6, STM32H562IIK6, STM32H562IIT6, STM32H562RGT6, STM32H562RGV6, STM32H562RIT6, STM32H562RIV6, STM32H562VGT6, STM32H562VIT6, STM32H562ZGT6, STM32H562ZIT6, STM32H563AGI6, STM32H563AII3Q, STM32H563AII6, STM32H563IGK6, STM32H563IGT6, STM32H563IIK3Q, STM32H563IIK6, STM32H563IIT3Q, STM32H563IIT6, STM32H563MIY3QTR, STM32H563RGT6, STM32H563RGV6, STM32H563RIT6, STM32H563RIV6, STM32H563VGT6, STM32H563VIT3Q, STM32H563VIT6, STM32H563ZGT6, STM32H563ZIT3Q, STM32H563ZIT6, STM32H573AII3Q, STM32H573AII6, STM32H573I-DK, STM32H573IIK3Q, STM32H573IIK6, STM32H573IIT3Q, STM32H573IIT6, STM32H573MIY3QTR, STM32H573RIT6, STM32H573RIV6, STM32H573VIT3Q, STM32H573VIT6, STM32H573ZIT3Q, STM32H573ZIT6, STM32H7R3A8I6, STM32H7R3I8K6, STM32H7R3I8T6, STM32H7R3L8H6, STM32H7R3L8H6H, STM32H7R3R8V6, STM32H7R3V8H6, STM32H7R3V8T6, STM32H7R3V8Y6TR, STM32H7R3Z8J6, STM32H7R3Z8T6, STM32H7R7A8I6, STM32H7R7I8K6, STM32H7R7I8T6, STM32H7R7L8H6, STM32H7R7L8H6H, STM32H7R7Z8J6, STM32H7S3A8I6, STM32H7S3I8K6, STM32H7S3I8T6, STM32H7S3L8H6, STM32H7S3L8H6H, STM32H7S3R8V6, STM32H7S3V8H6, STM32H7S3V8T6, STM32H7S3V8Y6TR, STM32H7S3Z8J6, STM32H7S3Z8T6, STM32H7S78-DK, STM32H7S7A8I6, STM32H7S7I8K6, STM32H7S7I8T6, STM32H7S7L8H6, STM32H7S7L8H6H, STM32H7S7Z8J6, STM32L4R5QGI6STR, STM32MP131AAE3, STM32MP131AAF3, STM32MP131AAG3, STM32MP131CAE3, STM32MP131CAF3, STM32MP131CAG3, STM32MP131DAE7, STM32MP131DAF7, STM32MP131DAG7, STM32MP131FAE7, STM32MP131FAF7, STM32MP131FAG7, STM32MP133AAE3, STM32MP133AAF3, STM32MP133AAG3, STM32MP133CAE3, STM32MP133CAF3, STM32MP133CAG3, STM32MP133DAE7, STM32MP133DAF7, STM32MP133DAG7, STM32MP133FAE7, STM32MP133FAF7, STM32MP133FAG7, STM32MP135AAE3, STM32MP135AAF3, STM32MP135AAG3, STM32MP135CAE3, STM32MP135CAF3, STM32MP135CAG3, STM32MP135DAE7, STM32MP135DAF7, STM32MP135DAG7, STM32MP135F-DK, STM32MP135FAE7, STM32MP135FAF7, STM32MP135FAF7T, STM32MP135FAF7U, STM32MP135FAG7, STM32MP211AAL3, STM32MP211AAM3, STM32MP211AAN3, STM32MP211AAO3, STM32MP211CAL3, STM32MP211CAM3, STM32MP211CAN3, STM32MP211CAO3, STM32MP211DAL3, STM32MP211DAM3, STM32MP211DAN3, STM32MP211DAO3, STM32MP211FAL3, STM32MP211FAM3, STM32MP211FAN3, STM32MP211FAO3, STM32MP213AAL3, STM32MP213AAM3, STM32MP213AAN3, STM32MP213AAO3, STM32MP213CAL3, STM32MP213CAM3, STM32MP213CAN3, STM32MP213CAO3, STM32MP213DAL3, STM32MP213DAM3, STM32MP213DAN3, STM32MP213DAO3, STM32MP213FAL3, STM32MP213FAM3, STM32MP213FAN3, STM32MP213FAO3, STM32MP215AAL3, STM32MP215AAM3, STM32MP215AAN3, STM32MP215AAO3, STM32MP215CAL3, STM32MP215CAM3, STM32MP215CAN3, STM32MP215CAO3, STM32MP215DAL3, STM32MP215DAM3, STM32MP215DAN3, STM32MP215DAO3, STM32MP215F-DK, STM32MP215FAL3, STM32MP215FAM3, STM32MP215FAN3, STM32MP215FAO3, STM32MP231AAJ3, STM32MP231AAK3, STM32MP231AAL3, STM32MP231CAJ3, STM32MP231CAK3, STM32MP231CAL3, STM32MP231DAJ3, STM32MP231DAK3, STM32MP231DAL3, STM32MP231FAJ3, STM32MP231FAK3, STM32MP231FAL3, STM32MP233AAJ3, STM32MP233AAK3, STM32MP233AAL3, STM32MP233CAJ3, STM32MP233CAK3, STM32MP233CAL3, STM32MP233DAJ3, STM32MP233DAK3, STM32MP233DAL3, STM32MP233FAJ3, STM32MP233FAK3, STM32MP233FAL3, STM32MP235AAJ3, STM32MP235AAK3, STM32MP235AAL3, STM32MP235CAJ3, STM32MP235CAK3, STM32MP235CAL3, STM32MP235DAJ3, STM32MP235DAK3, STM32MP235DAL3, STM32MP235FAJ3, STM32MP235FAK3, STM32MP235FAL3, STM32MP251AAI3, STM32MP251AAK3, STM32MP251AAL3, STM32MP251CAI3, STM32MP251CAK3, STM32MP251CAL3, STM32MP251DAI3, STM32MP251DAK3, STM32MP251DAL3, STM32MP251FAI3, STM32MP251FAK3, STM32MP251FAL3, STM32MP253AAI3, STM32MP253AAK3, STM32MP253AAL3, STM32MP253CAI3, STM32MP253CAK3, STM32MP253CAL3, STM32MP253DAI3, STM32MP253DAK3, STM32MP253DAL3, STM32MP253FAI3, STM32MP253FAK3, STM32MP253FAL3, STM32MP255AAI3, STM32MP255AAK3, STM32MP255AAL3, STM32MP255CAI3, STM32MP255CAK3, STM32MP255CAL3, STM32MP255DAI3, STM32MP255DAK3, STM32MP255DAL3, STM32MP255FAI3, STM32MP255FAK3, STM32MP255FAL3, STM32MP257AAI3, STM32MP257AAK3, STM32MP257AAL3, STM32MP257CAI3, STM32MP257CAK3, STM32MP257CAL3, STM32MP257DAI3, STM32MP257DAK3, STM32MP257DAL3, STM32MP257F-DK, STM32MP257F-EV1, STM32MP257FAI3, STM32MP257FAK3, STM32MP257FAL3, STM32N645A0H3Q, STM32N645B0H3Q, STM32N645I0H3Q, STM32N645L0H3Q, STM32N645X0H3Q, STM32N645Z0H3Q, STM32N647A0H3Q, STM32N647B0H3Q, STM32N647I0H3Q, STM32N647L0H3Q, STM32N647X0H3Q, STM32N647Z0H3Q, STM32N655A0H3Q, STM32N655B0H3Q, STM32N655I0H3Q, STM32N655L0H3Q, STM32N655X0H3Q, STM32N655Z0H3Q, STM32N6570-DK, STM32N657A0H3Q, STM32N657B0H3Q, STM32N657I0H3Q, STM32N657L0H3Q, STM32N657X0H3Q, STM32N657Z0H3Q, STM32U031C6T6, STM32U031C6U6, STM32U031C8T6, STM32U031C8U6, STM32U031F4P6, STM32U031F6P6, STM32U031F8P6, STM32U031G6Y6TR, STM32U031G8Y6TR, STM32U031K4U6, STM32U031K6U6, STM32U031K8U6, STM32U031R6I6, STM32U031R6T6, STM32U031R8I6, STM32U031R8T6, STM32U073C8T6, STM32U073C8U6, STM32U073CBT6, STM32U073CBU6, STM32U073CCT6, STM32U073CCU6, STM32U073H8Y6TR, STM32U073HBY6TR, STM32U073HCY6TR, STM32U073K8U6, STM32U073KBU6, STM32U073KCU6, STM32U073M8I6, STM32U073M8T6, STM32U073MBI6, STM32U073MBT6, STM32U073MCI6, STM32U073MCT6, STM32U073R8I6, STM32U073R8T6, STM32U073RBI6, STM32U073RBT6, STM32U073RCI6, STM32U073RCT6, STM32U083C-DK, STM32U083CCT6, STM32U083CCU6, STM32U083HCY6TR, STM32U083KCU6, STM32U083MCI6, STM32U083MCT6, STM32U083RCI6, STM32U083RCT6, STM32U375CET6, STM32U375CET6Q, STM32U375CEU6, STM32U375CEU6Q, STM32U375CEY6QTR, STM32U375CGT6, STM32U375CGT6Q, STM32U375CGU6, STM32U375CGU6Q, STM32U375CGY6QTR, STM32U375KEU6, STM32U375KGU6, STM32U375REI6, STM32U375REI6Q, STM32U375RET6, STM32U375RET6Q, STM32U375REY6GTR, STM32U375REY6QTR, STM32U375RGI6, STM32U375RGI6Q, STM32U375RGT6, STM32U375RGT6Q, STM32U375RGY6GTR, STM32U375RGY6QTR, STM32U375VEI6, STM32U375VEI6Q, STM32U375VET6, STM32U375VET6Q, STM32U375VGI6, STM32U375VGI6Q, STM32U375VGT6, STM32U375VGT6Q, STM32U385CGT6, STM32U385CGT6Q, STM32U385CGU6, STM32U385CGU6Q, STM32U385CGY6QTR, STM32U385KGU6, STM32U385RGI6, STM32U385RGI6Q, STM32U385RGT6, STM32U385RGT6Q, STM32U385RGY6GTR, STM32U385RGY6QTR, STM32U385VGI6, STM32U385VGI6Q, STM32U385VGT6, STM32U385VGT6Q, STM32U535CBT6, STM32U535CBT6Q, STM32U535CBU6, STM32U535CBU6Q, STM32U535CCT6, STM32U535CCT6Q, STM32U535CCU6, STM32U535CCU6Q, STM32U535CET6, STM32U535CET6Q, STM32U535CEU6, STM32U535CEU6Q, STM32U535JEY6QTR, STM32U535NCY6QTR, STM32U535NEY6QTR, STM32U535RBI6, STM32U535RBI6Q, STM32U535RBT6, STM32U535RBT6Q, STM32U535RCI6, STM32U535RCI6Q, STM32U535RCT6, STM32U535RCT6Q, STM32U535REI6, STM32U535REI6Q, STM32U535RET6, STM32U535RET6Q, STM32U535VCI6, STM32U535VCI6Q, STM32U535VCT6, STM32U535VCT6Q, STM32U535VEI6, STM32U535VEI6Q, STM32U535VET6, STM32U535VET6Q, STM32U545CET6, STM32U545CET6Q, STM32U545CEU6, STM32U545CEU6Q, STM32U545JEY6QTR, STM32U545NEY6QTR, STM32U545REI6, STM32U545REI6Q, STM32U545RET6, STM32U545RET6Q, STM32U545VEI6, STM32U545VEI6Q, STM32U545VET6, STM32U545VET6Q, STM32U595AIH6, STM32U595AIH6Q, STM32U595AJH6, STM32U595AJH6Q, STM32U595QII6, STM32U595QII6Q, STM32U595QJI6, STM32U595QJI6Q, STM32U595RIT6, STM32U595RIT6Q, STM32U595RJT6, STM32U595RJT6Q, STM32U595VIT6, STM32U595VIT6Q, STM32U595VJT6, STM32U595VJT6Q, STM32U595ZIT6, STM32U595ZIT6Q, STM32U595ZIY6QTR, STM32U595ZJT6, STM32U595ZJT6Q, STM32U595ZJY6QTR, STM32U599BJY6QTR, STM32U599NIH6Q, STM32U599NJH6Q, STM32U599VIT6Q, STM32U599VJT6, STM32U599VJT6Q, STM32U599ZIT6Q, STM32U599ZIY6QTR, STM32U599ZJT6Q, STM32U599ZJY6QTR, STM32U5A5AJH6, STM32U5A5AJH6Q, STM32U5A5QII3Q , STM32U5A5QJI6, STM32U5A5QJI6Q, STM32U5A5RJT6, STM32U5A5RJT6Q, STM32U5A5VJT6, STM32U5A5VJT6Q, STM32U5A5ZJT6, STM32U5A5ZJT6Q, STM32U5A5ZJY6QTR, STM32U5A9BJY6QTR, STM32U5A9J-DK, STM32U5A9NJH6Q, STM32U5A9VJT6Q, STM32U5A9ZJT6Q, STM32U5A9ZJY6QTR, STM32U5F7VIT6, STM32U5F7VIT6Q, STM32U5F7VJT6, STM32U5F7VJT6Q, STM32U5F9BJY6QTR, STM32U5F9NJH6Q, STM32U5F9VIT6Q, STM32U5F9VJT6Q, STM32U5F9ZIJ6QTR, STM32U5F9ZIT6Q, STM32U5F9ZJJ6QTR, STM32U5F9ZJT6Q, STM32U5G7VJT6, STM32U5G7VJT6Q, STM32U5G9BJY6QTR, STM32U5G9J-DK1, STM32U5G9J-DK2, STM32U5G9NJH6Q, STM32U5G9VJT6Q, STM32U5G9ZJJ6QTR, STM32U5G9ZJT6Q, STM32WB05KZV6TR, STM32WB05KZV7TR, STM32WB05TZF6TR, STM32WB05TZF7TR, STM32WB06CCF6TR, STM32WB06CCF7TR, STM32WB06CCV6TR, STM32WB06CCV7TR, STM32WB06KCV6TR, STM32WB06KCV7TR, STM32WB07CCF6TR, STM32WB07CCF7TR, STM32WB07CCV6TR, STM32WB07CCV7TR, STM32WB07KCV6TR, STM32WB07KCV7TR, STM32WB09KEV6TR, STM32WB09KEV7TR, STM32WB09TEF6TR, STM32WB09TEF7TR, STM32WB1MMCH6, STM32WBA50KGU6, STM32WBA50KGU6TR, STM32WBA52CEU6, STM32WBA52CEU6TR, STM32WBA52CEU7, STM32WBA52CEU7TR, STM32WBA52CGU6, STM32WBA52CGU6TR, STM32WBA52CGU6U, STM32WBA52CGU7, STM32WBA52CGU7TR, STM32WBA52KEU6, STM32WBA52KEU6TR, STM32WBA52KGU6, STM32WBA52KGU6TR, STM32WBA54CEU6, STM32WBA54CEU6TR, STM32WBA54CEU7, STM32WBA54CEU7TR, STM32WBA54CGU6, STM32WBA54CGU6TR, STM32WBA54CGU7, STM32WBA54CGU7TR, STM32WBA54KEU6, STM32WBA54KEU6TR, STM32WBA54KEU7, STM32WBA54KEU7TR, STM32WBA54KGU6, STM32WBA54KGU6TR, STM32WBA54KGU7, STM32WBA54KGU7TR, STM32WBA55CEU6, STM32WBA55CEU6TR, STM32WBA55CEU7, STM32WBA55CEU7TR, STM32WBA55CGU6, STM32WBA55CGU6TR, STM32WBA55CGU6U, STM32WBA55CGU7, STM32WBA55CGU7TR, STM32WBA55G-DK1, STM32WBA55HEF6, STM32WBA55HEF7, STM32WBA55HGF6, STM32WBA55HGF7, STM32WBA55UEI6, STM32WBA55UEI6TR, STM32WBA55UEI7, STM32WBA55UEI7TR, STM32WBA55UGI6, STM32WBA55UGI6TR, STM32WBA55UGI7, STM32WBA55UGI7TR, STM32WBA5MMGH6TR, STM32WBA62MGF6, STM32WBA62MIF6, STM32WBA65MGF7, STM32WBA65MIF6, STM32WBA65MIF7, STM32WL30K8V6, STM32WL30KBV6, STM32WL31C8V6, STM32WL31CBV6, STM32WL31K8V6, STM32WL31KBV6, STM32WL33C8V6, STM32WL33C8V6X, STM32WL33CBV6, STM32WL33CBV6X, STM32WL33CCV6, STM32WL33CCV6A, STM32WL33CCV6X, STM32WL33K8V7, STM32WL33K8V7X, STM32WL33KBV7 , STM32WL33KBV7X, STM32WL33KCV7, STM32WL33KCV7X, STM32WL5MOCH6, STM32WL5MOCH6TR]
+2025-09-20 02:03:38,160 [INFO] DbMcus:218 - Found 4801 MCUs, 4801 are supported
+2025-09-20 02:03:38,161 [INFO] ApiDb:423 - Load user favorites file /home/ja/.stm32cubeide/favorites.mcus.txt: 0 item(s)
+2025-09-20 02:03:38,162 [INFO] ApiDb:427 - User favorites MCUs=[]
+2025-09-20 02:03:38,162 [INFO] DbMcus:224 - Set 0 / 0 favorites MCUs
+2025-09-20 02:03:39,907 [INFO] ApiDb:414 - User favorites file not found: /home/ja/.stm32cubeide/favorites.boards.txt
+2025-09-20 02:03:39,908 [INFO] DbBoards:198 - Set 0 / 0 favorites Boards
+2025-09-20 02:03:39,963 [INFO] UtilMem:75 - End LoadConfig() Used Memory: 681168496 Bytes (912261120)
+2025-09-20 02:03:40,343 [WARN] ThirdParty:833 - waiting for thirdparty lock release [change project]
+2025-09-20 02:03:40,344 [INFO] ThirdParty:835 - entering critical section [change project]
+2025-09-20 02:03:40,344 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-PM33A1 1.0.0
+2025-09-20 02:03:40,344 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USBPD 4.1
+2025-09-20 02:03:40,345 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC9 1.0.0
+2025-09-20 02:03:40,345 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_HOST 2.0.0
+2025-09-20 02:03:40,345 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-MOTENVWB1 1.4.0
+2025-09-20 02:03:40,345 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-F4 1.1.0
+2025-09-20 02:03:40,345 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics LIBJPEG 8.0.0
+2025-09-20 02:03:40,345 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-ATR-ASTRA1 2.0.2
+2025-09-20 02:03:40,345 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfSSL 5.8.2
+2025-09-20 02:03:40,345 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLE1 7.1.0
+2025-09-20 02:03:40,345 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :Avnet-IotConnect X-CUBE-IoTC-DA16k-PMOD 1.0.0
+2025-09-20 02:03:40,346 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SMBUS 2.1.0
+2025-09-20 02:03:40,346 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfMQTT 1.19.2
+2025-09-20 02:03:40,346 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 3.0.0
+2025-09-20 02:03:40,346 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ISPU 2.1.0
+2025-09-20 02:03:40,346 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-EEPRMA1 5.2.0
+2025-09-20 02:03:40,346 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLEMGR 4.1.0
+2025-09-20 02:03:40,346 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-WB 2.0.0
+2025-09-20 02:03:40,346 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ST60 1.0.0
+2025-09-20 02:03:40,346 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-GNSS1 7.0.1
+2025-09-20 02:03:40,346 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC12 1.0.0
+2025-09-20 02:03:40,346 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-F7 1.1.0
+2025-09-20 02:03:40,347 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-L5 2.0.0
+2025-09-20 02:03:40,347 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TOUCHGFX 4.25.0
+2025-09-20 02:03:40,347 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 2.0.0
+2025-09-20 02:03:40,347 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC6 3.1.0
+2025-09-20 02:03:40,347 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :quantropi X-CUBE-qispace-sdk-base 2.1.0
+2025-09-20 02:03:40,347 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FreeRTOS 0.0.1
+2025-09-20 02:03:40,347 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-G0 1.1.0
+2025-09-20 02:03:40,347 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SAFEA1 1.2.2
+2025-09-20 02:03:40,347 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC4 3.0.0
+2025-09-20 02:03:40,347 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SUBG2 5.0.0
+2025-09-20 02:03:40,347 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-H7RS 1.1.0
+2025-09-20 02:03:40,348 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics STM32_WPAN 1.0.0
+2025-09-20 02:03:40,348 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :EmbeddedOffice I-CUBE-FS-RTOS 1.0.1
+2025-09-20 02:03:40,348 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics lwIP 2.0.3
+2025-09-20 02:03:40,348 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :WES I-CUBE-Cesium 1.4.0
+2025-09-20 02:03:40,348 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :Cesanta I-CUBE-Mongoose 7.13.0
+2025-09-20 02:03:40,348 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_HOST 1.0.0
+2025-09-20 02:03:40,348 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :Infineon AIROC-Wi-Fi-Bluetooth-STM32 1.7.1
+2025-09-20 02:03:40,348 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-G4 2.0.0
+2025-09-20 02:03:40,348 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-WB05N 2.0.0
+2025-09-20 02:03:40,349 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.1.0
+2025-09-20 02:03:40,349 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.3.0
+2025-09-20 02:03:40,349 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfTPM 3.8.0
+2025-09-20 02:03:40,349 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-H7 3.4.0
+2025-09-20 02:03:40,349 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-DISPLAY 3.0.0
+2025-09-20 02:03:40,349 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfSSH 1.4.20
+2025-09-20 02:03:40,350 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC7 2.0.0
+2025-09-20 02:03:40,350 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TCPP 4.2.0
+2025-09-20 02:03:40,350 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :RealThread X-CUBE-RT-Thread_Nano 4.1.1
+2025-09-20 02:03:40,350 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-ATR-SIGFOX1 3.2.0
+2025-09-20 02:03:40,350 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC10 1.0.0
+2025-09-20 02:03:40,350 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-FREERTOS 1.3.1
+2025-09-20 02:03:40,351 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics HAL Drivers 0.0.0
+2025-09-20 02:03:40,351 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics MBEDTLS 2.16.2
+2025-09-20 02:03:40,351 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-IPS 3.1.0
+2025-09-20 02:03:40,351 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ALS 1.0.2
+2025-09-20 02:03:40,351 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :emotas I-CUBE-CANOPEN 1.3.0
+2025-09-20 02:03:40,351 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics MBEDTLS 2.14.1
+2025-09-20 02:03:40,351 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :ITTIA_DB I-CUBE-ITTIADB 8.9.0
+2025-09-20 02:03:40,351 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-STSE01 1.0.0
+2025-09-20 02:03:40,352 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :portGmbH I-Cube-SoM-uGOAL 1.1.0
+2025-09-20 02:03:40,352 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ST67W61 1.0.0
+2025-09-20 02:03:40,352 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-STBOX1 2.1.0
+2025-09-20 02:03:40,352 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AI 10.2.0
+2025-09-20 02:03:40,352 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-STAIOTCFT 1.0.0
+2025-09-20 02:03:40,352 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics ThreadX 1.0.0
+2025-09-20 02:03:40,352 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-SMARTAG2 1.2.0
+2025-09-20 02:03:40,352 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-FLIGHT1 5.1.0
+2025-09-20 02:03:40,352 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-WL 2.0.0
+2025-09-20 02:03:40,352 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :SEGGER I-CUBE-embOS 1.3.1
+2025-09-20 02:03:40,353 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ALGOBUILD 1.4.0
+2025-09-20 02:03:40,353 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-DPower 1.3.0
+2025-09-20 02:03:40,353 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-MEMS1 11.3.0
+2025-09-20 02:03:40,353 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-MOTENV1 5.0.0
+2025-09-20 02:03:40,353 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 1.0.0
+2025-09-20 02:03:40,353 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-L4 2.0.0
+2025-09-20 02:03:40,353 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics ThreadX 0.0.2
+2025-09-20 02:03:40,354 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics lwIP 2.1.2
+2025-09-20 02:03:40,354 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SFXS2LP1 4.0.0
+2025-09-20 02:03:40,354 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLE2 3.3.0
+2025-09-20 02:03:40,354 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TOF1 3.4.3
+2025-09-20 02:03:40,354 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.2.0
+2025-09-20 02:03:40,354 [INFO] ThirdParty:841 - exiting critical section [change project]
+2025-09-20 02:03:41,895 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-09-20 02:03:41,900 [INFO] PinOutPanel:1589 - setPackage(STM32F429ZITx,LQFP144)
+2025-09-20 02:03:43,685 [INFO] UtilMem:75 - Before build in PCC Used Memory: 660889184 Bytes (931135488)
+2025-09-20 02:03:46,004 [INFO] UtilMem:75 - After build in PCC Used Memory: 884374320 Bytes (931135488)
+2025-09-20 02:03:46,293 [INFO] ApiDbMcu:532 - Load IP Config File for FREERTOS
+2025-09-20 02:03:46,376 [INFO] ApiDbMcu:532 - Load IP Config File for USB_HOST
+2025-09-20 02:03:46,668 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,671 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,672 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,672 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,672 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,675 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,676 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,676 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,677 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,677 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,678 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,678 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,679 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,679 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,680 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,680 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,681 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,681 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,682 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,682 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,683 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,684 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,685 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,686 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,687 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,687 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,688 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,689 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,690 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,691 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,754 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,763 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,763 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,764 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,764 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,765 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,766 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,767 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,768 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,769 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,769 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,769 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,770 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,770 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,770 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,771 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,771 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,771 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,772 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,773 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,773 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,775 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,778 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,785 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,787 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,790 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,792 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,794 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,801 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,808 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,814 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,817 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,820 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,822 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,824 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,826 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:03:46,856 [INFO] ApiDbMcu:532 - Load IP Config File for PDM2PCM
+2025-09-20 02:03:47,093 [WARN] FreeRTOS:1023 - Null or empty value: should not occur! (nothing added to the table)
+2025-09-20 02:03:48,720 [INFO] CADModel:165 - CPN selected for project levelSTM32F429ZIT6
+2025-09-20 02:03:48,720 [INFO] CADModel:114 - Register for checkConnection events
+2025-09-20 02:03:48,733 [INFO] RtosManager:728 - Active RTOS found at IOC load: FREERTOS [Cortex-M4NS]
+2025-09-20 02:03:48,834 [INFO] OpenFileManager:386 - Restore cursor
+2025-09-20 02:03:49,932 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:04:53,421 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:04:53,688 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:04:53,879 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:05:07,215 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:05:07,460 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:05:07,670 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:05:24,373 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:05:24,615 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:05:24,812 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:06:43,157 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:07:00,737 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:07:03,844 [INFO] CADModel:198 - CPN selected (Project mode): STM32F429ZIT6
+2025-09-20 02:07:03,844 [INFO] CADModel:200 - Internet connection configuration mode: 1
+2025-09-20 02:07:03,844 [INFO] CADModel:203 - rpn retrievedSTM32F429ZI
+2025-09-20 02:07:03,852 [INFO] WebAppUi:336 - Instantiating new browser for Project
+2025-09-20 02:07:04,060 [INFO] WebAppUi:1235 - Register for checkConnection events
+2025-09-20 02:07:04,061 [INFO] WebAppUi:1270 - Apply proxy settings
+2025-09-20 02:07:04,062 [INFO] WebAppUi:1308 - Chromium requires no authentication
+2025-09-20 02:07:04,063 [INFO] WebAppUi:1294 - Direct internet connection detected
+2025-09-20 02:07:04,075 [INFO] WebAppUi:1166 - Web application path used /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659/db/plugins/mcufinder/reactClient/index.html
+2025-09-20 02:07:04,099 [INFO] WebAppUi:938 - Path where api_config.json is located /home/ja/.stmcufinder/plugins/mcufinder//mcu/api_config.json
+2025-09-20 02:07:04,100 [INFO] WebAppUi:939 - Setting api config in window object
+2025-09-20 02:07:04,163 [INFO] WebAppUi:947 - Path where cad_preferences.json is located /home/ja/.stm32cubeide/
+2025-09-20 02:07:04,163 [INFO] WebAppUi:948 - Setting consent info in window object
+2025-09-20 02:07:05,379 [INFO] WebAppUi:843 - Allow Downloads
+2025-09-20 02:07:05,381 [INFO] WebAppUi:336 - Instantiating new browser for Finder
+2025-09-20 02:07:05,604 [INFO] WebAppUi:1100 - Web application message: [UlApiManager component] Connected to Ultra Librarian SSO
+2025-09-20 02:07:05,604 [INFO] WebAppUi:1100 - Web application message: [UlApiManager component] Connected to Ultra Librarian API
+2025-09-20 02:07:05,642 [INFO] WebAppUi:1235 - Register for checkConnection events
+2025-09-20 02:07:05,642 [INFO] WebAppUi:1270 - Apply proxy settings
+2025-09-20 02:07:05,643 [INFO] WebAppUi:1308 - Chromium requires no authentication
+2025-09-20 02:07:05,643 [INFO] WebAppUi:1294 - Direct internet connection detected
+2025-09-20 02:07:05,659 [INFO] WebAppUi:1166 - Web application path used /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659/db/plugins/mcufinder/reactClient/index.html
+2025-09-20 02:07:05,685 [INFO] WebAppUi:938 - Path where api_config.json is located /home/ja/.stmcufinder/plugins/mcufinder//mcu/api_config.json
+2025-09-20 02:07:05,685 [INFO] WebAppUi:939 - Setting api config in window object
+2025-09-20 02:07:05,741 [INFO] WebAppUi:947 - Path where cad_preferences.json is located /home/ja/.stm32cubeide/
+2025-09-20 02:07:05,741 [INFO] WebAppUi:948 - Setting consent info in window object
+2025-09-20 02:07:06,876 [INFO] WebAppUi:843 - Allow Downloads
+2025-09-20 02:07:06,877 [INFO] WebAppUi:664 - RPN selected STM32F429ZI
+2025-09-20 02:07:06,877 [INFO] WebAppUi:665 - RefName selected STM32F429ZITx
+2025-09-20 02:07:06,878 [INFO] WebAppUi:666 - CPN selected STM32F429ZIT6
+2025-09-20 02:07:06,881 [INFO] WebAppUi:829 - Which Bigleton in use 2 and which CPN is about STM32F429ZIT6
+2025-09-20 02:07:06,891 [INFO] WebAppUi:703 - Have injected Javascript into web application
+2025-09-20 02:07:06,892 [INFO] WebAppUiContainer:153 - Web application run mode: Project CPN: STM32F429ZIT6
+2025-09-20 02:07:09,274 [INFO] WebAppUi:938 - Path where api_config.json is located /home/ja/.stmcufinder/plugins/mcufinder//mcu/api_config.json
+2025-09-20 02:07:09,275 [INFO] WebAppUi:939 - Setting api config in window object
+2025-09-20 02:07:09,326 [INFO] WebAppUi:947 - Path where cad_preferences.json is located /home/ja/.stm32cubeide/
+2025-09-20 02:07:09,326 [INFO] WebAppUi:948 - Setting consent info in window object
+2025-09-20 02:07:09,619 [INFO] WebAppUi:1100 - Web application message: THREE.WebGLRenderer 101
+2025-09-20 02:07:13,023 [INFO] WebAppUi:305 - Path where cad_preferences.json is located /home/ja/.stm32cubeide/
+2025-09-20 02:07:13,023 [INFO] WebAppUi:306 - Updating consent from JSON file
+2025-09-20 02:07:13,030 [INFO] WebAppUi:305 - Path where cad_preferences.json is located /home/ja/.stm32cubeide/
+2025-09-20 02:07:13,030 [INFO] WebAppUi:306 - Updating consent from JSON file
+2025-09-20 02:07:13,040 [INFO] WebAppUi:305 - Path where cad_preferences.json is located /home/ja/.stm32cubeide/
+2025-09-20 02:07:13,041 [INFO] WebAppUi:306 - Updating consent from JSON file
+2025-09-20 02:07:13,714 [INFO] WebAppUi:305 - Path where cad_preferences.json is located /home/ja/.stm32cubeide/
+2025-09-20 02:07:13,714 [INFO] WebAppUi:306 - Updating consent from JSON file
+2025-09-20 02:07:13,720 [INFO] WebAppUi:305 - Path where cad_preferences.json is located /home/ja/.stm32cubeide/
+2025-09-20 02:07:13,721 [INFO] WebAppUi:306 - Updating consent from JSON file
+2025-09-20 02:07:13,726 [INFO] WebAppUi:305 - Path where cad_preferences.json is located /home/ja/.stm32cubeide/
+2025-09-20 02:07:13,726 [INFO] WebAppUi:306 - Updating consent from JSON file
+2025-09-20 02:07:15,502 [INFO] MainUpdater:2872 - connection check result : 10
+2025-09-20 02:07:15,502 [INFO] MainUpdater:2872 - connection check result : 10
+2025-09-20 02:07:16,705 [INFO] MicroXplorer:468 - Change Database Path : 
+2025-09-20 02:07:16,705 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-09-20 02:07:16,731 [ERROR] ProjectManagerView:395 - 
+java.lang.NullPointerException: Cannot invoke "javax.swing.JTextField.getText()" because the return value of "java.util.List.get(int)" is null
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab$9.caretUpdate(ProjectChoiceTab.java:2706) ~[filemanager.jar:?]
+	at javax.swing.text.JTextComponent.fireCaretUpdate(JTextComponent.java:408) ~[?:?]
+	at javax.swing.text.JTextComponent$MutableCaretEvent.fire(JTextComponent.java:4484) ~[?:?]
+	at javax.swing.text.JTextComponent$MutableCaretEvent.stateChanged(JTextComponent.java:4506) ~[?:?]
+	at javax.swing.text.DefaultCaret.fireStateChanged(DefaultCaret.java:857) ~[?:?]
+	at javax.swing.text.DefaultCaret.changeCaretPosition(DefaultCaret.java:1343) ~[?:?]
+	at javax.swing.text.DefaultCaret.handleSetDot(DefaultCaret.java:1242) ~[?:?]
+	at javax.swing.text.DefaultCaret.setDot(DefaultCaret.java:1223) ~[?:?]
+	at javax.swing.text.DefaultCaret$Handler.insertUpdate(DefaultCaret.java:1819) ~[?:?]
+	at javax.swing.text.AbstractDocument.fireInsertUpdate(AbstractDocument.java:227) ~[?:?]
+	at javax.swing.text.AbstractDocument.handleInsertString(AbstractDocument.java:781) ~[?:?]
+	at javax.swing.text.AbstractDocument.insertString(AbstractDocument.java:740) ~[?:?]
+	at javax.swing.text.PlainDocument.insertString(PlainDocument.java:131) ~[?:?]
+	at javax.swing.text.AbstractDocument.replace(AbstractDocument.java:699) ~[?:?]
+	at javax.swing.text.JTextComponent.setText(JTextComponent.java:1725) ~[?:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.createHeapStackFields(ProjectChoiceTab.java:993) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.buildLinkSettingsPanel(ProjectChoiceTab.java:3813) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.defineWindowsFields(ProjectChoiceTab.java:1987) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.updateSettings(ProjectChoiceTab.java:558) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectSettingsPanel.UpdateDialog(ProjectSettingsPanel.java:247) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.ProjectManagerView.propertyChange(ProjectManagerView.java:392) ~[filemanager.jar:?]
+	at java.beans.PropertyChangeSupport.fire(PropertyChangeSupport.java:343) ~[?:?]
+	at java.beans.PropertyChangeSupport.firePropertyChange(PropertyChangeSupport.java:335) ~[?:?]
+	at java.beans.PropertyChangeSupport.firePropertyChange(PropertyChangeSupport.java:268) ~[?:?]
+	at com.st.microxplorer.util.MXPropertyChangeSupport.firePropertyChange(MXPropertyChangeSupport.java:54) ~[STM32CubeMX.jar:?]
+	at com.st.microxplorer.mxsystem.MxSystem.closeConfig(MxSystem.java:899) ~[STM32CubeMX.jar:?]
+	at com.st.microxplorer.maingui.MainPanel.closeConfig(MainPanel.java:792) ~[STM32CubeMX.jar:?]
+	at com.st.microxplorer.plugins.filemanager.engine.OpenFileManager.loadConfigurationFile(OpenFileManager.java:288) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.filemanager.engine.MainFileManager.userLoadConfig(MainFileManager.java:364) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.filemanager.engine.MainFileManager.userLoadConfig(MainFileManager.java:342) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.filemanager.FileManagerView.getSpecificTask(FileManagerView.java:264) ~[filemanager.jar:?]
+	at com.st.stm32cube.common.mx.editor.CubeMxEditor.getMxTabbedPaneInstance(CubeMxEditor.java:1198) ~[com.st.stm32cube.common.mx_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.editor.CubeMxEditor$12$1.createSwingComponent(CubeMxEditor.java:1068) ~[com.st.stm32cube.common.mx_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.EmbeddedSwingComposite.doComponentCreation(EmbeddedSwingComposite.java:492) ~[com.st.stm32cube.common.mx.oss_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.EmbeddedSwingComposite$4.run(EmbeddedSwingComposite.java:291) ~[com.st.stm32cube.common.mx.oss_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.AwtEnvironment$2.run(AwtEnvironment.java:166) ~[com.st.stm32cube.common.mx.oss_6.15.0.202507011659/:?]
+	at java.awt.event.InvocationEvent.dispatch(InvocationEvent.java:318) ~[?:?]
+	at java.awt.EventQueue.dispatchEventImpl(EventQueue.java:773) ~[?:?]
+	at java.awt.EventQueue$4.run(EventQueue.java:720) ~[?:?]
+	at java.awt.EventQueue$4.run(EventQueue.java:714) ~[?:?]
+	at java.security.AccessController.doPrivileged(AccessController.java:400) ~[?:?]
+	at java.security.ProtectionDomain$JavaSecurityAccessImpl.doIntersectionPrivilege(ProtectionDomain.java:87) ~[?:?]
+	at java.awt.EventQueue.dispatchEvent(EventQueue.java:742) ~[?:?]
+	at java.awt.EventDispatchThread.pumpOneEventForFilters(EventDispatchThread.java:203) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEventsForFilter(EventDispatchThread.java:124) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEventsForHierarchy(EventDispatchThread.java:113) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:109) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:101) ~[?:?]
+	at java.awt.EventDispatchThread.run(EventDispatchThread.java:90) ~[?:?]
+2025-09-20 02:07:16,742 [WARN] ThirdParty:871 - waiting for thirdparty lock release [close project]
+2025-09-20 02:07:16,743 [INFO] ThirdParty:873 - entering critical section [close project]
+2025-09-20 02:07:16,743 [INFO] ThirdParty:883 - exiting critical section [close project]
+2025-09-20 02:07:16,747 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-09-20 02:07:16,779 [WARN] IpParametersView:155 - Warning: This peripheral hasn't parameters
+2025-09-20 02:07:16,806 [WARN] MainPanel:289 - <html><b><center>Warning: This peripheral has no parameters to be configured<br></b></html>
+2025-09-20 02:07:16,824 [INFO] UtilMem:75 - Begin LoadConfig() Used Memory: 937710736 Bytes (1073741824)
+2025-09-20 02:07:16,826 [INFO] MicroXplorer:468 - Change Database Path : 
+2025-09-20 02:07:16,826 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-09-20 02:07:16,826 [INFO] OpenFileManager:355 - Change cursor
+2025-09-20 02:07:16,844 [INFO] Mcu:2029 - Initializing MCU STM32F429ZITx STM32F429ZITx STM32F429ZIT6
+2025-09-20 02:07:20,064 [INFO] Context:786 - Trying to add GPIOservice into a context  which must be forbidden
+2025-09-20 02:07:20,970 [INFO] ImportTextPane:234 - (OptionalMessage_ERROR) Pin98 (VP_RIF_VS_RIF1) cannot be retrieved for this MCU
+2025-09-20 02:07:21,028 [INFO] RtosManager:558 - Registered RTOS mode: class=CMSIS, group=RTOS, mode=CMSIS_V1, owner=FREERTOS
+2025-09-20 02:07:21,029 [INFO] RtosManager:558 - Registered RTOS mode: class=CMSIS, group=RTOS2, mode=CMSIS_V2, owner=FREERTOS
+2025-09-20 02:07:21,029 [INFO] RtosManager:558 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V1, owner=FREERTOS
+2025-09-20 02:07:21,029 [INFO] RtosManager:558 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V2, owner=FREERTOS
+2025-09-20 02:07:21,029 [WARN] ModelIntegratedComponent:184 - Missing modes for component STMicroelectronics:FreeRTOS:0.0.1:STMicroelectronics:RTOS:FreeRTOS:Core:::10.2.0:
+2025-09-20 02:07:21,044 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,045 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,046 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,046 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,046 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,046 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,046 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,046 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,046 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,046 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,046 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,046 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,047 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,047 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,047 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,047 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,047 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,047 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,047 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,047 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,047 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,047 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,047 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,047 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,048 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,048 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,048 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,048 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,048 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,048 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,048 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,048 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,048 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,048 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,049 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:07:21,049 [WARN] ModelPack:524 - Component already loaded: STMicroelectronics:HAL Drivers:0.0.0:STMicroelectronics:Device:STMicro_Driver:XSPI:HAL::0.0.1:HAL_XSPI
+2025-09-20 02:07:21,238 [INFO] ThirdPartyModel:298 - Start build external matchings
+2025-09-20 02:07:22,430 [INFO] ThirdPartyModel:316 - End build external matchings
+2025-09-20 02:07:22,458 [INFO] RtosManager:1018 - Current active RTOS is FREERTOS [Cortex-M4NS]
+2025-09-20 02:07:22,473 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:07:22,474 [INFO] ImportTextPane:234 - (OptionalMessage_ERROR) IP (RCC) : Invalid parameter (FamilyName)
+2025-09-20 02:07:22,475 [INFO] ImportTextPane:234 - (OptionalMessage_ERROR) IP (RCC) : Parameter (RTCHSEDivFreq_Value) has invalid value (4000000)
+2025-09-20 02:07:22,781 [INFO] UtilMem:75 - End LoadConfig() Used Memory: 898155800 Bytes (1073741824)
+2025-09-20 02:07:22,800 [WARN] ThirdParty:833 - waiting for thirdparty lock release [change project]
+2025-09-20 02:07:22,800 [INFO] ThirdParty:835 - entering critical section [change project]
+2025-09-20 02:07:22,801 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-PM33A1 1.0.0
+2025-09-20 02:07:22,801 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USBPD 4.1
+2025-09-20 02:07:22,801 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC9 1.0.0
+2025-09-20 02:07:22,801 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_HOST 2.0.0
+2025-09-20 02:07:22,801 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-MOTENVWB1 1.4.0
+2025-09-20 02:07:22,801 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-F4 1.1.0
+2025-09-20 02:07:22,801 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics LIBJPEG 8.0.0
+2025-09-20 02:07:22,801 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-ATR-ASTRA1 2.0.2
+2025-09-20 02:07:22,801 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfSSL 5.8.2
+2025-09-20 02:07:22,802 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLE1 7.1.0
+2025-09-20 02:07:22,802 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :Avnet-IotConnect X-CUBE-IoTC-DA16k-PMOD 1.0.0
+2025-09-20 02:07:22,802 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SMBUS 2.1.0
+2025-09-20 02:07:22,802 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfMQTT 1.19.2
+2025-09-20 02:07:22,802 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 3.0.0
+2025-09-20 02:07:22,802 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ISPU 2.1.0
+2025-09-20 02:07:22,803 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-EEPRMA1 5.2.0
+2025-09-20 02:07:22,803 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLEMGR 4.1.0
+2025-09-20 02:07:22,803 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-WB 2.0.0
+2025-09-20 02:07:22,803 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ST60 1.0.0
+2025-09-20 02:07:22,803 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-GNSS1 7.0.1
+2025-09-20 02:07:22,803 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC12 1.0.0
+2025-09-20 02:07:22,803 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-F7 1.1.0
+2025-09-20 02:07:22,804 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-L5 2.0.0
+2025-09-20 02:07:22,804 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TOUCHGFX 4.25.0
+2025-09-20 02:07:22,804 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 2.0.0
+2025-09-20 02:07:22,804 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC6 3.1.0
+2025-09-20 02:07:22,804 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :quantropi X-CUBE-qispace-sdk-base 2.1.0
+2025-09-20 02:07:22,804 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FreeRTOS 0.0.1
+2025-09-20 02:07:22,804 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-G0 1.1.0
+2025-09-20 02:07:22,805 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SAFEA1 1.2.2
+2025-09-20 02:07:22,805 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC4 3.0.0
+2025-09-20 02:07:22,805 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SUBG2 5.0.0
+2025-09-20 02:07:22,805 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-H7RS 1.1.0
+2025-09-20 02:07:22,805 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics STM32_WPAN 1.0.0
+2025-09-20 02:07:22,805 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :EmbeddedOffice I-CUBE-FS-RTOS 1.0.1
+2025-09-20 02:07:22,805 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics lwIP 2.0.3
+2025-09-20 02:07:22,805 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :WES I-CUBE-Cesium 1.4.0
+2025-09-20 02:07:22,805 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :Cesanta I-CUBE-Mongoose 7.13.0
+2025-09-20 02:07:22,805 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_HOST 1.0.0
+2025-09-20 02:07:22,806 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :Infineon AIROC-Wi-Fi-Bluetooth-STM32 1.7.1
+2025-09-20 02:07:22,806 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-G4 2.0.0
+2025-09-20 02:07:22,806 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-WB05N 2.0.0
+2025-09-20 02:07:22,806 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.1.0
+2025-09-20 02:07:22,806 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.3.0
+2025-09-20 02:07:22,806 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfTPM 3.8.0
+2025-09-20 02:07:22,806 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-H7 3.4.0
+2025-09-20 02:07:22,806 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-DISPLAY 3.0.0
+2025-09-20 02:07:22,806 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfSSH 1.4.20
+2025-09-20 02:07:22,807 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC7 2.0.0
+2025-09-20 02:07:22,807 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TCPP 4.2.0
+2025-09-20 02:07:22,807 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :RealThread X-CUBE-RT-Thread_Nano 4.1.1
+2025-09-20 02:07:22,807 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-ATR-SIGFOX1 3.2.0
+2025-09-20 02:07:22,807 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC10 1.0.0
+2025-09-20 02:07:22,807 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-FREERTOS 1.3.1
+2025-09-20 02:07:22,807 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics HAL Drivers 0.0.0
+2025-09-20 02:07:22,807 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics MBEDTLS 2.16.2
+2025-09-20 02:07:22,807 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-IPS 3.1.0
+2025-09-20 02:07:22,808 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ALS 1.0.2
+2025-09-20 02:07:22,808 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :emotas I-CUBE-CANOPEN 1.3.0
+2025-09-20 02:07:22,808 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics MBEDTLS 2.14.1
+2025-09-20 02:07:22,808 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :ITTIA_DB I-CUBE-ITTIADB 8.9.0
+2025-09-20 02:07:22,808 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-STSE01 1.0.0
+2025-09-20 02:07:22,808 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :portGmbH I-Cube-SoM-uGOAL 1.1.0
+2025-09-20 02:07:22,809 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ST67W61 1.0.0
+2025-09-20 02:07:22,809 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-STBOX1 2.1.0
+2025-09-20 02:07:22,809 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AI 10.2.0
+2025-09-20 02:07:22,809 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-STAIOTCFT 1.0.0
+2025-09-20 02:07:22,809 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics ThreadX 1.0.0
+2025-09-20 02:07:22,809 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-SMARTAG2 1.2.0
+2025-09-20 02:07:22,809 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-FLIGHT1 5.1.0
+2025-09-20 02:07:22,810 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-WL 2.0.0
+2025-09-20 02:07:22,810 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :SEGGER I-CUBE-embOS 1.3.1
+2025-09-20 02:07:22,810 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ALGOBUILD 1.4.0
+2025-09-20 02:07:22,810 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-DPower 1.3.0
+2025-09-20 02:07:22,810 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-MEMS1 11.3.0
+2025-09-20 02:07:22,810 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-MOTENV1 5.0.0
+2025-09-20 02:07:22,810 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 1.0.0
+2025-09-20 02:07:22,810 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-L4 2.0.0
+2025-09-20 02:07:22,810 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics ThreadX 0.0.2
+2025-09-20 02:07:22,810 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics lwIP 2.1.2
+2025-09-20 02:07:22,811 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SFXS2LP1 4.0.0
+2025-09-20 02:07:22,811 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLE2 3.3.0
+2025-09-20 02:07:22,811 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TOF1 3.4.3
+2025-09-20 02:07:22,811 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.2.0
+2025-09-20 02:07:22,811 [INFO] ThirdParty:841 - exiting critical section [change project]
+2025-09-20 02:07:23,397 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-09-20 02:07:23,398 [INFO] PinOutPanel:1589 - setPackage(STM32F429ZITx,LQFP144)
+2025-09-20 02:07:23,916 [INFO] UtilMem:75 - Before build in PCC Used Memory: 644194520 Bytes (1073741824)
+2025-09-20 02:07:24,500 [INFO] UtilMem:75 - After build in PCC Used Memory: 692955352 Bytes (1073741824)
+2025-09-20 02:07:24,513 [INFO] ApiDbMcu:532 - Load IP Config File for FREERTOS
+2025-09-20 02:07:24,528 [INFO] ApiDbMcu:532 - Load IP Config File for USB_HOST
+2025-09-20 02:07:24,615 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,615 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,615 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,615 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,616 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,616 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,617 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,617 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,617 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,618 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,618 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,619 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,619 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,620 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,620 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,621 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,621 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,621 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,622 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,623 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,624 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,624 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,625 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,626 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,627 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,628 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,628 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,629 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,630 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,631 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,631 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,632 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,633 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,633 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,633 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,634 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,634 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,635 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,635 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,636 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,636 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,636 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,636 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,637 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,637 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,637 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,637 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,638 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,638 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,638 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,638 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,639 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,639 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,640 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,641 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,642 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,643 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,644 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,645 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,646 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,647 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,649 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,650 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,652 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,654 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,656 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:07:24,663 [INFO] ApiDbMcu:532 - Load IP Config File for PDM2PCM
+2025-09-20 02:07:24,701 [WARN] FreeRTOS:1023 - Null or empty value: should not occur! (nothing added to the table)
+2025-09-20 02:07:24,921 [INFO] CADModel:165 - CPN selected for project levelSTM32F429ZIT6
+2025-09-20 02:07:24,921 [INFO] CADModel:114 - Register for checkConnection events
+2025-09-20 02:07:24,927 [INFO] RtosManager:728 - Active RTOS found at IOC load: FREERTOS [Cortex-M4NS]
+2025-09-20 02:07:25,036 [INFO] OpenFileManager:386 - Restore cursor
+2025-09-20 02:07:25,566 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:08:35,466 [INFO] WebAppUi:1100 - Web application message: WebGL: CONTEXT_LOST_WEBGL: loseContext: context lost
+2025-09-20 02:08:35,470 [INFO] WebAppUi:1100 - Web application message: THREE.WebGLRenderer: Context Lost.
+2025-09-20 02:09:08,705 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:09:09,025 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:09:09,282 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:09:21,020 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:09:21,201 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:09:21,348 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:09:31,550 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:09:31,837 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:09:32,083 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:17:31,086 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:18:24,367 [INFO] UtilMem:75 - End SaveConfig() Used Memory: 444424424 Bytes (940572672)
+2025-09-20 02:18:27,273 [INFO] UtilMem:75 - End SaveConfig() Used Memory: 467920792 Bytes (940572672)
+2025-09-20 02:18:33,675 [INFO] UtilMem:75 - End SaveConfig() Used Memory: 520875928 Bytes (940572672)
+2025-09-20 02:18:52,676 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: USB_OTG_HS
+2025-09-20 02:18:52,676 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: SPI
+2025-09-20 02:18:52,676 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: FREERTOS
+2025-09-20 02:18:52,676 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: TIM1_8
+2025-09-20 02:18:52,676 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: LTDC
+2025-09-20 02:18:52,676 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: SYS
+2025-09-20 02:18:52,676 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: RCC
+2025-09-20 02:18:52,676 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: CRC
+2025-09-20 02:18:52,676 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: I2C
+2025-09-20 02:18:52,676 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: NVIC
+2025-09-20 02:18:52,677 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: USB_HOST
+2025-09-20 02:18:52,677 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: DMA2D
+2025-09-20 02:18:52,677 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: USART
+2025-09-20 02:18:52,677 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: FMC
+2025-09-20 02:18:52,678 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: GPIO
+2025-09-20 02:18:52,679 [INFO] CodeGenerator:892 - code generatio: config db path: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db/
+2025-09-20 02:18:52,697 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:18:53,170 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/license.tmp_save
+2025-09-20 02:18:53,831 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/license.tmp
+2025-09-20 02:18:54,250 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/gpio.tmp_save
+2025-09-20 02:18:54,610 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/gpio.tmp
+2025-09-20 02:18:55,142 [WARN] IPConfigManager:3238 - Warning: the RefConfig PWREx_EnableUSBVoltageDetector is not available in your config.xml file
+2025-09-20 02:18:55,151 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/usb_otg_hs_vars.tmp_save
+2025-09-20 02:18:55,324 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/usb_otg_hs_vars.tmp
+2025-09-20 02:18:55,329 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/usb_otg_hs_inc.tmp_save
+2025-09-20 02:18:55,483 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/usb_otg_hs_inc.tmp
+2025-09-20 02:18:55,488 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/usb_otg_hs_HalInit.tmp_save
+2025-09-20 02:18:55,690 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/usb_otg_hs_HalInit.tmp
+2025-09-20 02:18:55,693 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/usb_otg_hs_Msp.tmp_save
+2025-09-20 02:18:55,917 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/usb_otg_hs_Msp.tmp
+2025-09-20 02:18:58,853 [INFO] Middleware:1452 - No code input for Bsp Dependency
+2025-09-20 02:18:58,862 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_inc.tmp_save
+2025-09-20 02:18:58,999 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_inc.tmp
+2025-09-20 02:18:59,003 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_vars.tmp_save
+2025-09-20 02:18:59,150 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_vars.tmp
+2025-09-20 02:18:59,156 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_pfp.tmp_save
+2025-09-20 02:18:59,304 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_pfp.tmp
+2025-09-20 02:18:59,307 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_obj_creat.tmp_save
+2025-09-20 02:18:59,459 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_obj_creat.tmp
+2025-09-20 02:18:59,463 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_kernelStart.tmp_save
+2025-09-20 02:18:59,629 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_kernelStart.tmp
+2025-09-20 02:18:59,635 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_default_thread.tmp_save
+2025-09-20 02:18:59,768 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_default_thread.tmp
+2025-09-20 02:18:59,773 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_threads.tmp_save
+2025-09-20 02:18:59,903 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_threads.tmp
+2025-09-20 02:18:59,946 [INFO] Middleware:1452 - No code input for Bsp Dependency
+2025-09-20 02:18:59,951 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_inc.tmp_save
+2025-09-20 02:19:00,070 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_inc.tmp
+2025-09-20 02:19:00,072 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_vars.tmp_save
+2025-09-20 02:19:00,183 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_vars.tmp
+2025-09-20 02:19:00,187 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_pfp.tmp_save
+2025-09-20 02:19:00,294 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_pfp.tmp
+2025-09-20 02:19:00,297 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_obj_creat.tmp_save
+2025-09-20 02:19:00,444 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_obj_creat.tmp
+2025-09-20 02:19:00,446 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_kernelStart.tmp_save
+2025-09-20 02:19:00,549 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_kernelStart.tmp
+2025-09-20 02:19:00,553 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_default_thread.tmp_save
+2025-09-20 02:19:00,663 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_default_thread.tmp
+2025-09-20 02:19:00,664 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_threads.tmp_save
+2025-09-20 02:19:00,763 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/rtos_threads.tmp
+2025-09-20 02:19:00,768 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/Core/Inc/FreeRTOSConfig.h_save
+2025-09-20 02:19:00,903 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/Core/Inc/FreeRTOSConfig.h
+2025-09-20 02:19:00,906 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/Core/Src/freertos.c_save
+2025-09-20 02:19:01,027 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/Core/Src/freertos.c
+2025-09-20 02:19:01,038 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/mx_fmc_HC.tmp_save
+2025-09-20 02:19:01,161 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/mx_fmc_HC.tmp
+2025-09-20 02:19:01,164 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/mx_fmc_GV.tmp_save
+2025-09-20 02:19:01,275 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/mx_fmc_GV.tmp
+2025-09-20 02:19:01,278 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/mx_fmc_MSP.tmp_save
+2025-09-20 02:19:01,486 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/mx_fmc_MSP.tmp
+2025-09-20 02:19:01,531 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/USB_HOST/App/usb_host.c_save
+2025-09-20 02:19:01,754 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/USB_HOST/App/usb_host.c
+2025-09-20 02:19:01,758 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/USB_HOST/App/usb_host.h_save
+2025-09-20 02:19:01,894 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/USB_HOST/App/usb_host.h
+2025-09-20 02:19:01,896 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/USB_HOST/Target/usbh_conf.h_save
+2025-09-20 02:19:02,050 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/USB_HOST/Target/usbh_conf.h
+2025-09-20 02:19:02,053 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/USB_HOST/Target/usbh_conf.c_save
+2025-09-20 02:19:02,196 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/USB_HOST/Target/usbh_conf.c
+2025-09-20 02:19:02,199 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/USB_HOST/Target/usbh_platform.c_save
+2025-09-20 02:19:02,341 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/USB_HOST/Target/usbh_platform.c
+2025-09-20 02:19:02,343 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/USB_HOST/Target/usbh_platform.h_save
+2025-09-20 02:19:02,470 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/USB_HOST/Target/usbh_platform.h
+2025-09-20 02:19:02,490 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/Core/Src/stm32f4xx_it.c_save
+2025-09-20 02:19:02,641 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/Core/Src/stm32f4xx_it.c
+2025-09-20 02:19:02,643 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/Core/Inc/stm32f4xx_it.h_save
+2025-09-20 02:19:02,810 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/Core/Inc/stm32f4xx_it.h
+2025-09-20 02:19:02,815 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/mx_fmc_HC.tmp_save
+2025-09-20 02:19:02,947 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/mx_fmc_HC.tmp
+2025-09-20 02:19:02,949 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/mx_fmc_GV.tmp_save
+2025-09-20 02:19:03,042 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/mx_fmc_GV.tmp
+2025-09-20 02:19:03,043 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/mx_fmc_MSP.tmp_save
+2025-09-20 02:19:03,178 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/mx_fmc_MSP.tmp
+2025-09-20 02:19:03,203 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/Core/Src/stm32f4xx_hal_msp.c_save
+2025-09-20 02:19:03,413 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/Core/Src/stm32f4xx_hal_msp.c
+2025-09-20 02:19:03,416 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/system.tmp_save
+2025-09-20 02:19:03,558 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/MXTmpFiles/system.tmp
+2025-09-20 02:19:03,579 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/Core/Src/stm32f4xx_hal_timebase_tim.c_save
+2025-09-20 02:19:03,711 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/Core/Src/stm32f4xx_hal_timebase_tim.c
+2025-09-20 02:19:03,720 [INFO] CodeEngine:321 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/Core/Inc/stm32f4xx_hal_conf.h_save
+2025-09-20 02:19:03,876 [INFO] CodeEngine:345 - Generated code: /home/ja/st/Home/TrafficLightsPlus/Core/Inc/stm32f4xx_hal_conf.h
+2025-09-20 02:19:03,954 [INFO] ApiDbMcu:532 - Load IP Config File for CRC
+2025-09-20 02:19:03,959 [INFO] ApiDbMcu:532 - Load IP Config File for DMA2D
+2025-09-20 02:19:03,977 [INFO] ApiDbMcu:532 - Load IP Config File for FMC
+2025-09-20 02:19:03,984 [INFO] ApiDbMcu:532 - Load IP Config File for I2C3
+2025-09-20 02:19:03,990 [INFO] ApiDbMcu:532 - Load IP Config File for LTDC
+2025-09-20 02:19:03,995 [INFO] ApiDbMcu:532 - Load IP Config File for SPI5
+2025-09-20 02:19:04,025 [INFO] ApiDbMcu:532 - Load IP Config File for TIM1
+2025-09-20 02:19:04,033 [INFO] ApiDbMcu:532 - Load IP Config File for USART1
+2025-09-20 02:19:04,043 [INFO] ApiDbMcu:532 - Load IP Config File for RCC
+2025-09-20 02:19:04,057 [WARN] IPConfigManager:3811 - IP not found : TIM
+2025-09-20 02:19:04,058 [WARN] CodeGenerator:4259 - IP not found : null
+2025-09-20 02:19:04,073 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/Core/Inc/main.h_save
+2025-09-20 02:19:04,311 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/Core/Inc/main.h
+2025-09-20 02:19:04,314 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlus/Core/Src/main.c_save
+2025-09-20 02:19:04,708 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlus/Core/Src/main.c
+2025-09-20 02:19:05,315 [INFO] ProjectBuilder:3606 - Time for Copy HAL[1] : 108mS.
+2025-09-20 02:19:05,334 [INFO] ProjectBuilder:5216 - Project Generator version: 4.7.0-B52
+2025-09-20 02:19:05,518 [INFO] ConfigFileManager:1595 - The Die is : DIE419
+2025-09-20 02:19:05,525 [INFO] ApiDbMcu:532 - Load IP Config File for FATFS
+2025-09-20 02:19:05,529 [INFO] ApiDbMcu:532 - Load IP Config File for LIBJPEG
+2025-09-20 02:19:05,554 [INFO] ApiDbMcu:532 - Load IP Config File for LWIP
+2025-09-20 02:19:05,564 [INFO] ApiDbMcu:532 - Load IP Config File for MBEDTLS
+2025-09-20 02:19:05,577 [INFO] ApiDbMcu:532 - Load IP Config File for USB_DEVICE
+2025-09-20 02:19:09,852 [INFO] LogOutputStream:77 - [STDOUT_REDIRECT] 
+2025-09-20 02:19:11,507 [INFO] ProjectBuilder:5496 - Time for Generating toolchain IDE Files: 6172mS.
+2025-09-20 02:19:11,508 [INFO] ProjectBuilder:3463 - Time for Copy CMSIS : 0mS.
+2025-09-20 02:19:11,511 [INFO] ProjectBuilder:3463 - Time for Copy CMSIS : 0mS.
+2025-09-20 02:22:38,224 [INFO] MainUpdater:2872 - connection check result : 10
+2025-09-20 02:22:38,225 [INFO] MainUpdater:2872 - connection check result : 10
+2025-09-20 02:22:38,280 [INFO] MicroXplorer:468 - Change Database Path : 
+2025-09-20 02:22:38,280 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-09-20 02:22:38,300 [ERROR] ProjectManagerView:395 - 
+java.lang.NullPointerException: Cannot invoke "javax.swing.JTextField.getText()" because the return value of "java.util.List.get(int)" is null
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab$9.caretUpdate(ProjectChoiceTab.java:2706) ~[filemanager.jar:?]
+	at javax.swing.text.JTextComponent.fireCaretUpdate(JTextComponent.java:408) ~[?:?]
+	at javax.swing.text.JTextComponent$MutableCaretEvent.fire(JTextComponent.java:4484) ~[?:?]
+	at javax.swing.text.JTextComponent$MutableCaretEvent.stateChanged(JTextComponent.java:4506) ~[?:?]
+	at javax.swing.text.DefaultCaret.fireStateChanged(DefaultCaret.java:857) ~[?:?]
+	at javax.swing.text.DefaultCaret.changeCaretPosition(DefaultCaret.java:1343) ~[?:?]
+	at javax.swing.text.DefaultCaret.handleSetDot(DefaultCaret.java:1242) ~[?:?]
+	at javax.swing.text.DefaultCaret.setDot(DefaultCaret.java:1223) ~[?:?]
+	at javax.swing.text.DefaultCaret$Handler.insertUpdate(DefaultCaret.java:1819) ~[?:?]
+	at javax.swing.text.AbstractDocument.fireInsertUpdate(AbstractDocument.java:227) ~[?:?]
+	at javax.swing.text.AbstractDocument.handleInsertString(AbstractDocument.java:781) ~[?:?]
+	at javax.swing.text.AbstractDocument.insertString(AbstractDocument.java:740) ~[?:?]
+	at javax.swing.text.PlainDocument.insertString(PlainDocument.java:131) ~[?:?]
+	at javax.swing.text.AbstractDocument.replace(AbstractDocument.java:699) ~[?:?]
+	at javax.swing.text.JTextComponent.setText(JTextComponent.java:1725) ~[?:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.createHeapStackFields(ProjectChoiceTab.java:993) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.buildLinkSettingsPanel(ProjectChoiceTab.java:3813) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.defineWindowsFields(ProjectChoiceTab.java:1987) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.updateSettings(ProjectChoiceTab.java:558) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectSettingsPanel.UpdateDialog(ProjectSettingsPanel.java:247) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.ProjectManagerView.propertyChange(ProjectManagerView.java:392) ~[filemanager.jar:?]
+	at java.beans.PropertyChangeSupport.fire(PropertyChangeSupport.java:343) ~[?:?]
+	at java.beans.PropertyChangeSupport.firePropertyChange(PropertyChangeSupport.java:335) ~[?:?]
+	at java.beans.PropertyChangeSupport.firePropertyChange(PropertyChangeSupport.java:268) ~[?:?]
+	at com.st.microxplorer.util.MXPropertyChangeSupport.firePropertyChange(MXPropertyChangeSupport.java:54) ~[STM32CubeMX.jar:?]
+	at com.st.microxplorer.mxsystem.MxSystem.closeConfig(MxSystem.java:899) ~[STM32CubeMX.jar:?]
+	at com.st.microxplorer.maingui.MainPanel.closeConfig(MainPanel.java:792) ~[STM32CubeMX.jar:?]
+	at com.st.microxplorer.plugins.filemanager.engine.OpenFileManager.loadConfigurationFile(OpenFileManager.java:288) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.filemanager.engine.MainFileManager.userLoadConfig(MainFileManager.java:364) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.filemanager.engine.MainFileManager.userLoadConfig(MainFileManager.java:342) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.filemanager.FileManagerView.getSpecificTask(FileManagerView.java:264) ~[filemanager.jar:?]
+	at com.st.stm32cube.common.mx.editor.CubeMxEditor.getMxTabbedPaneInstance(CubeMxEditor.java:1198) ~[com.st.stm32cube.common.mx_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.editor.CubeMxEditor$12$1.createSwingComponent(CubeMxEditor.java:1068) ~[com.st.stm32cube.common.mx_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.EmbeddedSwingComposite.doComponentCreation(EmbeddedSwingComposite.java:492) ~[com.st.stm32cube.common.mx.oss_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.EmbeddedSwingComposite$4.run(EmbeddedSwingComposite.java:291) ~[com.st.stm32cube.common.mx.oss_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.AwtEnvironment$2.run(AwtEnvironment.java:166) ~[com.st.stm32cube.common.mx.oss_6.15.0.202507011659/:?]
+	at java.awt.event.InvocationEvent.dispatch(InvocationEvent.java:318) ~[?:?]
+	at java.awt.EventQueue.dispatchEventImpl(EventQueue.java:773) ~[?:?]
+	at java.awt.EventQueue$4.run(EventQueue.java:720) ~[?:?]
+	at java.awt.EventQueue$4.run(EventQueue.java:714) ~[?:?]
+	at java.security.AccessController.doPrivileged(AccessController.java:400) ~[?:?]
+	at java.security.ProtectionDomain$JavaSecurityAccessImpl.doIntersectionPrivilege(ProtectionDomain.java:87) ~[?:?]
+	at java.awt.EventQueue.dispatchEvent(EventQueue.java:742) ~[?:?]
+	at java.awt.EventDispatchThread.pumpOneEventForFilters(EventDispatchThread.java:203) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEventsForFilter(EventDispatchThread.java:124) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEventsForHierarchy(EventDispatchThread.java:113) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:109) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:101) ~[?:?]
+	at java.awt.EventDispatchThread.run(EventDispatchThread.java:90) ~[?:?]
+2025-09-20 02:22:38,301 [WARN] ThirdParty:871 - waiting for thirdparty lock release [close project]
+2025-09-20 02:22:38,302 [INFO] ThirdParty:873 - entering critical section [close project]
+2025-09-20 02:22:38,302 [INFO] ThirdParty:883 - exiting critical section [close project]
+2025-09-20 02:22:38,304 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-09-20 02:22:38,311 [WARN] IpParametersView:155 - Warning: This peripheral hasn't parameters
+2025-09-20 02:22:38,315 [WARN] MainPanel:289 - <html><b><center>Warning: This peripheral has no parameters to be configured<br></b></html>
+2025-09-20 02:22:38,317 [INFO] UtilMem:75 - Begin LoadConfig() Used Memory: 563928608 Bytes (940572672)
+2025-09-20 02:22:38,318 [INFO] MicroXplorer:468 - Change Database Path : 
+2025-09-20 02:22:38,318 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-09-20 02:22:38,318 [INFO] OpenFileManager:355 - Change cursor
+2025-09-20 02:22:38,342 [INFO] RulesReader:64 - Compatibility file has been processed (317 Rules)
+2025-09-20 02:22:38,352 [INFO] Mcu:2029 - Initializing MCU STM32F429ZITx STM32F429ZITx STM32F429ZIT6
+2025-09-20 02:22:39,587 [INFO] Context:786 - Trying to add GPIOservice into a context  which must be forbidden
+2025-09-20 02:22:40,873 [INFO] ImportTextPane:234 - (OptionalMessage_ERROR) Pin101 (VP_RIF_VS_RIF1) cannot be retrieved for this MCU
+2025-09-20 02:22:40,958 [INFO] RtosManager:558 - Registered RTOS mode: class=CMSIS, group=RTOS, mode=CMSIS_V1, owner=FREERTOS
+2025-09-20 02:22:40,958 [INFO] RtosManager:558 - Registered RTOS mode: class=CMSIS, group=RTOS2, mode=CMSIS_V2, owner=FREERTOS
+2025-09-20 02:22:40,959 [INFO] RtosManager:558 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V1, owner=FREERTOS
+2025-09-20 02:22:40,959 [INFO] RtosManager:558 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V2, owner=FREERTOS
+2025-09-20 02:22:40,959 [WARN] ModelIntegratedComponent:184 - Missing modes for component STMicroelectronics:FreeRTOS:0.0.1:STMicroelectronics:RTOS:FreeRTOS:Core:::10.2.0:
+2025-09-20 02:22:40,996 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,997 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,997 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,997 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,997 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,997 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,997 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,997 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,997 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,998 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,998 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,998 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,998 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,998 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,998 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,998 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,998 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,998 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,998 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,998 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,999 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,999 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,999 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,999 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,999 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,999 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,999 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,999 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,999 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:40,999 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:41,000 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:41,000 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:41,000 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:41,000 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:41,000 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:22:41,000 [WARN] ModelPack:524 - Component already loaded: STMicroelectronics:HAL Drivers:0.0.0:STMicroelectronics:Device:STMicro_Driver:XSPI:HAL::0.0.1:HAL_XSPI
+2025-09-20 02:22:41,217 [INFO] ThirdPartyModel:298 - Start build external matchings
+2025-09-20 02:22:42,424 [INFO] ThirdPartyModel:316 - End build external matchings
+2025-09-20 02:22:42,449 [INFO] RtosManager:1018 - Current active RTOS is FREERTOS [Cortex-M4NS]
+2025-09-20 02:22:42,460 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:22:42,461 [INFO] ImportTextPane:234 - (OptionalMessage_ERROR) IP (RCC) : Invalid parameter (FamilyName)
+2025-09-20 02:22:42,461 [INFO] ImportTextPane:234 - (OptionalMessage_ERROR) IP (RCC) : Parameter (RTCHSEDivFreq_Value) has invalid value (4000000)
+2025-09-20 02:22:42,744 [INFO] UtilMem:75 - End LoadConfig() Used Memory: 527279784 Bytes (979369984)
+2025-09-20 02:22:42,761 [WARN] ThirdParty:833 - waiting for thirdparty lock release [change project]
+2025-09-20 02:22:42,762 [INFO] ThirdParty:835 - entering critical section [change project]
+2025-09-20 02:22:42,762 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-PM33A1 1.0.0
+2025-09-20 02:22:42,762 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USBPD 4.1
+2025-09-20 02:22:42,763 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC9 1.0.0
+2025-09-20 02:22:42,763 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_HOST 2.0.0
+2025-09-20 02:22:42,763 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-MOTENVWB1 1.4.0
+2025-09-20 02:22:42,763 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-F4 1.1.0
+2025-09-20 02:22:42,763 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics LIBJPEG 8.0.0
+2025-09-20 02:22:42,763 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-ATR-ASTRA1 2.0.2
+2025-09-20 02:22:42,763 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfSSL 5.8.2
+2025-09-20 02:22:42,763 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLE1 7.1.0
+2025-09-20 02:22:42,763 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :Avnet-IotConnect X-CUBE-IoTC-DA16k-PMOD 1.0.0
+2025-09-20 02:22:42,763 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SMBUS 2.1.0
+2025-09-20 02:22:42,763 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfMQTT 1.19.2
+2025-09-20 02:22:42,763 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 3.0.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ISPU 2.1.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-EEPRMA1 5.2.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLEMGR 4.1.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-WB 2.0.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ST60 1.0.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-GNSS1 7.0.1
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC12 1.0.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-F7 1.1.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-L5 2.0.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TOUCHGFX 4.25.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 2.0.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC6 3.1.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :quantropi X-CUBE-qispace-sdk-base 2.1.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FreeRTOS 0.0.1
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-G0 1.1.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SAFEA1 1.2.2
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC4 3.0.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SUBG2 5.0.0
+2025-09-20 02:22:42,764 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-H7RS 1.1.0
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics STM32_WPAN 1.0.0
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :EmbeddedOffice I-CUBE-FS-RTOS 1.0.1
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics lwIP 2.0.3
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :WES I-CUBE-Cesium 1.4.0
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :Cesanta I-CUBE-Mongoose 7.13.0
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_HOST 1.0.0
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :Infineon AIROC-Wi-Fi-Bluetooth-STM32 1.7.1
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-G4 2.0.0
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-WB05N 2.0.0
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.1.0
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.3.0
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfTPM 3.8.0
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-H7 3.4.0
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-DISPLAY 3.0.0
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfSSH 1.4.20
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC7 2.0.0
+2025-09-20 02:22:42,765 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TCPP 4.2.0
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :RealThread X-CUBE-RT-Thread_Nano 4.1.1
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-ATR-SIGFOX1 3.2.0
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC10 1.0.0
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-FREERTOS 1.3.1
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics HAL Drivers 0.0.0
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics MBEDTLS 2.16.2
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-IPS 3.1.0
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ALS 1.0.2
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :emotas I-CUBE-CANOPEN 1.3.0
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics MBEDTLS 2.14.1
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :ITTIA_DB I-CUBE-ITTIADB 8.9.0
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-STSE01 1.0.0
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :portGmbH I-Cube-SoM-uGOAL 1.1.0
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ST67W61 1.0.0
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-STBOX1 2.1.0
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AI 10.2.0
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-STAIOTCFT 1.0.0
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics ThreadX 1.0.0
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-SMARTAG2 1.2.0
+2025-09-20 02:22:42,766 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-FLIGHT1 5.1.0
+2025-09-20 02:22:42,767 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-WL 2.0.0
+2025-09-20 02:22:42,767 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :SEGGER I-CUBE-embOS 1.3.1
+2025-09-20 02:22:42,767 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ALGOBUILD 1.4.0
+2025-09-20 02:22:42,767 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-DPower 1.3.0
+2025-09-20 02:22:42,767 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-MEMS1 11.3.0
+2025-09-20 02:22:42,767 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-MOTENV1 5.0.0
+2025-09-20 02:22:42,767 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 1.0.0
+2025-09-20 02:22:42,767 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-L4 2.0.0
+2025-09-20 02:22:42,767 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics ThreadX 0.0.2
+2025-09-20 02:22:42,767 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics lwIP 2.1.2
+2025-09-20 02:22:42,767 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SFXS2LP1 4.0.0
+2025-09-20 02:22:42,767 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLE2 3.3.0
+2025-09-20 02:22:42,767 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TOF1 3.4.3
+2025-09-20 02:22:42,767 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.2.0
+2025-09-20 02:22:42,768 [INFO] ThirdParty:841 - exiting critical section [change project]
+2025-09-20 02:22:43,346 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-09-20 02:22:43,346 [INFO] PinOutPanel:1589 - setPackage(STM32F429ZITx,LQFP144)
+2025-09-20 02:22:44,091 [INFO] UtilMem:75 - Before build in PCC Used Memory: 376833528 Bytes (979369984)
+2025-09-20 02:22:45,385 [INFO] UtilMem:75 - After build in PCC Used Memory: 428735992 Bytes (979369984)
+2025-09-20 02:22:45,396 [INFO] ApiDbMcu:532 - Load IP Config File for FREERTOS
+2025-09-20 02:22:45,402 [INFO] ApiDbMcu:532 - Load IP Config File for USB_HOST
+2025-09-20 02:22:45,468 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,468 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,469 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,469 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,469 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,469 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,470 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,470 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,471 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,471 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,472 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,472 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,472 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,473 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,473 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,474 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,474 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,474 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,474 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,474 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,475 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,476 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,476 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,477 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,477 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,478 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,478 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,479 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,480 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,480 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,481 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,482 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,483 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,483 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,484 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,484 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,485 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,486 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,487 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,487 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,488 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,488 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,489 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,489 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,489 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,490 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,490 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,490 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,490 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,490 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,491 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,491 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,491 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,492 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,493 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,494 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,495 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,496 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,497 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,498 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,499 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,500 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,501 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,502 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,504 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,505 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:22:45,509 [INFO] ApiDbMcu:532 - Load IP Config File for PDM2PCM
+2025-09-20 02:22:45,535 [WARN] FreeRTOS:1023 - Null or empty value: should not occur! (nothing added to the table)
+2025-09-20 02:22:45,673 [INFO] CADModel:165 - CPN selected for project levelSTM32F429ZIT6
+2025-09-20 02:22:45,673 [INFO] CADModel:114 - Register for checkConnection events
+2025-09-20 02:22:45,677 [INFO] RtosManager:728 - Active RTOS found at IOC load: FREERTOS [Cortex-M4NS]
+2025-09-20 02:22:45,725 [INFO] OpenFileManager:386 - Restore cursor
+2025-09-20 02:22:46,028 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:28:22,703 [INFO] MainUpdater:2872 - connection check result : 10
+2025-09-20 02:28:22,704 [INFO] MainUpdater:2872 - connection check result : 10
+2025-09-20 02:28:22,768 [INFO] MicroXplorer:468 - Change Database Path : 
+2025-09-20 02:28:22,769 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-09-20 02:28:22,792 [ERROR] ProjectManagerView:395 - 
+java.lang.NullPointerException: Cannot invoke "javax.swing.JTextField.getText()" because the return value of "java.util.List.get(int)" is null
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab$9.caretUpdate(ProjectChoiceTab.java:2706) ~[filemanager.jar:?]
+	at javax.swing.text.JTextComponent.fireCaretUpdate(JTextComponent.java:408) ~[?:?]
+	at javax.swing.text.JTextComponent$MutableCaretEvent.fire(JTextComponent.java:4484) ~[?:?]
+	at javax.swing.text.JTextComponent$MutableCaretEvent.stateChanged(JTextComponent.java:4506) ~[?:?]
+	at javax.swing.text.DefaultCaret.fireStateChanged(DefaultCaret.java:857) ~[?:?]
+	at javax.swing.text.DefaultCaret.changeCaretPosition(DefaultCaret.java:1343) ~[?:?]
+	at javax.swing.text.DefaultCaret.handleSetDot(DefaultCaret.java:1242) ~[?:?]
+	at javax.swing.text.DefaultCaret.setDot(DefaultCaret.java:1223) ~[?:?]
+	at javax.swing.text.DefaultCaret$Handler.insertUpdate(DefaultCaret.java:1819) ~[?:?]
+	at javax.swing.text.AbstractDocument.fireInsertUpdate(AbstractDocument.java:227) ~[?:?]
+	at javax.swing.text.AbstractDocument.handleInsertString(AbstractDocument.java:781) ~[?:?]
+	at javax.swing.text.AbstractDocument.insertString(AbstractDocument.java:740) ~[?:?]
+	at javax.swing.text.PlainDocument.insertString(PlainDocument.java:131) ~[?:?]
+	at javax.swing.text.AbstractDocument.replace(AbstractDocument.java:699) ~[?:?]
+	at javax.swing.text.JTextComponent.setText(JTextComponent.java:1725) ~[?:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.createHeapStackFields(ProjectChoiceTab.java:993) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.buildLinkSettingsPanel(ProjectChoiceTab.java:3813) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.defineWindowsFields(ProjectChoiceTab.java:1987) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.updateSettings(ProjectChoiceTab.java:558) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectSettingsPanel.UpdateDialog(ProjectSettingsPanel.java:247) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.ProjectManagerView.propertyChange(ProjectManagerView.java:392) ~[filemanager.jar:?]
+	at java.beans.PropertyChangeSupport.fire(PropertyChangeSupport.java:343) ~[?:?]
+	at java.beans.PropertyChangeSupport.firePropertyChange(PropertyChangeSupport.java:335) ~[?:?]
+	at java.beans.PropertyChangeSupport.firePropertyChange(PropertyChangeSupport.java:268) ~[?:?]
+	at com.st.microxplorer.util.MXPropertyChangeSupport.firePropertyChange(MXPropertyChangeSupport.java:54) ~[STM32CubeMX.jar:?]
+	at com.st.microxplorer.mxsystem.MxSystem.closeConfig(MxSystem.java:899) ~[STM32CubeMX.jar:?]
+	at com.st.microxplorer.maingui.MainPanel.closeConfig(MainPanel.java:792) ~[STM32CubeMX.jar:?]
+	at com.st.microxplorer.plugins.filemanager.engine.OpenFileManager.loadConfigurationFile(OpenFileManager.java:288) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.filemanager.engine.MainFileManager.userLoadConfig(MainFileManager.java:364) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.filemanager.engine.MainFileManager.userLoadConfig(MainFileManager.java:342) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.filemanager.FileManagerView.getSpecificTask(FileManagerView.java:264) ~[filemanager.jar:?]
+	at com.st.stm32cube.common.mx.editor.CubeMxEditor.getMxTabbedPaneInstance(CubeMxEditor.java:1198) ~[com.st.stm32cube.common.mx_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.editor.CubeMxEditor$12$1.createSwingComponent(CubeMxEditor.java:1068) ~[com.st.stm32cube.common.mx_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.EmbeddedSwingComposite.doComponentCreation(EmbeddedSwingComposite.java:492) ~[com.st.stm32cube.common.mx.oss_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.EmbeddedSwingComposite$4.run(EmbeddedSwingComposite.java:291) ~[com.st.stm32cube.common.mx.oss_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.AwtEnvironment$2.run(AwtEnvironment.java:166) ~[com.st.stm32cube.common.mx.oss_6.15.0.202507011659/:?]
+	at java.awt.event.InvocationEvent.dispatch(InvocationEvent.java:318) ~[?:?]
+	at java.awt.EventQueue.dispatchEventImpl(EventQueue.java:773) ~[?:?]
+	at java.awt.EventQueue$4.run(EventQueue.java:720) ~[?:?]
+	at java.awt.EventQueue$4.run(EventQueue.java:714) ~[?:?]
+	at java.security.AccessController.doPrivileged(AccessController.java:400) ~[?:?]
+	at java.security.ProtectionDomain$JavaSecurityAccessImpl.doIntersectionPrivilege(ProtectionDomain.java:87) ~[?:?]
+	at java.awt.EventQueue.dispatchEvent(EventQueue.java:742) ~[?:?]
+	at java.awt.EventDispatchThread.pumpOneEventForFilters(EventDispatchThread.java:203) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEventsForFilter(EventDispatchThread.java:124) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEventsForHierarchy(EventDispatchThread.java:113) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:109) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:101) ~[?:?]
+	at java.awt.EventDispatchThread.run(EventDispatchThread.java:90) ~[?:?]
+2025-09-20 02:28:22,794 [WARN] ThirdParty:871 - waiting for thirdparty lock release [close project]
+2025-09-20 02:28:22,794 [INFO] ThirdParty:873 - entering critical section [close project]
+2025-09-20 02:28:22,794 [INFO] ThirdParty:883 - exiting critical section [close project]
+2025-09-20 02:28:22,798 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-09-20 02:28:22,814 [WARN] IpParametersView:155 - Warning: This peripheral hasn't parameters
+2025-09-20 02:28:22,819 [WARN] MainPanel:289 - <html><b><center>Warning: This peripheral has no parameters to be configured<br></b></html>
+2025-09-20 02:28:22,823 [INFO] UtilMem:75 - Begin LoadConfig() Used Memory: 337899672 Bytes (979369984)
+2025-09-20 02:28:22,824 [INFO] MicroXplorer:468 - Change Database Path : 
+2025-09-20 02:28:22,824 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-09-20 02:28:22,824 [INFO] OpenFileManager:355 - Change cursor
+2025-09-20 02:28:22,838 [INFO] Mcu:2029 - Initializing MCU STM32F429ZITx STM32F429ZITx STM32F429ZIT6
+2025-09-20 02:28:25,913 [INFO] Context:786 - Trying to add GPIOservice into a context  which must be forbidden
+2025-09-20 02:28:26,609 [INFO] ImportTextPane:234 - (OptionalMessage_ERROR) Pin101 (VP_RIF_VS_RIF1) cannot be retrieved for this MCU
+2025-09-20 02:28:26,664 [INFO] RtosManager:558 - Registered RTOS mode: class=CMSIS, group=RTOS, mode=CMSIS_V1, owner=FREERTOS
+2025-09-20 02:28:26,664 [INFO] RtosManager:558 - Registered RTOS mode: class=CMSIS, group=RTOS2, mode=CMSIS_V2, owner=FREERTOS
+2025-09-20 02:28:26,664 [INFO] RtosManager:558 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V1, owner=FREERTOS
+2025-09-20 02:28:26,664 [INFO] RtosManager:558 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V2, owner=FREERTOS
+2025-09-20 02:28:26,664 [WARN] ModelIntegratedComponent:184 - Missing modes for component STMicroelectronics:FreeRTOS:0.0.1:STMicroelectronics:RTOS:FreeRTOS:Core:::10.2.0:
+2025-09-20 02:28:26,680 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,681 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-09-20 02:28:26,682 [WARN] ModelPack:524 - Component already loaded: STMicroelectronics:HAL Drivers:0.0.0:STMicroelectronics:Device:STMicro_Driver:XSPI:HAL::0.0.1:HAL_XSPI
+2025-09-20 02:28:26,868 [INFO] ThirdPartyModel:298 - Start build external matchings
+2025-09-20 02:28:27,937 [INFO] ThirdPartyModel:316 - End build external matchings
+2025-09-20 02:28:27,957 [INFO] RtosManager:1018 - Current active RTOS is FREERTOS [Cortex-M4NS]
+2025-09-20 02:28:27,967 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 02:28:27,967 [INFO] ImportTextPane:234 - (OptionalMessage_ERROR) IP (RCC) : Invalid parameter (FamilyName)
+2025-09-20 02:28:27,968 [INFO] ImportTextPane:234 - (OptionalMessage_ERROR) IP (RCC) : Parameter (RTCHSEDivFreq_Value) has invalid value (4000000)
+2025-09-20 02:28:28,283 [INFO] UtilMem:75 - End LoadConfig() Used Memory: 744418984 Bytes (979369984)
+2025-09-20 02:28:28,308 [WARN] ThirdParty:833 - waiting for thirdparty lock release [change project]
+2025-09-20 02:28:28,309 [INFO] ThirdParty:835 - entering critical section [change project]
+2025-09-20 02:28:28,309 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-PM33A1 1.0.0
+2025-09-20 02:28:28,309 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USBPD 4.1
+2025-09-20 02:28:28,309 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC9 1.0.0
+2025-09-20 02:28:28,309 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_HOST 2.0.0
+2025-09-20 02:28:28,309 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-MOTENVWB1 1.4.0
+2025-09-20 02:28:28,309 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-F4 1.1.0
+2025-09-20 02:28:28,309 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics LIBJPEG 8.0.0
+2025-09-20 02:28:28,309 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-ATR-ASTRA1 2.0.2
+2025-09-20 02:28:28,309 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfSSL 5.8.2
+2025-09-20 02:28:28,310 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLE1 7.1.0
+2025-09-20 02:28:28,310 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :Avnet-IotConnect X-CUBE-IoTC-DA16k-PMOD 1.0.0
+2025-09-20 02:28:28,310 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SMBUS 2.1.0
+2025-09-20 02:28:28,310 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfMQTT 1.19.2
+2025-09-20 02:28:28,310 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 3.0.0
+2025-09-20 02:28:28,310 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ISPU 2.1.0
+2025-09-20 02:28:28,310 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-EEPRMA1 5.2.0
+2025-09-20 02:28:28,310 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLEMGR 4.1.0
+2025-09-20 02:28:28,310 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-WB 2.0.0
+2025-09-20 02:28:28,310 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ST60 1.0.0
+2025-09-20 02:28:28,310 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-GNSS1 7.0.1
+2025-09-20 02:28:28,310 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC12 1.0.0
+2025-09-20 02:28:28,310 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-F7 1.1.0
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-L5 2.0.0
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TOUCHGFX 4.25.0
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 2.0.0
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC6 3.1.0
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :quantropi X-CUBE-qispace-sdk-base 2.1.0
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FreeRTOS 0.0.1
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-G0 1.1.0
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SAFEA1 1.2.2
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC4 3.0.0
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SUBG2 5.0.0
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-H7RS 1.1.0
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics STM32_WPAN 1.0.0
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :EmbeddedOffice I-CUBE-FS-RTOS 1.0.1
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics lwIP 2.0.3
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :WES I-CUBE-Cesium 1.4.0
+2025-09-20 02:28:28,311 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :Cesanta I-CUBE-Mongoose 7.13.0
+2025-09-20 02:28:28,312 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_HOST 1.0.0
+2025-09-20 02:28:28,312 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :Infineon AIROC-Wi-Fi-Bluetooth-STM32 1.7.1
+2025-09-20 02:28:28,312 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-G4 2.0.0
+2025-09-20 02:28:28,312 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-WB05N 2.0.0
+2025-09-20 02:28:28,312 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.1.0
+2025-09-20 02:28:28,312 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.3.0
+2025-09-20 02:28:28,312 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfTPM 3.8.0
+2025-09-20 02:28:28,312 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-H7 3.4.0
+2025-09-20 02:28:28,312 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-DISPLAY 3.0.0
+2025-09-20 02:28:28,312 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfSSH 1.4.20
+2025-09-20 02:28:28,312 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC7 2.0.0
+2025-09-20 02:28:28,312 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TCPP 4.2.0
+2025-09-20 02:28:28,312 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :RealThread X-CUBE-RT-Thread_Nano 4.1.1
+2025-09-20 02:28:28,312 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-ATR-SIGFOX1 3.2.0
+2025-09-20 02:28:28,312 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC10 1.0.0
+2025-09-20 02:28:28,313 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-FREERTOS 1.3.1
+2025-09-20 02:28:28,313 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics HAL Drivers 0.0.0
+2025-09-20 02:28:28,313 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics MBEDTLS 2.16.2
+2025-09-20 02:28:28,313 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-IPS 3.1.0
+2025-09-20 02:28:28,313 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ALS 1.0.2
+2025-09-20 02:28:28,313 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :emotas I-CUBE-CANOPEN 1.3.0
+2025-09-20 02:28:28,313 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics MBEDTLS 2.14.1
+2025-09-20 02:28:28,313 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :ITTIA_DB I-CUBE-ITTIADB 8.9.0
+2025-09-20 02:28:28,313 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-STSE01 1.0.0
+2025-09-20 02:28:28,313 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :portGmbH I-Cube-SoM-uGOAL 1.1.0
+2025-09-20 02:28:28,313 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ST67W61 1.0.0
+2025-09-20 02:28:28,313 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-STBOX1 2.1.0
+2025-09-20 02:28:28,313 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AI 10.2.0
+2025-09-20 02:28:28,314 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-STAIOTCFT 1.0.0
+2025-09-20 02:28:28,314 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics ThreadX 1.0.0
+2025-09-20 02:28:28,314 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-SMARTAG2 1.2.0
+2025-09-20 02:28:28,314 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-FLIGHT1 5.1.0
+2025-09-20 02:28:28,314 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-WL 2.0.0
+2025-09-20 02:28:28,314 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :SEGGER I-CUBE-embOS 1.3.1
+2025-09-20 02:28:28,314 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ALGOBUILD 1.4.0
+2025-09-20 02:28:28,314 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-DPower 1.3.0
+2025-09-20 02:28:28,314 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-MEMS1 11.3.0
+2025-09-20 02:28:28,314 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-MOTENV1 5.0.0
+2025-09-20 02:28:28,314 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 1.0.0
+2025-09-20 02:28:28,314 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-L4 2.0.0
+2025-09-20 02:28:28,314 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics ThreadX 0.0.2
+2025-09-20 02:28:28,314 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics lwIP 2.1.2
+2025-09-20 02:28:28,315 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SFXS2LP1 4.0.0
+2025-09-20 02:28:28,315 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLE2 3.3.0
+2025-09-20 02:28:28,315 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TOF1 3.4.3
+2025-09-20 02:28:28,315 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.2.0
+2025-09-20 02:28:28,316 [INFO] ThirdParty:841 - exiting critical section [change project]
+2025-09-20 02:28:29,200 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-09-20 02:28:29,202 [INFO] PinOutPanel:1589 - setPackage(STM32F429ZITx,LQFP144)
+2025-09-20 02:28:30,463 [INFO] UtilMem:75 - Before build in PCC Used Memory: 388951720 Bytes (979369984)
+2025-09-20 02:28:30,890 [INFO] UtilMem:75 - After build in PCC Used Memory: 437186216 Bytes (979369984)
+2025-09-20 02:28:30,900 [INFO] ApiDbMcu:532 - Load IP Config File for FREERTOS
+2025-09-20 02:28:30,907 [INFO] ApiDbMcu:532 - Load IP Config File for USB_HOST
+2025-09-20 02:28:30,978 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,979 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,979 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,979 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,979 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,980 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,981 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,981 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,982 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,983 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,983 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,984 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,984 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,984 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,985 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,986 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,986 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,987 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,987 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,987 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,988 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,988 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,989 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,990 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,990 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,991 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,991 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,992 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,993 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,994 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,995 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,996 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,997 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,997 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,997 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,998 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,998 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,998 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,999 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,999 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:30,999 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,000 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,000 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,000 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,000 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,000 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,001 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,001 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,001 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,001 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,001 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,002 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,002 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,003 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,004 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,005 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,006 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,007 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,009 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,010 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,011 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,012 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,014 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,016 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,018 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,020 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-09-20 02:28:31,026 [INFO] ApiDbMcu:532 - Load IP Config File for PDM2PCM
+2025-09-20 02:28:31,050 [WARN] FreeRTOS:1023 - Null or empty value: should not occur! (nothing added to the table)
+2025-09-20 02:28:31,326 [INFO] CADModel:165 - CPN selected for project levelSTM32F429ZIT6
+2025-09-20 02:28:31,326 [INFO] CADModel:114 - Register for checkConnection events
+2025-09-20 02:28:31,331 [INFO] RtosManager:728 - Active RTOS found at IOC load: FREERTOS [Cortex-M4NS]
+2025-09-20 02:28:31,385 [INFO] OpenFileManager:386 - Restore cursor
+2025-09-20 02:28:31,548 [WARN] IP:2250 - LayerIdx_L1 not found: check if there is a RefParameter without a condition.
+2025-09-20 03:16:22,966 [INFO] WebAppUi:305 - Path where cad_preferences.json is located /home/ja/.stm32cubeide/
+2025-09-20 03:16:22,966 [INFO] WebAppUi:306 - Updating consent from JSON file
+2025-09-20 03:16:23,086 [INFO] WebApp:403 - JxBrowser engine has been closed 
+2025-09-20 03:16:23,086 [INFO] WebAppUi:504 - JxBrowser engine has been closed 
+2025-09-20 03:16:23,087 [INFO] WebAppUi:541 - Close the Jxbrowser engine manually
+2025-09-20 03:16:23,814 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 
diff --git a/.metadata/.log b/.metadata/.log
index 67f1dfe..07fe663 100644
--- a/.metadata/.log
+++ b/.metadata/.log
@@ -448,3 +448,18 @@ Command-line arguments:  -os linux -ws gtk -arch x86_64
 
 !ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2025-09-20 00:18:04.430
 !MESSAGE Started RMI Server, listening on port 41337
+!SESSION 2025-09-20 02:01:02.283 -----------------------------------------------
+eclipse.buildId=Version 1.19.0
+java.version=21.0.3
+java.vendor=Eclipse Adoptium
+BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=en_US
+Command-line arguments:  -os linux -ws gtk -arch x86_64
+
+!ENTRY com.st.stm32cube.ide.mcu.informationcenter 4 4 2025-09-20 02:01:18.581
+!MESSAGE CubeMX plugin appears to be active, Log4j initialization might be too late.
+
+!ENTRY com.st.stm32cube.ide.mcu.informationcenter 1 1 2025-09-20 02:01:18.583
+!MESSAGE Log4j2 initialized with config file /home/ja/st/Home/.metadata/.log4j2.xml
+
+!ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2025-09-20 02:01:34.147
+!MESSAGE Started RMI Server, listening on port 41337
diff --git a/.metadata/.plugins/org.eclipse.cdt.core/.log b/.metadata/.plugins/org.eclipse.cdt.core/.log
index e42086f..da92812 100644
--- a/.metadata/.plugins/org.eclipse.cdt.core/.log
+++ b/.metadata/.plugins/org.eclipse.cdt.core/.log
@@ -13,3 +13,4 @@
 *** SESSION Sep 15, 2025 14:11:05.250 ------------------------------------------
 *** SESSION Sep 17, 2025 14:27:19.507 ------------------------------------------
 *** SESSION Sep 20, 2025 00:17:43.78 -------------------------------------------
+*** SESSION Sep 20, 2025 02:01:15.749 ------------------------------------------
diff --git a/.metadata/.plugins/org.eclipse.cdt.core/TrafficLightsPlus.1758137370837.pdom b/.metadata/.plugins/org.eclipse.cdt.core/TrafficLightsPlus.1758137370837.pdom
index cb22ef4..7b53d29 100644
Binary files a/.metadata/.plugins/org.eclipse.cdt.core/TrafficLightsPlus.1758137370837.pdom and b/.metadata/.plugins/org.eclipse.cdt.core/TrafficLightsPlus.1758137370837.pdom differ
diff --git a/.metadata/.plugins/org.eclipse.cdt.ui/TrafficLightsPlus.build.log b/.metadata/.plugins/org.eclipse.cdt.ui/TrafficLightsPlus.build.log
new file mode 100644
index 0000000..d641a5a
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.cdt.ui/TrafficLightsPlus.build.log
@@ -0,0 +1,17 @@
+03:14:32 **** Incremental Build of configuration Debug for project TrafficLightsPlus ****
+make -j8 all 
+arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../USB_HOST/App -I../USB_HOST/Target -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/ST/STM32_USB_Host_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o"
+arm-none-eabi-gcc -o "TrafficLightsPlus.elf" @"objects.list"   -mcpu=cortex-m4 -T"/home/ja/st/Home/TrafficLightsPlus/STM32F429ZITX_FLASH.ld" --specs=nosys.specs -Wl,-Map="TrafficLightsPlus.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
+Finished building target: TrafficLightsPlus.elf
+ 
+arm-none-eabi-size  TrafficLightsPlus.elf 
+arm-none-eabi-objdump -h -S TrafficLightsPlus.elf  > "TrafficLightsPlus.list"
+   text	   data	    bss	    dec	    hex	filename
+  32528	     16	   3480	  36024	   8cb8	TrafficLightsPlus.elf
+Finished building: default.size.stdout
+ 
+Finished building: TrafficLightsPlus.list
+ 
+
+03:14:33 Build Finished. 0 errors, 0 warnings. (took 639ms)
+
diff --git a/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml b/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml
index 462548c..1d2e473 100644
--- a/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml
+++ b/.metadata/.plugins/org.eclipse.cdt.ui/dialog_settings.xml
@@ -1,6 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <section name="Workbench">
 	<item key="LastUsedSourceTemplate" value="Default C source template"/>
+	<item key="LastUsedHeaderTemplate" value="Default C header template"/>
 	<section name="completion_proposal_size">
 	</section>
 	<section name="org.eclipse.cdt.ui.text.hover.CMacroExpansionExploration">
@@ -16,4 +17,11 @@
 		<item key="size.width" value="497"/>
 		<item key="size.height" value="180"/>
 	</section>
+	<section name="NewHeaderFileCreationWizard.dialogBounds">
+		<item key="DIALOG_X_ORIGIN" value="645"/>
+		<item key="DIALOG_Y_ORIGIN" value="232"/>
+		<item key="DIALOG_WIDTH" value="613"/>
+		<item key="DIALOG_HEIGHT" value="449"/>
+		<item key="DIALOG_FONT_NAME" value="1|Sans|10.0|0|GTK|1|"/>
+	</section>
 </section>
diff --git a/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log b/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log
index 00df18c..306bc75 100644
--- a/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log
+++ b/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log
@@ -1,14 +1,14 @@
-00:21:51 **** Build of configuration Debug for project Calc2 ****
+03:14:32 **** Incremental Build of configuration Debug for project TrafficLightsPlus ****
 make -j8 all 
-arm-none-eabi-gcc "../Core/Src/breadboard.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../USB_HOST/App -I../USB_HOST/Target -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/ST/STM32_USB_Host_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Core/Src/breadboard.d" -MT"Core/Src/breadboard.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/breadboard.o"
-arm-none-eabi-gcc -o "Calc2.elf" @"objects.list"   -mcpu=cortex-m4 -T"/home/ja/st/Home/Calc2/STM32F429ZITX_FLASH.ld" --specs=nosys.specs -Wl,-Map="Calc2.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
-Finished building target: Calc2.elf
+arm-none-eabi-gcc "../Core/Src/main.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../USB_HOST/App -I../USB_HOST/Target -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/ST/STM32_USB_Host_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o"
+arm-none-eabi-gcc -o "TrafficLightsPlus.elf" @"objects.list"   -mcpu=cortex-m4 -T"/home/ja/st/Home/TrafficLightsPlus/STM32F429ZITX_FLASH.ld" --specs=nosys.specs -Wl,-Map="TrafficLightsPlus.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
+Finished building target: TrafficLightsPlus.elf
  
-arm-none-eabi-size  Calc2.elf 
-arm-none-eabi-objdump -h -S Calc2.elf  > "Calc2.list"
+arm-none-eabi-size  TrafficLightsPlus.elf 
+arm-none-eabi-objdump -h -S TrafficLightsPlus.elf  > "TrafficLightsPlus.list"
    text	   data	    bss	    dec	    hex	filename
-  32576	     16	   3480	  36072	   8ce8	Calc2.elf
+  32528	     16	   3480	  36024	   8cb8	TrafficLightsPlus.elf
 Finished building: default.size.stdout
  
-Finished building: Calc2.list
+Finished building: TrafficLightsPlus.list
  
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/0/60bf74b0f695001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/0/60bf74b0f695001014a1b349f7adbbd1
new file mode 100644
index 0000000..053fa06
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/0/60bf74b0f695001014a1b349f7adbbd1
@@ -0,0 +1,48 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin();
+	HAL_Delay();
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/19/50275262f695001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/19/50275262f695001014a1b349f7adbbd1
new file mode 100644
index 0000000..3a12540
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/19/50275262f695001014a1b349f7adbbd1
@@ -0,0 +1,47 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin();
+	HAL_Delay();
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/1d/c00fabc8f795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/1d/c00fabc8f795001014a1b349f7adbbd1
new file mode 100644
index 0000000..7553c21
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/1d/c00fabc8f795001014a1b349f7adbbd1
@@ -0,0 +1,54 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+	HAL_Delay(500);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+	HAL_DELAY(500);
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/1e/a0424880f995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/1e/a0424880f995001014a1b349f7adbbd1
new file mode 100644
index 0000000..521842f
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/1e/a0424880f995001014a1b349f7adbbd1
@@ -0,0 +1,46 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+#include "breadboard.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(int traffSPD)
+{
+	// Traffic Light
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/2/606f4d90f795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/2/606f4d90f795001014a1b349f7adbbd1
new file mode 100644
index 0000000..dc9f4d3
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/2/606f4d90f795001014a1b349f7adbbd1
@@ -0,0 +1,50 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/2/b0780877f795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/2/b0780877f795001014a1b349f7adbbd1
new file mode 100644
index 0000000..e35d7bb
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/2/b0780877f795001014a1b349f7adbbd1
@@ -0,0 +1,50 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/22/9084cb54f795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/22/9084cb54f795001014a1b349f7adbbd1
new file mode 100644
index 0000000..f7a5461
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/22/9084cb54f795001014a1b349f7adbbd1
@@ -0,0 +1,49 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/23/104b6938049400101105d73469834d19 b/.metadata/.plugins/org.eclipse.core.resources/.history/23/104b6938049400101105d73469834d19
deleted file mode 100644
index 81b4c24..0000000
--- a/.metadata/.plugins/org.eclipse.core.resources/.history/23/104b6938049400101105d73469834d19
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * breadboard.c
- *
- *  Created on: Sep 17, 2025
- *      Author: ja
- */
-
-void breadboard(void)
-{
-
-}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/27/80efb76af995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/27/80efb76af995001014a1b349f7adbbd1
new file mode 100644
index 0000000..5b412f3
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/27/80efb76af995001014a1b349f7adbbd1
@@ -0,0 +1,46 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+#include "breadboard.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(int traffSPD)
+{
+	// Traffic Light
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+	HAL_Delay(traffSPD);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/2e/008b3c54f795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/2e/008b3c54f795001014a1b349f7adbbd1
new file mode 100644
index 0000000..bb27d4e
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/2e/008b3c54f795001014a1b349f7adbbd1
@@ -0,0 +1,49 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/30/50ace7bff695001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/30/50ace7bff695001014a1b349f7adbbd1
new file mode 100644
index 0000000..f913ee9
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/30/50ace7bff695001014a1b349f7adbbd1
@@ -0,0 +1,49 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin();
+	HAL_Delay();
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/39/a07dbaddf895001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/39/a07dbaddf895001014a1b349f7adbbd1
new file mode 100644
index 0000000..b38242c
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/39/a07dbaddf895001014a1b349f7adbbd1
@@ -0,0 +1,34 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(void)
+{
+	// Traffic Light
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/3e/9066b761f995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/3e/9066b761f995001014a1b349f7adbbd1
new file mode 100644
index 0000000..a425af3
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/3e/9066b761f995001014a1b349f7adbbd1
@@ -0,0 +1,45 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(int traffSPD)
+{
+	// Traffic Light
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+	HAL_Delay(traffSPD);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/40/5083bbb8f895001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/40/5083bbb8f895001014a1b349f7adbbd1
new file mode 100644
index 0000000..6291a60
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/40/5083bbb8f895001014a1b349f7adbbd1
@@ -0,0 +1,60 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+#define RedLight_Port RedLight_GPIO_Port
+#define YellowLight_Port YellowLight_GPIO_Port
+#define GreenLight_Port GreenLight_GPIO_Port
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(333);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	// Yellow Light
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+	HAL_Delay(333);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	// Green Light
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+	HAL_DELAY(333);
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/46/30928108f995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/46/30928108f995001014a1b349f7adbbd1
new file mode 100644
index 0000000..33729d1
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/46/30928108f995001014a1b349f7adbbd1
@@ -0,0 +1,35 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(int traffSPD)
+{
+	// Traffic Light
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/47/104caa77f995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/47/104caa77f995001014a1b349f7adbbd1
new file mode 100644
index 0000000..98c6087
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/47/104caa77f995001014a1b349f7adbbd1
@@ -0,0 +1,46 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+#include "breadboard.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(int traffSPD)
+{
+	// Traffic Light
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/51/605b0d3af795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/51/605b0d3af795001014a1b349f7adbbd1
new file mode 100644
index 0000000..f913ee9
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/51/605b0d3af795001014a1b349f7adbbd1
@@ -0,0 +1,49 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin();
+	HAL_Delay();
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/55/9053c3ecf795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/55/9053c3ecf795001014a1b349f7adbbd1
new file mode 100644
index 0000000..9959d4e
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/55/9053c3ecf795001014a1b349f7adbbd1
@@ -0,0 +1,56 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	// Yellow Light
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+	HAL_Delay(500);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	// Green Light
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+	HAL_DELAY(500);
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/58/409cec3ef795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/58/409cec3ef795001014a1b349f7adbbd1
new file mode 100644
index 0000000..c8ea58b
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/58/409cec3ef795001014a1b349f7adbbd1
@@ -0,0 +1,49 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay();
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/5f/3099ecc0f695001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/5f/3099ecc0f695001014a1b349f7adbbd1
new file mode 100644
index 0000000..1aa1abe
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/5f/3099ecc0f695001014a1b349f7adbbd1
@@ -0,0 +1,51 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin();
+	HAL_Delay();
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/62/b0def2d3f995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/62/b0def2d3f995001014a1b349f7adbbd1
new file mode 100644
index 0000000..4a87b48
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/62/b0def2d3f995001014a1b349f7adbbd1
@@ -0,0 +1,729 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+#include "usb_host.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+CRC_HandleTypeDef hcrc;
+
+DMA2D_HandleTypeDef hdma2d;
+
+I2C_HandleTypeDef hi2c3;
+
+LTDC_HandleTypeDef hltdc;
+
+SPI_HandleTypeDef hspi5;
+
+TIM_HandleTypeDef htim1;
+
+UART_HandleTypeDef huart1;
+
+SDRAM_HandleTypeDef hsdram1;
+
+osThreadId defaultTaskHandle;
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_CRC_Init(void);
+static void MX_DMA2D_Init(void);
+static void MX_FMC_Init(void);
+static void MX_I2C3_Init(void);
+static void MX_LTDC_Init(void);
+static void MX_SPI5_Init(void);
+static void MX_TIM1_Init(void);
+static void MX_USART1_UART_Init(void);
+void StartDefaultTask(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_CRC_Init();
+  MX_DMA2D_Init();
+  MX_FMC_Init();
+  MX_I2C3_Init();
+  MX_LTDC_Init();
+  MX_SPI5_Init();
+  MX_TIM1_Init();
+  MX_USART1_UART_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+  /* add mutexes, ... */
+  /* USER CODE END RTOS_MUTEX */
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+  /* add semaphores, ... */
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+  /* start timers, add new ones, ... */
+  /* USER CODE END RTOS_TIMERS */
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+  /* add queues, ... */
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of defaultTask */
+  //osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 4096);
+  //defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+  /* add threads, ... */
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  //osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+	  breadboard(333);
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = 4;
+  RCC_OscInitStruct.PLL.PLLN = 72;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 3;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief CRC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_CRC_Init(void)
+{
+
+  /* USER CODE BEGIN CRC_Init 0 */
+
+  /* USER CODE END CRC_Init 0 */
+
+  /* USER CODE BEGIN CRC_Init 1 */
+
+  /* USER CODE END CRC_Init 1 */
+  hcrc.Instance = CRC;
+  if (HAL_CRC_Init(&hcrc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN CRC_Init 2 */
+
+  /* USER CODE END CRC_Init 2 */
+
+}
+
+/**
+  * @brief DMA2D Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DMA2D_Init(void)
+{
+
+  /* USER CODE BEGIN DMA2D_Init 0 */
+
+  /* USER CODE END DMA2D_Init 0 */
+
+  /* USER CODE BEGIN DMA2D_Init 1 */
+
+  /* USER CODE END DMA2D_Init 1 */
+  hdma2d.Instance = DMA2D;
+  hdma2d.Init.Mode = DMA2D_M2M;
+  hdma2d.Init.ColorMode = DMA2D_OUTPUT_ARGB8888;
+  hdma2d.Init.OutputOffset = 0;
+  hdma2d.LayerCfg[1].InputOffset = 0;
+  hdma2d.LayerCfg[1].InputColorMode = DMA2D_INPUT_ARGB8888;
+  hdma2d.LayerCfg[1].AlphaMode = DMA2D_NO_MODIF_ALPHA;
+  hdma2d.LayerCfg[1].InputAlpha = 0;
+  if (HAL_DMA2D_Init(&hdma2d) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_DMA2D_ConfigLayer(&hdma2d, 1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN DMA2D_Init 2 */
+
+  /* USER CODE END DMA2D_Init 2 */
+
+}
+
+/**
+  * @brief I2C3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_I2C3_Init(void)
+{
+
+  /* USER CODE BEGIN I2C3_Init 0 */
+
+  /* USER CODE END I2C3_Init 0 */
+
+  /* USER CODE BEGIN I2C3_Init 1 */
+
+  /* USER CODE END I2C3_Init 1 */
+  hi2c3.Instance = I2C3;
+  hi2c3.Init.ClockSpeed = 100000;
+  hi2c3.Init.DutyCycle = I2C_DUTYCYCLE_2;
+  hi2c3.Init.OwnAddress1 = 0;
+  hi2c3.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
+  hi2c3.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
+  hi2c3.Init.OwnAddress2 = 0;
+  hi2c3.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
+  hi2c3.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
+  if (HAL_I2C_Init(&hi2c3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Analogue filter
+  */
+  if (HAL_I2CEx_ConfigAnalogFilter(&hi2c3, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Digital filter
+  */
+  if (HAL_I2CEx_ConfigDigitalFilter(&hi2c3, 0) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN I2C3_Init 2 */
+
+  /* USER CODE END I2C3_Init 2 */
+
+}
+
+/**
+  * @brief LTDC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_LTDC_Init(void)
+{
+
+  /* USER CODE BEGIN LTDC_Init 0 */
+
+  /* USER CODE END LTDC_Init 0 */
+
+  LTDC_LayerCfgTypeDef pLayerCfg = {0};
+
+  /* USER CODE BEGIN LTDC_Init 1 */
+
+  /* USER CODE END LTDC_Init 1 */
+  hltdc.Instance = LTDC;
+  hltdc.Init.HSPolarity = LTDC_HSPOLARITY_AL;
+  hltdc.Init.VSPolarity = LTDC_VSPOLARITY_AL;
+  hltdc.Init.DEPolarity = LTDC_DEPOLARITY_AL;
+  hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
+  hltdc.Init.HorizontalSync = 9;
+  hltdc.Init.VerticalSync = 1;
+  hltdc.Init.AccumulatedHBP = 29;
+  hltdc.Init.AccumulatedVBP = 3;
+  hltdc.Init.AccumulatedActiveW = 269;
+  hltdc.Init.AccumulatedActiveH = 323;
+  hltdc.Init.TotalWidth = 279;
+  hltdc.Init.TotalHeigh = 327;
+  hltdc.Init.Backcolor.Blue = 0;
+  hltdc.Init.Backcolor.Green = 0;
+  hltdc.Init.Backcolor.Red = 0;
+  if (HAL_LTDC_Init(&hltdc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  pLayerCfg.WindowX0 = 0;
+  pLayerCfg.WindowX1 = 240;
+  pLayerCfg.WindowY0 = 0;
+  pLayerCfg.WindowY1 = 320;
+  pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB565;
+  pLayerCfg.Alpha = 255;
+  pLayerCfg.Alpha0 = 0;
+  pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA;
+  pLayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA;
+  pLayerCfg.FBStartAdress = 0xD0000000;
+  pLayerCfg.ImageWidth = 240;
+  pLayerCfg.ImageHeight = 320;
+  pLayerCfg.Backcolor.Blue = 0;
+  pLayerCfg.Backcolor.Green = 0;
+  pLayerCfg.Backcolor.Red = 0;
+  if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg, 0) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN LTDC_Init 2 */
+
+  /* USER CODE END LTDC_Init 2 */
+
+}
+
+/**
+  * @brief SPI5 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_SPI5_Init(void)
+{
+
+  /* USER CODE BEGIN SPI5_Init 0 */
+
+  /* USER CODE END SPI5_Init 0 */
+
+  /* USER CODE BEGIN SPI5_Init 1 */
+
+  /* USER CODE END SPI5_Init 1 */
+  /* SPI5 parameter configuration*/
+  hspi5.Instance = SPI5;
+  hspi5.Init.Mode = SPI_MODE_MASTER;
+  hspi5.Init.Direction = SPI_DIRECTION_2LINES;
+  hspi5.Init.DataSize = SPI_DATASIZE_8BIT;
+  hspi5.Init.CLKPolarity = SPI_POLARITY_LOW;
+  hspi5.Init.CLKPhase = SPI_PHASE_1EDGE;
+  hspi5.Init.NSS = SPI_NSS_SOFT;
+  hspi5.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
+  hspi5.Init.FirstBit = SPI_FIRSTBIT_MSB;
+  hspi5.Init.TIMode = SPI_TIMODE_DISABLE;
+  hspi5.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+  hspi5.Init.CRCPolynomial = 10;
+  if (HAL_SPI_Init(&hspi5) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN SPI5_Init 2 */
+
+  /* USER CODE END SPI5_Init 2 */
+
+}
+
+/**
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 0;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 65535;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+
+}
+
+/**
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 115200;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_NONE;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+
+/* FMC initialization function */
+static void MX_FMC_Init(void)
+{
+
+  /* USER CODE BEGIN FMC_Init 0 */
+
+  /* USER CODE END FMC_Init 0 */
+
+  FMC_SDRAM_TimingTypeDef SdramTiming = {0};
+
+  /* USER CODE BEGIN FMC_Init 1 */
+
+  /* USER CODE END FMC_Init 1 */
+
+  /** Perform the SDRAM1 memory initialization sequence
+  */
+  hsdram1.Instance = FMC_SDRAM_DEVICE;
+  /* hsdram1.Init */
+  hsdram1.Init.SDBank = FMC_SDRAM_BANK2;
+  hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
+  hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
+  hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_16;
+  hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
+  hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
+  hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
+  hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
+  hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE;
+  hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1;
+  /* SdramTiming */
+  SdramTiming.LoadToActiveDelay = 2;
+  SdramTiming.ExitSelfRefreshDelay = 7;
+  SdramTiming.SelfRefreshTime = 4;
+  SdramTiming.RowCycleDelay = 7;
+  SdramTiming.WriteRecoveryTime = 3;
+  SdramTiming.RPDelay = 2;
+  SdramTiming.RCDDelay = 2;
+
+  if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
+  {
+    Error_Handler( );
+  }
+
+  /* USER CODE BEGIN FMC_Init 2 */
+
+  /* USER CODE END FMC_Init 2 */
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  /* USER CODE BEGIN MX_GPIO_Init_1 */
+
+  /* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+  __HAL_RCC_GPIOH_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOE, RedLight_Pin|YellowLight_Pin|GreenLight_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOC, NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(ACP_RST_GPIO_Port, ACP_RST_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOD, RDX_Pin|WRX_DCX_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOG, LD3_Pin|LD4_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pins : RedLight_Pin YellowLight_Pin GreenLight_Pin */
+  GPIO_InitStruct.Pin = RedLight_Pin|YellowLight_Pin|GreenLight_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : NCS_MEMS_SPI_Pin CSX_Pin OTG_FS_PSO_Pin */
+  GPIO_InitStruct.Pin = NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : B1_Pin MEMS_INT1_Pin MEMS_INT2_Pin TP_INT1_Pin */
+  GPIO_InitStruct.Pin = B1_Pin|MEMS_INT1_Pin|MEMS_INT2_Pin|TP_INT1_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : ACP_RST_Pin */
+  GPIO_InitStruct.Pin = ACP_RST_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(ACP_RST_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : OTG_FS_OC_Pin */
+  GPIO_InitStruct.Pin = OTG_FS_OC_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(OTG_FS_OC_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : BOOT1_Pin */
+  GPIO_InitStruct.Pin = BOOT1_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(BOOT1_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : TE_Pin */
+  GPIO_InitStruct.Pin = TE_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(TE_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : RDX_Pin WRX_DCX_Pin */
+  GPIO_InitStruct.Pin = RDX_Pin|WRX_DCX_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : LD3_Pin LD4_Pin */
+  GPIO_InitStruct.Pin = LD3_Pin|LD4_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN MX_GPIO_Init_2 */
+
+  /* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_StartDefaultTask */
+/**
+  * @brief  Function implementing the defaultTask thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_StartDefaultTask */
+void StartDefaultTask(void const * argument)
+{
+  /* init code for USB_HOST */
+  MX_USB_HOST_Init();
+  /* USER CODE BEGIN 5 */
+  /* Infinite loop */
+  for(;;)
+  {
+    osDelay(1);
+  }
+  /* USER CODE END 5 */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM6 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6)
+  {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+#ifdef USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/71/e0e62d3cf695001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/71/e0e62d3cf695001014a1b349f7adbbd1
new file mode 100644
index 0000000..5892306
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/71/e0e62d3cf695001014a1b349f7adbbd1
@@ -0,0 +1,39 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/79/3014f628fd9300101105d73469834d19 b/.metadata/.plugins/org.eclipse.core.resources/.history/79/3014f628fd9300101105d73469834d19
deleted file mode 100644
index a8b2d00..0000000
--- a/.metadata/.plugins/org.eclipse.core.resources/.history/79/3014f628fd9300101105d73469834d19
+++ /dev/null
@@ -1,8 +0,0 @@
-/*
- * breadboard.c
- *
- *  Created on: Sep 17, 2025
- *      Author: ja
- */
-
-
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/81/1085bb30fd9300101105d73469834d19 b/.metadata/.plugins/org.eclipse.core.resources/.history/81/1085bb30fd9300101105d73469834d19
deleted file mode 100644
index a8b2d00..0000000
--- a/.metadata/.plugins/org.eclipse.core.resources/.history/81/1085bb30fd9300101105d73469834d19
+++ /dev/null
@@ -1,8 +0,0 @@
-/*
- * breadboard.c
- *
- *  Created on: Sep 17, 2025
- *      Author: ja
- */
-
-
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/87/30ae8e36f295001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/87/30ae8e36f295001014a1b349f7adbbd1
new file mode 100644
index 0000000..0005318
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/87/30ae8e36f295001014a1b349f7adbbd1
@@ -0,0 +1,728 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+#include "usb_host.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+CRC_HandleTypeDef hcrc;
+
+DMA2D_HandleTypeDef hdma2d;
+
+I2C_HandleTypeDef hi2c3;
+
+LTDC_HandleTypeDef hltdc;
+
+SPI_HandleTypeDef hspi5;
+
+TIM_HandleTypeDef htim1;
+
+UART_HandleTypeDef huart1;
+
+SDRAM_HandleTypeDef hsdram1;
+
+osThreadId defaultTaskHandle;
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_CRC_Init(void);
+static void MX_DMA2D_Init(void);
+static void MX_FMC_Init(void);
+static void MX_I2C3_Init(void);
+static void MX_LTDC_Init(void);
+static void MX_SPI5_Init(void);
+static void MX_TIM1_Init(void);
+static void MX_USART1_UART_Init(void);
+void StartDefaultTask(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_CRC_Init();
+  MX_DMA2D_Init();
+  MX_FMC_Init();
+  MX_I2C3_Init();
+  MX_LTDC_Init();
+  MX_SPI5_Init();
+  MX_TIM1_Init();
+  MX_USART1_UART_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+  /* add mutexes, ... */
+  /* USER CODE END RTOS_MUTEX */
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+  /* add semaphores, ... */
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+  /* start timers, add new ones, ... */
+  /* USER CODE END RTOS_TIMERS */
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+  /* add queues, ... */
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of defaultTask */
+  osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 4096);
+  defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+  /* add threads, ... */
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = 4;
+  RCC_OscInitStruct.PLL.PLLN = 72;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 3;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief CRC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_CRC_Init(void)
+{
+
+  /* USER CODE BEGIN CRC_Init 0 */
+
+  /* USER CODE END CRC_Init 0 */
+
+  /* USER CODE BEGIN CRC_Init 1 */
+
+  /* USER CODE END CRC_Init 1 */
+  hcrc.Instance = CRC;
+  if (HAL_CRC_Init(&hcrc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN CRC_Init 2 */
+
+  /* USER CODE END CRC_Init 2 */
+
+}
+
+/**
+  * @brief DMA2D Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DMA2D_Init(void)
+{
+
+  /* USER CODE BEGIN DMA2D_Init 0 */
+
+  /* USER CODE END DMA2D_Init 0 */
+
+  /* USER CODE BEGIN DMA2D_Init 1 */
+
+  /* USER CODE END DMA2D_Init 1 */
+  hdma2d.Instance = DMA2D;
+  hdma2d.Init.Mode = DMA2D_M2M;
+  hdma2d.Init.ColorMode = DMA2D_OUTPUT_ARGB8888;
+  hdma2d.Init.OutputOffset = 0;
+  hdma2d.LayerCfg[1].InputOffset = 0;
+  hdma2d.LayerCfg[1].InputColorMode = DMA2D_INPUT_ARGB8888;
+  hdma2d.LayerCfg[1].AlphaMode = DMA2D_NO_MODIF_ALPHA;
+  hdma2d.LayerCfg[1].InputAlpha = 0;
+  if (HAL_DMA2D_Init(&hdma2d) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_DMA2D_ConfigLayer(&hdma2d, 1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN DMA2D_Init 2 */
+
+  /* USER CODE END DMA2D_Init 2 */
+
+}
+
+/**
+  * @brief I2C3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_I2C3_Init(void)
+{
+
+  /* USER CODE BEGIN I2C3_Init 0 */
+
+  /* USER CODE END I2C3_Init 0 */
+
+  /* USER CODE BEGIN I2C3_Init 1 */
+
+  /* USER CODE END I2C3_Init 1 */
+  hi2c3.Instance = I2C3;
+  hi2c3.Init.ClockSpeed = 100000;
+  hi2c3.Init.DutyCycle = I2C_DUTYCYCLE_2;
+  hi2c3.Init.OwnAddress1 = 0;
+  hi2c3.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
+  hi2c3.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
+  hi2c3.Init.OwnAddress2 = 0;
+  hi2c3.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
+  hi2c3.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
+  if (HAL_I2C_Init(&hi2c3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Analogue filter
+  */
+  if (HAL_I2CEx_ConfigAnalogFilter(&hi2c3, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Digital filter
+  */
+  if (HAL_I2CEx_ConfigDigitalFilter(&hi2c3, 0) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN I2C3_Init 2 */
+
+  /* USER CODE END I2C3_Init 2 */
+
+}
+
+/**
+  * @brief LTDC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_LTDC_Init(void)
+{
+
+  /* USER CODE BEGIN LTDC_Init 0 */
+
+  /* USER CODE END LTDC_Init 0 */
+
+  LTDC_LayerCfgTypeDef pLayerCfg = {0};
+
+  /* USER CODE BEGIN LTDC_Init 1 */
+
+  /* USER CODE END LTDC_Init 1 */
+  hltdc.Instance = LTDC;
+  hltdc.Init.HSPolarity = LTDC_HSPOLARITY_AL;
+  hltdc.Init.VSPolarity = LTDC_VSPOLARITY_AL;
+  hltdc.Init.DEPolarity = LTDC_DEPOLARITY_AL;
+  hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
+  hltdc.Init.HorizontalSync = 9;
+  hltdc.Init.VerticalSync = 1;
+  hltdc.Init.AccumulatedHBP = 29;
+  hltdc.Init.AccumulatedVBP = 3;
+  hltdc.Init.AccumulatedActiveW = 269;
+  hltdc.Init.AccumulatedActiveH = 323;
+  hltdc.Init.TotalWidth = 279;
+  hltdc.Init.TotalHeigh = 327;
+  hltdc.Init.Backcolor.Blue = 0;
+  hltdc.Init.Backcolor.Green = 0;
+  hltdc.Init.Backcolor.Red = 0;
+  if (HAL_LTDC_Init(&hltdc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  pLayerCfg.WindowX0 = 0;
+  pLayerCfg.WindowX1 = 240;
+  pLayerCfg.WindowY0 = 0;
+  pLayerCfg.WindowY1 = 320;
+  pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB565;
+  pLayerCfg.Alpha = 255;
+  pLayerCfg.Alpha0 = 0;
+  pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA;
+  pLayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA;
+  pLayerCfg.FBStartAdress = 0xD0000000;
+  pLayerCfg.ImageWidth = 240;
+  pLayerCfg.ImageHeight = 320;
+  pLayerCfg.Backcolor.Blue = 0;
+  pLayerCfg.Backcolor.Green = 0;
+  pLayerCfg.Backcolor.Red = 0;
+  if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg, 0) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN LTDC_Init 2 */
+
+  /* USER CODE END LTDC_Init 2 */
+
+}
+
+/**
+  * @brief SPI5 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_SPI5_Init(void)
+{
+
+  /* USER CODE BEGIN SPI5_Init 0 */
+
+  /* USER CODE END SPI5_Init 0 */
+
+  /* USER CODE BEGIN SPI5_Init 1 */
+
+  /* USER CODE END SPI5_Init 1 */
+  /* SPI5 parameter configuration*/
+  hspi5.Instance = SPI5;
+  hspi5.Init.Mode = SPI_MODE_MASTER;
+  hspi5.Init.Direction = SPI_DIRECTION_2LINES;
+  hspi5.Init.DataSize = SPI_DATASIZE_8BIT;
+  hspi5.Init.CLKPolarity = SPI_POLARITY_LOW;
+  hspi5.Init.CLKPhase = SPI_PHASE_1EDGE;
+  hspi5.Init.NSS = SPI_NSS_SOFT;
+  hspi5.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
+  hspi5.Init.FirstBit = SPI_FIRSTBIT_MSB;
+  hspi5.Init.TIMode = SPI_TIMODE_DISABLE;
+  hspi5.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+  hspi5.Init.CRCPolynomial = 10;
+  if (HAL_SPI_Init(&hspi5) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN SPI5_Init 2 */
+
+  /* USER CODE END SPI5_Init 2 */
+
+}
+
+/**
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 0;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 65535;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+
+}
+
+/**
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 115200;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_NONE;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+
+/* FMC initialization function */
+static void MX_FMC_Init(void)
+{
+
+  /* USER CODE BEGIN FMC_Init 0 */
+
+  /* USER CODE END FMC_Init 0 */
+
+  FMC_SDRAM_TimingTypeDef SdramTiming = {0};
+
+  /* USER CODE BEGIN FMC_Init 1 */
+
+  /* USER CODE END FMC_Init 1 */
+
+  /** Perform the SDRAM1 memory initialization sequence
+  */
+  hsdram1.Instance = FMC_SDRAM_DEVICE;
+  /* hsdram1.Init */
+  hsdram1.Init.SDBank = FMC_SDRAM_BANK2;
+  hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
+  hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
+  hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_16;
+  hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
+  hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
+  hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
+  hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
+  hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE;
+  hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1;
+  /* SdramTiming */
+  SdramTiming.LoadToActiveDelay = 2;
+  SdramTiming.ExitSelfRefreshDelay = 7;
+  SdramTiming.SelfRefreshTime = 4;
+  SdramTiming.RowCycleDelay = 7;
+  SdramTiming.WriteRecoveryTime = 3;
+  SdramTiming.RPDelay = 2;
+  SdramTiming.RCDDelay = 2;
+
+  if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
+  {
+    Error_Handler( );
+  }
+
+  /* USER CODE BEGIN FMC_Init 2 */
+
+  /* USER CODE END FMC_Init 2 */
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  /* USER CODE BEGIN MX_GPIO_Init_1 */
+
+  /* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+  __HAL_RCC_GPIOH_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOE, RedLight_Pin|YellowLight_Pin|GreenLight_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOC, NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(ACP_RST_GPIO_Port, ACP_RST_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOD, RDX_Pin|WRX_DCX_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOG, LD3_Pin|LD4_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pins : RedLight_Pin YellowLight_Pin GreenLight_Pin */
+  GPIO_InitStruct.Pin = RedLight_Pin|YellowLight_Pin|GreenLight_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : NCS_MEMS_SPI_Pin CSX_Pin OTG_FS_PSO_Pin */
+  GPIO_InitStruct.Pin = NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : B1_Pin MEMS_INT1_Pin MEMS_INT2_Pin TP_INT1_Pin */
+  GPIO_InitStruct.Pin = B1_Pin|MEMS_INT1_Pin|MEMS_INT2_Pin|TP_INT1_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : ACP_RST_Pin */
+  GPIO_InitStruct.Pin = ACP_RST_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(ACP_RST_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : OTG_FS_OC_Pin */
+  GPIO_InitStruct.Pin = OTG_FS_OC_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(OTG_FS_OC_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : BOOT1_Pin */
+  GPIO_InitStruct.Pin = BOOT1_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(BOOT1_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : TE_Pin */
+  GPIO_InitStruct.Pin = TE_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(TE_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : RDX_Pin WRX_DCX_Pin */
+  GPIO_InitStruct.Pin = RDX_Pin|WRX_DCX_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : LD3_Pin LD4_Pin */
+  GPIO_InitStruct.Pin = LD3_Pin|LD4_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN MX_GPIO_Init_2 */
+
+  /* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_StartDefaultTask */
+/**
+  * @brief  Function implementing the defaultTask thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_StartDefaultTask */
+void StartDefaultTask(void const * argument)
+{
+  /* init code for USB_HOST */
+  MX_USB_HOST_Init();
+  /* USER CODE BEGIN 5 */
+  /* Infinite loop */
+  for(;;)
+  {
+    osDelay(1);
+  }
+  /* USER CODE END 5 */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM6 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6)
+  {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+#ifdef USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/8a/107d9637f995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/8a/107d9637f995001014a1b349f7adbbd1
new file mode 100644
index 0000000..c85762b
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/8a/107d9637f995001014a1b349f7adbbd1
@@ -0,0 +1,37 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(int traffSPD)
+{
+	// Traffic Light
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/93/e09b2fcef895001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/93/e09b2fcef895001014a1b349f7adbbd1
new file mode 100644
index 0000000..baf9c1d
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/93/e09b2fcef895001014a1b349f7adbbd1
@@ -0,0 +1,48 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(333);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	// Yellow Light
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+	HAL_Delay(333);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	// Green Light
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+	HAL_DELAY(333);
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/95/b0c2a6a7f795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/95/b0c2a6a7f795001014a1b349f7adbbd1
new file mode 100644
index 0000000..9a7e13c
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/95/b0c2a6a7f795001014a1b349f7adbbd1
@@ -0,0 +1,56 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+	HAL_Delay(500);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+	HAL_DELAY(500);
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/9b/b0755bc1f895001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/9b/b0755bc1f895001014a1b349f7adbbd1
new file mode 100644
index 0000000..0f37ab6
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/9b/b0755bc1f895001014a1b349f7adbbd1
@@ -0,0 +1,53 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+#define RedLight_Port RedLight_GPIO_Port
+#define YellowLight_Port YellowLight_GPIO_Port
+#define GreenLight_Port GreenLight_GPIO_Port
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(333);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	// Yellow Light
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+	HAL_Delay(333);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	// Green Light
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+	HAL_DELAY(333);
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/a3/802bf57ff795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/a3/802bf57ff795001014a1b349f7adbbd1
new file mode 100644
index 0000000..e35d7bb
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/a3/802bf57ff795001014a1b349f7adbbd1
@@ -0,0 +1,50 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/a3/c0cea1a7f995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/a3/c0cea1a7f995001014a1b349f7adbbd1
new file mode 100644
index 0000000..4031318
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/a3/c0cea1a7f995001014a1b349f7adbbd1
@@ -0,0 +1,728 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+#include "usb_host.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+CRC_HandleTypeDef hcrc;
+
+DMA2D_HandleTypeDef hdma2d;
+
+I2C_HandleTypeDef hi2c3;
+
+LTDC_HandleTypeDef hltdc;
+
+SPI_HandleTypeDef hspi5;
+
+TIM_HandleTypeDef htim1;
+
+UART_HandleTypeDef huart1;
+
+SDRAM_HandleTypeDef hsdram1;
+
+osThreadId defaultTaskHandle;
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_CRC_Init(void);
+static void MX_DMA2D_Init(void);
+static void MX_FMC_Init(void);
+static void MX_I2C3_Init(void);
+static void MX_LTDC_Init(void);
+static void MX_SPI5_Init(void);
+static void MX_TIM1_Init(void);
+static void MX_USART1_UART_Init(void);
+void StartDefaultTask(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_CRC_Init();
+  MX_DMA2D_Init();
+  MX_FMC_Init();
+  MX_I2C3_Init();
+  MX_LTDC_Init();
+  MX_SPI5_Init();
+  MX_TIM1_Init();
+  MX_USART1_UART_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+  /* add mutexes, ... */
+  /* USER CODE END RTOS_MUTEX */
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+  /* add semaphores, ... */
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+  /* start timers, add new ones, ... */
+  /* USER CODE END RTOS_TIMERS */
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+  /* add queues, ... */
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of defaultTask */
+  //osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 4096);
+  //defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+  /* add threads, ... */
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = 4;
+  RCC_OscInitStruct.PLL.PLLN = 72;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 3;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief CRC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_CRC_Init(void)
+{
+
+  /* USER CODE BEGIN CRC_Init 0 */
+
+  /* USER CODE END CRC_Init 0 */
+
+  /* USER CODE BEGIN CRC_Init 1 */
+
+  /* USER CODE END CRC_Init 1 */
+  hcrc.Instance = CRC;
+  if (HAL_CRC_Init(&hcrc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN CRC_Init 2 */
+
+  /* USER CODE END CRC_Init 2 */
+
+}
+
+/**
+  * @brief DMA2D Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DMA2D_Init(void)
+{
+
+  /* USER CODE BEGIN DMA2D_Init 0 */
+
+  /* USER CODE END DMA2D_Init 0 */
+
+  /* USER CODE BEGIN DMA2D_Init 1 */
+
+  /* USER CODE END DMA2D_Init 1 */
+  hdma2d.Instance = DMA2D;
+  hdma2d.Init.Mode = DMA2D_M2M;
+  hdma2d.Init.ColorMode = DMA2D_OUTPUT_ARGB8888;
+  hdma2d.Init.OutputOffset = 0;
+  hdma2d.LayerCfg[1].InputOffset = 0;
+  hdma2d.LayerCfg[1].InputColorMode = DMA2D_INPUT_ARGB8888;
+  hdma2d.LayerCfg[1].AlphaMode = DMA2D_NO_MODIF_ALPHA;
+  hdma2d.LayerCfg[1].InputAlpha = 0;
+  if (HAL_DMA2D_Init(&hdma2d) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_DMA2D_ConfigLayer(&hdma2d, 1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN DMA2D_Init 2 */
+
+  /* USER CODE END DMA2D_Init 2 */
+
+}
+
+/**
+  * @brief I2C3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_I2C3_Init(void)
+{
+
+  /* USER CODE BEGIN I2C3_Init 0 */
+
+  /* USER CODE END I2C3_Init 0 */
+
+  /* USER CODE BEGIN I2C3_Init 1 */
+
+  /* USER CODE END I2C3_Init 1 */
+  hi2c3.Instance = I2C3;
+  hi2c3.Init.ClockSpeed = 100000;
+  hi2c3.Init.DutyCycle = I2C_DUTYCYCLE_2;
+  hi2c3.Init.OwnAddress1 = 0;
+  hi2c3.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
+  hi2c3.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
+  hi2c3.Init.OwnAddress2 = 0;
+  hi2c3.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
+  hi2c3.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
+  if (HAL_I2C_Init(&hi2c3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Analogue filter
+  */
+  if (HAL_I2CEx_ConfigAnalogFilter(&hi2c3, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Digital filter
+  */
+  if (HAL_I2CEx_ConfigDigitalFilter(&hi2c3, 0) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN I2C3_Init 2 */
+
+  /* USER CODE END I2C3_Init 2 */
+
+}
+
+/**
+  * @brief LTDC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_LTDC_Init(void)
+{
+
+  /* USER CODE BEGIN LTDC_Init 0 */
+
+  /* USER CODE END LTDC_Init 0 */
+
+  LTDC_LayerCfgTypeDef pLayerCfg = {0};
+
+  /* USER CODE BEGIN LTDC_Init 1 */
+
+  /* USER CODE END LTDC_Init 1 */
+  hltdc.Instance = LTDC;
+  hltdc.Init.HSPolarity = LTDC_HSPOLARITY_AL;
+  hltdc.Init.VSPolarity = LTDC_VSPOLARITY_AL;
+  hltdc.Init.DEPolarity = LTDC_DEPOLARITY_AL;
+  hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
+  hltdc.Init.HorizontalSync = 9;
+  hltdc.Init.VerticalSync = 1;
+  hltdc.Init.AccumulatedHBP = 29;
+  hltdc.Init.AccumulatedVBP = 3;
+  hltdc.Init.AccumulatedActiveW = 269;
+  hltdc.Init.AccumulatedActiveH = 323;
+  hltdc.Init.TotalWidth = 279;
+  hltdc.Init.TotalHeigh = 327;
+  hltdc.Init.Backcolor.Blue = 0;
+  hltdc.Init.Backcolor.Green = 0;
+  hltdc.Init.Backcolor.Red = 0;
+  if (HAL_LTDC_Init(&hltdc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  pLayerCfg.WindowX0 = 0;
+  pLayerCfg.WindowX1 = 240;
+  pLayerCfg.WindowY0 = 0;
+  pLayerCfg.WindowY1 = 320;
+  pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB565;
+  pLayerCfg.Alpha = 255;
+  pLayerCfg.Alpha0 = 0;
+  pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA;
+  pLayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA;
+  pLayerCfg.FBStartAdress = 0xD0000000;
+  pLayerCfg.ImageWidth = 240;
+  pLayerCfg.ImageHeight = 320;
+  pLayerCfg.Backcolor.Blue = 0;
+  pLayerCfg.Backcolor.Green = 0;
+  pLayerCfg.Backcolor.Red = 0;
+  if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg, 0) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN LTDC_Init 2 */
+
+  /* USER CODE END LTDC_Init 2 */
+
+}
+
+/**
+  * @brief SPI5 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_SPI5_Init(void)
+{
+
+  /* USER CODE BEGIN SPI5_Init 0 */
+
+  /* USER CODE END SPI5_Init 0 */
+
+  /* USER CODE BEGIN SPI5_Init 1 */
+
+  /* USER CODE END SPI5_Init 1 */
+  /* SPI5 parameter configuration*/
+  hspi5.Instance = SPI5;
+  hspi5.Init.Mode = SPI_MODE_MASTER;
+  hspi5.Init.Direction = SPI_DIRECTION_2LINES;
+  hspi5.Init.DataSize = SPI_DATASIZE_8BIT;
+  hspi5.Init.CLKPolarity = SPI_POLARITY_LOW;
+  hspi5.Init.CLKPhase = SPI_PHASE_1EDGE;
+  hspi5.Init.NSS = SPI_NSS_SOFT;
+  hspi5.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
+  hspi5.Init.FirstBit = SPI_FIRSTBIT_MSB;
+  hspi5.Init.TIMode = SPI_TIMODE_DISABLE;
+  hspi5.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+  hspi5.Init.CRCPolynomial = 10;
+  if (HAL_SPI_Init(&hspi5) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN SPI5_Init 2 */
+
+  /* USER CODE END SPI5_Init 2 */
+
+}
+
+/**
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 0;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 65535;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+
+}
+
+/**
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 115200;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_NONE;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+
+/* FMC initialization function */
+static void MX_FMC_Init(void)
+{
+
+  /* USER CODE BEGIN FMC_Init 0 */
+
+  /* USER CODE END FMC_Init 0 */
+
+  FMC_SDRAM_TimingTypeDef SdramTiming = {0};
+
+  /* USER CODE BEGIN FMC_Init 1 */
+
+  /* USER CODE END FMC_Init 1 */
+
+  /** Perform the SDRAM1 memory initialization sequence
+  */
+  hsdram1.Instance = FMC_SDRAM_DEVICE;
+  /* hsdram1.Init */
+  hsdram1.Init.SDBank = FMC_SDRAM_BANK2;
+  hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
+  hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
+  hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_16;
+  hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
+  hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
+  hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
+  hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
+  hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE;
+  hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1;
+  /* SdramTiming */
+  SdramTiming.LoadToActiveDelay = 2;
+  SdramTiming.ExitSelfRefreshDelay = 7;
+  SdramTiming.SelfRefreshTime = 4;
+  SdramTiming.RowCycleDelay = 7;
+  SdramTiming.WriteRecoveryTime = 3;
+  SdramTiming.RPDelay = 2;
+  SdramTiming.RCDDelay = 2;
+
+  if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
+  {
+    Error_Handler( );
+  }
+
+  /* USER CODE BEGIN FMC_Init 2 */
+
+  /* USER CODE END FMC_Init 2 */
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  /* USER CODE BEGIN MX_GPIO_Init_1 */
+
+  /* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+  __HAL_RCC_GPIOH_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOE, RedLight_Pin|YellowLight_Pin|GreenLight_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOC, NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(ACP_RST_GPIO_Port, ACP_RST_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOD, RDX_Pin|WRX_DCX_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOG, LD3_Pin|LD4_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pins : RedLight_Pin YellowLight_Pin GreenLight_Pin */
+  GPIO_InitStruct.Pin = RedLight_Pin|YellowLight_Pin|GreenLight_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : NCS_MEMS_SPI_Pin CSX_Pin OTG_FS_PSO_Pin */
+  GPIO_InitStruct.Pin = NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : B1_Pin MEMS_INT1_Pin MEMS_INT2_Pin TP_INT1_Pin */
+  GPIO_InitStruct.Pin = B1_Pin|MEMS_INT1_Pin|MEMS_INT2_Pin|TP_INT1_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : ACP_RST_Pin */
+  GPIO_InitStruct.Pin = ACP_RST_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(ACP_RST_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : OTG_FS_OC_Pin */
+  GPIO_InitStruct.Pin = OTG_FS_OC_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(OTG_FS_OC_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : BOOT1_Pin */
+  GPIO_InitStruct.Pin = BOOT1_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(BOOT1_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : TE_Pin */
+  GPIO_InitStruct.Pin = TE_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(TE_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : RDX_Pin WRX_DCX_Pin */
+  GPIO_InitStruct.Pin = RDX_Pin|WRX_DCX_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : LD3_Pin LD4_Pin */
+  GPIO_InitStruct.Pin = LD3_Pin|LD4_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN MX_GPIO_Init_2 */
+
+  /* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_StartDefaultTask */
+/**
+  * @brief  Function implementing the defaultTask thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_StartDefaultTask */
+void StartDefaultTask(void const * argument)
+{
+  /* init code for USB_HOST */
+  MX_USB_HOST_Init();
+  /* USER CODE BEGIN 5 */
+  /* Infinite loop */
+  for(;;)
+  {
+    osDelay(1);
+  }
+  /* USER CODE END 5 */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM6 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6)
+  {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+#ifdef USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/a8/404392bdf995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/a8/404392bdf995001014a1b349f7adbbd1
new file mode 100644
index 0000000..dbb99f1
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/a8/404392bdf995001014a1b349f7adbbd1
@@ -0,0 +1,4 @@
+635E684B79701B039C64EA45C3F84D30=76D5CABA7E36F5DD0D38ED323FA426B4
+66BE74F758C12D739921AEA421D593D3=0
+DC22A860405A8BF2F2C095E5B6529F12=BB3BD6F58A87E81DE6E549B37335B23A
+eclipse.preferences.version=1
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/ab/6068d747f995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/ab/6068d747f995001014a1b349f7adbbd1
new file mode 100644
index 0000000..db14d76
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/ab/6068d747f995001014a1b349f7adbbd1
@@ -0,0 +1,44 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(int traffSPD)
+{
+	// Traffic Light
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_Delay(traffSPD);
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/ac/c03a60aff995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/ac/c03a60aff995001014a1b349f7adbbd1
new file mode 100644
index 0000000..1945c95
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/ac/c03a60aff995001014a1b349f7adbbd1
@@ -0,0 +1,728 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+#include "usb_host.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+CRC_HandleTypeDef hcrc;
+
+DMA2D_HandleTypeDef hdma2d;
+
+I2C_HandleTypeDef hi2c3;
+
+LTDC_HandleTypeDef hltdc;
+
+SPI_HandleTypeDef hspi5;
+
+TIM_HandleTypeDef htim1;
+
+UART_HandleTypeDef huart1;
+
+SDRAM_HandleTypeDef hsdram1;
+
+osThreadId defaultTaskHandle;
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_CRC_Init(void);
+static void MX_DMA2D_Init(void);
+static void MX_FMC_Init(void);
+static void MX_I2C3_Init(void);
+static void MX_LTDC_Init(void);
+static void MX_SPI5_Init(void);
+static void MX_TIM1_Init(void);
+static void MX_USART1_UART_Init(void);
+void StartDefaultTask(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_CRC_Init();
+  MX_DMA2D_Init();
+  MX_FMC_Init();
+  MX_I2C3_Init();
+  MX_LTDC_Init();
+  MX_SPI5_Init();
+  MX_TIM1_Init();
+  MX_USART1_UART_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+  /* add mutexes, ... */
+  /* USER CODE END RTOS_MUTEX */
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+  /* add semaphores, ... */
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+  /* start timers, add new ones, ... */
+  /* USER CODE END RTOS_TIMERS */
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+  /* add queues, ... */
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of defaultTask */
+  //osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 4096);
+  //defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+  /* add threads, ... */
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  //osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = 4;
+  RCC_OscInitStruct.PLL.PLLN = 72;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 3;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief CRC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_CRC_Init(void)
+{
+
+  /* USER CODE BEGIN CRC_Init 0 */
+
+  /* USER CODE END CRC_Init 0 */
+
+  /* USER CODE BEGIN CRC_Init 1 */
+
+  /* USER CODE END CRC_Init 1 */
+  hcrc.Instance = CRC;
+  if (HAL_CRC_Init(&hcrc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN CRC_Init 2 */
+
+  /* USER CODE END CRC_Init 2 */
+
+}
+
+/**
+  * @brief DMA2D Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DMA2D_Init(void)
+{
+
+  /* USER CODE BEGIN DMA2D_Init 0 */
+
+  /* USER CODE END DMA2D_Init 0 */
+
+  /* USER CODE BEGIN DMA2D_Init 1 */
+
+  /* USER CODE END DMA2D_Init 1 */
+  hdma2d.Instance = DMA2D;
+  hdma2d.Init.Mode = DMA2D_M2M;
+  hdma2d.Init.ColorMode = DMA2D_OUTPUT_ARGB8888;
+  hdma2d.Init.OutputOffset = 0;
+  hdma2d.LayerCfg[1].InputOffset = 0;
+  hdma2d.LayerCfg[1].InputColorMode = DMA2D_INPUT_ARGB8888;
+  hdma2d.LayerCfg[1].AlphaMode = DMA2D_NO_MODIF_ALPHA;
+  hdma2d.LayerCfg[1].InputAlpha = 0;
+  if (HAL_DMA2D_Init(&hdma2d) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_DMA2D_ConfigLayer(&hdma2d, 1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN DMA2D_Init 2 */
+
+  /* USER CODE END DMA2D_Init 2 */
+
+}
+
+/**
+  * @brief I2C3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_I2C3_Init(void)
+{
+
+  /* USER CODE BEGIN I2C3_Init 0 */
+
+  /* USER CODE END I2C3_Init 0 */
+
+  /* USER CODE BEGIN I2C3_Init 1 */
+
+  /* USER CODE END I2C3_Init 1 */
+  hi2c3.Instance = I2C3;
+  hi2c3.Init.ClockSpeed = 100000;
+  hi2c3.Init.DutyCycle = I2C_DUTYCYCLE_2;
+  hi2c3.Init.OwnAddress1 = 0;
+  hi2c3.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
+  hi2c3.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
+  hi2c3.Init.OwnAddress2 = 0;
+  hi2c3.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
+  hi2c3.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
+  if (HAL_I2C_Init(&hi2c3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Analogue filter
+  */
+  if (HAL_I2CEx_ConfigAnalogFilter(&hi2c3, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Configure Digital filter
+  */
+  if (HAL_I2CEx_ConfigDigitalFilter(&hi2c3, 0) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN I2C3_Init 2 */
+
+  /* USER CODE END I2C3_Init 2 */
+
+}
+
+/**
+  * @brief LTDC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_LTDC_Init(void)
+{
+
+  /* USER CODE BEGIN LTDC_Init 0 */
+
+  /* USER CODE END LTDC_Init 0 */
+
+  LTDC_LayerCfgTypeDef pLayerCfg = {0};
+
+  /* USER CODE BEGIN LTDC_Init 1 */
+
+  /* USER CODE END LTDC_Init 1 */
+  hltdc.Instance = LTDC;
+  hltdc.Init.HSPolarity = LTDC_HSPOLARITY_AL;
+  hltdc.Init.VSPolarity = LTDC_VSPOLARITY_AL;
+  hltdc.Init.DEPolarity = LTDC_DEPOLARITY_AL;
+  hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
+  hltdc.Init.HorizontalSync = 9;
+  hltdc.Init.VerticalSync = 1;
+  hltdc.Init.AccumulatedHBP = 29;
+  hltdc.Init.AccumulatedVBP = 3;
+  hltdc.Init.AccumulatedActiveW = 269;
+  hltdc.Init.AccumulatedActiveH = 323;
+  hltdc.Init.TotalWidth = 279;
+  hltdc.Init.TotalHeigh = 327;
+  hltdc.Init.Backcolor.Blue = 0;
+  hltdc.Init.Backcolor.Green = 0;
+  hltdc.Init.Backcolor.Red = 0;
+  if (HAL_LTDC_Init(&hltdc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  pLayerCfg.WindowX0 = 0;
+  pLayerCfg.WindowX1 = 240;
+  pLayerCfg.WindowY0 = 0;
+  pLayerCfg.WindowY1 = 320;
+  pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB565;
+  pLayerCfg.Alpha = 255;
+  pLayerCfg.Alpha0 = 0;
+  pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA;
+  pLayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA;
+  pLayerCfg.FBStartAdress = 0xD0000000;
+  pLayerCfg.ImageWidth = 240;
+  pLayerCfg.ImageHeight = 320;
+  pLayerCfg.Backcolor.Blue = 0;
+  pLayerCfg.Backcolor.Green = 0;
+  pLayerCfg.Backcolor.Red = 0;
+  if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg, 0) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN LTDC_Init 2 */
+
+  /* USER CODE END LTDC_Init 2 */
+
+}
+
+/**
+  * @brief SPI5 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_SPI5_Init(void)
+{
+
+  /* USER CODE BEGIN SPI5_Init 0 */
+
+  /* USER CODE END SPI5_Init 0 */
+
+  /* USER CODE BEGIN SPI5_Init 1 */
+
+  /* USER CODE END SPI5_Init 1 */
+  /* SPI5 parameter configuration*/
+  hspi5.Instance = SPI5;
+  hspi5.Init.Mode = SPI_MODE_MASTER;
+  hspi5.Init.Direction = SPI_DIRECTION_2LINES;
+  hspi5.Init.DataSize = SPI_DATASIZE_8BIT;
+  hspi5.Init.CLKPolarity = SPI_POLARITY_LOW;
+  hspi5.Init.CLKPhase = SPI_PHASE_1EDGE;
+  hspi5.Init.NSS = SPI_NSS_SOFT;
+  hspi5.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
+  hspi5.Init.FirstBit = SPI_FIRSTBIT_MSB;
+  hspi5.Init.TIMode = SPI_TIMODE_DISABLE;
+  hspi5.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+  hspi5.Init.CRCPolynomial = 10;
+  if (HAL_SPI_Init(&hspi5) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN SPI5_Init 2 */
+
+  /* USER CODE END SPI5_Init 2 */
+
+}
+
+/**
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 0;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 65535;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+
+}
+
+/**
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+
+  /* USER CODE BEGIN USART1_Init 0 */
+
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+  huart1.Init.BaudRate = 115200;
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+  huart1.Init.StopBits = UART_STOPBITS_1;
+  huart1.Init.Parity = UART_PARITY_NONE;
+  huart1.Init.Mode = UART_MODE_TX_RX;
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+
+/* FMC initialization function */
+static void MX_FMC_Init(void)
+{
+
+  /* USER CODE BEGIN FMC_Init 0 */
+
+  /* USER CODE END FMC_Init 0 */
+
+  FMC_SDRAM_TimingTypeDef SdramTiming = {0};
+
+  /* USER CODE BEGIN FMC_Init 1 */
+
+  /* USER CODE END FMC_Init 1 */
+
+  /** Perform the SDRAM1 memory initialization sequence
+  */
+  hsdram1.Instance = FMC_SDRAM_DEVICE;
+  /* hsdram1.Init */
+  hsdram1.Init.SDBank = FMC_SDRAM_BANK2;
+  hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
+  hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
+  hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_16;
+  hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
+  hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
+  hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
+  hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
+  hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE;
+  hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1;
+  /* SdramTiming */
+  SdramTiming.LoadToActiveDelay = 2;
+  SdramTiming.ExitSelfRefreshDelay = 7;
+  SdramTiming.SelfRefreshTime = 4;
+  SdramTiming.RowCycleDelay = 7;
+  SdramTiming.WriteRecoveryTime = 3;
+  SdramTiming.RPDelay = 2;
+  SdramTiming.RCDDelay = 2;
+
+  if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
+  {
+    Error_Handler( );
+  }
+
+  /* USER CODE BEGIN FMC_Init 2 */
+
+  /* USER CODE END FMC_Init 2 */
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  /* USER CODE BEGIN MX_GPIO_Init_1 */
+
+  /* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+  __HAL_RCC_GPIOH_CLK_ENABLE();
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOE, RedLight_Pin|YellowLight_Pin|GreenLight_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOC, NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(ACP_RST_GPIO_Port, ACP_RST_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOD, RDX_Pin|WRX_DCX_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOG, LD3_Pin|LD4_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pins : RedLight_Pin YellowLight_Pin GreenLight_Pin */
+  GPIO_InitStruct.Pin = RedLight_Pin|YellowLight_Pin|GreenLight_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : NCS_MEMS_SPI_Pin CSX_Pin OTG_FS_PSO_Pin */
+  GPIO_InitStruct.Pin = NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : B1_Pin MEMS_INT1_Pin MEMS_INT2_Pin TP_INT1_Pin */
+  GPIO_InitStruct.Pin = B1_Pin|MEMS_INT1_Pin|MEMS_INT2_Pin|TP_INT1_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : ACP_RST_Pin */
+  GPIO_InitStruct.Pin = ACP_RST_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(ACP_RST_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : OTG_FS_OC_Pin */
+  GPIO_InitStruct.Pin = OTG_FS_OC_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(OTG_FS_OC_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : BOOT1_Pin */
+  GPIO_InitStruct.Pin = BOOT1_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(BOOT1_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pin : TE_Pin */
+  GPIO_InitStruct.Pin = TE_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(TE_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : RDX_Pin WRX_DCX_Pin */
+  GPIO_InitStruct.Pin = RDX_Pin|WRX_DCX_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : LD3_Pin LD4_Pin */
+  GPIO_InitStruct.Pin = LD3_Pin|LD4_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN MX_GPIO_Init_2 */
+
+  /* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_StartDefaultTask */
+/**
+  * @brief  Function implementing the defaultTask thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_StartDefaultTask */
+void StartDefaultTask(void const * argument)
+{
+  /* init code for USB_HOST */
+  MX_USB_HOST_Init();
+  /* USER CODE BEGIN 5 */
+  /* Infinite loop */
+  for(;;)
+  {
+    osDelay(1);
+  }
+  /* USER CODE END 5 */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM6 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6)
+  {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+#ifdef USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/af/40262d69f895001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/af/40262d69f895001014a1b349f7adbbd1
new file mode 100644
index 0000000..ce2774c
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/af/40262d69f895001014a1b349f7adbbd1
@@ -0,0 +1,56 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(333);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	// Yellow Light
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+	HAL_Delay(333);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	// Green Light
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+	HAL_DELAY(333);
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/3/2018d2d6fc9300101105d73469834d19 b/.metadata/.plugins/org.eclipse.core.resources/.history/b5/c02e631df995001014a1b349f7adbbd1
similarity index 100%
rename from .metadata/.plugins/org.eclipse.core.resources/.history/3/2018d2d6fc9300101105d73469834d19
rename to .metadata/.plugins/org.eclipse.core.resources/.history/b5/c02e631df995001014a1b349f7adbbd1
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/b8/e0162da3f695001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/b8/e0162da3f695001014a1b349f7adbbd1
new file mode 100644
index 0000000..7abb660
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/b8/e0162da3f695001014a1b349f7adbbd1
@@ -0,0 +1,47 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePiN(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin();
+	HAL_Delay();
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/be/80bf12f5f895001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/be/80bf12f5f895001014a1b349f7adbbd1
new file mode 100644
index 0000000..bf05c5d
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/be/80bf12f5f895001014a1b349f7adbbd1
@@ -0,0 +1,34 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(int traffSPD)
+{
+	// Traffic Light
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/bf/40d5cb70f895001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/bf/40d5cb70f895001014a1b349f7adbbd1
new file mode 100644
index 0000000..aa96b21
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/bf/40d5cb70f895001014a1b349f7adbbd1
@@ -0,0 +1,56 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(333);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	// Yellow Light
+	HAL_GPIO_TogglePin(YellowLight_GPIO_Port, YellowLight_Pin);
+	HAL_Delay(333);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	// Green Light
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+	HAL_DELAY(333);
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/c1/20e546c9f895001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/c1/20e546c9f895001014a1b349f7adbbd1
new file mode 100644
index 0000000..f92b4c5
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/c1/20e546c9f895001014a1b349f7adbbd1
@@ -0,0 +1,52 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+#define RedLight_Port RedLight_GPIO_Port
+#define YellowLight_Port YellowLight_GPIO_Port
+#define GreenLight_Port GreenLight_GPIO_Port
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(333);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	// Yellow Light
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+	HAL_Delay(333);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	// Green Light
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+	HAL_DELAY(333);
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/c3/80f5d29bf795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/c3/80f5d29bf795001014a1b349f7adbbd1
new file mode 100644
index 0000000..283db42
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/c3/80f5d29bf795001014a1b349f7adbbd1
@@ -0,0 +1,54 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+	HAL_Delay(500);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/c7/00af95d6f795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/c7/00af95d6f795001014a1b349f7adbbd1
new file mode 100644
index 0000000..9aca328
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/c7/00af95d6f795001014a1b349f7adbbd1
@@ -0,0 +1,55 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	// Yellow Light
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+	HAL_Delay(500);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+	HAL_DELAY(500);
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/c9/80777c98f795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/c9/80777c98f795001014a1b349f7adbbd1
new file mode 100644
index 0000000..cce27e1
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/c9/80777c98f795001014a1b349f7adbbd1
@@ -0,0 +1,52 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+	HAL_Delay(500);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/cf/80a38f69f695001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/cf/80a38f69f695001014a1b349f7adbbd1
new file mode 100644
index 0000000..3a12540
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/cf/80a38f69f695001014a1b349f7adbbd1
@@ -0,0 +1,47 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin();
+	HAL_Delay();
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/cf/d011d58df695001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/cf/d011d58df695001014a1b349f7adbbd1
new file mode 100644
index 0000000..2825851
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/cf/d011d58df695001014a1b349f7adbbd1
@@ -0,0 +1,47 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePiN(RedLight_GPIO_Port, RedLight_Pin);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin();
+	HAL_Delay();
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/d0/2083c150f995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/d0/2083c150f995001014a1b349f7adbbd1
new file mode 100644
index 0000000..9320759
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/d0/2083c150f995001014a1b349f7adbbd1
@@ -0,0 +1,44 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(int traffSPD)
+{
+	// Traffic Light
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_Delay(traffSPD);
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/d7/00e1369ff795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/d7/00e1369ff795001014a1b349f7adbbd1
new file mode 100644
index 0000000..94eed6b
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/d7/00e1369ff795001014a1b349f7adbbd1
@@ -0,0 +1,55 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+	HAL_Delay(500);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+	HAL_DELAY(500);
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/d8/e09e5470f795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/d8/e09e5470f795001014a1b349f7adbbd1
new file mode 100644
index 0000000..e35d7bb
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/d8/e09e5470f795001014a1b349f7adbbd1
@@ -0,0 +1,50 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/d9/20b8d3d8f795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/d9/20b8d3d8f795001014a1b349f7adbbd1
new file mode 100644
index 0000000..9959d4e
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/d9/20b8d3d8f795001014a1b349f7adbbd1
@@ -0,0 +1,56 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	// Yellow Light
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+	HAL_Delay(500);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	// Green Light
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+	HAL_DELAY(500);
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/d9/7042f353f695001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/d9/7042f353f695001014a1b349f7adbbd1
new file mode 100644
index 0000000..bc7c98f
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/d9/7042f353f695001014a1b349f7adbbd1
@@ -0,0 +1,46 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+void
+reset_traffic(void)
+{
+
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin();
+	HAL_Delay();
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/de/a013ee2afd9300101105d73469834d19 b/.metadata/.plugins/org.eclipse.core.resources/.history/de/a013ee2afd9300101105d73469834d19
deleted file mode 100644
index 5be98aa..0000000
--- a/.metadata/.plugins/org.eclipse.core.resources/.history/de/a013ee2afd9300101105d73469834d19
+++ /dev/null
@@ -1,7 +0,0 @@
-/*
- * breadboard.c
- *
- *  Created on: Sep 17, 2025
- *      Author: ja
- */
-
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/e0/20cfec24f995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/e0/20cfec24f995001014a1b349f7adbbd1
new file mode 100644
index 0000000..d3dabea
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/e0/20cfec24f995001014a1b349f7adbbd1
@@ -0,0 +1,13 @@
+/*
+ * breadboard.h
+ *
+ *  Created on: Sep 20, 2025
+ *      Author: ja
+ */
+
+#ifndef INC_BREADBOARD_H_
+#define INC_BREADBOARD_H_
+
+
+
+#endif /* INC_BREADBOARD_H_ */
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/e1/20bf2853f995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/e1/20bf2853f995001014a1b349f7adbbd1
new file mode 100644
index 0000000..5267282
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/e1/20bf2853f995001014a1b349f7adbbd1
@@ -0,0 +1,44 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(int traffSPD)
+{
+	// Traffic Light
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+	HAL_Delay(traffSPD);
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/e4/a0ce147bf695001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/e4/a0ce147bf695001014a1b349f7adbbd1
new file mode 100644
index 0000000..82c36b2
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/e4/a0ce147bf695001014a1b349f7adbbd1
@@ -0,0 +1,47 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePiN();
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin();
+	HAL_Delay();
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/ed/30bda43cf995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/ed/30bda43cf995001014a1b349f7adbbd1
new file mode 100644
index 0000000..2e05642
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/ed/30bda43cf995001014a1b349f7adbbd1
@@ -0,0 +1,40 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(int traffSPD)
+{
+	// Traffic Light
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_Delay(traffSPD);
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/ee/8079c479f995001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/ee/8079c479f995001014a1b349f7adbbd1
new file mode 100644
index 0000000..aedbc59
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/ee/8079c479f995001014a1b349f7adbbd1
@@ -0,0 +1,46 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+#include "breadboard.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(int traffSPD)
+{
+	// Traffic Light
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/ef/e012d765f795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/ef/e012d765f795001014a1b349f7adbbd1
new file mode 100644
index 0000000..e35d7bb
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/ef/e012d765f795001014a1b349f7adbbd1
@@ -0,0 +1,50 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/f/a0c87389f895001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/f/a0c87389f895001014a1b349f7adbbd1
new file mode 100644
index 0000000..ce2774c
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/f/a0c87389f895001014a1b349f7adbbd1
@@ -0,0 +1,56 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(333);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	// Yellow Light
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+	HAL_Delay(333);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	// Green Light
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+	HAL_DELAY(333);
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/fc/606ef369f695001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/fc/606ef369f695001014a1b349f7adbbd1
new file mode 100644
index 0000000..1f3e004
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/fc/606ef369f695001014a1b349f7adbbd1
@@ -0,0 +1,47 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePiN(s=);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin();
+	HAL_Delay();
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/fc/908fa088f795001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/fc/908fa088f795001014a1b349f7adbbd1
new file mode 100644
index 0000000..e35d7bb
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/fc/908fa088f795001014a1b349f7adbbd1
@@ -0,0 +1,50 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(500);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	HAL_GPIO_TogglePin();
+
+	HAL_GPIO_TogglePin();
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/fe/704da1c0f895001014a1b349f7adbbd1 b/.metadata/.plugins/org.eclipse.core.resources/.history/fe/704da1c0f895001014a1b349f7adbbd1
new file mode 100644
index 0000000..6291a60
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/fe/704da1c0f895001014a1b349f7adbbd1
@@ -0,0 +1,60 @@
+/*
+ * breadboard.c
+ *
+ *  Created on: Sep 17, 2025
+ *      Author: ja
+ */
+
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+
+#define RedLight_Port RedLight_GPIO_Port
+#define YellowLight_Port YellowLight_GPIO_Port
+#define GreenLight_Port GreenLight_GPIO_Port
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+reset_traffic(void)
+{
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+}
+
+void
+breadboard(void)
+{
+	// Traffic Light
+	// Red Light
+	HAL_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+	HAL_Delay(333);
+	Hal_GPIO_TogglePin(RedLight_Port, RedLight_Pin);
+
+	// Yellow Light
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+	HAL_Delay(333);
+	HAL_GPIO_TogglePin(YellowLight_Port, YellowLight_Pin);
+
+	// Green Light
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+	HAL_DELAY(333);
+	HAL_GPIO_TogglePin(GreenLight_Port, GreenLight_Pin);
+
+	// Walk signal
+
+	// Light dimmer
+}
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.projects/TrafficLightsPlus/.indexes/af/history.index b/.metadata/.plugins/org.eclipse.core.resources/.projects/TrafficLightsPlus/.indexes/af/history.index
index f83525b..5c7ac5a 100644
Binary files a/.metadata/.plugins/org.eclipse.core.resources/.projects/TrafficLightsPlus/.indexes/af/history.index and b/.metadata/.plugins/org.eclipse.core.resources/.projects/TrafficLightsPlus/.indexes/af/history.index differ
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.projects/TrafficLightsPlus/.indexes/bf/be/history.index b/.metadata/.plugins/org.eclipse.core.resources/.projects/TrafficLightsPlus/.indexes/bf/be/history.index
new file mode 100644
index 0000000..febbf99
Binary files /dev/null and b/.metadata/.plugins/org.eclipse.core.resources/.projects/TrafficLightsPlus/.indexes/bf/be/history.index differ
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.projects/TrafficLightsPlus/.indexes/bf/c4/history.index b/.metadata/.plugins/org.eclipse.core.resources/.projects/TrafficLightsPlus/.indexes/bf/c4/history.index
index 6152667..5a3d387 100644
Binary files a/.metadata/.plugins/org.eclipse.core.resources/.projects/TrafficLightsPlus/.indexes/bf/c4/history.index and b/.metadata/.plugins/org.eclipse.core.resources/.projects/TrafficLightsPlus/.indexes/bf/c4/history.index differ
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.projects/TrafficLightsPlus/.indexes/properties.index b/.metadata/.plugins/org.eclipse.core.resources/.projects/TrafficLightsPlus/.indexes/properties.index
index ce190fc..2c54db9 100644
Binary files a/.metadata/.plugins/org.eclipse.core.resources/.projects/TrafficLightsPlus/.indexes/properties.index and b/.metadata/.plugins/org.eclipse.core.resources/.projects/TrafficLightsPlus/.indexes/properties.index differ
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.root/15.tree b/.metadata/.plugins/org.eclipse.core.resources/.root/16.tree
similarity index 74%
rename from .metadata/.plugins/org.eclipse.core.resources/.root/15.tree
rename to .metadata/.plugins/org.eclipse.core.resources/.root/16.tree
index 52698c8..63189b6 100644
Binary files a/.metadata/.plugins/org.eclipse.core.resources/.root/15.tree and b/.metadata/.plugins/org.eclipse.core.resources/.root/16.tree differ
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources b/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources
index adb33ab..7eb2952 100644
Binary files a/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources and b/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources differ
diff --git a/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs b/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs
index 5a975e5..cd0daa7 100644
--- a/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs
+++ b/.metadata/.plugins/org.eclipse.core.runtime/.settings/org.eclipse.cdt.managedbuilder.core.prefs
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index 4ccd40a..4078e8d 100644
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name=&quot;Calculator.ioc&quot; tooltip=&quot;Calculator/Calculator.ioc&quot;>&#xA;&lt;persistable path=&quot;/Calculator/Calculator.ioc&quot;/>&#xA;&lt;/file>&#xA;&lt;file factoryID=&quot;org.eclipse.ui.part.FileEditorInputFactory&quot; id=&quot;org.eclipse.cdt.ui.editor.CEditor&quot; name=&quot;main.c&quot; tooltip=&quot;Calculator/Core/Src/main.c&quot;>&#xA;&lt;persistable path=&quot;/Calculator/Core/Src/main.c&quot;/>&#xA;&lt;/file>&#xA;&lt;file factoryID=&quot;org.eclipse.ui.part.FileEditorInputFactory&quot; id=&quot;org.eclipse.cdt.ui.editor.CEditor&quot; name=&quot;cmsis_os.h&quot; tooltip=&quot;Calculator/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h&quot;>&#xA;&lt;persistable path=&quot;/Calculator/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h&quot;/>&#xA;&lt;/file>&#xA;&lt;file factoryID=&quot;org.eclipse.ui.part.FileEditorInputFactory&quot; id=&quot;org.eclipse.cdt.ui.editor.CEditor&quot; name=&quot;stm32f4xx_hal_gpio.c&quot; tooltip=&quot;MyNewProject/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c&quot;>&#xA;&lt;persistable path=&quot;/MyNewProject/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c&quot;/>&#xA;&lt;/file>&#xA;&lt;file factoryID=&quot;org.eclipse.ui.part.FileEditorInputFactory&quot; id=&quot;com.st.stm32cube.common.mx.startCubeMx&quot; name=&quot;MyNewProject.ioc&quot; tooltip=&quot;MyNewProject/MyNewProject.ioc&quot;>&#xA;&lt;persistable path=&quot;/MyNewProject/MyNewProject.ioc&quot;/>&#xA;&lt;/file>&#xA;&lt;file factoryID=&quot;org.eclipse.ui.part.FileEditorInputFactory&quot; id=&quot;org.eclipse.cdt.ui.editor.CEditor&quot; name=&quot;main.h&quot; tooltip=&quot;MyNewProject/Core/Inc/main.h&quot;>&#xA;&lt;persistable path=&quot;/MyNewProject/Core/Inc/main.h&quot;/>&#xA;&lt;/file>&#xA;&lt;/mruList>&#xA;&lt;/workbench>"/>
   <tags>activeSchemeId:org.eclipse.ui.defaultAcceleratorConfiguration</tags>
   <children xsi:type="basic:TrimmedWindow" xmi:id="_PGuWwYj-EfCcBcPyH3_z_g" elementId="IDEWindow" contributorURI="platform:/plugin/org.eclipse.ui.workbench" selectedElement="_QzO74Ij-EfCcBcPyH3_z_g" x="10" y="32" width="950" height="1063">
     <persistedState key="coolBarVisible" value="true"/>
@@ -160,7 +160,6 @@
           <tags>persp.newWizSC:com.st.stm32cube.ide.cmake.newwizard</tags>
           <children xsi:type="basic:PartSashContainer" xmi:id="_A9HiUYj_EfCcBcPyH3_z_g" selectedElement="_A9HiVIj_EfCcBcPyH3_z_g" horizontal="true">
             <children xsi:type="basic:PartStack" xmi:id="_A9HiUoj_EfCcBcPyH3_z_g" elementId="left" containerData="1825" selectedElement="_A9HiU4j_EfCcBcPyH3_z_g">
-              <tags>noFocus</tags>
               <children xsi:type="advanced:Placeholder" xmi:id="_A9HiU4j_EfCcBcPyH3_z_g" elementId="org.eclipse.ui.navigator.ProjectExplorer" ref="_Q2iHgIj-EfCcBcPyH3_z_g" closeable="true">
                 <tags>View</tags>
                 <tags>categoryTag:General</tags>
@@ -221,25 +220,31 @@
       <tags>categoryTag:Help</tags>
     </sharedElements>
     <sharedElements xsi:type="advanced:Area" xmi:id="_Q2bZ0Ij-EfCcBcPyH3_z_g" elementId="org.eclipse.ui.editorss" selectedElement="_Q2bZ0Yj-EfCcBcPyH3_z_g">
-      <children xsi:type="basic:PartStack" xmi:id="_Q2bZ0Yj-EfCcBcPyH3_z_g" elementId="org.eclipse.e4.primaryDataStack" selectedElement="_WkWn4JXhEfC7_9YmM1O-2A">
+      <children xsi:type="basic:PartStack" xmi:id="_Q2bZ0Yj-EfCcBcPyH3_z_g" elementId="org.eclipse.e4.primaryDataStack" selectedElement="_jiIOcJX4EfCDGKjzSMf2Qw">
         <tags>EditorStack</tags>
         <tags>org.eclipse.e4.primaryDataStack</tags>
         <tags>active</tags>
         <tags>noFocus</tags>
-        <children xsi:type="basic:Part" xmi:id="_Vo_y4JXhEfC7_9YmM1O-2A" elementId="org.eclipse.e4.ui.compatibility.editor" contributionURI="bundleclass://org.eclipse.ui.workbench/org.eclipse.ui.internal.e4.compatibility.CompatibilityEditor" label="main.c" iconURI="platform:/plugin/org.eclipse.cdt.ui/icons/obj16/c_file_obj.gif" closeable="true">
-          <persistedState key="memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?>&#xA;&lt;editor id=&quot;org.eclipse.cdt.ui.editor.CEditor&quot; name=&quot;main.c&quot; partName=&quot;main.c&quot; title=&quot;main.c&quot; tooltip=&quot;Calc2/Core/Src/main.c&quot;>&#xA;&lt;input factoryID=&quot;org.eclipse.ui.part.FileEditorInputFactory&quot; path=&quot;/Calc2/Core/Src/main.c&quot;/>&#xA;&lt;editorState selectionHorizontalPixel=&quot;0&quot; selectionLength=&quot;0&quot; selectionOffset=&quot;4377&quot; selectionTopPixel=&quot;2736&quot;/>&#xA;&lt;/editor>"/>
+        <children xsi:type="basic:Part" xmi:id="_qXnOoJXvEfCDGKjzSMf2Qw" elementId="org.eclipse.e4.ui.compatibility.editor" contributionURI="bundleclass://org.eclipse.ui.workbench/org.eclipse.ui.internal.e4.compatibility.CompatibilityEditor" label="breadboard.c" iconURI="platform:/plugin/org.eclipse.cdt.ui/icons/obj16/c_file_obj.gif" closeable="true">
+          <persistedState key="memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?>&#xA;&lt;editor id=&quot;org.eclipse.cdt.ui.editor.CEditor&quot; name=&quot;breadboard.c&quot; partName=&quot;breadboard.c&quot; title=&quot;breadboard.c&quot; tooltip=&quot;TrafficLightsPlus/Core/Src/breadboard.c&quot;>&#xA;&lt;input factoryID=&quot;org.eclipse.ui.part.FileEditorInputFactory&quot; path=&quot;/TrafficLightsPlus/Core/Src/breadboard.c&quot;/>&#xA;&lt;editorState selectionHorizontalPixel=&quot;0&quot; selectionLength=&quot;0&quot; selectionOffset=&quot;95&quot; selectionTopPixel=&quot;136&quot;/>&#xA;&lt;/editor>"/>
           <tags>Editor</tags>
           <tags>removeOnHide</tags>
           <tags>org.eclipse.cdt.ui.editor.CEditor</tags>
         </children>
-        <children xsi:type="basic:Part" xmi:id="_WkWn4JXhEfC7_9YmM1O-2A" elementId="org.eclipse.e4.ui.compatibility.editor" contributionURI="bundleclass://org.eclipse.ui.workbench/org.eclipse.ui.internal.e4.compatibility.CompatibilityEditor" label="breadboard.c" iconURI="platform:/plugin/org.eclipse.cdt.ui/icons/obj16/c_file_obj.gif" closeable="true">
-          <persistedState key="memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?>&#xA;&lt;editor id=&quot;org.eclipse.cdt.ui.editor.CEditor&quot; name=&quot;breadboard.c&quot; partName=&quot;breadboard.c&quot; title=&quot;breadboard.c&quot; tooltip=&quot;Calc2/Core/Src/breadboard.c&quot;>&#xA;&lt;input factoryID=&quot;org.eclipse.ui.part.FileEditorInputFactory&quot; path=&quot;/Calc2/Core/Src/breadboard.c&quot;/>&#xA;&lt;editorState selectionHorizontalPixel=&quot;0&quot; selectionLength=&quot;0&quot; selectionOffset=&quot;785&quot; selectionTopPixel=&quot;0&quot;/>&#xA;&lt;/editor>"/>
+        <children xsi:type="basic:Part" xmi:id="_jiIOcJX4EfCDGKjzSMf2Qw" elementId="org.eclipse.e4.ui.compatibility.editor" contributionURI="bundleclass://org.eclipse.ui.workbench/org.eclipse.ui.internal.e4.compatibility.CompatibilityEditor" label="main.c" iconURI="platform:/plugin/org.eclipse.cdt.ui/icons/obj16/c_file_obj.gif" closeable="true">
+          <persistedState key="memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?>&#xA;&lt;editor id=&quot;org.eclipse.cdt.ui.editor.CEditor&quot; name=&quot;main.c&quot; partName=&quot;main.c&quot; title=&quot;main.c&quot; tooltip=&quot;TrafficLightsPlus/Core/Src/main.c&quot;>&#xA;&lt;input factoryID=&quot;org.eclipse.ui.part.FileEditorInputFactory&quot; path=&quot;/TrafficLightsPlus/Core/Src/main.c&quot;/>&#xA;&lt;editorState selectionHorizontalPixel=&quot;0&quot; selectionLength=&quot;0&quot; selectionOffset=&quot;1145&quot; selectionTopPixel=&quot;228&quot;/>&#xA;&lt;/editor>"/>
           <tags>Editor</tags>
           <tags>removeOnHide</tags>
           <tags>org.eclipse.cdt.ui.editor.CEditor</tags>
           <tags>active</tags>
           <tags>activeOnClose</tags>
         </children>
+        <children xsi:type="basic:Part" xmi:id="_HXd6EJX5EfCDGKjzSMf2Qw" elementId="org.eclipse.e4.ui.compatibility.editor" contributionURI="bundleclass://org.eclipse.ui.workbench/org.eclipse.ui.internal.e4.compatibility.CompatibilityEditor" label="breadboard.h" iconURI="platform:/plugin/org.eclipse.cdt.ui/icons/obj16/c_file_obj.gif" closeable="true">
+          <persistedState key="memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?>&#xA;&lt;editor id=&quot;org.eclipse.cdt.ui.editor.CEditor&quot; name=&quot;breadboard.h&quot; partName=&quot;breadboard.h&quot; title=&quot;breadboard.h&quot; tooltip=&quot;TrafficLightsPlus/Core/Inc/breadboard.h&quot;>&#xA;&lt;input factoryID=&quot;org.eclipse.ui.part.FileEditorInputFactory&quot; path=&quot;/TrafficLightsPlus/Core/Inc/breadboard.h&quot;/>&#xA;&lt;editorState selectionHorizontalPixel=&quot;0&quot; selectionLength=&quot;0&quot; selectionOffset=&quot;149&quot; selectionTopPixel=&quot;0&quot;/>&#xA;&lt;/editor>"/>
+          <tags>Editor</tags>
+          <tags>removeOnHide</tags>
+          <tags>org.eclipse.cdt.ui.editor.CEditor</tags>
+        </children>
       </children>
     </sharedElements>
     <sharedElements xsi:type="basic:Part" xmi:id="_Q2iHgIj-EfCcBcPyH3_z_g" elementId="org.eclipse.ui.navigator.ProjectExplorer" contributionURI="bundleclass://org.eclipse.ui.workbench/org.eclipse.ui.internal.e4.compatibility.CompatibilityView" label="Project Explorer" iconURI="platform:/plugin/org.eclipse.ui.navigator.resources/icons/full/eview16/resource_persp.png" tooltip="" closeable="true">
@@ -269,7 +274,7 @@
     <sharedElements xsi:type="basic:Part" xmi:id="_Q2j8sYj-EfCcBcPyH3_z_g" elementId="org.eclipse.ui.views.ProblemView" contributionURI="bundleclass://org.eclipse.ui.workbench/org.eclipse.ui.internal.e4.compatibility.CompatibilityView" label="Problems" iconURI="platform:/plugin/org.eclipse.ui.ide/icons/full/eview16/problems_view.png" tooltip="" closeable="true">
       <persistedState key="originalCompatibilityViewClass" value="org.eclipse.ui.internal.views.markers.ProblemsView"/>
       <persistedState key="originalCompatibilityViewBundle" value="org.eclipse.ui.ide"/>
-      <persistedState key="memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?>&#xA;&lt;view PRIMARY_SORT_FIELD=&quot;org.eclipse.ui.ide.severityAndDescriptionField&quot; categoryGroup=&quot;org.eclipse.ui.ide.severity&quot; markerContentGenerator=&quot;org.eclipse.ui.ide.problemsGenerator&quot;>&#xA;&lt;columnWidths org.eclipse.ui.ide.locationField=&quot;105&quot; org.eclipse.ui.ide.markerType=&quot;105&quot; org.eclipse.ui.ide.pathField=&quot;140&quot; org.eclipse.ui.ide.resourceField=&quot;105&quot; org.eclipse.ui.ide.severityAndDescriptionField=&quot;350&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.severityAndDescriptionField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.resourceField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.pathField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.locationField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.markerType&quot;/>&#xA;&lt;/view>"/>
+      <persistedState key="memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?>&#xA;&lt;view PRIMARY_SORT_FIELD=&quot;org.eclipse.ui.ide.severityAndDescriptionField&quot; categoryGroup=&quot;org.eclipse.ui.ide.severity&quot; markerContentGenerator=&quot;org.eclipse.ui.ide.problemsGenerator&quot;>&#xA;&lt;expanded>&#xA;&lt;category IMemento.internal.id=&quot;Warnings&quot;/>&#xA;&lt;category IMemento.internal.id=&quot;Infos&quot;/>&#xA;&lt;/expanded>&#xA;&lt;columnWidths org.eclipse.ui.ide.locationField=&quot;105&quot; org.eclipse.ui.ide.markerType=&quot;105&quot; org.eclipse.ui.ide.pathField=&quot;140&quot; org.eclipse.ui.ide.resourceField=&quot;105&quot; org.eclipse.ui.ide.severityAndDescriptionField=&quot;350&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.severityAndDescriptionField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.resourceField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.pathField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.locationField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.markerType&quot;/>&#xA;&lt;/view>"/>
       <tags>View</tags>
       <tags>categoryTag:General</tags>
       <menus xmi:id="_Q8Y34Ij-EfCcBcPyH3_z_g" elementId="org.eclipse.ui.views.ProblemView">
@@ -393,7 +398,7 @@
       </children>
       <children xsi:type="menu:ToolBar" xmi:id="_Q0SEwIj-EfCcBcPyH3_z_g" elementId="org.eclipse.ui.workbench.file">
         <tags>Draggable</tags>
-        <children xsi:type="menu:HandledToolItem" xmi:id="_JCuO4JXhEfC7_9YmM1O-2A" elementId="print" visible="false" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/print_edit.png" tooltip="Print" command="_PHEVMIj-EfCcBcPyH3_z_g"/>
+        <children xsi:type="menu:HandledToolItem" xmi:id="_mp-fQJXvEfCDGKjzSMf2Qw" elementId="print" visible="false" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/print_edit.png" tooltip="Print" command="_PHEVMIj-EfCcBcPyH3_z_g"/>
       </children>
       <children xsi:type="menu:ToolBar" xmi:id="_Q0SEwYj-EfCcBcPyH3_z_g" elementId="group.edit" toBeRendered="false">
         <tags>toolbarSeparator</tags>
@@ -401,8 +406,8 @@
       </children>
       <children xsi:type="menu:ToolBar" xmi:id="_Q0SEw4j-EfCcBcPyH3_z_g" elementId="org.eclipse.ui.workbench.edit">
         <tags>Draggable</tags>
-        <children xsi:type="menu:HandledToolItem" xmi:id="_JCzHYJXhEfC7_9YmM1O-2A" elementId="undo" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/undo_edit.png" tooltip="Undo" enabled="false" command="_PHEVHoj-EfCcBcPyH3_z_g"/>
-        <children xsi:type="menu:HandledToolItem" xmi:id="_JC08kJXhEfC7_9YmM1O-2A" elementId="redo" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/redo_edit.png" tooltip="Redo" enabled="false" command="_PHFjQYj-EfCcBcPyH3_z_g"/>
+        <children xsi:type="menu:HandledToolItem" xmi:id="_mqBikJXvEfCDGKjzSMf2Qw" elementId="undo" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/undo_edit.png" tooltip="Undo" command="_PHEVHoj-EfCcBcPyH3_z_g"/>
+        <children xsi:type="menu:HandledToolItem" xmi:id="_mqCJoJXvEfCDGKjzSMf2Qw" elementId="redo" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/redo_edit.png" tooltip="Redo" enabled="false" command="_PHFjQYj-EfCcBcPyH3_z_g"/>
       </children>
       <children xsi:type="menu:ToolBar" xmi:id="_Q0SExIj-EfCcBcPyH3_z_g" elementId="additions" toBeRendered="false">
         <tags>toolbarSeparator</tags>
@@ -426,7 +431,7 @@
       </children>
       <children xsi:type="menu:ToolBar" xmi:id="_Q0SEyIj-EfCcBcPyH3_z_g" elementId="org.eclipse.ui.workbench.navigate">
         <tags>Draggable</tags>
-        <children xsi:type="menu:HandledToolItem" xmi:id="_JC3_4JXhEfC7_9YmM1O-2A" elementId="org.eclipse.ui.window.pinEditor" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/pin_editor.png" tooltip="Pin Editor" type="Check" command="_PHDuDoj-EfCcBcPyH3_z_g"/>
+        <children xsi:type="menu:HandledToolItem" xmi:id="_mqD-0JXvEfCDGKjzSMf2Qw" elementId="org.eclipse.ui.window.pinEditor" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/pin_editor.png" tooltip="Pin Editor" type="Check" command="_PHDuDoj-EfCcBcPyH3_z_g"/>
       </children>
       <children xsi:type="menu:ToolBar" xmi:id="_Q0Sr0Ij-EfCcBcPyH3_z_g" elementId="group.editor" toBeRendered="false">
         <tags>toolbarSeparator</tags>
@@ -469,6 +474,10 @@
         <tags>TrimStack</tags>
         <tags>Draggable</tags>
       </children>
+      <children xsi:type="menu:ToolControl" xmi:id="_d3cAsJXxEfCDGKjzSMf2Qw" elementId="left(IDEWindow).(com.st.stm32cube.common.mx.perspective)" toBeRendered="false" contributionURI="bundleclass://org.eclipse.e4.ui.workbench.addons.swt/org.eclipse.e4.ui.workbench.addons.minmax.TrimStack">
+        <tags>TrimStack</tags>
+        <tags>Draggable</tags>
+      </children>
     </trimBars>
     <trimBars xmi:id="_PGuWyIj-EfCcBcPyH3_z_g" elementId="org.eclipse.ui.trim.vertical2" contributorURI="platform:/plugin/org.eclipse.ui.workbench" toBeRendered="false" side="Right">
       <children xsi:type="menu:ToolControl" xmi:id="_30Y28I_HEfCmVakrd2WqTQ" elementId="topRight(IDEWindow).(org.eclipse.cdt.ui.CPerspective)" toBeRendered="false" contributionURI="bundleclass://org.eclipse.e4.ui.workbench.addons.swt/org.eclipse.e4.ui.workbench.addons.minmax.TrimStack">
@@ -1986,7 +1995,7 @@
   <addons xmi:id="_PGuW1oj-EfCcBcPyH3_z_g" elementId="MinMax Addon" contributorURI="platform:/plugin/org.eclipse.ui.workbench" contributionURI="bundleclass://org.eclipse.e4.ui.workbench.addons.swt/org.eclipse.e4.ui.workbench.addons.minmax.MinMaxAddon"/>
   <addons xmi:id="_PGuW14j-EfCcBcPyH3_z_g" elementId="org.eclipse.ui.workbench.addon.0" contributorURI="platform:/plugin/org.eclipse.ui.workbench" contributionURI="bundleclass://org.eclipse.e4.ui.workbench/org.eclipse.e4.ui.internal.workbench.addons.HandlerProcessingAddon"/>
   <addons xmi:id="_PG1rgIj-EfCcBcPyH3_z_g" elementId="SplitterAddon" contributionURI="bundleclass://org.eclipse.e4.ui.workbench.addons.swt/org.eclipse.e4.ui.workbench.addons.splitteraddon.SplitterAddon"/>
-  <addons xmi:id="_IYS0IKimEeS11vbz3f9ezw" elementId="org.eclipse.ui.ide.addon.0" contributorURI="platform:/plugin/org.eclipse.ui.ide" contributionURI="bundleclass://org.eclipse.ui.ide/org.eclipse.ui.internal.ide.addons.SaveAllDirtyPartsAddon"/>
+  <addons xmi:id="_le3XAJXvEfCDGKjzSMf2Qw" elementId="org.eclipse.ui.ide.addon.0" contributionURI="bundleclass://org.eclipse.ui.ide/org.eclipse.ui.internal.ide.addons.SaveAllDirtyPartsAddon"/>
   <addons xmi:id="_dz0JgGOlEeSMMaPQU2nlzw" elementId="org.eclipse.ui.ide.application.addon.0" contributorURI="platform:/plugin/org.eclipse.ui.ide.application" contributionURI="bundleclass://org.eclipse.ui.ide.application/org.eclipse.ui.internal.ide.application.addons.ModelCleanupAddon"/>
   <categories xmi:id="_PHADkIj-EfCcBcPyH3_z_g" elementId="org.eclipse.team.ui.category.team" name="Version control (Team)" description="Actions that apply when working with a version control system"/>
   <categories xmi:id="_PHAqoIj-EfCcBcPyH3_z_g" elementId="org.eclipse.ui.category.views" name="Views" description="Commands for opening views"/>
diff --git a/.metadata/version.ini b/.metadata/version.ini
index 4a55c1d..ec5f08e 100644
--- a/.metadata/version.ini
+++ b/.metadata/version.ini
@@ -1,3 +1,3 @@
-#Sat Sep 20 00:17:37 CDT 2025
+#Sat Sep 20 02:01:07 CDT 2025
 org.eclipse.core.runtime=2
 org.eclipse.platform=4.33.0.v20240903-0240
diff --git a/TrafficLightsPlus/.cproject b/TrafficLightsPlus/.cproject
index 0895abf..60ad164 100644
--- a/TrafficLightsPlus/.cproject
+++ b/TrafficLightsPlus/.cproject
@@ -127,7 +127,7 @@
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.1458536104" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi" useByScannerDiscovery="true" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.floatabi.value.hard" valueType="enumerated"/>
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board.1353540178" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.target_board" useByScannerDiscovery="false" value="STM32F429I-DISC1" valueType="string"/>
 							<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults.2094347600" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.option.defaults" useByScannerDiscovery="false" value="com.st.stm32cube.ide.common.services.build.inputs.revA.1.0.6 || Release || false || Executable || com.st.stm32cube.ide.mcu.gnu.managedbuild.option.toolchain.value.workspace || STM32F429I-DISC1 || 0 || 0 || arm-none-eabi- || ${gnu_tools_for_stm32_compiler_path} || ../Core/Inc | ../USB_HOST/App | ../USB_HOST/Target | ../Drivers/STM32F4xx_HAL_Driver/Inc | ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy | ../Middlewares/Third_Party/FreeRTOS/Source/include | ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc | ../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc | ../Drivers/CMSIS/Device/ST/STM32F4xx/Include | ../Drivers/CMSIS/Include || ../Core/Inc | ../USB_HOST/App | ../USB_HOST/Target | ../Drivers/STM32F4xx_HAL_Driver/Inc | ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy | ../Middlewares/Third_Party/FreeRTOS/Source/include | ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS | ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F | ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc | ../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc | ../Drivers/CMSIS/Device/ST/STM32F4xx/Include | ../Drivers/CMSIS/Include ||  || USE_HAL_DRIVER | STM32F429xx ||  || Drivers | USB_HOST | Core/Startup | Middlewares | Core ||  ||  || ${workspace_loc:/${ProjName}/STM32F429ZITX_FLASH.ld} || true || NonSecure ||  || secure_nsclib.o ||  || None ||  ||  || " valueType="string"/>
-							<option id="com.st.stm32cube.ide.mcu.debug.option.cpuclock.1749339887" superClass="com.st.stm32cube.ide.mcu.debug.option.cpuclock" value="72" valueType="string"/>
+							<option id="com.st.stm32cube.ide.mcu.debug.option.cpuclock.1749339887" superClass="com.st.stm32cube.ide.mcu.debug.option.cpuclock" useByScannerDiscovery="false" value="72" valueType="string"/>
 							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform.1908333443" isAbstract="false" osList="all" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.targetplatform"/>
 							<builder buildPath="${workspace_loc:/TrafficLightsPlus}/Release" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder.219071958" managedBuildOn="true" name="Gnu Make Builder.Release" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.builder"/>
 							<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1243695734" name="MCU/MPU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
diff --git a/TrafficLightsPlus/.mxproject b/TrafficLightsPlus/.mxproject
index 11b868a..54bfcc2 100644
--- a/TrafficLightsPlus/.mxproject
+++ b/TrafficLightsPlus/.mxproject
@@ -1,3 +1,11 @@
+[PreviousLibFiles]
+LibFiles=Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_bus.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_system.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_utils.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dmamux.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_crc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma2d.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_nor.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sram.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_nand.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pccard.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_i2c.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dsi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_spi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h;Middlewares/Third_Party/FreeRTOS/Source/include/croutine.h;Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h;Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h;Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h;Middlewares/Third_Party/FreeRTOS/Source/include/list.h;Middlewares/Third_Party/FreeRTOS/Source/include/message_buffer.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_prototypes.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h;Middlewares/Third_Party/FreeRTOS/Source/include/portable.h;Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h;Middlewares/Third_Party/FreeRTOS/Source/include/queue.h;Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h;Middlewares/Third_Party/FreeRTOS/Source/include/stack_macros.h;Middlewares/Third_Party/FreeRTOS/Source/include/StackMacros.h;Middlewares/Third_Party/FreeRTOS/Source/include/stream_buffer.h;Middlewares/Third_Party/FreeRTOS/Source/include/task.h;Middlewares/Third_Party/FreeRTOS/Source/include/timers.h;Middlewares/Third_Party/FreeRTOS/Source/include/atomic.h;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h;Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc/usbh_cdc.h;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c;Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_bus.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_system.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_utils.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dmamux.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_crc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma2d.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_nor.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sram.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_nand.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pccard.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_i2c.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dsi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_spi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h;Middlewares/Third_Party/FreeRTOS/Source/include/croutine.h;Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h;Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h;Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h;Middlewares/Third_Party/FreeRTOS/Source/include/list.h;Middlewares/Third_Party/FreeRTOS/Source/include/message_buffer.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_prototypes.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h;Middlewares/Third_Party/FreeRTOS/Source/include/portable.h;Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h;Middlewares/Third_Party/FreeRTOS/Source/include/queue.h;Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h;Middlewares/Third_Party/FreeRTOS/Source/include/stack_macros.h;Middlewares/Third_Party/FreeRTOS/Source/include/StackMacros.h;Middlewares/Third_Party/FreeRTOS/Source/include/stream_buffer.h;Middlewares/Third_Party/FreeRTOS/Source/include/task.h;Middlewares/Third_Party/FreeRTOS/Source/include/timers.h;Middlewares/Third_Party/FreeRTOS/Source/include/atomic.h;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h;Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc/usbh_cdc.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_starmc1.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/pmu_armv8.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv81mml.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm35p.h;Drivers/CMSIS/Include/cmsis_armclang_ltm.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm55.h;Drivers/CMSIS/Include/core_cm85.h;Drivers/CMSIS/Include/pac_armv81.h;Drivers/CMSIS/Include/cachel1_armv7.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm23.h;
+
+[PreviousUsedCubeIDEFiles]
+SourceFiles=Core/Src/main.c;Core/Src/freertos.c;USB_HOST/App/usb_host.c;USB_HOST/Target/usbh_conf.c;USB_HOST/Target/usbh_platform.c;Core/Src/stm32f4xx_it.c;Core/Src/stm32f4xx_hal_msp.c;Core/Src/stm32f4xx_hal_timebase_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c;Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Core/Src/system_stm32f4xx.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c;Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Core/Src/system_stm32f4xx.c;;;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c;Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c;
+HeaderPath=Drivers/STM32F4xx_HAL_Driver/Inc;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy;Middlewares/Third_Party/FreeRTOS/Source/include;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F;Middlewares/ST/STM32_USB_Host_Library/Core/Inc;Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc;Drivers/CMSIS/Device/ST/STM32F4xx/Include;Drivers/CMSIS/Include;Core/Inc;USB_HOST/App;USB_HOST/Target;
+CDefines=USE_HAL_DRIVER;STM32F429xx;USE_HAL_DRIVER;USE_HAL_DRIVER;
+
 [PreviousGenFiles]
 AdvancedFolderStructure=true
 HeaderFileListSize=7
@@ -28,11 +36,3 @@ SourcePath#1=../USB_HOST/App
 SourcePath#2=../USB_HOST/Target
 SourceFiles=;
 
-[PreviousLibFiles]
-LibFiles=Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_bus.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_system.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_utils.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dmamux.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_crc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma2d.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_nor.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sram.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_nand.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pccard.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_i2c.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dsi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_spi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h;Middlewares/Third_Party/FreeRTOS/Source/include/croutine.h;Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h;Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h;Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h;Middlewares/Third_Party/FreeRTOS/Source/include/list.h;Middlewares/Third_Party/FreeRTOS/Source/include/message_buffer.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_prototypes.h;Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h;Middlewares/Third_Party/FreeRTOS/Source/include/portable.h;Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h;Middlewares/Third_Party/FreeRTOS/Source/include/queue.h;Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h;Middlewares/Third_Party/FreeRTOS/Source/include/stack_macros.h;Middlewares/Third_Party/FreeRTOS/Source/include/StackMacros.h;Middlewares/Third_Party/FreeRTOS/Source/include/stream_buffer.h;Middlewares/Third_Party/FreeRTOS/Source/include/task.h;Middlewares/Third_Party/FreeRTOS/Source/include/timers.h;Middlewares/Third_Party/FreeRTOS/Source/include/atomic.h;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h;Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h;Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc/usbh_cdc.h;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c;Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_bus.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_system.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_utils.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dmamux.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_crc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_dma2d.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_nor.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sram.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_nand.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pccard.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_i2c.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dsi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_spi.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usart.h;Middlewares/Third_Party/FreeRTOS/Source/include/croutine.h;Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h;Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h;Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h;Middlewares/Third_Party/FreeRTOS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-
-[PreviousUsedCubeIDEFiles]
-SourceFiles=Core/Src/main.c;Core/Src/freertos.c;USB_HOST/App/usb_host.c;USB_HOST/Target/usbh_conf.c;USB_HOST/Target/usbh_platform.c;Core/Src/stm32f4xx_it.c;Core/Src/stm32f4xx_hal_msp.c;Core/Src/stm32f4xx_hal_timebase_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c;Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Core/Src/system_stm32f4xx.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c;Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Core/Src/system_stm32f4xx.c;;;Middlewares/Third_Party/FreeRTOS/Source/croutine.c;Middlewares/Third_Party/FreeRTOS/Source/event_groups.c;Middlewares/Third_Party/FreeRTOS/Source/list.c;Middlewares/Third_Party/FreeRTOS/Source/queue.c;Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c;Middlewares/Third_Party/FreeRTOS/Source/tasks.c;Middlewares/Third_Party/FreeRTOS/Source/timers.c;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c;Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c;Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c;Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c;
-HeaderPath=Drivers/STM32F4xx_HAL_Driver/Inc;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy;Middlewares/Third_Party/FreeRTOS/Source/include;Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS;Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F;Middlewares/ST/STM32_USB_Host_Library/Core/Inc;Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc;Drivers/CMSIS/Device/ST/STM32F4xx/Include;Drivers/CMSIS/Include;Core/Inc;USB_HOST/App;USB_HOST/Target;
-CDefines=USE_HAL_DRIVER;STM32F429xx;USE_HAL_DRIVER;USE_HAL_DRIVER;
-
diff --git a/TrafficLightsPlus/.settings/stm32cubeide.project.prefs b/TrafficLightsPlus/.settings/stm32cubeide.project.prefs
index dbb99f1..bce120c 100644
--- a/TrafficLightsPlus/.settings/stm32cubeide.project.prefs
+++ b/TrafficLightsPlus/.settings/stm32cubeide.project.prefs
@@ -1,4 +1,5 @@
 635E684B79701B039C64EA45C3F84D30=76D5CABA7E36F5DD0D38ED323FA426B4
 66BE74F758C12D739921AEA421D593D3=0
+8DF89ED150041C4CBC7CB9A9CAA90856=BB3BD6F58A87E81DE6E549B37335B23A
 DC22A860405A8BF2F2C095E5B6529F12=BB3BD6F58A87E81DE6E549B37335B23A
 eclipse.preferences.version=1
diff --git a/TrafficLightsPlus/Core/Inc/breadboard.h b/TrafficLightsPlus/Core/Inc/breadboard.h
new file mode 100644
index 0000000..01b9536
--- /dev/null
+++ b/TrafficLightsPlus/Core/Inc/breadboard.h
@@ -0,0 +1,13 @@
+/*
+ * breadboard.h
+ *
+ *  Created on: Sep 20, 2025
+ *      Author: ja
+ */
+
+#ifndef INC_BREADBOARD_H_
+#define INC_BREADBOARD_H_
+
+void breadboard(int);
+
+#endif /* INC_BREADBOARD_H_ */
diff --git a/TrafficLightsPlus/Core/Inc/main.h b/TrafficLightsPlus/Core/Inc/main.h
index 0785d61..ba578ff 100644
--- a/TrafficLightsPlus/Core/Inc/main.h
+++ b/TrafficLightsPlus/Core/Inc/main.h
@@ -57,6 +57,12 @@ void Error_Handler(void);
 /* USER CODE END EFP */
 
 /* Private defines -----------------------------------------------------------*/
+#define RedLight_Pin GPIO_PIN_2
+#define RedLight_GPIO_Port GPIOE
+#define YellowLight_Pin GPIO_PIN_3
+#define YellowLight_GPIO_Port GPIOE
+#define GreenLight_Pin GPIO_PIN_4
+#define GreenLight_GPIO_Port GPIOE
 #define PC14_OSC32_IN_Pin GPIO_PIN_14
 #define PC14_OSC32_IN_GPIO_Port GPIOC
 #define PC15_OSC32_OUT_Pin GPIO_PIN_15
diff --git a/TrafficLightsPlus/Core/Src/breadboard.c b/TrafficLightsPlus/Core/Src/breadboard.c
index 4e46f0a..f9a0e43 100644
--- a/TrafficLightsPlus/Core/Src/breadboard.c
+++ b/TrafficLightsPlus/Core/Src/breadboard.c
@@ -5,9 +5,40 @@
  *      Author: ja
  */
 
-void breadboard(void)
+/*
+ * #define RedLight_Pin GPIO_PIN_2
+ * #define RedLight_GPIO_Port GPIOE
+ *
+ * #define YellowLight_Pin GPIO_PIN_3
+ * #define YellowLight_GPIO_Port GPIOE
+ *
+ * #define GreenLight_Pin GPIO_PIN_4
+ * #define GreenLight_GPIO_Port GPIOE
+ *
+ * RedLight:	PE2
+ * YellowLight:	PE3
+ * GreenLight:	PE4
+ */
+
+#include "main.h"
+#include "breadboard.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(int traffSPD)
 {
 	// Traffic Light
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
+
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_SET);
+	HAL_Delay(traffSPD);
 
 	// Walk signal
 
diff --git a/TrafficLightsPlus/Core/Src/main.c b/TrafficLightsPlus/Core/Src/main.c
index 9858d13..c569d6d 100644
--- a/TrafficLightsPlus/Core/Src/main.c
+++ b/TrafficLightsPlus/Core/Src/main.c
@@ -23,6 +23,7 @@
 
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
+#include "breadboard.h"
 
 /* USER CODE END Includes */
 
@@ -144,15 +145,15 @@ int main(void)
 
   /* Create the thread(s) */
   /* definition and creation of defaultTask */
-  osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 4096);
-  defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);
+  //osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 4096);
+  //defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);
 
   /* USER CODE BEGIN RTOS_THREADS */
   /* add threads, ... */
   /* USER CODE END RTOS_THREADS */
 
   /* Start scheduler */
-  osKernelStart();
+  //osKernelStart();
 
   /* We should never get here as control is now taken by the scheduler */
 
@@ -160,6 +161,7 @@ int main(void)
   /* USER CODE BEGIN WHILE */
   while (1)
   {
+	  breadboard(333);
     /* USER CODE END WHILE */
 
     /* USER CODE BEGIN 3 */
@@ -562,15 +564,18 @@ static void MX_GPIO_Init(void)
   /* USER CODE END MX_GPIO_Init_1 */
 
   /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOE_CLK_ENABLE();
   __HAL_RCC_GPIOC_CLK_ENABLE();
   __HAL_RCC_GPIOF_CLK_ENABLE();
   __HAL_RCC_GPIOH_CLK_ENABLE();
   __HAL_RCC_GPIOA_CLK_ENABLE();
   __HAL_RCC_GPIOB_CLK_ENABLE();
   __HAL_RCC_GPIOG_CLK_ENABLE();
-  __HAL_RCC_GPIOE_CLK_ENABLE();
   __HAL_RCC_GPIOD_CLK_ENABLE();
 
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOE, RedLight_Pin|YellowLight_Pin|GreenLight_Pin, GPIO_PIN_RESET);
+
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(GPIOC, NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin, GPIO_PIN_RESET);
 
@@ -583,6 +588,13 @@ static void MX_GPIO_Init(void)
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(GPIOG, LD3_Pin|LD4_Pin, GPIO_PIN_RESET);
 
+  /*Configure GPIO pins : RedLight_Pin YellowLight_Pin GreenLight_Pin */
+  GPIO_InitStruct.Pin = RedLight_Pin|YellowLight_Pin|GreenLight_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
   /*Configure GPIO pins : NCS_MEMS_SPI_Pin CSX_Pin OTG_FS_PSO_Pin */
   GPIO_InitStruct.Pin = NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin;
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
diff --git a/TrafficLightsPlus/Debug/Core/Src/breadboard.cyclo b/TrafficLightsPlus/Debug/Core/Src/breadboard.cyclo
new file mode 100644
index 0000000..3dae6ac
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/breadboard.cyclo
@@ -0,0 +1 @@
+../Core/Src/breadboard.c:28:1:breadboard	1
diff --git a/TrafficLightsPlus/Debug/Core/Src/breadboard.d b/TrafficLightsPlus/Debug/Core/Src/breadboard.d
new file mode 100644
index 0000000..ac46ae2
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/breadboard.d
@@ -0,0 +1,82 @@
+Core/Src/breadboard.o: ../Core/Src/breadboard.c ../Core/Inc/main.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Core/Inc/breadboard.h
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Core/Inc/breadboard.h:
diff --git a/TrafficLightsPlus/Debug/Core/Src/breadboard.o b/TrafficLightsPlus/Debug/Core/Src/breadboard.o
new file mode 100644
index 0000000..4dfc96d
Binary files /dev/null and b/TrafficLightsPlus/Debug/Core/Src/breadboard.o differ
diff --git a/TrafficLightsPlus/Debug/Core/Src/breadboard.su b/TrafficLightsPlus/Debug/Core/Src/breadboard.su
new file mode 100644
index 0000000..a8b9852
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/breadboard.su
@@ -0,0 +1 @@
+../Core/Src/breadboard.c:28:1:breadboard	16	static
diff --git a/TrafficLightsPlus/Debug/Core/Src/freertos.cyclo b/TrafficLightsPlus/Debug/Core/Src/freertos.cyclo
new file mode 100644
index 0000000..3933066
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/freertos.cyclo
@@ -0,0 +1,4 @@
+../Core/Src/freertos.c:64:13:vApplicationIdleHook	1
+../Core/Src/freertos.c:79:13:vApplicationStackOverflowHook	1
+../Core/Src/freertos.c:88:13:vApplicationMallocFailedHook	1
+../Core/Src/freertos.c:107:6:vApplicationGetIdleTaskMemory	1
diff --git a/TrafficLightsPlus/Debug/Core/Src/freertos.d b/TrafficLightsPlus/Debug/Core/Src/freertos.d
new file mode 100644
index 0000000..257a9a1
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/freertos.d
@@ -0,0 +1,98 @@
+Core/Src/freertos.o: ../Core/Src/freertos.c \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Core/Inc/main.h ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Core/Src/freertos.o b/TrafficLightsPlus/Debug/Core/Src/freertos.o
new file mode 100644
index 0000000..48386e7
Binary files /dev/null and b/TrafficLightsPlus/Debug/Core/Src/freertos.o differ
diff --git a/TrafficLightsPlus/Debug/Core/Src/freertos.su b/TrafficLightsPlus/Debug/Core/Src/freertos.su
new file mode 100644
index 0000000..1233ba3
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/freertos.su
@@ -0,0 +1,4 @@
+../Core/Src/freertos.c:64:13:vApplicationIdleHook	4	static
+../Core/Src/freertos.c:79:13:vApplicationStackOverflowHook	16	static
+../Core/Src/freertos.c:88:13:vApplicationMallocFailedHook	4	static
+../Core/Src/freertos.c:107:6:vApplicationGetIdleTaskMemory	24	static
diff --git a/TrafficLightsPlus/Debug/Core/Src/main.cyclo b/TrafficLightsPlus/Debug/Core/Src/main.cyclo
new file mode 100644
index 0000000..20b8c88
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/main.cyclo
@@ -0,0 +1,14 @@
+../Core/Src/main.c:93:5:main	1
+../Core/Src/main.c:176:6:SystemClock_Config	3
+../Core/Src/main.c:222:13:MX_CRC_Init	2
+../Core/Src/main.c:248:13:MX_DMA2D_Init	3
+../Core/Src/main.c:285:13:MX_I2C3_Init	4
+../Core/Src/main.c:333:13:MX_LTDC_Init	3
+../Core/Src/main.c:395:13:MX_SPI5_Init	2
+../Core/Src/main.c:433:13:MX_TIM1_Init	4
+../Core/Src/main.c:479:13:MX_USART1_UART_Init	2
+../Core/Src/main.c:508:13:MX_FMC_Init	2
+../Core/Src/main.c:559:13:MX_GPIO_Init	1
+../Core/Src/main.c:666:6:StartDefaultTask	1
+../Core/Src/main.c:687:6:HAL_TIM_PeriodElapsedCallback	2
+../Core/Src/main.c:705:6:Error_Handler	1
diff --git a/TrafficLightsPlus/Debug/Core/Src/main.d b/TrafficLightsPlus/Debug/Core/Src/main.d
new file mode 100644
index 0000000..3c9b1d1
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/main.d
@@ -0,0 +1,117 @@
+Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../USB_HOST/App/usb_host.h ../Core/Inc/breadboard.h
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../USB_HOST/App/usb_host.h:
+../Core/Inc/breadboard.h:
diff --git a/TrafficLightsPlus/Debug/Core/Src/main.o b/TrafficLightsPlus/Debug/Core/Src/main.o
new file mode 100644
index 0000000..23bcd89
Binary files /dev/null and b/TrafficLightsPlus/Debug/Core/Src/main.o differ
diff --git a/TrafficLightsPlus/Debug/Core/Src/main.su b/TrafficLightsPlus/Debug/Core/Src/main.su
new file mode 100644
index 0000000..65f38ca
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/main.su
@@ -0,0 +1,14 @@
+../Core/Src/main.c:93:5:main	8	static
+../Core/Src/main.c:176:6:SystemClock_Config	88	static
+../Core/Src/main.c:222:13:MX_CRC_Init	8	static
+../Core/Src/main.c:248:13:MX_DMA2D_Init	8	static
+../Core/Src/main.c:285:13:MX_I2C3_Init	8	static
+../Core/Src/main.c:333:13:MX_LTDC_Init	64	static
+../Core/Src/main.c:395:13:MX_SPI5_Init	8	static
+../Core/Src/main.c:433:13:MX_TIM1_Init	32	static
+../Core/Src/main.c:479:13:MX_USART1_UART_Init	8	static
+../Core/Src/main.c:508:13:MX_FMC_Init	40	static
+../Core/Src/main.c:559:13:MX_GPIO_Init	64	static
+../Core/Src/main.c:666:6:StartDefaultTask	16	static
+../Core/Src/main.c:687:6:HAL_TIM_PeriodElapsedCallback	16	static
+../Core/Src/main.c:705:6:Error_Handler	4	static,ignoring_inline_asm
diff --git a/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_msp.cyclo b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_msp.cyclo
new file mode 100644
index 0000000..73666dc
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_msp.cyclo
@@ -0,0 +1,19 @@
+../Core/Src/stm32f4xx_hal_msp.c:63:6:HAL_MspInit	1
+../Core/Src/stm32f4xx_hal_msp.c:88:6:HAL_CRC_MspInit	2
+../Core/Src/stm32f4xx_hal_msp.c:111:6:HAL_CRC_MspDeInit	2
+../Core/Src/stm32f4xx_hal_msp.c:133:6:HAL_DMA2D_MspInit	2
+../Core/Src/stm32f4xx_hal_msp.c:159:6:HAL_DMA2D_MspDeInit	2
+../Core/Src/stm32f4xx_hal_msp.c:184:6:HAL_I2C_MspInit	2
+../Core/Src/stm32f4xx_hal_msp.c:229:6:HAL_I2C_MspDeInit	2
+../Core/Src/stm32f4xx_hal_msp.c:260:6:HAL_LTDC_MspInit	3
+../Core/Src/stm32f4xx_hal_msp.c:388:6:HAL_LTDC_MspDeInit	2
+../Core/Src/stm32f4xx_hal_msp.c:452:6:HAL_SPI_MspInit	2
+../Core/Src/stm32f4xx_hal_msp.c:490:6:HAL_SPI_MspDeInit	2
+../Core/Src/stm32f4xx_hal_msp.c:520:6:HAL_TIM_Base_MspInit	2
+../Core/Src/stm32f4xx_hal_msp.c:543:6:HAL_TIM_Base_MspDeInit	2
+../Core/Src/stm32f4xx_hal_msp.c:565:6:HAL_UART_MspInit	2
+../Core/Src/stm32f4xx_hal_msp.c:602:6:HAL_UART_MspDeInit	2
+../Core/Src/stm32f4xx_hal_msp.c:627:13:HAL_FMC_MspInit	2
+../Core/Src/stm32f4xx_hal_msp.c:733:6:HAL_SDRAM_MspInit	1
+../Core/Src/stm32f4xx_hal_msp.c:745:13:HAL_FMC_MspDeInit	2
+../Core/Src/stm32f4xx_hal_msp.c:819:6:HAL_SDRAM_MspDeInit	1
diff --git a/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_msp.d b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_msp.d
new file mode 100644
index 0000000..03b3aa2
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_msp.d
@@ -0,0 +1,80 @@
+Core/Src/stm32f4xx_hal_msp.o: ../Core/Src/stm32f4xx_hal_msp.c \
+ ../Core/Inc/main.h ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_msp.o b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_msp.o
new file mode 100644
index 0000000..1d0fd6f
Binary files /dev/null and b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_msp.o differ
diff --git a/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_msp.su b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_msp.su
new file mode 100644
index 0000000..d448fc4
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_msp.su
@@ -0,0 +1,19 @@
+../Core/Src/stm32f4xx_hal_msp.c:63:6:HAL_MspInit	16	static
+../Core/Src/stm32f4xx_hal_msp.c:88:6:HAL_CRC_MspInit	24	static
+../Core/Src/stm32f4xx_hal_msp.c:111:6:HAL_CRC_MspDeInit	16	static
+../Core/Src/stm32f4xx_hal_msp.c:133:6:HAL_DMA2D_MspInit	24	static
+../Core/Src/stm32f4xx_hal_msp.c:159:6:HAL_DMA2D_MspDeInit	16	static
+../Core/Src/stm32f4xx_hal_msp.c:184:6:HAL_I2C_MspInit	48	static
+../Core/Src/stm32f4xx_hal_msp.c:229:6:HAL_I2C_MspDeInit	16	static
+../Core/Src/stm32f4xx_hal_msp.c:260:6:HAL_LTDC_MspInit	112	static
+../Core/Src/stm32f4xx_hal_msp.c:388:6:HAL_LTDC_MspDeInit	16	static
+../Core/Src/stm32f4xx_hal_msp.c:452:6:HAL_SPI_MspInit	48	static
+../Core/Src/stm32f4xx_hal_msp.c:490:6:HAL_SPI_MspDeInit	16	static
+../Core/Src/stm32f4xx_hal_msp.c:520:6:HAL_TIM_Base_MspInit	24	static
+../Core/Src/stm32f4xx_hal_msp.c:543:6:HAL_TIM_Base_MspDeInit	16	static
+../Core/Src/stm32f4xx_hal_msp.c:565:6:HAL_UART_MspInit	48	static
+../Core/Src/stm32f4xx_hal_msp.c:602:6:HAL_UART_MspDeInit	16	static
+../Core/Src/stm32f4xx_hal_msp.c:627:13:HAL_FMC_MspInit	32	static
+../Core/Src/stm32f4xx_hal_msp.c:733:6:HAL_SDRAM_MspInit	16	static
+../Core/Src/stm32f4xx_hal_msp.c:745:13:HAL_FMC_MspDeInit	8	static
+../Core/Src/stm32f4xx_hal_msp.c:819:6:HAL_SDRAM_MspDeInit	16	static
diff --git a/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_timebase_tim.cyclo b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_timebase_tim.cyclo
new file mode 100644
index 0000000..692a6d3
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_timebase_tim.cyclo
@@ -0,0 +1,3 @@
+../Core/Src/stm32f4xx_hal_timebase_tim.c:41:19:HAL_InitTick	5
+../Core/Src/stm32f4xx_hal_timebase_tim.c:120:6:HAL_SuspendTick	1
+../Core/Src/stm32f4xx_hal_timebase_tim.c:132:6:HAL_ResumeTick	1
diff --git a/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_timebase_tim.d b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_timebase_tim.d
new file mode 100644
index 0000000..34970a9
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_timebase_tim.d
@@ -0,0 +1,80 @@
+Core/Src/stm32f4xx_hal_timebase_tim.o: \
+ ../Core/Src/stm32f4xx_hal_timebase_tim.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_timebase_tim.o b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_timebase_tim.o
new file mode 100644
index 0000000..7f9ce14
Binary files /dev/null and b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_timebase_tim.o differ
diff --git a/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_timebase_tim.su b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_timebase_tim.su
new file mode 100644
index 0000000..edb35db
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_hal_timebase_tim.su
@@ -0,0 +1,3 @@
+../Core/Src/stm32f4xx_hal_timebase_tim.c:41:19:HAL_InitTick	64	static
+../Core/Src/stm32f4xx_hal_timebase_tim.c:120:6:HAL_SuspendTick	4	static
+../Core/Src/stm32f4xx_hal_timebase_tim.c:132:6:HAL_ResumeTick	4	static
diff --git a/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_it.cyclo b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_it.cyclo
new file mode 100644
index 0000000..6b78a0d
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_it.cyclo
@@ -0,0 +1,10 @@
+../Core/Src/stm32f4xx_it.c:73:6:NMI_Handler	1
+../Core/Src/stm32f4xx_it.c:88:6:HardFault_Handler	1
+../Core/Src/stm32f4xx_it.c:103:6:MemManage_Handler	1
+../Core/Src/stm32f4xx_it.c:118:6:BusFault_Handler	1
+../Core/Src/stm32f4xx_it.c:133:6:UsageFault_Handler	1
+../Core/Src/stm32f4xx_it.c:148:6:DebugMon_Handler	1
+../Core/Src/stm32f4xx_it.c:168:6:TIM6_DAC_IRQHandler	1
+../Core/Src/stm32f4xx_it.c:182:6:OTG_HS_IRQHandler	1
+../Core/Src/stm32f4xx_it.c:196:6:LTDC_IRQHandler	1
+../Core/Src/stm32f4xx_it.c:210:6:DMA2D_IRQHandler	1
diff --git a/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_it.d b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_it.d
new file mode 100644
index 0000000..42c3453
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_it.d
@@ -0,0 +1,82 @@
+Core/Src/stm32f4xx_it.o: ../Core/Src/stm32f4xx_it.c ../Core/Inc/main.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Core/Inc/stm32f4xx_it.h
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Core/Inc/stm32f4xx_it.h:
diff --git a/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_it.o b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_it.o
new file mode 100644
index 0000000..c056e85
Binary files /dev/null and b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_it.o differ
diff --git a/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_it.su b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_it.su
new file mode 100644
index 0000000..d6e46b7
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/stm32f4xx_it.su
@@ -0,0 +1,10 @@
+../Core/Src/stm32f4xx_it.c:73:6:NMI_Handler	4	static
+../Core/Src/stm32f4xx_it.c:88:6:HardFault_Handler	4	static
+../Core/Src/stm32f4xx_it.c:103:6:MemManage_Handler	4	static
+../Core/Src/stm32f4xx_it.c:118:6:BusFault_Handler	4	static
+../Core/Src/stm32f4xx_it.c:133:6:UsageFault_Handler	4	static
+../Core/Src/stm32f4xx_it.c:148:6:DebugMon_Handler	4	static
+../Core/Src/stm32f4xx_it.c:168:6:TIM6_DAC_IRQHandler	8	static
+../Core/Src/stm32f4xx_it.c:182:6:OTG_HS_IRQHandler	8	static
+../Core/Src/stm32f4xx_it.c:196:6:LTDC_IRQHandler	8	static
+../Core/Src/stm32f4xx_it.c:210:6:DMA2D_IRQHandler	8	static
diff --git a/TrafficLightsPlus/Debug/Core/Src/subdir.mk b/TrafficLightsPlus/Debug/Core/Src/subdir.mk
new file mode 100644
index 0000000..3c380cb
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/subdir.mk
@@ -0,0 +1,51 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Core/Src/breadboard.c \
+../Core/Src/freertos.c \
+../Core/Src/main.c \
+../Core/Src/stm32f4xx_hal_msp.c \
+../Core/Src/stm32f4xx_hal_timebase_tim.c \
+../Core/Src/stm32f4xx_it.c \
+../Core/Src/syscalls.c \
+../Core/Src/sysmem.c \
+../Core/Src/system_stm32f4xx.c 
+
+OBJS += \
+./Core/Src/breadboard.o \
+./Core/Src/freertos.o \
+./Core/Src/main.o \
+./Core/Src/stm32f4xx_hal_msp.o \
+./Core/Src/stm32f4xx_hal_timebase_tim.o \
+./Core/Src/stm32f4xx_it.o \
+./Core/Src/syscalls.o \
+./Core/Src/sysmem.o \
+./Core/Src/system_stm32f4xx.o 
+
+C_DEPS += \
+./Core/Src/breadboard.d \
+./Core/Src/freertos.d \
+./Core/Src/main.d \
+./Core/Src/stm32f4xx_hal_msp.d \
+./Core/Src/stm32f4xx_hal_timebase_tim.d \
+./Core/Src/stm32f4xx_it.d \
+./Core/Src/syscalls.d \
+./Core/Src/sysmem.d \
+./Core/Src/system_stm32f4xx.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../USB_HOST/App -I../USB_HOST/Target -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/ST/STM32_USB_Host_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Core-2f-Src
+
+clean-Core-2f-Src:
+	-$(RM) ./Core/Src/breadboard.cyclo ./Core/Src/breadboard.d ./Core/Src/breadboard.o ./Core/Src/breadboard.su ./Core/Src/freertos.cyclo ./Core/Src/freertos.d ./Core/Src/freertos.o ./Core/Src/freertos.su ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/stm32f4xx_hal_msp.cyclo ./Core/Src/stm32f4xx_hal_msp.d ./Core/Src/stm32f4xx_hal_msp.o ./Core/Src/stm32f4xx_hal_msp.su ./Core/Src/stm32f4xx_hal_timebase_tim.cyclo ./Core/Src/stm32f4xx_hal_timebase_tim.d ./Core/Src/stm32f4xx_hal_timebase_tim.o ./Core/Src/stm32f4xx_hal_timebase_tim.su ./Core/Src/stm32f4xx_it.cyclo ./Core/Src/stm32f4xx_it.d ./Core/Src/stm32f4xx_it.o ./Core/Src/stm32f4xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32f4xx.cyclo ./Core/Src/system_stm32f4xx.d ./Core/Src/system_stm32f4xx.o ./Core/Src/system_stm32f4xx.su
+
+.PHONY: clean-Core-2f-Src
+
diff --git a/TrafficLightsPlus/Debug/Core/Src/syscalls.cyclo b/TrafficLightsPlus/Debug/Core/Src/syscalls.cyclo
new file mode 100644
index 0000000..6cbfdd0
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/syscalls.cyclo
@@ -0,0 +1,18 @@
+../Core/Src/syscalls.c:44:6:initialise_monitor_handles	1
+../Core/Src/syscalls.c:48:5:_getpid	1
+../Core/Src/syscalls.c:53:5:_kill	1
+../Core/Src/syscalls.c:61:6:_exit	1
+../Core/Src/syscalls.c:67:27:_read	2
+../Core/Src/syscalls.c:80:27:_write	2
+../Core/Src/syscalls.c:92:5:_close	1
+../Core/Src/syscalls.c:99:5:_fstat	1
+../Core/Src/syscalls.c:106:5:_isatty	1
+../Core/Src/syscalls.c:112:5:_lseek	1
+../Core/Src/syscalls.c:120:5:_open	1
+../Core/Src/syscalls.c:128:5:_wait	1
+../Core/Src/syscalls.c:135:5:_unlink	1
+../Core/Src/syscalls.c:142:5:_times	1
+../Core/Src/syscalls.c:148:5:_stat	1
+../Core/Src/syscalls.c:155:5:_link	1
+../Core/Src/syscalls.c:163:5:_fork	1
+../Core/Src/syscalls.c:169:5:_execve	1
diff --git a/TrafficLightsPlus/Debug/Core/Src/syscalls.d b/TrafficLightsPlus/Debug/Core/Src/syscalls.d
new file mode 100644
index 0000000..8667c70
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/syscalls.d
@@ -0,0 +1 @@
+Core/Src/syscalls.o: ../Core/Src/syscalls.c
diff --git a/TrafficLightsPlus/Debug/Core/Src/syscalls.o b/TrafficLightsPlus/Debug/Core/Src/syscalls.o
new file mode 100644
index 0000000..0fd8b01
Binary files /dev/null and b/TrafficLightsPlus/Debug/Core/Src/syscalls.o differ
diff --git a/TrafficLightsPlus/Debug/Core/Src/syscalls.su b/TrafficLightsPlus/Debug/Core/Src/syscalls.su
new file mode 100644
index 0000000..50b547a
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/syscalls.su
@@ -0,0 +1,18 @@
+../Core/Src/syscalls.c:44:6:initialise_monitor_handles	4	static
+../Core/Src/syscalls.c:48:5:_getpid	4	static
+../Core/Src/syscalls.c:53:5:_kill	16	static
+../Core/Src/syscalls.c:61:6:_exit	16	static
+../Core/Src/syscalls.c:67:27:_read	32	static
+../Core/Src/syscalls.c:80:27:_write	32	static
+../Core/Src/syscalls.c:92:5:_close	16	static
+../Core/Src/syscalls.c:99:5:_fstat	16	static
+../Core/Src/syscalls.c:106:5:_isatty	16	static
+../Core/Src/syscalls.c:112:5:_lseek	24	static
+../Core/Src/syscalls.c:120:5:_open	12	static
+../Core/Src/syscalls.c:128:5:_wait	16	static
+../Core/Src/syscalls.c:135:5:_unlink	16	static
+../Core/Src/syscalls.c:142:5:_times	16	static
+../Core/Src/syscalls.c:148:5:_stat	16	static
+../Core/Src/syscalls.c:155:5:_link	16	static
+../Core/Src/syscalls.c:163:5:_fork	8	static
+../Core/Src/syscalls.c:169:5:_execve	24	static
diff --git a/TrafficLightsPlus/Debug/Core/Src/sysmem.cyclo b/TrafficLightsPlus/Debug/Core/Src/sysmem.cyclo
new file mode 100644
index 0000000..0090c10
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/sysmem.cyclo
@@ -0,0 +1 @@
+../Core/Src/sysmem.c:53:7:_sbrk	3
diff --git a/TrafficLightsPlus/Debug/Core/Src/sysmem.d b/TrafficLightsPlus/Debug/Core/Src/sysmem.d
new file mode 100644
index 0000000..74fecf9
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/sysmem.d
@@ -0,0 +1 @@
+Core/Src/sysmem.o: ../Core/Src/sysmem.c
diff --git a/TrafficLightsPlus/Debug/Core/Src/sysmem.o b/TrafficLightsPlus/Debug/Core/Src/sysmem.o
new file mode 100644
index 0000000..f8826b0
Binary files /dev/null and b/TrafficLightsPlus/Debug/Core/Src/sysmem.o differ
diff --git a/TrafficLightsPlus/Debug/Core/Src/sysmem.su b/TrafficLightsPlus/Debug/Core/Src/sysmem.su
new file mode 100644
index 0000000..12d5f17
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/sysmem.su
@@ -0,0 +1 @@
+../Core/Src/sysmem.c:53:7:_sbrk	32	static
diff --git a/TrafficLightsPlus/Debug/Core/Src/system_stm32f4xx.cyclo b/TrafficLightsPlus/Debug/Core/Src/system_stm32f4xx.cyclo
new file mode 100644
index 0000000..4cc0df9
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/system_stm32f4xx.cyclo
@@ -0,0 +1,2 @@
+../Core/Src/system_stm32f4xx.c:167:6:SystemInit	1
+../Core/Src/system_stm32f4xx.c:220:6:SystemCoreClockUpdate	6
diff --git a/TrafficLightsPlus/Debug/Core/Src/system_stm32f4xx.d b/TrafficLightsPlus/Debug/Core/Src/system_stm32f4xx.d
new file mode 100644
index 0000000..ec54fc4
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/system_stm32f4xx.d
@@ -0,0 +1,79 @@
+Core/Src/system_stm32f4xx.o: ../Core/Src/system_stm32f4xx.c \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Core/Src/system_stm32f4xx.o b/TrafficLightsPlus/Debug/Core/Src/system_stm32f4xx.o
new file mode 100644
index 0000000..8efeceb
Binary files /dev/null and b/TrafficLightsPlus/Debug/Core/Src/system_stm32f4xx.o differ
diff --git a/TrafficLightsPlus/Debug/Core/Src/system_stm32f4xx.su b/TrafficLightsPlus/Debug/Core/Src/system_stm32f4xx.su
new file mode 100644
index 0000000..96f1cd4
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Src/system_stm32f4xx.su
@@ -0,0 +1,2 @@
+../Core/Src/system_stm32f4xx.c:167:6:SystemInit	4	static
+../Core/Src/system_stm32f4xx.c:220:6:SystemCoreClockUpdate	32	static
diff --git a/TrafficLightsPlus/Debug/Core/Startup/startup_stm32f429zitx.d b/TrafficLightsPlus/Debug/Core/Startup/startup_stm32f429zitx.d
new file mode 100644
index 0000000..f57c7a7
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Startup/startup_stm32f429zitx.d
@@ -0,0 +1,2 @@
+Core/Startup/startup_stm32f429zitx.o: \
+ ../Core/Startup/startup_stm32f429zitx.s
diff --git a/TrafficLightsPlus/Debug/Core/Startup/startup_stm32f429zitx.o b/TrafficLightsPlus/Debug/Core/Startup/startup_stm32f429zitx.o
new file mode 100644
index 0000000..414a7f6
Binary files /dev/null and b/TrafficLightsPlus/Debug/Core/Startup/startup_stm32f429zitx.o differ
diff --git a/TrafficLightsPlus/Debug/Core/Startup/subdir.mk b/TrafficLightsPlus/Debug/Core/Startup/subdir.mk
new file mode 100644
index 0000000..1945836
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Core/Startup/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+S_SRCS += \
+../Core/Startup/startup_stm32f429zitx.s 
+
+OBJS += \
+./Core/Startup/startup_stm32f429zitx.o 
+
+S_DEPS += \
+./Core/Startup/startup_stm32f429zitx.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Core/Startup/%.o: ../Core/Startup/%.s Core/Startup/subdir.mk
+	arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -I../Core/Inc -I../USB_HOST/App -I../USB_HOST/Target -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/ST/STM32_USB_Host_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<"
+
+clean: clean-Core-2f-Startup
+
+clean-Core-2f-Startup:
+	-$(RM) ./Core/Startup/startup_stm32f429zitx.d ./Core/Startup/startup_stm32f429zitx.o
+
+.PHONY: clean-Core-2f-Startup
+
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.cyclo
new file mode 100644
index 0000000..69e1650
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.cyclo
@@ -0,0 +1,29 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:157:19:HAL_Init	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:190:19:HAL_DeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:219:13:HAL_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:230:13:HAL_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:253:26:HAL_InitTick	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:312:13:HAL_IncTick	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:323:17:HAL_GetTick	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:332:10:HAL_GetTickPrio	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:341:19:HAL_SetTickFreq	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:374:21:HAL_GetTickFreq	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:390:13:HAL_Delay	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:416:13:HAL_SuspendTick	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:432:13:HAL_ResumeTick	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:442:10:HAL_GetHalVersion	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:451:10:HAL_GetREVID	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:460:10:HAL_GetDEVID	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:469:6:HAL_DBGMCU_EnableDBGSleepMode	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:478:6:HAL_DBGMCU_DisableDBGSleepMode	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:487:6:HAL_DBGMCU_EnableDBGStopMode	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:496:6:HAL_DBGMCU_DisableDBGStopMode	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:505:6:HAL_DBGMCU_EnableDBGStandbyMode	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:514:6:HAL_DBGMCU_DisableDBGStandbyMode	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:525:6:HAL_EnableCompensationCell	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:536:6:HAL_DisableCompensationCell	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:545:10:HAL_GetUIDw0	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:554:10:HAL_GetUIDw1	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:563:10:HAL_GetUIDw2	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:580:6:HAL_EnableMemorySwappingBank	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:595:6:HAL_DisableMemorySwappingBank	1
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d
new file mode 100644
index 0000000..5a6d366
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
new file mode 100644
index 0000000..632fd13
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.su
new file mode 100644
index 0000000..04ee6eb
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.su
@@ -0,0 +1,29 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:157:19:HAL_Init	8	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:190:19:HAL_DeInit	8	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:219:13:HAL_MspInit	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:230:13:HAL_MspDeInit	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:253:26:HAL_InitTick	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:312:13:HAL_IncTick	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:323:17:HAL_GetTick	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:332:10:HAL_GetTickPrio	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:341:19:HAL_SetTickFreq	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:374:21:HAL_GetTickFreq	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:390:13:HAL_Delay	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:416:13:HAL_SuspendTick	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:432:13:HAL_ResumeTick	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:442:10:HAL_GetHalVersion	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:451:10:HAL_GetREVID	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:460:10:HAL_GetDEVID	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:469:6:HAL_DBGMCU_EnableDBGSleepMode	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:478:6:HAL_DBGMCU_DisableDBGSleepMode	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:487:6:HAL_DBGMCU_EnableDBGStopMode	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:496:6:HAL_DBGMCU_DisableDBGStopMode	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:505:6:HAL_DBGMCU_EnableDBGStandbyMode	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:514:6:HAL_DBGMCU_DisableDBGStandbyMode	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:525:6:HAL_EnableCompensationCell	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:536:6:HAL_DisableCompensationCell	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:545:10:HAL_GetUIDw0	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:554:10:HAL_GetUIDw1	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:563:10:HAL_GetUIDw2	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:580:6:HAL_EnableMemorySwappingBank	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:595:6:HAL_DisableMemorySwappingBank	4	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.cyclo
new file mode 100644
index 0000000..04f992f
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.cyclo
@@ -0,0 +1,35 @@
+../Drivers/CMSIS/Include/core_cm4.h:1653:22:__NVIC_SetPriorityGrouping	1
+../Drivers/CMSIS/Include/core_cm4.h:1672:26:__NVIC_GetPriorityGrouping	1
+../Drivers/CMSIS/Include/core_cm4.h:1684:22:__NVIC_EnableIRQ	2
+../Drivers/CMSIS/Include/core_cm4.h:1722:22:__NVIC_DisableIRQ	2
+../Drivers/CMSIS/Include/core_cm4.h:1741:26:__NVIC_GetPendingIRQ	2
+../Drivers/CMSIS/Include/core_cm4.h:1760:22:__NVIC_SetPendingIRQ	2
+../Drivers/CMSIS/Include/core_cm4.h:1775:22:__NVIC_ClearPendingIRQ	2
+../Drivers/CMSIS/Include/core_cm4.h:1792:26:__NVIC_GetActive	2
+../Drivers/CMSIS/Include/core_cm4.h:1814:22:__NVIC_SetPriority	2
+../Drivers/CMSIS/Include/core_cm4.h:1836:26:__NVIC_GetPriority	2
+../Drivers/CMSIS/Include/core_cm4.h:1861:26:NVIC_EncodePriority	2
+../Drivers/CMSIS/Include/core_cm4.h:1888:22:NVIC_DecodePriority	2
+../Drivers/CMSIS/Include/core_cm4.h:1938:34:__NVIC_SystemReset	1
+../Drivers/CMSIS/Include/core_cm4.h:2022:26:SysTick_Config	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:141:6:HAL_NVIC_SetPriorityGrouping	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:163:6:HAL_NVIC_SetPriority	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:185:6:HAL_NVIC_EnableIRQ	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:201:6:HAL_NVIC_DisableIRQ	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:214:6:HAL_NVIC_SystemReset	0
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:227:10:HAL_SYSTICK_Config	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:256:6:HAL_MPU_Disable	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:279:6:HAL_MPU_Enable	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:296:6:HAL_MPU_EnableRegion	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:312:6:HAL_MPU_DisableRegion	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:330:6:HAL_MPU_ConfigRegion	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:368:6:HAL_CORTEX_ClearEvent	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:378:10:HAL_NVIC_GetPriorityGrouping	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:405:6:HAL_NVIC_GetPriority	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:420:6:HAL_NVIC_SetPendingIRQ	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:438:10:HAL_NVIC_GetPendingIRQ	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:454:6:HAL_NVIC_ClearPendingIRQ	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:471:10:HAL_NVIC_GetActive	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:488:6:HAL_SYSTICK_CLKSourceConfig	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:506:6:HAL_SYSTICK_IRQHandler	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:515:13:HAL_SYSTICK_Callback	1
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.d
new file mode 100644
index 0000000..6b530ef
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
new file mode 100644
index 0000000..61e096f
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.su
new file mode 100644
index 0000000..985c480
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.su
@@ -0,0 +1,35 @@
+../Drivers/CMSIS/Include/core_cm4.h:1653:22:__NVIC_SetPriorityGrouping	24	static
+../Drivers/CMSIS/Include/core_cm4.h:1672:26:__NVIC_GetPriorityGrouping	4	static
+../Drivers/CMSIS/Include/core_cm4.h:1684:22:__NVIC_EnableIRQ	16	static,ignoring_inline_asm
+../Drivers/CMSIS/Include/core_cm4.h:1722:22:__NVIC_DisableIRQ	16	static,ignoring_inline_asm
+../Drivers/CMSIS/Include/core_cm4.h:1741:26:__NVIC_GetPendingIRQ	16	static
+../Drivers/CMSIS/Include/core_cm4.h:1760:22:__NVIC_SetPendingIRQ	16	static
+../Drivers/CMSIS/Include/core_cm4.h:1775:22:__NVIC_ClearPendingIRQ	16	static
+../Drivers/CMSIS/Include/core_cm4.h:1792:26:__NVIC_GetActive	16	static
+../Drivers/CMSIS/Include/core_cm4.h:1814:22:__NVIC_SetPriority	16	static
+../Drivers/CMSIS/Include/core_cm4.h:1836:26:__NVIC_GetPriority	16	static
+../Drivers/CMSIS/Include/core_cm4.h:1861:26:NVIC_EncodePriority	40	static
+../Drivers/CMSIS/Include/core_cm4.h:1888:22:NVIC_DecodePriority	40	static
+../Drivers/CMSIS/Include/core_cm4.h:1938:34:__NVIC_SystemReset	4	static,ignoring_inline_asm
+../Drivers/CMSIS/Include/core_cm4.h:2022:26:SysTick_Config	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:141:6:HAL_NVIC_SetPriorityGrouping	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:163:6:HAL_NVIC_SetPriority	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:185:6:HAL_NVIC_EnableIRQ	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:201:6:HAL_NVIC_DisableIRQ	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:214:6:HAL_NVIC_SystemReset	8	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:227:10:HAL_SYSTICK_Config	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:256:6:HAL_MPU_Disable	4	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:279:6:HAL_MPU_Enable	16	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:296:6:HAL_MPU_EnableRegion	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:312:6:HAL_MPU_DisableRegion	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:330:6:HAL_MPU_ConfigRegion	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:368:6:HAL_CORTEX_ClearEvent	4	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:378:10:HAL_NVIC_GetPriorityGrouping	8	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:405:6:HAL_NVIC_GetPriority	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:420:6:HAL_NVIC_SetPendingIRQ	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:438:10:HAL_NVIC_GetPendingIRQ	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:454:6:HAL_NVIC_ClearPendingIRQ	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:471:10:HAL_NVIC_GetActive	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:488:6:HAL_SYSTICK_CLKSourceConfig	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:506:6:HAL_SYSTICK_IRQHandler	8	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:515:13:HAL_SYSTICK_Callback	4	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.cyclo
new file mode 100644
index 0000000..1914d62
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.cyclo
@@ -0,0 +1,7 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c:95:19:HAL_CRC_Init	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c:126:19:HAL_CRC_DeInit	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c:170:13:HAL_CRC_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c:185:13:HAL_CRC_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c:227:10:HAL_CRC_Accumulate	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c:257:10:HAL_CRC_Calculate	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c:306:22:HAL_CRC_GetState	1
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.d
new file mode 100644
index 0000000..d20dddd
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.o
new file mode 100644
index 0000000..5461c3c
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.su
new file mode 100644
index 0000000..b69b967
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.su
@@ -0,0 +1,7 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c:95:19:HAL_CRC_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c:126:19:HAL_CRC_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c:170:13:HAL_CRC_MspInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c:185:13:HAL_CRC_MspDeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c:227:10:HAL_CRC_Accumulate	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c:257:10:HAL_CRC_Calculate	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c:306:22:HAL_CRC_GetState	16	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.cyclo
new file mode 100644
index 0000000..29a68e4
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.cyclo
@@ -0,0 +1,15 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:170:19:HAL_DMA_Init	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:309:19:HAL_DMA_DeInit	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:407:19:HAL_DMA_Start	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:451:19:HAL_DMA_Start_IT	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:513:19:HAL_DMA_Abort	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:580:19:HAL_DMA_Abort_IT	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:610:19:HAL_DMA_PollForTransfer	15
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:746:6:HAL_DMA_IRQHandler	32
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:967:19:HAL_DMA_RegisterCallback	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1029:19:HAL_DMA_UnRegisterCallback	10
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1114:22:HAL_DMA_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1125:10:HAL_DMA_GetError	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1151:13:DMA_SetConfig	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1185:17:DMA_CalcBaseAndBitshift	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1213:26:DMA_CheckFifoParam	15
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.d
new file mode 100644
index 0000000..fb3efbe
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o
new file mode 100644
index 0000000..8bbb398
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.su
new file mode 100644
index 0000000..6c24b90
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.su
@@ -0,0 +1,15 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:170:19:HAL_DMA_Init	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:309:19:HAL_DMA_DeInit	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:407:19:HAL_DMA_Start	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:451:19:HAL_DMA_Start_IT	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:513:19:HAL_DMA_Abort	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:580:19:HAL_DMA_Abort_IT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:610:19:HAL_DMA_PollForTransfer	48	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:746:6:HAL_DMA_IRQHandler	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:967:19:HAL_DMA_RegisterCallback	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1029:19:HAL_DMA_UnRegisterCallback	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1114:22:HAL_DMA_GetState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1125:10:HAL_DMA_GetError	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1151:13:DMA_SetConfig	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1185:17:DMA_CalcBaseAndBitshift	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1213:26:DMA_CheckFifoParam	24	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.cyclo
new file mode 100644
index 0000000..a99becd
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.cyclo
@@ -0,0 +1,32 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:238:19:HAL_DMA2D_Init	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:306:19:HAL_DMA2D_DeInit	10
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:396:13:HAL_DMA2D_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:412:13:HAL_DMA2D_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:668:19:HAL_DMA2D_Start	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:704:19:HAL_DMA2D_Start_IT	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:741:19:HAL_DMA2D_BlendingStart	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:778:19:HAL_DMA2D_BlendingStart_IT	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:812:19:HAL_DMA2D_Abort	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:861:19:HAL_DMA2D_Suspend	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:910:19:HAL_DMA2D_Resume	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:938:19:HAL_DMA2D_EnableCLUT	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:974:19:HAL_DMA2D_CLUTStartLoad	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1029:19:HAL_DMA2D_CLUTStartLoad_IT	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1093:19:HAL_DMA2D_CLUTLoad	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1150:19:HAL_DMA2D_CLUTLoad_IT	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1208:19:HAL_DMA2D_CLUTLoading_Abort	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1265:19:HAL_DMA2D_CLUTLoading_Suspend	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1330:19:HAL_DMA2D_CLUTLoading_Resume	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1373:19:HAL_DMA2D_PollForTransfer	18
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1501:6:HAL_DMA2D_IRQHandler	17
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1671:13:HAL_DMA2D_LineEventCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1687:13:HAL_DMA2D_CLUTLoadingCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1730:19:HAL_DMA2D_ConfigLayer	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1827:19:HAL_DMA2D_ConfigCLUT	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1881:19:HAL_DMA2D_ProgramLineEvent	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1917:19:HAL_DMA2D_EnableDeadTime	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1940:19:HAL_DMA2D_DisableDeadTime	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1966:19:HAL_DMA2D_ConfigDeadTime	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:2011:24:HAL_DMA2D_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:2022:10:HAL_DMA2D_GetError	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:2050:13:DMA2D_SetConfig	6
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.d
new file mode 100644
index 0000000..041cc3f
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
new file mode 100644
index 0000000..4e8fbe2
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.su
new file mode 100644
index 0000000..946daa2
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.su
@@ -0,0 +1,32 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:238:19:HAL_DMA2D_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:306:19:HAL_DMA2D_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:396:13:HAL_DMA2D_MspInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:412:13:HAL_DMA2D_MspDeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:668:19:HAL_DMA2D_Start	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:704:19:HAL_DMA2D_Start_IT	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:741:19:HAL_DMA2D_BlendingStart	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:778:19:HAL_DMA2D_BlendingStart_IT	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:812:19:HAL_DMA2D_Abort	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:861:19:HAL_DMA2D_Suspend	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:910:19:HAL_DMA2D_Resume	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:938:19:HAL_DMA2D_EnableCLUT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:974:19:HAL_DMA2D_CLUTStartLoad	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1029:19:HAL_DMA2D_CLUTStartLoad_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1093:19:HAL_DMA2D_CLUTLoad	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1150:19:HAL_DMA2D_CLUTLoad_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1208:19:HAL_DMA2D_CLUTLoading_Abort	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1265:19:HAL_DMA2D_CLUTLoading_Suspend	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1330:19:HAL_DMA2D_CLUTLoading_Resume	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1373:19:HAL_DMA2D_PollForTransfer	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1501:6:HAL_DMA2D_IRQHandler	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1671:13:HAL_DMA2D_LineEventCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1687:13:HAL_DMA2D_CLUTLoadingCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1730:19:HAL_DMA2D_ConfigLayer	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1827:19:HAL_DMA2D_ConfigCLUT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1881:19:HAL_DMA2D_ProgramLineEvent	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1917:19:HAL_DMA2D_EnableDeadTime	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1940:19:HAL_DMA2D_DisableDeadTime	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:1966:19:HAL_DMA2D_ConfigDeadTime	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:2011:24:HAL_DMA2D_GetState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:2022:10:HAL_DMA2D_GetError	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c:2050:13:DMA2D_SetConfig	48	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.cyclo
new file mode 100644
index 0000000..8080a4a
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.cyclo
@@ -0,0 +1,4 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:100:19:HAL_DMAEx_MultiBufferStart	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:154:19:HAL_DMAEx_MultiBufferStart_IT	264
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:239:19:HAL_DMAEx_ChangeMemory	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:276:13:DMA_MultiBufferSetConfig	2
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.d
new file mode 100644
index 0000000..4d2ce66
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o
new file mode 100644
index 0000000..b7cdca2
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.su
new file mode 100644
index 0000000..9b2268b
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.su
@@ -0,0 +1,4 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:100:19:HAL_DMAEx_MultiBufferStart	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:154:19:HAL_DMAEx_MultiBufferStart_IT	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:239:19:HAL_DMAEx_ChangeMemory	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:276:13:DMA_MultiBufferSetConfig	24	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.cyclo
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.d
new file mode 100644
index 0000000..2f935b4
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.o
new file mode 100644
index 0000000..8eb6e7a
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.su
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.cyclo
new file mode 100644
index 0000000..65258b1
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.cyclo
@@ -0,0 +1,9 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:142:19:HAL_EXTI_SetConfigLine	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:237:19:HAL_EXTI_GetConfigLine	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:316:19:HAL_EXTI_ClearConfigLine	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:369:19:HAL_EXTI_RegisterCallback	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:394:19:HAL_EXTI_GetHandle	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:434:6:HAL_EXTI_IRQHandler	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:466:10:HAL_EXTI_GetPending	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:498:6:HAL_EXTI_ClearPending	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:522:6:HAL_EXTI_GenerateSWI	1
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.d
new file mode 100644
index 0000000..af1da55
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o
new file mode 100644
index 0000000..c49afc0
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.su
new file mode 100644
index 0000000..8a14ca5
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.su
@@ -0,0 +1,9 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:142:19:HAL_EXTI_SetConfigLine	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:237:19:HAL_EXTI_GetConfigLine	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:316:19:HAL_EXTI_ClearConfigLine	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:369:19:HAL_EXTI_RegisterCallback	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:394:19:HAL_EXTI_GetHandle	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:434:6:HAL_EXTI_IRQHandler	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:466:10:HAL_EXTI_GetPending	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:498:6:HAL_EXTI_ClearPending	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:522:6:HAL_EXTI_GenerateSWI	24	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.cyclo
new file mode 100644
index 0000000..3035a46
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.cyclo
@@ -0,0 +1,17 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:161:19:HAL_FLASH_Program	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:219:19:HAL_FLASH_Program_IT	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:263:6:HAL_FLASH_IRQHandler	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:383:13:HAL_FLASH_EndOfOperationCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:400:13:HAL_FLASH_OperationErrorCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:432:19:HAL_FLASH_Unlock	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:456:19:HAL_FLASH_Lock	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:468:19:HAL_FLASH_OB_Unlock	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:488:19:HAL_FLASH_OB_Lock	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:500:19:HAL_FLASH_OB_Launch	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:537:10:HAL_FLASH_GetError	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:551:19:FLASH_WaitForLastOperation	7
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:611:13:FLASH_Program_DoubleWord	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:645:13:FLASH_Program_Word	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:670:13:FLASH_Program_HalfWord	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:695:13:FLASH_Program_Byte	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:712:13:FLASH_SetErrorCode	7
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.d
new file mode 100644
index 0000000..7032a5a
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o
new file mode 100644
index 0000000..2010948
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.su
new file mode 100644
index 0000000..3f33f48
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.su
@@ -0,0 +1,17 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:161:19:HAL_FLASH_Program	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:219:19:HAL_FLASH_Program_IT	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:263:6:HAL_FLASH_IRQHandler	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:383:13:HAL_FLASH_EndOfOperationCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:400:13:HAL_FLASH_OperationErrorCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:432:19:HAL_FLASH_Unlock	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:456:19:HAL_FLASH_Lock	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:468:19:HAL_FLASH_OB_Unlock	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:488:19:HAL_FLASH_OB_Lock	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:500:19:HAL_FLASH_OB_Launch	8	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:537:10:HAL_FLASH_GetError	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:551:19:FLASH_WaitForLastOperation	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:611:13:FLASH_Program_DoubleWord	24	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:645:13:FLASH_Program_Word	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:670:13:FLASH_Program_HalfWord	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:695:13:FLASH_Program_Byte	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:712:13:FLASH_SetErrorCode	4	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.cyclo
new file mode 100644
index 0000000..f648a19
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.cyclo
@@ -0,0 +1,24 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:160:19:HAL_FLASHEx_Erase	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:231:19:HAL_FLASHEx_Erase_IT	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:281:19:HAL_FLASHEx_OBProgram	7
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:340:6:HAL_FLASHEx_OBGetConfig	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:369:19:HAL_FLASHEx_AdvOBProgram	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:425:6:HAL_FLASHEx_AdvOBGetConfig	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:457:19:HAL_FLASHEx_OB_SelectPCROP	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:482:19:HAL_FLASHEx_OB_DeSelectPCROP	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:504:10:HAL_FLASHEx_OB_GetBank2WRP	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:537:13:FLASH_MassErase	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:581:6:FLASH_Erase_Sector	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:641:26:FLASH_OB_EnableWRP	10
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:712:26:FLASH_OB_DisableWRP	10
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:773:26:FLASH_OB_BootConfig	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:813:26:FLASH_OB_EnablePCROP	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:877:26:FLASH_OB_DisablePCROP	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1157:26:FLASH_OB_RDP_LevelConfig	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1191:26:FLASH_OB_UserConfig	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1226:26:FLASH_OB_BOR_LevelConfig	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1244:16:FLASH_OB_GetUser	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1254:17:FLASH_OB_GetWRP	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1268:16:FLASH_OB_GetRDP	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1296:16:FLASH_OB_GetBOR	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1306:6:FLASH_FlushCaches	3
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.d
new file mode 100644
index 0000000..92ad2a7
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o
new file mode 100644
index 0000000..c5c424f
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.su
new file mode 100644
index 0000000..2ef74b6
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.su
@@ -0,0 +1,24 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:160:19:HAL_FLASHEx_Erase	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:231:19:HAL_FLASHEx_Erase_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:281:19:HAL_FLASHEx_OBProgram	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:340:6:HAL_FLASHEx_OBGetConfig	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:369:19:HAL_FLASHEx_AdvOBProgram	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:425:6:HAL_FLASHEx_AdvOBGetConfig	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:457:19:HAL_FLASHEx_OB_SelectPCROP	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:482:19:HAL_FLASHEx_OB_DeSelectPCROP	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:504:10:HAL_FLASHEx_OB_GetBank2WRP	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:537:13:FLASH_MassErase	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:581:6:FLASH_Erase_Sector	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:641:26:FLASH_OB_EnableWRP	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:712:26:FLASH_OB_DisableWRP	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:773:26:FLASH_OB_BootConfig	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:813:26:FLASH_OB_EnablePCROP	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:877:26:FLASH_OB_DisablePCROP	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1157:26:FLASH_OB_RDP_LevelConfig	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1191:26:FLASH_OB_UserConfig	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1226:26:FLASH_OB_BOR_LevelConfig	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1244:16:FLASH_OB_GetUser	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1254:17:FLASH_OB_GetWRP	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1268:16:FLASH_OB_GetRDP	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1296:16:FLASH_OB_GetBOR	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1306:6:FLASH_FlushCaches	4	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.cyclo
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.d
new file mode 100644
index 0000000..4889437
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o
new file mode 100644
index 0000000..c1bc847
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.su
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.cyclo
new file mode 100644
index 0000000..3263b38
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.cyclo
@@ -0,0 +1,8 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:164:6:HAL_GPIO_Init	22
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:294:6:HAL_GPIO_DeInit	14
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:375:15:HAL_GPIO_ReadPin	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:410:6:HAL_GPIO_WritePin	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:433:6:HAL_GPIO_TogglePin	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:458:19:HAL_GPIO_LockPin	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:492:6:HAL_GPIO_EXTI_IRQHandler	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:507:13:HAL_GPIO_EXTI_Callback	1
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.d
new file mode 100644
index 0000000..6a1087a
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
new file mode 100644
index 0000000..12e9c0a
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.su
new file mode 100644
index 0000000..2ae1321
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.su
@@ -0,0 +1,8 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:164:6:HAL_GPIO_Init	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:294:6:HAL_GPIO_DeInit	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:375:15:HAL_GPIO_ReadPin	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:410:6:HAL_GPIO_WritePin	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:433:6:HAL_GPIO_TogglePin	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:458:19:HAL_GPIO_LockPin	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:492:6:HAL_GPIO_EXTI_IRQHandler	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:507:13:HAL_GPIO_EXTI_Callback	16	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.cyclo
new file mode 100644
index 0000000..4950e43
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.cyclo
@@ -0,0 +1,30 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:110:19:HAL_HCD_Init	7
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:218:19:HAL_HCD_HC_Init	7
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:276:19:HAL_HCD_HC_Halt	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:292:19:HAL_HCD_DeInit	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:327:14:HAL_HCD_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:342:14:HAL_HCD_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:394:19:HAL_HCD_HC_SubmitRequest	18
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:538:6:HAL_HCD_IRQHandler	18
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:661:6:HAL_HCD_WKUP_IRQHandler	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:672:13:HAL_HCD_SOF_Callback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:687:13:HAL_HCD_Connect_Callback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:702:13:HAL_HCD_Disconnect_Callback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:717:13:HAL_HCD_PortEnabled_Callback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:732:13:HAL_HCD_PortDisabled_Callback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:757:13:HAL_HCD_HC_NotifyURBChange_Callback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1073:19:HAL_HCD_Start	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1092:19:HAL_HCD_Stop	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1106:19:HAL_HCD_ResetPort	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1135:18:HAL_HCD_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1154:21:HAL_HCD_HC_GetURBState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1167:10:HAL_HCD_HC_GetXferCount	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1189:21:HAL_HCD_HC_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1199:10:HAL_HCD_GetCurrentFrame	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1209:10:HAL_HCD_GetCurrentSpeed	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1223:19:HAL_HCD_HC_SetHubInfo	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1253:19:HAL_HCD_HC_ClearHubInfo	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1280:13:HCD_HC_IN_IRQHandler	52
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1599:13:HCD_HC_OUT_IRQHandler	38
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1840:13:HCD_RXQLVL_IRQHandler	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1906:13:HCD_Port_IRQHandler	9
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.d
new file mode 100644
index 0000000..d69ea27
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o
new file mode 100644
index 0000000..be3892f
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.su
new file mode 100644
index 0000000..8d2e491
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.su
@@ -0,0 +1,30 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:110:19:HAL_HCD_Init	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:218:19:HAL_HCD_HC_Init	56	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:276:19:HAL_HCD_HC_Halt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:292:19:HAL_HCD_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:327:14:HAL_HCD_MspInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:342:14:HAL_HCD_MspDeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:394:19:HAL_HCD_HC_SubmitRequest	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:538:6:HAL_HCD_IRQHandler	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:661:6:HAL_HCD_WKUP_IRQHandler	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:672:13:HAL_HCD_SOF_Callback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:687:13:HAL_HCD_Connect_Callback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:702:13:HAL_HCD_Disconnect_Callback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:717:13:HAL_HCD_PortEnabled_Callback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:732:13:HAL_HCD_PortDisabled_Callback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:757:13:HAL_HCD_HC_NotifyURBChange_Callback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1073:19:HAL_HCD_Start	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1092:19:HAL_HCD_Stop	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1106:19:HAL_HCD_ResetPort	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1135:18:HAL_HCD_GetState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1154:21:HAL_HCD_HC_GetURBState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1167:10:HAL_HCD_HC_GetXferCount	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1189:21:HAL_HCD_HC_GetState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1199:10:HAL_HCD_GetCurrentFrame	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1209:10:HAL_HCD_GetCurrentSpeed	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1223:19:HAL_HCD_HC_SetHubInfo	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1253:19:HAL_HCD_HC_ClearHubInfo	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1280:13:HCD_HC_IN_IRQHandler	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1599:13:HCD_HC_OUT_IRQHandler	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1840:13:HCD_RXQLVL_IRQHandler	48	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c:1906:13:HCD_Port_IRQHandler	32	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.cyclo
new file mode 100644
index 0000000..d56c765
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.cyclo
@@ -0,0 +1,82 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:445:19:HAL_I2C_Init	11
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:560:19:HAL_I2C_DeInit	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:606:13:HAL_I2C_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:622:13:HAL_I2C_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:959:13:I2C_Flush_DR	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1056:19:HAL_I2C_Master_Transmit	13
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1177:19:HAL_I2C_Master_Receive	20
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1428:19:HAL_I2C_Slave_Transmit	14
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1558:19:HAL_I2C_Slave_Receive	12
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1679:19:HAL_I2C_Master_Transmit_IT	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1756:19:HAL_I2C_Master_Receive_IT	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1836:19:HAL_I2C_Slave_Transmit_IT	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1898:19:HAL_I2C_Slave_Receive_IT	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1962:19:HAL_I2C_Master_Transmit_DMA	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:2117:19:HAL_I2C_Master_Receive_DMA	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:2270:19:HAL_I2C_Slave_Transmit_DMA	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:2384:19:HAL_I2C_Slave_Receive_DMA	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:2503:19:HAL_I2C_Mem_Write	13
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:2626:19:HAL_I2C_Mem_Read	20
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:2878:19:HAL_I2C_Mem_Write_IT	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:2963:19:HAL_I2C_Mem_Read_IT	7
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:3054:19:HAL_I2C_Mem_Write_DMA	10
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:3236:19:HAL_I2C_Mem_Read_DMA	12
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:3432:19:HAL_I2C_IsDeviceReady	16
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:3568:19:HAL_I2C_Master_Seq_Transmit_IT	13
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:3663:19:HAL_I2C_Master_Seq_Transmit_DMA	23
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:3843:19:HAL_I2C_Master_Seq_Receive_IT	17
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:3964:19:HAL_I2C_Master_Seq_Receive_DMA	30
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4179:19:HAL_I2C_Slave_Seq_Transmit_IT	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4245:19:HAL_I2C_Slave_Seq_Transmit_DMA	16
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4419:19:HAL_I2C_Slave_Seq_Receive_IT	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4485:19:HAL_I2C_Slave_Seq_Receive_DMA	16
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4655:19:HAL_I2C_EnableListen_IT	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4688:19:HAL_I2C_DisableListen_IT	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4723:19:HAL_I2C_Master_Abort_IT	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4783:6:HAL_I2C_EV_IRQHandler	46
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4952:6:HAL_I2C_ER_IRQHandler	18
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5032:13:HAL_I2C_MasterTxCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5048:13:HAL_I2C_MasterRxCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5063:13:HAL_I2C_SlaveTxCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5079:13:HAL_I2C_SlaveRxCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5097:13:HAL_I2C_AddrCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5115:13:HAL_I2C_ListenCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5131:13:HAL_I2C_MemTxCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5147:13:HAL_I2C_MemRxCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5163:13:HAL_I2C_ErrorCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5179:13:HAL_I2C_AbortCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5214:22:HAL_I2C_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5226:21:HAL_I2C_GetMode	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5237:10:HAL_I2C_GetError	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5260:13:I2C_MasterTransmit_TXE	12
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5354:13:I2C_MasterTransmit_BTF	7
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5433:13:I2C_MemoryTransmit_TXE_BTF	10
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5520:13:I2C_MasterReceive_RXNE	11
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5639:13:I2C_MasterReceive_BTF	13
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5768:13:I2C_Master_SB	11
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5829:13:I2C_Master_ADD10	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5848:13:I2C_Master_ADDR	33
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5993:13:I2C_SlaveTransmit_TXE	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6034:13:I2C_SlaveTransmit_BTF	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6055:13:I2C_SlaveReceive_RXNE	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6096:13:I2C_SlaveReceive_BTF	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6118:13:I2C_Slave_ADDR	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6169:13:I2C_Slave_STOPF	19
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6338:13:I2C_Slave_AF	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6407:13:I2C_ITError	21
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6573:26:I2C_MasterRequestWrite	10
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6643:26:I2C_MasterRequestRead	13
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6743:26:I2C_RequestMemoryWrite	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6823:26:I2C_RequestMemoryRead	14
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6932:13:I2C_DMAXferCplt	18
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7077:13:I2C_DMAError	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7118:13:I2C_DMAAbort	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7221:26:I2C_WaitOnFlagUntilTimeout	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7258:26:I2C_WaitOnMasterAddressFlagUntilTimeout	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7312:26:I2C_WaitOnTXEFlagUntilTimeout	7
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7353:26:I2C_WaitOnBTFFlagUntilTimeout	7
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7394:26:I2C_WaitOnSTOPFlagUntilTimeout	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7430:26:I2C_WaitOnSTOPRequestThroughIT	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7459:26:I2C_WaitOnRXNEFlagUntilTimeout	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7507:26:I2C_IsAcknowledgeFailed	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7532:13:I2C_ConvertOtherXferOptions	3
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.d
new file mode 100644
index 0000000..5c4f152
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.o
new file mode 100644
index 0000000..8143da0
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.su
new file mode 100644
index 0000000..135aba4
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.su
@@ -0,0 +1,82 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:445:19:HAL_I2C_Init	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:560:19:HAL_I2C_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:606:13:HAL_I2C_MspInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:622:13:HAL_I2C_MspDeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:959:13:I2C_Flush_DR	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1056:19:HAL_I2C_Master_Transmit	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1177:19:HAL_I2C_Master_Receive	56	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1428:19:HAL_I2C_Slave_Transmit	48	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1558:19:HAL_I2C_Slave_Receive	48	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1679:19:HAL_I2C_Master_Transmit_IT	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1756:19:HAL_I2C_Master_Receive_IT	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1836:19:HAL_I2C_Slave_Transmit_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1898:19:HAL_I2C_Slave_Receive_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:1962:19:HAL_I2C_Master_Transmit_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:2117:19:HAL_I2C_Master_Receive_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:2270:19:HAL_I2C_Slave_Transmit_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:2384:19:HAL_I2C_Slave_Receive_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:2503:19:HAL_I2C_Mem_Write	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:2626:19:HAL_I2C_Mem_Read	56	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:2878:19:HAL_I2C_Mem_Write_IT	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:2963:19:HAL_I2C_Mem_Read_IT	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:3054:19:HAL_I2C_Mem_Write_DMA	48	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:3236:19:HAL_I2C_Mem_Read_DMA	56	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:3432:19:HAL_I2C_IsDeviceReady	48	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:3568:19:HAL_I2C_Master_Seq_Transmit_IT	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:3663:19:HAL_I2C_Master_Seq_Transmit_DMA	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:3843:19:HAL_I2C_Master_Seq_Receive_IT	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:3964:19:HAL_I2C_Master_Seq_Receive_DMA	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4179:19:HAL_I2C_Slave_Seq_Transmit_IT	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4245:19:HAL_I2C_Slave_Seq_Transmit_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4419:19:HAL_I2C_Slave_Seq_Receive_IT	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4485:19:HAL_I2C_Slave_Seq_Receive_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4655:19:HAL_I2C_EnableListen_IT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4688:19:HAL_I2C_DisableListen_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4723:19:HAL_I2C_Master_Abort_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4783:6:HAL_I2C_EV_IRQHandler	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:4952:6:HAL_I2C_ER_IRQHandler	48	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5032:13:HAL_I2C_MasterTxCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5048:13:HAL_I2C_MasterRxCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5063:13:HAL_I2C_SlaveTxCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5079:13:HAL_I2C_SlaveRxCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5097:13:HAL_I2C_AddrCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5115:13:HAL_I2C_ListenCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5131:13:HAL_I2C_MemTxCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5147:13:HAL_I2C_MemRxCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5163:13:HAL_I2C_ErrorCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5179:13:HAL_I2C_AbortCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5214:22:HAL_I2C_GetState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5226:21:HAL_I2C_GetMode	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5237:10:HAL_I2C_GetError	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5260:13:I2C_MasterTransmit_TXE	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5354:13:I2C_MasterTransmit_BTF	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5433:13:I2C_MemoryTransmit_TXE_BTF	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5520:13:I2C_MasterReceive_RXNE	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5639:13:I2C_MasterReceive_BTF	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5768:13:I2C_Master_SB	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5829:13:I2C_Master_ADD10	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5848:13:I2C_Master_ADDR	72	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:5993:13:I2C_SlaveTransmit_TXE	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6034:13:I2C_SlaveTransmit_BTF	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6055:13:I2C_SlaveReceive_RXNE	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6096:13:I2C_SlaveReceive_BTF	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6118:13:I2C_Slave_ADDR	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6169:13:I2C_Slave_STOPF	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6338:13:I2C_Slave_AF	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6407:13:I2C_ITError	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6573:26:I2C_MasterRequestWrite	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6643:26:I2C_MasterRequestRead	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6743:26:I2C_RequestMemoryWrite	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6823:26:I2C_RequestMemoryRead	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:6932:13:I2C_DMAXferCplt	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7077:13:I2C_DMAError	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7118:13:I2C_DMAAbort	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7221:26:I2C_WaitOnFlagUntilTimeout	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7258:26:I2C_WaitOnMasterAddressFlagUntilTimeout	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7312:26:I2C_WaitOnTXEFlagUntilTimeout	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7353:26:I2C_WaitOnBTFFlagUntilTimeout	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7394:26:I2C_WaitOnSTOPFlagUntilTimeout	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7430:26:I2C_WaitOnSTOPRequestThroughIT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7459:26:I2C_WaitOnRXNEFlagUntilTimeout	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7507:26:I2C_IsAcknowledgeFailed	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c:7532:13:I2C_ConvertOtherXferOptions	16	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.cyclo
new file mode 100644
index 0000000..84b11ba
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.cyclo
@@ -0,0 +1,2 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c:88:19:HAL_I2CEx_ConfigAnalogFilter	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c:126:19:HAL_I2CEx_ConfigDigitalFilter	2
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.d
new file mode 100644
index 0000000..c38f62b
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.o
new file mode 100644
index 0000000..fb6a6a0
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.su
new file mode 100644
index 0000000..6fd0273
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.su
@@ -0,0 +1,2 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c:88:19:HAL_I2CEx_ConfigAnalogFilter	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c:126:19:HAL_I2CEx_ConfigDigitalFilter	24	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.cyclo
new file mode 100644
index 0000000..f0cf338
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.cyclo
@@ -0,0 +1,40 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:219:19:HAL_LTDC_Init	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:325:19:HAL_LTDC_DeInit	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:395:13:HAL_LTDC_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:411:13:HAL_LTDC_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:627:6:HAL_LTDC_IRQHandler	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:745:13:HAL_LTDC_ErrorCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:761:13:HAL_LTDC_LineEventCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:777:13:HAL_LTDC_ReloadEventCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:827:19:HAL_LTDC_ConfigLayer	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:877:19:HAL_LTDC_ConfigColorKeying	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:915:19:HAL_LTDC_ConfigCLUT	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:967:19:HAL_LTDC_EnableColorKeying	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1002:19:HAL_LTDC_DisableColorKeying	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1037:19:HAL_LTDC_EnableCLUT	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1072:19:HAL_LTDC_DisableCLUT	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1105:19:HAL_LTDC_EnableDither	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1132:19:HAL_LTDC_DisableDither	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1163:19:HAL_LTDC_SetWindowSize	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1219:19:HAL_LTDC_SetWindowPosition	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1270:19:HAL_LTDC_SetPixelFormat	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1315:19:HAL_LTDC_SetAlpha	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1359:19:HAL_LTDC_SetAddress	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1408:19:HAL_LTDC_SetPitch	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1477:19:HAL_LTDC_ProgramLineEvent	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1516:20:HAL_LTDC_Reload	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1555:19:HAL_LTDC_ConfigLayer_NoReload	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1605:19:HAL_LTDC_SetWindowSize_NoReload	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1660:19:HAL_LTDC_SetWindowPosition_NoReload	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1710:19:HAL_LTDC_SetPixelFormat_NoReload	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1753:19:HAL_LTDC_SetAlpha_NoReload	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1796:19:HAL_LTDC_SetAddress_NoReload	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1843:19:HAL_LTDC_SetPitch_NoReload	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1910:19:HAL_LTDC_ConfigColorKeying_NoReload	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1944:19:HAL_LTDC_EnableColorKeying_NoReload	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1977:19:HAL_LTDC_DisableColorKeying_NoReload	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:2010:19:HAL_LTDC_EnableCLUT_NoReload	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:2043:19:HAL_LTDC_DisableCLUT_NoReload	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:2092:23:HAL_LTDC_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:2103:10:HAL_LTDC_GetError	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:2129:13:LTDC_SetConfig	7
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.d
new file mode 100644
index 0000000..817bca0
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o
new file mode 100644
index 0000000..dde1040
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.su
new file mode 100644
index 0000000..c246ddc
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.su
@@ -0,0 +1,40 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:219:19:HAL_LTDC_Init	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:325:19:HAL_LTDC_DeInit	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:395:13:HAL_LTDC_MspInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:411:13:HAL_LTDC_MspDeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:627:6:HAL_LTDC_IRQHandler	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:745:13:HAL_LTDC_ErrorCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:761:13:HAL_LTDC_LineEventCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:777:13:HAL_LTDC_ReloadEventCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:827:19:HAL_LTDC_ConfigLayer	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:877:19:HAL_LTDC_ConfigColorKeying	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:915:19:HAL_LTDC_ConfigCLUT	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:967:19:HAL_LTDC_EnableColorKeying	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1002:19:HAL_LTDC_DisableColorKeying	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1037:19:HAL_LTDC_EnableCLUT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1072:19:HAL_LTDC_DisableCLUT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1105:19:HAL_LTDC_EnableDither	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1132:19:HAL_LTDC_DisableDither	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1163:19:HAL_LTDC_SetWindowSize	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1219:19:HAL_LTDC_SetWindowPosition	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1270:19:HAL_LTDC_SetPixelFormat	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1315:19:HAL_LTDC_SetAlpha	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1359:19:HAL_LTDC_SetAddress	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1408:19:HAL_LTDC_SetPitch	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1477:19:HAL_LTDC_ProgramLineEvent	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1516:20:HAL_LTDC_Reload	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1555:19:HAL_LTDC_ConfigLayer_NoReload	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1605:19:HAL_LTDC_SetWindowSize_NoReload	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1660:19:HAL_LTDC_SetWindowPosition_NoReload	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1710:19:HAL_LTDC_SetPixelFormat_NoReload	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1753:19:HAL_LTDC_SetAlpha_NoReload	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1796:19:HAL_LTDC_SetAddress_NoReload	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1843:19:HAL_LTDC_SetPitch_NoReload	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1910:19:HAL_LTDC_ConfigColorKeying_NoReload	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1944:19:HAL_LTDC_EnableColorKeying_NoReload	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:1977:19:HAL_LTDC_DisableColorKeying_NoReload	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:2010:19:HAL_LTDC_EnableCLUT_NoReload	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:2043:19:HAL_LTDC_DisableCLUT_NoReload	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:2092:23:HAL_LTDC_GetState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:2103:10:HAL_LTDC_GetError	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c:2129:13:LTDC_SetConfig	40	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.cyclo
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.d
new file mode 100644
index 0000000..f5de641
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.o
new file mode 100644
index 0000000..0f93deb
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.su
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.cyclo
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.d
new file mode 100644
index 0000000..82164f4
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.o
new file mode 100644
index 0000000..f957694
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.su
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.cyclo
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.d
new file mode 100644
index 0000000..9452698
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.o
new file mode 100644
index 0000000..4d557d0
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.su
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.cyclo
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.d
new file mode 100644
index 0000000..87e3054
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.o
new file mode 100644
index 0000000..c1cfcdd
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.su
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.cyclo
new file mode 100644
index 0000000..fcef845
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.cyclo
@@ -0,0 +1,17 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:90:6:HAL_PWR_DeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:108:6:HAL_PWR_EnableBkUpAccess	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:128:6:HAL_PWR_DisableBkUpAccess	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:275:6:HAL_PWR_ConfigPVD	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:318:6:HAL_PWR_EnablePVD	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:327:6:HAL_PWR_DisablePVD	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:341:6:HAL_PWR_EnableWakeUpPin	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:359:6:HAL_PWR_DisableWakeUpPin	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:391:6:HAL_PWR_EnterSLEEPMode	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:445:6:HAL_PWR_EnterSTOPMode	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:488:6:HAL_PWR_EnterSTANDBYMode	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:509:6:HAL_PWR_PVD_IRQHandler	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:526:13:HAL_PWR_PVDCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:541:6:HAL_PWR_EnableSleepOnExit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:553:6:HAL_PWR_DisableSleepOnExit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:565:6:HAL_PWR_EnableSEVOnPend	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:577:6:HAL_PWR_DisableSEVOnPend	1
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.d
new file mode 100644
index 0000000..65244f7
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o
new file mode 100644
index 0000000..0e0df21
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.su
new file mode 100644
index 0000000..4eb40e8
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.su
@@ -0,0 +1,17 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:90:6:HAL_PWR_DeInit	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:108:6:HAL_PWR_EnableBkUpAccess	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:128:6:HAL_PWR_DisableBkUpAccess	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:275:6:HAL_PWR_ConfigPVD	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:318:6:HAL_PWR_EnablePVD	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:327:6:HAL_PWR_DisablePVD	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:341:6:HAL_PWR_EnableWakeUpPin	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:359:6:HAL_PWR_DisableWakeUpPin	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:391:6:HAL_PWR_EnterSLEEPMode	16	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:445:6:HAL_PWR_EnterSTOPMode	16	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:488:6:HAL_PWR_EnterSTANDBYMode	4	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:509:6:HAL_PWR_PVD_IRQHandler	8	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:526:13:HAL_PWR_PVDCallback	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:541:6:HAL_PWR_EnableSleepOnExit	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:553:6:HAL_PWR_DisableSleepOnExit	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:565:6:HAL_PWR_EnableSEVOnPend	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:577:6:HAL_PWR_DisableSEVOnPend	4	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.cyclo
new file mode 100644
index 0000000..970ac44
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.cyclo
@@ -0,0 +1,9 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:141:19:HAL_PWREx_EnableBkUpReg	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:165:19:HAL_PWREx_DisableBkUpReg	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:189:6:HAL_PWREx_EnableFlashPowerDown	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:198:6:HAL_PWREx_DisableFlashPowerDown	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:211:10:HAL_PWREx_GetVoltageRange	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:288:19:HAL_PWREx_ControlVoltageScaling	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:413:19:HAL_PWREx_EnableOverDrive	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:460:19:HAL_PWREx_DisableOverDrive	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:536:19:HAL_PWREx_EnterUnderDriveSTOPMode	2
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.d
new file mode 100644
index 0000000..c4a44f1
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o
new file mode 100644
index 0000000..ccb0f89
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.su
new file mode 100644
index 0000000..afdd077
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.su
@@ -0,0 +1,9 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:141:19:HAL_PWREx_EnableBkUpReg	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:165:19:HAL_PWREx_DisableBkUpReg	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:189:6:HAL_PWREx_EnableFlashPowerDown	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:198:6:HAL_PWREx_DisableFlashPowerDown	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:211:10:HAL_PWREx_GetVoltageRange	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:288:19:HAL_PWREx_ControlVoltageScaling	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:413:19:HAL_PWREx_EnableOverDrive	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:460:19:HAL_PWREx_DisableOverDrive	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:536:19:HAL_PWREx_EnterUnderDriveSTOPMode	24	static,ignoring_inline_asm
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.cyclo
new file mode 100644
index 0000000..8c1483e
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.cyclo
@@ -0,0 +1,14 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:200:26:HAL_RCC_DeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:219:26:HAL_RCC_OscConfig	61
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:591:19:HAL_RCC_ClockConfig	20
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:775:6:HAL_RCC_MCOConfig	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:841:6:HAL_RCC_EnableCSS	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:850:6:HAL_RCC_DisableCSS	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:885:17:HAL_RCC_GetSysClockFreq	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:943:10:HAL_RCC_GetHCLKFreq	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:954:10:HAL_RCC_GetPCLK1Freq	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:966:10:HAL_RCC_GetPCLK2Freq	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:979:13:HAL_RCC_GetOscConfig	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:1058:6:HAL_RCC_GetClockConfig	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:1084:6:HAL_RCC_NMI_IRQHandler	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:1101:13:HAL_RCC_CSSCallback	1
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.d
new file mode 100644
index 0000000..0c8d287
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
new file mode 100644
index 0000000..d98b7e6
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.su
new file mode 100644
index 0000000..7b24009
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.su
@@ -0,0 +1,14 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:200:26:HAL_RCC_DeInit	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:219:26:HAL_RCC_OscConfig	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:591:19:HAL_RCC_ClockConfig	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:775:6:HAL_RCC_MCOConfig	56	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:841:6:HAL_RCC_EnableCSS	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:850:6:HAL_RCC_DisableCSS	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:885:17:HAL_RCC_GetSysClockFreq	112	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:943:10:HAL_RCC_GetHCLKFreq	4	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:954:10:HAL_RCC_GetPCLK1Freq	8	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:966:10:HAL_RCC_GetPCLK2Freq	8	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:979:13:HAL_RCC_GetOscConfig	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:1058:6:HAL_RCC_GetClockConfig	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:1084:6:HAL_RCC_NMI_IRQHandler	8	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:1101:13:HAL_RCC_CSSCallback	4	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.cyclo
new file mode 100644
index 0000000..3e19eaa
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.cyclo
@@ -0,0 +1,8 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2196:19:HAL_RCCEx_PeriphCLKConfig	29
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2432:6:HAL_RCCEx_GetPeriphCLKConfig	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2473:10:HAL_RCCEx_GetPeriphCLKFreq	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2846:19:HAL_RCCEx_EnablePLLI2S	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2929:19:HAL_RCCEx_DisablePLLI2S	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2959:19:HAL_RCCEx_EnablePLLSAI	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:3033:19:HAL_RCCEx_DisablePLLSAI	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:3186:19:HAL_RCC_DeInit	14
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.d
new file mode 100644
index 0000000..7e6da3c
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o
new file mode 100644
index 0000000..c4bcdd6
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.su
new file mode 100644
index 0000000..3c0d23e
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.su
@@ -0,0 +1,8 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2196:19:HAL_RCCEx_PeriphCLKConfig	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2432:6:HAL_RCCEx_GetPeriphCLKConfig	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2473:10:HAL_RCCEx_GetPeriphCLKFreq	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2846:19:HAL_RCCEx_EnablePLLI2S	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2929:19:HAL_RCCEx_DisablePLLI2S	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2959:19:HAL_RCCEx_EnablePLLSAI	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:3033:19:HAL_RCCEx_DisablePLLSAI	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:3186:19:HAL_RCC_DeInit	16	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.cyclo
new file mode 100644
index 0000000..82a141b
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.cyclo
@@ -0,0 +1,26 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:172:19:HAL_SDRAM_Init	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:221:19:HAL_SDRAM_DeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:254:13:HAL_SDRAM_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:270:13:HAL_SDRAM_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:286:6:HAL_SDRAM_IRQHandler	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:309:13:HAL_SDRAM_RefreshErrorCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:325:13:HAL_SDRAM_DMA_XferCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:340:13:HAL_SDRAM_DMA_XferErrorCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:377:19:HAL_SDRAM_Read_8b	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:429:19:HAL_SDRAM_Write_8b	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:480:19:HAL_SDRAM_Read_16b	7
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:540:19:HAL_SDRAM_Write_16b	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:599:19:HAL_SDRAM_Read_32b	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:651:19:HAL_SDRAM_Write_32b	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:702:19:HAL_SDRAM_Read_DMA	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:755:19:HAL_SDRAM_Write_DMA	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1008:19:HAL_SDRAM_WriteProtection_Enable	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1040:19:HAL_SDRAM_WriteProtection_Disable	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1076:19:HAL_SDRAM_SendCommand	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1119:19:HAL_SDRAM_ProgramRefreshRate	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1152:19:HAL_SDRAM_SetAutoRefreshNumber	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1184:10:HAL_SDRAM_GetModeStatus	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1215:24:HAL_SDRAM_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1236:13:SDRAM_DMACplt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1259:13:SDRAM_DMACpltProt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1282:13:SDRAM_DMAError	1
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.d
new file mode 100644
index 0000000..718f2dd
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.o
new file mode 100644
index 0000000..ff0ae6a
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.su
new file mode 100644
index 0000000..c8b1c70
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.su
@@ -0,0 +1,26 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:172:19:HAL_SDRAM_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:221:19:HAL_SDRAM_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:254:13:HAL_SDRAM_MspInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:270:13:HAL_SDRAM_MspDeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:286:6:HAL_SDRAM_IRQHandler	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:309:13:HAL_SDRAM_RefreshErrorCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:325:13:HAL_SDRAM_DMA_XferCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:340:13:HAL_SDRAM_DMA_XferErrorCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:377:19:HAL_SDRAM_Read_8b	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:429:19:HAL_SDRAM_Write_8b	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:480:19:HAL_SDRAM_Read_16b	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:540:19:HAL_SDRAM_Write_16b	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:599:19:HAL_SDRAM_Read_32b	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:651:19:HAL_SDRAM_Write_32b	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:702:19:HAL_SDRAM_Read_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:755:19:HAL_SDRAM_Write_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1008:19:HAL_SDRAM_WriteProtection_Enable	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1040:19:HAL_SDRAM_WriteProtection_Disable	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1076:19:HAL_SDRAM_SendCommand	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1119:19:HAL_SDRAM_ProgramRefreshRate	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1152:19:HAL_SDRAM_SetAutoRefreshNumber	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1184:10:HAL_SDRAM_GetModeStatus	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1215:24:HAL_SDRAM_GetState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1236:13:SDRAM_DMACplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1259:13:SDRAM_DMACpltProt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c:1282:13:SDRAM_DMAError	24	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.cyclo
new file mode 100644
index 0000000..c5a6866
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.cyclo
@@ -0,0 +1,55 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:313:19:HAL_SPI_Init	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:439:19:HAL_SPI_DeInit	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:483:13:HAL_SPI_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:499:13:HAL_SPI_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:771:19:HAL_SPI_Transmit	25
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:940:19:HAL_SPI_Receive	22
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:1140:19:HAL_SPI_TransmitReceive	38
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:1391:19:HAL_SPI_Transmit_IT	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:1473:19:HAL_SPI_Receive_IT	10
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:1564:19:HAL_SPI_TransmitReceive_IT	12
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:1651:19:HAL_SPI_Transmit_DMA	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:1755:19:HAL_SPI_Receive_DMA	10
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:1865:19:HAL_SPI_TransmitReceive_DMA	14
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2008:19:HAL_SPI_Abort	16
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2153:19:HAL_SPI_Abort_IT	19
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2314:19:HAL_SPI_DMAPause	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2334:19:HAL_SPI_DMAResume	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2354:19:HAL_SPI_DMAStop	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2396:6:HAL_SPI_IRQHandler	21
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2503:13:HAL_SPI_TxCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2519:13:HAL_SPI_RxCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2535:13:HAL_SPI_TxRxCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2551:13:HAL_SPI_TxHalfCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2567:13:HAL_SPI_RxHalfCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2583:13:HAL_SPI_TxRxHalfCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2599:13:HAL_SPI_ErrorCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2617:13:HAL_SPI_AbortCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2652:22:HAL_SPI_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2664:10:HAL_SPI_GetError	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2689:13:SPI_DMATransmitCplt	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2746:13:SPI_DMAReceiveCplt	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2835:13:SPI_DMATransmitReceiveCplt	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2915:13:SPI_DMAHalfTransmitCplt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2933:13:SPI_DMAHalfReceiveCplt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2951:13:SPI_DMAHalfTransmitReceiveCplt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2969:13:SPI_DMAError	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2992:13:SPI_DMAAbortOnError	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3014:13:SPI_DMATxAbortCallback	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3079:13:SPI_DMARxAbortCallback	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3138:13:SPI_2linesRxISR_8BIT	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3201:13:SPI_2linesTxISR_8BIT	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3237:13:SPI_2linesRxISR_16BIT	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3293:13:SPI_2linesTxISR_16BIT	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3353:13:SPI_RxISR_8BIT	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3409:13:SPI_RxISR_16BIT	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3442:13:SPI_TxISR_8BIT	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3467:13:SPI_TxISR_16BIT	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3497:26:SPI_WaitFlagStateUntilTimeout	10
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3567:26:SPI_EndRxTransaction	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3617:26:SPI_EndRxTxTransaction	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3666:13:SPI_CloseRxTx_ISR	7
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3761:13:SPI_CloseRx_ISR	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3824:13:SPI_CloseTx_ISR	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3885:13:SPI_AbortRx_ISR	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3921:13:SPI_AbortTx_ISR	1
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.d
new file mode 100644
index 0000000..037d599
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o
new file mode 100644
index 0000000..eaeade0
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.su
new file mode 100644
index 0000000..952c5e9
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.su
@@ -0,0 +1,55 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:313:19:HAL_SPI_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:439:19:HAL_SPI_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:483:13:HAL_SPI_MspInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:499:13:HAL_SPI_MspDeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:771:19:HAL_SPI_Transmit	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:940:19:HAL_SPI_Receive	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:1140:19:HAL_SPI_TransmitReceive	48	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:1391:19:HAL_SPI_Transmit_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:1473:19:HAL_SPI_Receive_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:1564:19:HAL_SPI_TransmitReceive_IT	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:1651:19:HAL_SPI_Transmit_DMA	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:1755:19:HAL_SPI_Receive_DMA	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:1865:19:HAL_SPI_TransmitReceive_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2008:19:HAL_SPI_Abort	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2153:19:HAL_SPI_Abort_IT	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2314:19:HAL_SPI_DMAPause	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2334:19:HAL_SPI_DMAResume	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2354:19:HAL_SPI_DMAStop	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2396:6:HAL_SPI_IRQHandler	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2503:13:HAL_SPI_TxCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2519:13:HAL_SPI_RxCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2535:13:HAL_SPI_TxRxCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2551:13:HAL_SPI_TxHalfCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2567:13:HAL_SPI_RxHalfCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2583:13:HAL_SPI_TxRxHalfCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2599:13:HAL_SPI_ErrorCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2617:13:HAL_SPI_AbortCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2652:22:HAL_SPI_GetState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2664:10:HAL_SPI_GetError	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2689:13:SPI_DMATransmitCplt	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2746:13:SPI_DMAReceiveCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2835:13:SPI_DMATransmitReceiveCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2915:13:SPI_DMAHalfTransmitCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2933:13:SPI_DMAHalfReceiveCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2951:13:SPI_DMAHalfTransmitReceiveCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2969:13:SPI_DMAError	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:2992:13:SPI_DMAAbortOnError	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3014:13:SPI_DMATxAbortCallback	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3079:13:SPI_DMARxAbortCallback	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3138:13:SPI_2linesRxISR_8BIT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3201:13:SPI_2linesTxISR_8BIT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3237:13:SPI_2linesRxISR_16BIT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3293:13:SPI_2linesTxISR_16BIT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3353:13:SPI_RxISR_8BIT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3409:13:SPI_RxISR_16BIT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3442:13:SPI_TxISR_8BIT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3467:13:SPI_TxISR_16BIT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3497:26:SPI_WaitFlagStateUntilTimeout	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3567:26:SPI_EndRxTransaction	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3617:26:SPI_EndRxTxTransaction	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3666:13:SPI_CloseRxTx_ISR	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3761:13:SPI_CloseRx_ISR	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3824:13:SPI_CloseTx_ISR	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3885:13:SPI_AbortRx_ISR	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c:3921:13:SPI_AbortTx_ISR	16	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.cyclo
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.d
new file mode 100644
index 0000000..95362a2
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.o
new file mode 100644
index 0000000..8066262
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.su
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.cyclo
new file mode 100644
index 0000000..673019d
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.cyclo
@@ -0,0 +1,119 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:266:19:HAL_TIM_Base_Init	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:326:19:HAL_TIM_Base_DeInit	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:369:13:HAL_TIM_Base_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:384:13:HAL_TIM_Base_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:400:19:HAL_TIM_Base_Start	11
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:439:19:HAL_TIM_Base_Stop	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:459:19:HAL_TIM_Base_Start_IT	11
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:501:19:HAL_TIM_Base_Stop_IT	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:526:19:HAL_TIM_Base_Start_DMA	15
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:595:19:HAL_TIM_Base_Stop_DMA	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:650:19:HAL_TIM_OC_Init	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:710:19:HAL_TIM_OC_DeInit	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:753:13:HAL_TIM_OC_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:768:13:HAL_TIM_OC_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:789:19:HAL_TIM_OC_Start	20
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:843:19:HAL_TIM_OC_Stop	11
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:878:19:HAL_TIM_OC_Start_IT	25
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:971:19:HAL_TIM_OC_Stop_IT	16
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1048:19:HAL_TIM_OC_Start_DMA	35
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1212:19:HAL_TIM_OC_Stop_DMA	16
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1315:19:HAL_TIM_PWM_Init	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1375:19:HAL_TIM_PWM_DeInit	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1418:13:HAL_TIM_PWM_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1433:13:HAL_TIM_PWM_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1454:19:HAL_TIM_PWM_Start	20
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1508:19:HAL_TIM_PWM_Stop	11
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1543:19:HAL_TIM_PWM_Start_IT	25
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1636:19:HAL_TIM_PWM_Stop_IT	16
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1713:19:HAL_TIM_PWM_Start_DMA	35
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1876:19:HAL_TIM_PWM_Stop_DMA	16
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1979:19:HAL_TIM_IC_Init	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2039:19:HAL_TIM_IC_DeInit	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2082:13:HAL_TIM_IC_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2097:13:HAL_TIM_IC_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2118:19:HAL_TIM_IC_Start	24
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2170:19:HAL_TIM_IC_Stop	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2200:19:HAL_TIM_IC_Start_IT	29
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2292:19:HAL_TIM_IC_Stop_IT	14
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2364:19:HAL_TIM_IC_Start_DMA	36
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2523:19:HAL_TIM_IC_Stop_DMA	14
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2628:19:HAL_TIM_OnePulse_Init	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2697:19:HAL_TIM_OnePulse_DeInit	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2742:13:HAL_TIM_OnePulse_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2757:13:HAL_TIM_OnePulse_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2777:19:HAL_TIM_OnePulse_Start	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2834:19:HAL_TIM_OnePulse_Stop	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2877:19:HAL_TIM_OnePulse_Start_IT	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2940:19:HAL_TIM_OnePulse_Stop_IT	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3019:19:HAL_TIM_Encoder_Init	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3134:19:HAL_TIM_Encoder_DeInit	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3179:13:HAL_TIM_Encoder_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3194:13:HAL_TIM_Encoder_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3214:19:HAL_TIM_Encoder_Start	13
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3308:19:HAL_TIM_Encoder_Stop	13
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3368:19:HAL_TIM_Encoder_Start_IT	13
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3468:19:HAL_TIM_Encoder_Stop_IT	13
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3533:19:HAL_TIM_Encoder_Start_DMA	32
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3746:19:HAL_TIM_Encoder_Stop_DMA	13
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3823:6:HAL_TIM_IRQHandler	21
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4041:19:HAL_TIM_OC_ConfigChannel	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4120:19:HAL_TIM_IC_ConfigChannel	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4219:19:HAL_TIM_PWM_ConfigChannel	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4333:19:HAL_TIM_OnePulse_ConfigChannel	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4481:19:HAL_TIM_DMABurst_WriteStart	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4534:19:HAL_TIM_DMABurst_MultiWriteStart	25
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4718:19:HAL_TIM_DMABurst_WriteStop	14
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4819:19:HAL_TIM_DMABurst_ReadStart	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4870:19:HAL_TIM_DMABurst_MultiReadStart	25
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5054:19:HAL_TIM_DMABurst_ReadStop	14
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5137:19:HAL_TIM_GenerateEvent	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5174:19:HAL_TIM_ConfigOCrefClear	14
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5304:19:HAL_TIM_ConfigClockSource	20
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5458:19:HAL_TIM_ConfigTI1Input	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5490:19:HAL_TIM_SlaveConfigSynchro	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5530:19:HAL_TIM_SlaveConfigSynchro_IT	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5573:10:HAL_TIM_ReadCapturedValue	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5657:13:HAL_TIM_PeriodElapsedCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5672:13:HAL_TIM_PeriodElapsedHalfCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5687:13:HAL_TIM_OC_DelayElapsedCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5702:13:HAL_TIM_IC_CaptureCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5717:13:HAL_TIM_IC_CaptureHalfCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5732:13:HAL_TIM_PWM_PulseFinishedCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5747:13:HAL_TIM_PWM_PulseFinishedHalfCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5762:13:HAL_TIM_TriggerCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5777:13:HAL_TIM_TriggerHalfCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5792:13:HAL_TIM_ErrorCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6339:22:HAL_TIM_Base_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6349:22:HAL_TIM_OC_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6359:22:HAL_TIM_PWM_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6369:22:HAL_TIM_IC_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6379:22:HAL_TIM_OnePulse_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6389:22:HAL_TIM_Encoder_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6399:23:HAL_TIM_GetActiveChannel	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6417:29:HAL_TIM_GetChannelState	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6434:30:HAL_TIM_DMABurstState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6459:6:TIM_DMAError	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6502:13:TIM_DMADelayPulseCplt	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6561:6:TIM_DMADelayPulseHalfCplt	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6600:6:TIM_DMACaptureCplt	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6663:6:TIM_DMACaptureHalfCplt	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6702:13:TIM_DMAPeriodElapsedCplt	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6723:13:TIM_DMAPeriodElapsedHalfCplt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6739:13:TIM_DMATriggerCplt	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6760:13:TIM_DMATriggerHalfCplt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6777:6:TIM_Base_SetConfig	21
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6829:13:TIM_OC1_SetConfig	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6905:6:TIM_OC2_SetConfig	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6981:13:TIM_OC3_SetConfig	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7056:13:TIM_OC4_SetConfig	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7117:26:TIM_SlaveTimer_SetConfig	16
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7251:6:TIM_TI1_SetConfig	10
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7298:13:TIM_TI1_ConfigInputStage	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7341:13:TIM_TI2_SetConfig	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7381:13:TIM_TI2_ConfigInputStage	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7424:13:TIM_TI3_SetConfig	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7472:13:TIM_TI4_SetConfig	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7515:13:TIM_ITRx_SetConfig	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7545:6:TIM_ETR_SetConfig	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7575:6:TIM_CCxChannelCmd	1
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.d
new file mode 100644
index 0000000..27bfbfa
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
new file mode 100644
index 0000000..d239967
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.su
new file mode 100644
index 0000000..f4fb564
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.su
@@ -0,0 +1,119 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:266:19:HAL_TIM_Base_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:326:19:HAL_TIM_Base_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:369:13:HAL_TIM_Base_MspInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:384:13:HAL_TIM_Base_MspDeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:400:19:HAL_TIM_Base_Start	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:439:19:HAL_TIM_Base_Stop	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:459:19:HAL_TIM_Base_Start_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:501:19:HAL_TIM_Base_Stop_IT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:526:19:HAL_TIM_Base_Start_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:595:19:HAL_TIM_Base_Stop_DMA	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:650:19:HAL_TIM_OC_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:710:19:HAL_TIM_OC_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:753:13:HAL_TIM_OC_MspInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:768:13:HAL_TIM_OC_MspDeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:789:19:HAL_TIM_OC_Start	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:843:19:HAL_TIM_OC_Stop	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:878:19:HAL_TIM_OC_Start_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:971:19:HAL_TIM_OC_Stop_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1048:19:HAL_TIM_OC_Start_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1212:19:HAL_TIM_OC_Stop_DMA	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1315:19:HAL_TIM_PWM_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1375:19:HAL_TIM_PWM_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1418:13:HAL_TIM_PWM_MspInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1433:13:HAL_TIM_PWM_MspDeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1454:19:HAL_TIM_PWM_Start	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1508:19:HAL_TIM_PWM_Stop	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1543:19:HAL_TIM_PWM_Start_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1636:19:HAL_TIM_PWM_Stop_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1713:19:HAL_TIM_PWM_Start_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1876:19:HAL_TIM_PWM_Stop_DMA	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:1979:19:HAL_TIM_IC_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2039:19:HAL_TIM_IC_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2082:13:HAL_TIM_IC_MspInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2097:13:HAL_TIM_IC_MspDeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2118:19:HAL_TIM_IC_Start	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2170:19:HAL_TIM_IC_Stop	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2200:19:HAL_TIM_IC_Start_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2292:19:HAL_TIM_IC_Stop_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2364:19:HAL_TIM_IC_Start_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2523:19:HAL_TIM_IC_Stop_DMA	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2628:19:HAL_TIM_OnePulse_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2697:19:HAL_TIM_OnePulse_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2742:13:HAL_TIM_OnePulse_MspInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2757:13:HAL_TIM_OnePulse_MspDeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2777:19:HAL_TIM_OnePulse_Start	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2834:19:HAL_TIM_OnePulse_Stop	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2877:19:HAL_TIM_OnePulse_Start_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:2940:19:HAL_TIM_OnePulse_Stop_IT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3019:19:HAL_TIM_Encoder_Init	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3134:19:HAL_TIM_Encoder_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3179:13:HAL_TIM_Encoder_MspInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3194:13:HAL_TIM_Encoder_MspDeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3214:19:HAL_TIM_Encoder_Start	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3308:19:HAL_TIM_Encoder_Stop	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3368:19:HAL_TIM_Encoder_Start_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3468:19:HAL_TIM_Encoder_Stop_IT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3533:19:HAL_TIM_Encoder_Start_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3746:19:HAL_TIM_Encoder_Stop_DMA	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:3823:6:HAL_TIM_IRQHandler	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4041:19:HAL_TIM_OC_ConfigChannel	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4120:19:HAL_TIM_IC_ConfigChannel	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4219:19:HAL_TIM_PWM_ConfigChannel	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4333:19:HAL_TIM_OnePulse_ConfigChannel	56	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4481:19:HAL_TIM_DMABurst_WriteStart	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4534:19:HAL_TIM_DMABurst_MultiWriteStart	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4718:19:HAL_TIM_DMABurst_WriteStop	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4819:19:HAL_TIM_DMABurst_ReadStart	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:4870:19:HAL_TIM_DMABurst_MultiReadStart	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5054:19:HAL_TIM_DMABurst_ReadStop	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5137:19:HAL_TIM_GenerateEvent	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5174:19:HAL_TIM_ConfigOCrefClear	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5304:19:HAL_TIM_ConfigClockSource	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5458:19:HAL_TIM_ConfigTI1Input	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5490:19:HAL_TIM_SlaveConfigSynchro	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5530:19:HAL_TIM_SlaveConfigSynchro_IT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5573:10:HAL_TIM_ReadCapturedValue	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5657:13:HAL_TIM_PeriodElapsedCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5672:13:HAL_TIM_PeriodElapsedHalfCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5687:13:HAL_TIM_OC_DelayElapsedCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5702:13:HAL_TIM_IC_CaptureCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5717:13:HAL_TIM_IC_CaptureHalfCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5732:13:HAL_TIM_PWM_PulseFinishedCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5747:13:HAL_TIM_PWM_PulseFinishedHalfCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5762:13:HAL_TIM_TriggerCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5777:13:HAL_TIM_TriggerHalfCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:5792:13:HAL_TIM_ErrorCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6339:22:HAL_TIM_Base_GetState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6349:22:HAL_TIM_OC_GetState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6359:22:HAL_TIM_PWM_GetState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6369:22:HAL_TIM_IC_GetState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6379:22:HAL_TIM_OnePulse_GetState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6389:22:HAL_TIM_Encoder_GetState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6399:23:HAL_TIM_GetActiveChannel	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6417:29:HAL_TIM_GetChannelState	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6434:30:HAL_TIM_DMABurstState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6459:6:TIM_DMAError	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6502:13:TIM_DMADelayPulseCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6561:6:TIM_DMADelayPulseHalfCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6600:6:TIM_DMACaptureCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6663:6:TIM_DMACaptureHalfCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6702:13:TIM_DMAPeriodElapsedCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6723:13:TIM_DMAPeriodElapsedHalfCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6739:13:TIM_DMATriggerCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6760:13:TIM_DMATriggerHalfCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6777:6:TIM_Base_SetConfig	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6829:13:TIM_OC1_SetConfig	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6905:6:TIM_OC2_SetConfig	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:6981:13:TIM_OC3_SetConfig	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7056:13:TIM_OC4_SetConfig	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7117:26:TIM_SlaveTimer_SetConfig	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7251:6:TIM_TI1_SetConfig	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7298:13:TIM_TI1_ConfigInputStage	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7341:13:TIM_TI2_SetConfig	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7381:13:TIM_TI2_ConfigInputStage	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7424:13:TIM_TI3_SetConfig	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7472:13:TIM_TI4_SetConfig	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7515:13:TIM_ITRx_SetConfig	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7545:6:TIM_ETR_SetConfig	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c:7575:6:TIM_CCxChannelCmd	32	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.cyclo
new file mode 100644
index 0000000..9bfdfb7
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.cyclo
@@ -0,0 +1,42 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:138:19:HAL_TIMEx_HallSensor_Init	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:240:19:HAL_TIMEx_HallSensor_DeInit	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:285:13:HAL_TIMEx_HallSensor_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:300:13:HAL_TIMEx_HallSensor_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:315:19:HAL_TIMEx_HallSensor_Start	14
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:369:19:HAL_TIMEx_HallSensor_Stop	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:397:19:HAL_TIMEx_HallSensor_Start_IT	14
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:454:19:HAL_TIMEx_HallSensor_Stop_IT	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:487:19:HAL_TIMEx_HallSensor_Start_DMA	17
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:563:19:HAL_TIMEx_HallSensor_Stop_DMA	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:625:19:HAL_TIMEx_OCN_Start	17
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:676:19:HAL_TIMEx_OCN_Stop	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:708:19:HAL_TIMEx_OCN_Start_IT	22
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:795:19:HAL_TIMEx_OCN_Stop_IT	14
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:870:19:HAL_TIMEx_OCN_Start_DMA	31
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1008:19:HAL_TIMEx_OCN_Stop_DMA	13
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1098:19:HAL_TIMEx_PWMN_Start	17
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1148:19:HAL_TIMEx_PWMN_Stop	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1180:19:HAL_TIMEx_PWMN_Start_IT	22
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1266:19:HAL_TIMEx_PWMN_Stop_IT	14
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1341:19:HAL_TIMEx_PWMN_Start_DMA	31
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1479:19:HAL_TIMEx_PWMN_Stop_DMA	13
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1570:19:HAL_TIMEx_OnePulseN_Start	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1619:19:HAL_TIMEx_OnePulseN_Stop	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1658:19:HAL_TIMEx_OnePulseN_Start_IT	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1713:19:HAL_TIMEx_OnePulseN_Stop_IT	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1792:19:HAL_TIMEx_ConfigCommutEvent	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1848:19:HAL_TIMEx_ConfigCommutEvent_IT	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1905:19:HAL_TIMEx_ConfigCommutEvent_DMA	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1954:19:HAL_TIMEx_MasterConfigSynchronization	10
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2015:19:HAL_TIMEx_ConfigBreakDeadTime	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2091:19:HAL_TIMEx_RemapConfig	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2147:13:HAL_TIMEx_CommutCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2161:13:HAL_TIMEx_CommutHalfCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2176:13:HAL_TIMEx_BreakCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2209:22:HAL_TIMEx_HallSensor_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2224:29:HAL_TIMEx_GetChannelNState	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2253:6:TIMEx_DMACommutationCplt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2272:6:TIMEx_DMACommutationHalfCplt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2292:13:TIM_DMADelayPulseNCplt	7
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2342:13:TIM_DMAErrorCCxN	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2387:13:TIM_CCxNChannelCmd	1
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.d
new file mode 100644
index 0000000..c54e1af
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
new file mode 100644
index 0000000..42614c2
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.su
new file mode 100644
index 0000000..1dd929f
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.su
@@ -0,0 +1,42 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:138:19:HAL_TIMEx_HallSensor_Init	48	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:240:19:HAL_TIMEx_HallSensor_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:285:13:HAL_TIMEx_HallSensor_MspInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:300:13:HAL_TIMEx_HallSensor_MspDeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:315:19:HAL_TIMEx_HallSensor_Start	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:369:19:HAL_TIMEx_HallSensor_Stop	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:397:19:HAL_TIMEx_HallSensor_Start_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:454:19:HAL_TIMEx_HallSensor_Stop_IT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:487:19:HAL_TIMEx_HallSensor_Start_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:563:19:HAL_TIMEx_HallSensor_Stop_DMA	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:625:19:HAL_TIMEx_OCN_Start	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:676:19:HAL_TIMEx_OCN_Stop	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:708:19:HAL_TIMEx_OCN_Start_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:795:19:HAL_TIMEx_OCN_Stop_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:870:19:HAL_TIMEx_OCN_Start_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1008:19:HAL_TIMEx_OCN_Stop_DMA	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1098:19:HAL_TIMEx_PWMN_Start	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1148:19:HAL_TIMEx_PWMN_Stop	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1180:19:HAL_TIMEx_PWMN_Start_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1266:19:HAL_TIMEx_PWMN_Stop_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1341:19:HAL_TIMEx_PWMN_Start_DMA	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1479:19:HAL_TIMEx_PWMN_Stop_DMA	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1570:19:HAL_TIMEx_OnePulseN_Start	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1619:19:HAL_TIMEx_OnePulseN_Stop	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1658:19:HAL_TIMEx_OnePulseN_Start_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1713:19:HAL_TIMEx_OnePulseN_Stop_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1792:19:HAL_TIMEx_ConfigCommutEvent	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1848:19:HAL_TIMEx_ConfigCommutEvent_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1905:19:HAL_TIMEx_ConfigCommutEvent_DMA	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:1954:19:HAL_TIMEx_MasterConfigSynchronization	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2015:19:HAL_TIMEx_ConfigBreakDeadTime	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2091:19:HAL_TIMEx_RemapConfig	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2147:13:HAL_TIMEx_CommutCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2161:13:HAL_TIMEx_CommutHalfCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2176:13:HAL_TIMEx_BreakCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2209:22:HAL_TIMEx_HallSensor_GetState	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2224:29:HAL_TIMEx_GetChannelNState	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2253:6:TIMEx_DMACommutationCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2272:6:TIMEx_DMACommutationHalfCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2292:13:TIM_DMADelayPulseNCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2342:13:TIM_DMAErrorCCxN	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c:2387:13:TIM_CCxNChannelCmd	32	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.cyclo
new file mode 100644
index 0000000..8be3700
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.cyclo
@@ -0,0 +1,62 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:357:19:HAL_UART_Init	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:435:19:HAL_HalfDuplex_Init	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:509:19:HAL_LIN_Init	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:591:19:HAL_MultiProcessor_Init	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:669:19:HAL_UART_DeInit	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:715:13:HAL_UART_MspInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:730:13:HAL_UART_MspDeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1135:19:HAL_UART_Transmit	10
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1221:19:HAL_UART_Receive	12
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1308:19:HAL_UART_Transmit_IT	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1347:19:HAL_UART_Receive_IT	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1379:19:HAL_UART_Transmit_DMA	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1449:19:HAL_UART_Receive_DMA	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1476:19:HAL_UART_DMAPause	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1507:19:HAL_UART_DMAResume	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1541:19:HAL_UART_DMAStop	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1596:19:HAL_UARTEx_ReceiveToIdle	17
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1721:19:HAL_UARTEx_ReceiveToIdle_IT	7
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1781:19:HAL_UARTEx_ReceiveToIdle_DMA	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1846:29:HAL_UARTEx_GetRxEventType	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1864:19:HAL_UART_Abort	15
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1953:19:HAL_UART_AbortTransmit	7
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2004:19:HAL_UART_AbortReceive	10
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2065:19:HAL_UART_Abort_IT	18
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2200:19:HAL_UART_AbortTransmit_IT	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2277:19:HAL_UART_AbortReceive_IT	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2355:6:HAL_UART_IRQHandler	47
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2619:13:HAL_UART_TxCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2634:13:HAL_UART_TxHalfCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2649:13:HAL_UART_RxCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2664:13:HAL_UART_RxHalfCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2679:13:HAL_UART_ErrorCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2693:13:HAL_UART_AbortCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2708:13:HAL_UART_AbortTransmitCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2723:13:HAL_UART_AbortReceiveCpltCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2740:13:HAL_UARTEx_RxEventCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2780:19:HAL_LIN_SendBreak	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2807:19:HAL_MultiProcessor_EnterMuteMode	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2835:19:HAL_MultiProcessor_ExitMuteMode	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2863:19:HAL_HalfDuplex_EnableTransmitter	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2898:19:HAL_HalfDuplex_EnableReceiver	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2955:23:HAL_UART_GetState	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2970:10:HAL_UART_GetError	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3015:13:UART_DMATransmitCplt	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3050:13:UART_DMATxHalfCplt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3069:13:UART_DMAReceiveCplt	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3131:13:UART_DMARxHalfCplt	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3170:13:UART_DMAError	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3212:26:UART_WaitOnFlagUntilTimeout	9
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3263:19:UART_Start_Receive_IT	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3298:19:UART_Start_Receive_DMA	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3356:13:UART_EndTxTransfer	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3370:13:UART_EndRxTransfer	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3394:13:UART_DMAAbortOnError	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3417:13:UART_DMATxAbortCallback	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3463:13:UART_DMARxAbortCallback	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3509:13:UART_DMATxOnlyAbortCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3537:13:UART_DMARxOnlyAbortCallback	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3563:26:UART_Transmit_IT	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3603:26:UART_EndTransmit_IT	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3628:26:UART_Receive_IT	11
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3731:13:UART_SetConfig	4
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.d
new file mode 100644
index 0000000..43a971f
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
new file mode 100644
index 0000000..cb19ef5
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.su
new file mode 100644
index 0000000..80e6f1c
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.su
@@ -0,0 +1,62 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:357:19:HAL_UART_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:435:19:HAL_HalfDuplex_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:509:19:HAL_LIN_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:591:19:HAL_MultiProcessor_Init	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:669:19:HAL_UART_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:715:13:HAL_UART_MspInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:730:13:HAL_UART_MspDeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1135:19:HAL_UART_Transmit	48	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1221:19:HAL_UART_Receive	48	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1308:19:HAL_UART_Transmit_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1347:19:HAL_UART_Receive_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1379:19:HAL_UART_Transmit_DMA	56	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1449:19:HAL_UART_Receive_DMA	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1476:19:HAL_UART_DMAPause	120	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1507:19:HAL_UART_DMAResume	120	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1541:19:HAL_UART_DMAStop	72	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1596:19:HAL_UARTEx_ReceiveToIdle	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1721:19:HAL_UARTEx_ReceiveToIdle_IT	56	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1781:19:HAL_UARTEx_ReceiveToIdle_DMA	56	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1846:29:HAL_UARTEx_GetRxEventType	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1864:19:HAL_UART_Abort	136	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:1953:19:HAL_UART_AbortTransmit	64	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2004:19:HAL_UART_AbortReceive	112	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2065:19:HAL_UART_Abort_IT	144	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2200:19:HAL_UART_AbortTransmit_IT	64	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2277:19:HAL_UART_AbortReceive_IT	112	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2355:6:HAL_UART_IRQHandler	240	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2619:13:HAL_UART_TxCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2634:13:HAL_UART_TxHalfCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2649:13:HAL_UART_RxCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2664:13:HAL_UART_RxHalfCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2679:13:HAL_UART_ErrorCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2693:13:HAL_UART_AbortCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2708:13:HAL_UART_AbortTransmitCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2723:13:HAL_UART_AbortReceiveCpltCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2740:13:HAL_UARTEx_RxEventCallback	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2780:19:HAL_LIN_SendBreak	40	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2807:19:HAL_MultiProcessor_EnterMuteMode	40	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2835:19:HAL_MultiProcessor_ExitMuteMode	40	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2863:19:HAL_HalfDuplex_EnableTransmitter	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2898:19:HAL_HalfDuplex_EnableReceiver	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2955:23:HAL_UART_GetState	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:2970:10:HAL_UART_GetError	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3015:13:UART_DMATransmitCplt	72	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3050:13:UART_DMATxHalfCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3069:13:UART_DMAReceiveCplt	120	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3131:13:UART_DMARxHalfCplt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3170:13:UART_DMAError	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3212:26:UART_WaitOnFlagUntilTimeout	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3263:19:UART_Start_Receive_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3298:19:UART_Start_Receive_DMA	104	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3356:13:UART_EndTxTransfer	40	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3370:13:UART_EndRxTransfer	88	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3394:13:UART_DMAAbortOnError	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3417:13:UART_DMATxAbortCallback	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3463:13:UART_DMARxAbortCallback	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3509:13:UART_DMATxOnlyAbortCallback	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3537:13:UART_DMARxOnlyAbortCallback	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3563:26:UART_Transmit_IT	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3603:26:UART_EndTransmit_IT	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3628:26:UART_Receive_IT	56	static,ignoring_inline_asm
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c:3731:13:UART_SetConfig	288	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.cyclo
new file mode 100644
index 0000000..2cd2528
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.cyclo
@@ -0,0 +1,27 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:239:20:FMC_NORSRAM_Init	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:361:19:FMC_NORSRAM_DeInit	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:398:19:FMC_NORSRAM_Timing_Init	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:451:19:FMC_NORSRAM_Extended_Timing_Init	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:509:19:FMC_NORSRAM_WriteOperation_Enable	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:527:19:FMC_NORSRAM_WriteOperation_Disable	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:599:19:FMC_NAND_Init	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:657:19:FMC_NAND_CommonSpace_Timing_Init	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:708:19:FMC_NAND_AttributeSpace_Timing_Init	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:757:19:FMC_NAND_DeInit	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:825:19:FMC_NAND_ECC_Enable	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:858:19:FMC_NAND_ECC_Disable	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:892:19:FMC_NAND_GetECC	7
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:993:19:FMC_PCCARD_Init	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1026:19:FMC_PCCARD_CommonSpace_Timing_Init	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1054:19:FMC_PCCARD_AttributeSpace_Timing_Init	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1082:19:FMC_PCCARD_IOSpace_Timing_Init	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1108:19:FMC_PCCARD_DeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1179:19:FMC_SDRAM_Init	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1241:19:FMC_SDRAM_Timing_Init	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1293:19:FMC_SDRAM_DeInit	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1334:19:FMC_SDRAM_WriteProtection_Enable	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1351:19:FMC_SDRAM_WriteProtection_Disable	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1371:19:FMC_SDRAM_SendCommand	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1411:19:FMC_SDRAM_ProgramRefreshRate	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1429:19:FMC_SDRAM_SetAutoRefreshNumber	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1451:10:FMC_SDRAM_GetModeStatus	2
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.d
new file mode 100644
index 0000000..82189b5
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o
new file mode 100644
index 0000000..d71d3ad
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.su
new file mode 100644
index 0000000..7099d90
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.su
@@ -0,0 +1,27 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:239:20:FMC_NORSRAM_Init	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:361:19:FMC_NORSRAM_DeInit	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:398:19:FMC_NORSRAM_Timing_Init	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:451:19:FMC_NORSRAM_Extended_Timing_Init	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:509:19:FMC_NORSRAM_WriteOperation_Enable	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:527:19:FMC_NORSRAM_WriteOperation_Disable	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:599:19:FMC_NAND_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:657:19:FMC_NAND_CommonSpace_Timing_Init	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:708:19:FMC_NAND_AttributeSpace_Timing_Init	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:757:19:FMC_NAND_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:825:19:FMC_NAND_ECC_Enable	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:858:19:FMC_NAND_ECC_Disable	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:892:19:FMC_NAND_GetECC	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:993:19:FMC_PCCARD_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1026:19:FMC_PCCARD_CommonSpace_Timing_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1054:19:FMC_PCCARD_AttributeSpace_Timing_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1082:19:FMC_PCCARD_IOSpace_Timing_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1108:19:FMC_PCCARD_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1179:19:FMC_SDRAM_Init	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1241:19:FMC_SDRAM_Timing_Init	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1293:19:FMC_SDRAM_DeInit	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1334:19:FMC_SDRAM_WriteProtection_Enable	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1351:19:FMC_SDRAM_WriteProtection_Disable	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1371:19:FMC_SDRAM_SendCommand	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1411:19:FMC_SDRAM_ProgramRefreshRate	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1429:19:FMC_SDRAM_SetAutoRefreshNumber	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c:1451:10:FMC_SDRAM_GetModeStatus	24	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.cyclo b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.cyclo
new file mode 100644
index 0000000..65c0e41
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.cyclo
@@ -0,0 +1,49 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:83:19:USB_CoreInit	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:139:19:USB_SetTurnaroundTime	21
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:222:19:USB_EnableGlobalInt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:234:19:USB_DisableGlobalInt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:249:19:USB_SetCurrentMode	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:296:19:USB_DevInit	16
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:473:19:USB_FlushTxFifo	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:510:19:USB_FlushRxFifo	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:553:19:USB_SetDevSpeed	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:569:9:USB_GetDevSpeed	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:598:19:USB_ActivateEndpoint	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:636:19:USB_ActivateDedicatedEndpoint	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:675:19:USB_DeactivateEndpoint	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:722:19:USB_DeactivateDedicatedEndpoint	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:764:19:USB_EPStartXfer	20
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:936:19:USB_EPStopXfer	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1000:19:USB_WritePacket	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1031:7:USB_ReadPacket	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1073:19:USB_EPSetStall	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1104:19:USB_EPClearStall	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1133:19:USB_StopDevice	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1174:19:USB_SetDevAddress	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1189:19:USB_DevConnect	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1206:19:USB_DevDisconnect	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1223:10:USB_ReadInterrupts	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1239:10:USB_ReadChInterrupts	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1255:10:USB_ReadDevAllOutEpInterrupt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1271:10:USB_ReadDevAllInEpInterrupt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1289:10:USB_ReadDevOutEPInterrupt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1307:10:USB_ReadDevInEPInterrupt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1328:7:USB_ClearInterrupts	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1341:10:USB_GetMode	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1351:19:USB_ActivateSetup	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1373:19:USB_EP0_OutStart	4
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1406:26:USB_CoreReset	6
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1453:19:USB_HostInit	8
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1568:19:USB_InitFSLSPClkSel	3
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1598:19:USB_ResetPort	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1625:19:USB_DriveVbus	5
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1655:10:USB_GetHostSpeed	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1669:10:USB_GetCurrentFrame	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1700:19:USB_HC_Init	13
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1832:19:USB_HC_StartXfer	44
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:2095:10:USB_HC_ReadInterrupt	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:2109:19:USB_HC_Halt	15
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:2193:19:USB_DoPing	1
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:2217:19:USB_StopHost	7
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:2282:19:USB_ActivateRemoteWakeup	2
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:2300:19:USB_DeActivateRemoteWakeup	1
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.d b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.d
new file mode 100644
index 0000000..8553c49
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.d
@@ -0,0 +1,80 @@
+Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o: \
+ ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o
new file mode 100644
index 0000000..9b90d6c
Binary files /dev/null and b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o differ
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.su b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.su
new file mode 100644
index 0000000..426b641
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.su
@@ -0,0 +1,49 @@
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:83:19:USB_CoreInit	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:139:19:USB_SetTurnaroundTime	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:222:19:USB_EnableGlobalInt	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:234:19:USB_DisableGlobalInt	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:249:19:USB_SetCurrentMode	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:296:19:USB_DevInit	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:473:19:USB_FlushTxFifo	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:510:19:USB_FlushRxFifo	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:553:19:USB_SetDevSpeed	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:569:9:USB_GetDevSpeed	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:598:19:USB_ActivateEndpoint	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:636:19:USB_ActivateDedicatedEndpoint	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:675:19:USB_DeactivateEndpoint	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:722:19:USB_DeactivateDedicatedEndpoint	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:764:19:USB_EPStartXfer	48	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:936:19:USB_EPStopXfer	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1000:19:USB_WritePacket	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1031:7:USB_ReadPacket	48	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1073:19:USB_EPSetStall	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1104:19:USB_EPClearStall	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1133:19:USB_StopDevice	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1174:19:USB_SetDevAddress	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1189:19:USB_DevConnect	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1206:19:USB_DevDisconnect	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1223:10:USB_ReadInterrupts	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1239:10:USB_ReadChInterrupts	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1255:10:USB_ReadDevAllOutEpInterrupt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1271:10:USB_ReadDevAllInEpInterrupt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1289:10:USB_ReadDevOutEPInterrupt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1307:10:USB_ReadDevInEPInterrupt	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1328:7:USB_ClearInterrupts	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1341:10:USB_GetMode	16	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1351:19:USB_ActivateSetup	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1373:19:USB_EP0_OutStart	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1406:26:USB_CoreReset	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1453:19:USB_HostInit	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1568:19:USB_InitFSLSPClkSel	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1598:19:USB_ResetPort	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1625:19:USB_DriveVbus	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1655:10:USB_GetHostSpeed	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1669:10:USB_GetCurrentFrame	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1700:19:USB_HC_Init	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:1832:19:USB_HC_StartXfer	56	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:2095:10:USB_HC_ReadInterrupt	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:2109:19:USB_HC_Halt	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:2193:19:USB_DoPing	32	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:2217:19:USB_StopHost	40	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:2282:19:USB_ActivateRemoteWakeup	24	static
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c:2300:19:USB_DeActivateRemoteWakeup	24	static
diff --git a/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk
new file mode 100644
index 0000000..8fe68ff
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk
@@ -0,0 +1,121 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.c \
+../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c 
+
+OBJS += \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o 
+
+C_DEPS += \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.d \
+./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Drivers/STM32F4xx_HAL_Driver/Src/%.o Drivers/STM32F4xx_HAL_Driver/Src/%.su Drivers/STM32F4xx_HAL_Driver/Src/%.cyclo: ../Drivers/STM32F4xx_HAL_Driver/Src/%.c Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../USB_HOST/App -I../USB_HOST/Target -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/ST/STM32_USB_Host_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Drivers-2f-STM32F4xx_HAL_Driver-2f-Src
+
+clean-Drivers-2f-STM32F4xx_HAL_Driver-2f-Src:
+	-$(RM) ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o
+	-$(RM) ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.su
+
+.PHONY: clean-Drivers-2f-STM32F4xx_HAL_Driver-2f-Src
+
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/subdir.mk b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/subdir.mk
new file mode 100644
index 0000000..0aee323
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c 
+
+OBJS += \
+./Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.o 
+
+C_DEPS += \
+./Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/%.o Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/%.su Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/%.cyclo: ../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/%.c Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../USB_HOST/App -I../USB_HOST/Target -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/ST/STM32_USB_Host_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Middlewares-2f-ST-2f-STM32_USB_Host_Library-2f-Class-2f-CDC-2f-Src
+
+clean-Middlewares-2f-ST-2f-STM32_USB_Host_Library-2f-Class-2f-CDC-2f-Src:
+	-$(RM) ./Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.cyclo ./Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.d ./Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.o ./Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.su
+
+.PHONY: clean-Middlewares-2f-ST-2f-STM32_USB_Host_Library-2f-Class-2f-CDC-2f-Src
+
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.cyclo b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.cyclo
new file mode 100644
index 0000000..76f341b
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.cyclo
@@ -0,0 +1,18 @@
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:151:27:USBH_CDC_InterfaceInit	10
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:267:27:USBH_CDC_InterfaceDeInit	5
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:308:27:USBH_CDC_ClassRequest	2
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:338:27:USBH_CDC_Process	15
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:422:27:USBH_CDC_SOFProcess	1
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:437:20:USBH_CDC_Stop	2
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:457:27:GetLineCoding	1
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:480:27:SetLineCoding	1
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:501:20:USBH_CDC_SetLineCoding	2
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:524:20:USBH_CDC_GetLineCoding	3
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:545:10:USBH_CDC_GetLastReceivedDataSize	2
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:567:20:USBH_CDC_Transmit	3
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:594:20:USBH_CDC_Receive	3
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:619:13:CDC_ProcessTransmission	8
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:701:13:CDC_ProcessReception	6
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:782:13:USBH_CDC_TransmitCallback	1
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:793:13:USBH_CDC_ReceiveCallback	1
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:804:13:USBH_CDC_LineCodingChanged	1
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.d b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.d
new file mode 100644
index 0000000..f9e447b
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.d
@@ -0,0 +1,131 @@
+Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.o: \
+ ../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c \
+ ../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc/usbh_cdc.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h \
+ ../USB_HOST/Target/usbh_conf.h ../Core/Inc/main.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc/usbh_cdc.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h:
+../USB_HOST/Target/usbh_conf.h:
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h:
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.o b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.o
new file mode 100644
index 0000000..928bdf2
Binary files /dev/null and b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.o differ
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.su b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.su
new file mode 100644
index 0000000..6a53ac7
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.su
@@ -0,0 +1,18 @@
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:151:27:USBH_CDC_InterfaceInit	48	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:267:27:USBH_CDC_InterfaceDeInit	24	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:308:27:USBH_CDC_ClassRequest	24	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:338:27:USBH_CDC_Process	24	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:422:27:USBH_CDC_SOFProcess	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:437:20:USBH_CDC_Stop	24	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:457:27:GetLineCoding	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:480:27:SetLineCoding	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:501:20:USBH_CDC_SetLineCoding	24	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:524:20:USBH_CDC_GetLineCoding	24	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:545:10:USBH_CDC_GetLastReceivedDataSize	24	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:567:20:USBH_CDC_Transmit	32	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:594:20:USBH_CDC_Receive	32	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:619:13:CDC_ProcessTransmission	32	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:701:13:CDC_ProcessReception	32	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:782:13:USBH_CDC_TransmitCallback	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:793:13:USBH_CDC_ReceiveCallback	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.c:804:13:USBH_CDC_LineCodingChanged	16	static
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/subdir.mk b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/subdir.mk
new file mode 100644
index 0000000..7265c1a
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/subdir.mk
@@ -0,0 +1,36 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c \
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c \
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c \
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c 
+
+OBJS += \
+./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o \
+./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.o \
+./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.o \
+./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.o 
+
+C_DEPS += \
+./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.d \
+./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.d \
+./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.d \
+./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Middlewares/ST/STM32_USB_Host_Library/Core/Src/%.o Middlewares/ST/STM32_USB_Host_Library/Core/Src/%.su Middlewares/ST/STM32_USB_Host_Library/Core/Src/%.cyclo: ../Middlewares/ST/STM32_USB_Host_Library/Core/Src/%.c Middlewares/ST/STM32_USB_Host_Library/Core/Src/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../USB_HOST/App -I../USB_HOST/Target -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/ST/STM32_USB_Host_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Middlewares-2f-ST-2f-STM32_USB_Host_Library-2f-Core-2f-Src
+
+clean-Middlewares-2f-ST-2f-STM32_USB_Host_Library-2f-Core-2f-Src:
+	-$(RM) ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.cyclo ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.d ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.su ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.cyclo ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.d ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.o ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.su ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.cyclo ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.d ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.o ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.su ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.cyclo ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.d ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.o ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.su
+
+.PHONY: clean-Middlewares-2f-ST-2f-STM32_USB_Host_Library-2f-Core-2f-Src
+
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.cyclo b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.cyclo
new file mode 100644
index 0000000..187a06a
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.cyclo
@@ -0,0 +1,24 @@
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:95:20:USBH_Init	3
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:177:20:USBH_DeInit	2
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:220:27:DeInitStateMachine	3
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:266:20:USBH_RegisterClass	3
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:301:20:USBH_SelectInterface	2
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:330:9:USBH_GetActiveClass	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:346:9:USBH_FindInterface	8
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:379:9:USBH_FindInterfaceIndex	4
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:407:20:USBH_Start	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:425:20:USBH_Stop	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:447:20:USBH_ReEnumerate	2
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:473:20:USBH_Process	37
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:800:27:USBH_HandleEnum	32
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1114:6:USBH_LL_SetTimer	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1126:6:USBH_LL_IncTimer	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1139:13:USBH_HandleSof	3
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1154:6:USBH_LL_PortEnabled	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1172:6:USBH_LL_PortDisabled	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1187:9:USBH_IsPortEnabled	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1199:20:USBH_LL_Connect	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1219:20:USBH_LL_Disconnect	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1250:6:USBH_OS_PutMessage	2
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1278:13:USBH_Process_OS	2
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1314:20:USBH_LL_NotifyURBChange	1
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.d b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.d
new file mode 100644
index 0000000..b993a0c
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.d
@@ -0,0 +1,129 @@
+Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o: \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h \
+ ../USB_HOST/Target/usbh_conf.h ../Core/Inc/main.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h:
+../USB_HOST/Target/usbh_conf.h:
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h:
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o
new file mode 100644
index 0000000..de5de2a
Binary files /dev/null and b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o differ
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.su b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.su
new file mode 100644
index 0000000..92023b3
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.su
@@ -0,0 +1,24 @@
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:95:20:USBH_Init	80	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:177:20:USBH_DeInit	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:220:27:DeInitStateMachine	24	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:266:20:USBH_RegisterClass	24	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:301:20:USBH_SelectInterface	24	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:330:9:USBH_GetActiveClass	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:346:9:USBH_FindInterface	32	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:379:9:USBH_FindInterfaceIndex	32	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:407:20:USBH_Start	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:425:20:USBH_Stop	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:447:20:USBH_ReEnumerate	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:473:20:USBH_Process	40	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:800:27:USBH_HandleEnum	40	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1114:6:USBH_LL_SetTimer	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1126:6:USBH_LL_IncTimer	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1139:13:USBH_HandleSof	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1154:6:USBH_LL_PortEnabled	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1172:6:USBH_LL_PortDisabled	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1187:9:USBH_IsPortEnabled	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1199:20:USBH_LL_Connect	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1219:20:USBH_LL_Disconnect	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1250:6:USBH_OS_PutMessage	32	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1278:13:USBH_Process_OS	32	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c:1314:20:USBH_LL_NotifyURBChange	16	static
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.cyclo b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.cyclo
new file mode 100644
index 0000000..aaf98fe
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.cyclo
@@ -0,0 +1,17 @@
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:96:20:USBH_Get_DevDesc	3
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:129:20:USBH_Get_CfgDesc	3
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:163:20:USBH_Get_StringDesc	4
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:199:20:USBH_GetDescriptor	3
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:230:20:USBH_SetAddress	2
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:256:20:USBH_SetCfg	2
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:280:20:USBH_SetInterface	2
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:304:20:USBH_SetFeature	2
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:329:20:USBH_ClrFeature	2
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:355:27:USBH_ParseDevDesc	11
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:429:27:USBH_ParseCfgDesc	19
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:544:13:USBH_ParseInterfaceDesc	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:566:27:USBH_ParseEPDesc	30
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:687:13:USBH_ParseStringDesc	3
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:727:20:USBH_GetNextDesc	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:749:20:USBH_CtlReq	6
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:806:27:USBH_HandleControl	32
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.d b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.d
new file mode 100644
index 0000000..1992e51
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.d
@@ -0,0 +1,129 @@
+Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.o: \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h \
+ ../USB_HOST/Target/usbh_conf.h ../Core/Inc/main.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h:
+../USB_HOST/Target/usbh_conf.h:
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h:
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.o b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.o
new file mode 100644
index 0000000..a02451c
Binary files /dev/null and b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.o differ
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.su b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.su
new file mode 100644
index 0000000..b7e664f
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.su
@@ -0,0 +1,17 @@
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:96:20:USBH_Get_DevDesc	32	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:129:20:USBH_Get_CfgDesc	32	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:163:20:USBH_Get_StringDesc	40	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:199:20:USBH_GetDescriptor	24	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:230:20:USBH_SetAddress	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:256:20:USBH_SetCfg	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:280:20:USBH_SetInterface	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:304:20:USBH_SetFeature	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:329:20:USBH_ClrFeature	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:355:27:USBH_ParseDevDesc	32	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:429:27:USBH_ParseCfgDesc	56	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:544:13:USBH_ParseInterfaceDesc	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:566:27:USBH_ParseEPDesc	32	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:687:13:USBH_ParseStringDesc	32	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:727:20:USBH_GetNextDesc	24	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:749:20:USBH_CtlReq	32	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c:806:27:USBH_HandleControl	32	static
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.cyclo b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.cyclo
new file mode 100644
index 0000000..8cbc9e7
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.cyclo
@@ -0,0 +1,9 @@
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:91:20:USBH_CtlSendSetup	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:117:20:USBH_CtlSendData	2
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:150:20:USBH_CtlReceiveData	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:177:20:USBH_BulkSendData	2
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:209:20:USBH_BulkReceiveData	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:235:20:USBH_InterruptReceiveData	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:261:20:USBH_InterruptSendData	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:287:20:USBH_IsocReceiveData	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:314:20:USBH_IsocSendData	1
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.d b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.d
new file mode 100644
index 0000000..9474f31
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.d
@@ -0,0 +1,129 @@
+Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.o: \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h \
+ ../USB_HOST/Target/usbh_conf.h ../Core/Inc/main.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h:
+../USB_HOST/Target/usbh_conf.h:
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h:
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.o b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.o
new file mode 100644
index 0000000..adfffa3
Binary files /dev/null and b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.o differ
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.su b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.su
new file mode 100644
index 0000000..8335081
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.su
@@ -0,0 +1,9 @@
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:91:20:USBH_CtlSendSetup	40	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:117:20:USBH_CtlSendData	40	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:150:20:USBH_CtlReceiveData	40	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:177:20:USBH_BulkSendData	40	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:209:20:USBH_BulkReceiveData	40	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:235:20:USBH_InterruptReceiveData	40	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:261:20:USBH_InterruptSendData	40	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:287:20:USBH_IsocReceiveData	40	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c:314:20:USBH_IsocSendData	40	static
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.cyclo b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.cyclo
new file mode 100644
index 0000000..b5332dd
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.cyclo
@@ -0,0 +1,5 @@
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c:84:20:USBH_OpenPipe	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c:116:20:USBH_ClosePipe	1
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c:131:9:USBH_AllocPipe	2
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c:153:20:USBH_FreePipe	2
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c:170:17:USBH_GetFreePipe	3
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.d b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.d
new file mode 100644
index 0000000..870bbc5
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.d
@@ -0,0 +1,129 @@
+Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.o: \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h \
+ ../USB_HOST/Target/usbh_conf.h ../Core/Inc/main.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h:
+../USB_HOST/Target/usbh_conf.h:
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h:
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.o b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.o
new file mode 100644
index 0000000..7369f3d
Binary files /dev/null and b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.o differ
diff --git a/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.su b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.su
new file mode 100644
index 0000000..e972e54
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.su
@@ -0,0 +1,5 @@
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c:84:20:USBH_OpenPipe	32	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c:116:20:USBH_ClosePipe	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c:131:9:USBH_AllocPipe	24	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c:153:20:USBH_FreePipe	16	static
+../Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c:170:17:USBH_GetFreePipe	24	static
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.cyclo b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.cyclo
new file mode 100644
index 0000000..cb7e218
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.cyclo
@@ -0,0 +1,56 @@
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:103:31:makeFreeRtosPriority	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:116:19:makeCmsisPriority	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:130:12:inHandlerMode	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:150:10:osKernelStart	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:165:9:osKernelRunning	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:184:10:osKernelSysTick	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:202:12:osThreadCreate	4
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:240:12:osThreadGetId	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:255:10:osThreadTerminate	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:270:10:osThreadYield	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:284:10:osThreadSetPriority	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:300:12:osThreadGetPriority	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:322:10:osDelay	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:357:11:osTimerCreate	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:404:10:osTimerStart	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:443:10:osTimerStop	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:472:10:osTimerDelete	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:502:9:osSignalSet	5
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:543:9:osSignalWait	8
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:597:11:osMutexCreate	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:626:10:osMutexWait	9
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:666:10:osMutexRelease	5
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:690:10:osMutexDelete	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:712:15:osSemaphoreCreate	5
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:779:9:osSemaphoreWait	9
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:819:10:osSemaphoreRelease	5
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:846:10:osSemaphoreDelete	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:883:10:osPoolCreate	5
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:936:7:osPoolAlloc	5
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:977:7:osPoolCAlloc	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:996:10:osPoolFree	6
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1040:14:osMessageCreate	3
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1067:10:osMessagePut	6
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1099:9:osMessageGet	10
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1168:11:osMailCreate	4
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1214:7:osMailAlloc	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1236:7:osMailCAlloc	3
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1257:10:osMailPut	6
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1290:9:osMailGet	10
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1346:10:osMailFree	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1362:6:osSystickHandler	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1432:10:osThreadSuspend	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1448:10:osThreadResume	3
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1472:10:osThreadSuspendAll	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1483:10:osThreadResumeAll	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1500:10:osDelayUntil	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1520:10:osAbortDelay	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1541:10:osThreadList	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1555:9:osMessagePeek	7
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1596:10:osMessageWaiting	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1612:10:osMessageAvailableSpace	1
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1622:10:osMessageDelete	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1638:11:osRecursiveMutexCreate	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1664:10:osRecursiveMutexRelease	2
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1685:10:osRecursiveMutexWait	6
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1724:10:osSemaphoreGetCount	1
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.d b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.d
new file mode 100644
index 0000000..6f93a0c
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.d
@@ -0,0 +1,38 @@
+Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o: \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
new file mode 100644
index 0000000..8d84afe
Binary files /dev/null and b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o differ
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.su b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.su
new file mode 100644
index 0000000..33736cb
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.su
@@ -0,0 +1,56 @@
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:103:31:makeFreeRtosPriority	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:116:19:makeCmsisPriority	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:130:12:inHandlerMode	16	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:150:10:osKernelStart	8	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:165:9:osKernelRunning	8	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:184:10:osKernelSysTick	8	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:202:12:osThreadCreate	56	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:240:12:osThreadGetId	8	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:255:10:osThreadTerminate	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:270:10:osThreadYield	4	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:284:10:osThreadSetPriority	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:300:12:osThreadGetPriority	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:322:10:osDelay	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:357:11:osTimerCreate	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:404:10:osTimerStart	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:443:10:osTimerStop	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:472:10:osTimerDelete	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:502:9:osSignalSet	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:543:9:osSignalWait	48	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:597:11:osMutexCreate	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:626:10:osMutexWait	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:666:10:osMutexRelease	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:690:10:osMutexDelete	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:712:15:osSemaphoreCreate	32	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:779:9:osSemaphoreWait	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:819:10:osSemaphoreRelease	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:846:10:osSemaphoreDelete	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:883:10:osPoolCreate	32	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:936:7:osPoolAlloc	48	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:977:7:osPoolCAlloc	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:996:10:osPoolFree	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1040:14:osMessageCreate	32	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1067:10:osMessagePut	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1099:9:osMessageGet	56	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1168:11:osMailCreate	40	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1214:7:osMailAlloc	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1236:7:osMailCAlloc	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1257:10:osMailPut	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1290:9:osMailGet	56	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1346:10:osMailFree	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1362:6:osSystickHandler	8	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1432:10:osThreadSuspend	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1448:10:osThreadResume	16	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1472:10:osThreadSuspendAll	8	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1483:10:osThreadResumeAll	8	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1500:10:osDelayUntil	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1520:10:osAbortDelay	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1541:10:osThreadList	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1555:9:osMessagePeek	48	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1596:10:osMessageWaiting	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1612:10:osMessageAvailableSpace	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1622:10:osMessageDelete	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1638:11:osRecursiveMutexCreate	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1664:10:osRecursiveMutexRelease	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1685:10:osRecursiveMutexWait	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c:1724:10:osSemaphoreGetCount	16	static
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/subdir.mk b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/subdir.mk
new file mode 100644
index 0000000..97e2f59
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c 
+
+OBJS += \
+./Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o 
+
+C_DEPS += \
+./Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/%.o Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/%.su Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/%.cyclo: ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/%.c Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../USB_HOST/App -I../USB_HOST/Target -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/ST/STM32_USB_Host_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Middlewares-2f-Third_Party-2f-FreeRTOS-2f-Source-2f-CMSIS_RTOS
+
+clean-Middlewares-2f-Third_Party-2f-FreeRTOS-2f-Source-2f-CMSIS_RTOS:
+	-$(RM) ./Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.cyclo ./Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.d ./Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o ./Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.su
+
+.PHONY: clean-Middlewares-2f-Third_Party-2f-FreeRTOS-2f-Source-2f-CMSIS_RTOS
+
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.cyclo b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.cyclo
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.d b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.d
new file mode 100644
index 0000000..917ef11
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.d
@@ -0,0 +1,22 @@
+Middlewares/Third_Party/FreeRTOS/Source/croutine.o: \
+ ../Middlewares/Third_Party/FreeRTOS/Source/croutine.c \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/croutine.h
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/croutine.h:
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.o b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.o
new file mode 100644
index 0000000..a96fe12
Binary files /dev/null and b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.o differ
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.su b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/croutine.su
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.cyclo b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.cyclo
new file mode 100644
index 0000000..56c4d2b
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.cyclo
@@ -0,0 +1,11 @@
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:93:21:xEventGroupCreateStatic	4
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:145:21:xEventGroupCreate	2
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:191:13:xEventGroupSync	12
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:311:13:xEventGroupWaitBits	17
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:461:13:xEventGroupClearBits	3
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:503:13:xEventGroupGetBitsFromISR	1
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:519:13:xEventGroupSetBits	9
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:613:6:vEventGroupDelete	4
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:657:6:vEventGroupSetBitsCallback	1
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:665:6:vEventGroupClearBitsCallback	1
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:671:19:prvTestWaitCondition	4
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.d b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.d
new file mode 100644
index 0000000..a2c9c62
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.d
@@ -0,0 +1,28 @@
+Middlewares/Third_Party/FreeRTOS/Source/event_groups.o: \
+ ../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.o b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
new file mode 100644
index 0000000..bb4db85
Binary files /dev/null and b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.o differ
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.su b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.su
new file mode 100644
index 0000000..b97429e
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/event_groups.su
@@ -0,0 +1,11 @@
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:93:21:xEventGroupCreateStatic	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:145:21:xEventGroupCreate	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:191:13:xEventGroupSync	56	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:311:13:xEventGroupWaitBits	72	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:461:13:xEventGroupClearBits	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:503:13:xEventGroupGetBitsFromISR	40	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:519:13:xEventGroupSetBits	64	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:613:6:vEventGroupDelete	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:657:6:vEventGroupSetBitsCallback	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:665:6:vEventGroupClearBitsCallback	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c:671:19:prvTestWaitCondition	32	static
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.cyclo b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.cyclo
new file mode 100644
index 0000000..8d6cdb0
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.cyclo
@@ -0,0 +1,5 @@
+../Middlewares/Third_Party/FreeRTOS/Source/list.c:37:6:vListInitialise	1
+../Middlewares/Third_Party/FreeRTOS/Source/list.c:62:6:vListInitialiseItem	1
+../Middlewares/Third_Party/FreeRTOS/Source/list.c:74:6:vListInsertEnd	1
+../Middlewares/Third_Party/FreeRTOS/Source/list.c:103:6:vListInsert	3
+../Middlewares/Third_Party/FreeRTOS/Source/list.c:170:13:uxListRemove	2
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.d b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.d
new file mode 100644
index 0000000..a46554b
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.d
@@ -0,0 +1,18 @@
+Middlewares/Third_Party/FreeRTOS/Source/list.o: \
+ ../Middlewares/Third_Party/FreeRTOS/Source/list.c \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.o b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.o
new file mode 100644
index 0000000..2145a37
Binary files /dev/null and b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.o differ
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.su b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.su
new file mode 100644
index 0000000..85c9323
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/list.su
@@ -0,0 +1,5 @@
+../Middlewares/Third_Party/FreeRTOS/Source/list.c:37:6:vListInitialise	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/list.c:62:6:vListInitialiseItem	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/list.c:74:6:vListInsertEnd	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/list.c:103:6:vListInsert	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/list.c:170:13:uxListRemove	24	static
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.cyclo b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.cyclo
new file mode 100644
index 0000000..6e44697
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.cyclo
@@ -0,0 +1,13 @@
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:187:14:pxPortInitialiseStack	1
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:217:13:prvTaskExitError	3
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:242:6:SVC_Handler	1
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:261:13:prvPortStartFirstTask	1
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:287:12:xPortStartScheduler	5
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:395:6:vPortEndScheduler	2
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:403:6:vPortEnterCritical	3
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:420:6:vPortExitCritical	3
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:431:6:PendSV_Handler	1
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:488:6:SysTick_Handler	2
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:679:30:vPortSetupTimerInterrupt	1
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:701:13:vPortEnableVFP	1
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:717:7:vPortValidateInterruptPriority	4
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.d b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.d
new file mode 100644
index 0000000..24dc560
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.d
@@ -0,0 +1,20 @@
+Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o: \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
new file mode 100644
index 0000000..e2d6028
Binary files /dev/null and b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o differ
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.su b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.su
new file mode 100644
index 0000000..5a725d2
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.su
@@ -0,0 +1,13 @@
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:187:14:pxPortInitialiseStack	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:217:13:prvTaskExitError	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:242:6:SVC_Handler	0	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:261:13:prvPortStartFirstTask	0	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:287:12:xPortStartScheduler	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:395:6:vPortEndScheduler	16	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:403:6:vPortEnterCritical	16	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:420:6:vPortExitCritical	16	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:431:6:PendSV_Handler	0	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:488:6:SysTick_Handler	16	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:679:30:vPortSetupTimerInterrupt	4	static
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:701:13:vPortEnableVFP	0	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c:717:7:vPortValidateInterruptPriority	24	static,ignoring_inline_asm
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/subdir.mk b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/subdir.mk
new file mode 100644
index 0000000..dc2b38d
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.c 
+
+OBJS += \
+./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o 
+
+C_DEPS += \
+./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/%.o Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/%.su Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/%.cyclo: ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/%.c Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../USB_HOST/App -I../USB_HOST/Target -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/ST/STM32_USB_Host_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Middlewares-2f-Third_Party-2f-FreeRTOS-2f-Source-2f-portable-2f-GCC-2f-ARM_CM4F
+
+clean-Middlewares-2f-Third_Party-2f-FreeRTOS-2f-Source-2f-portable-2f-GCC-2f-ARM_CM4F:
+	-$(RM) ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.cyclo ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.d ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.su
+
+.PHONY: clean-Middlewares-2f-Third_Party-2f-FreeRTOS-2f-Source-2f-portable-2f-GCC-2f-ARM_CM4F
+
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.cyclo b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.cyclo
new file mode 100644
index 0000000..43af7a1
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.cyclo
@@ -0,0 +1,8 @@
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:115:7:pvPortMalloc	16
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:266:6:vPortFree	6
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:315:8:xPortGetFreeHeapSize	1
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:321:8:xPortGetMinimumEverFreeHeapSize	1
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:327:6:vPortInitialiseBlocks	1
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:333:13:prvHeapInit	2
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:381:13:prvInsertBlockIntoFreeList	6
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:442:6:vPortGetHeapStats	5
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.d b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.d
new file mode 100644
index 0000000..3239dc9
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.d
@@ -0,0 +1,20 @@
+Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o: \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
new file mode 100644
index 0000000..9db220e
Binary files /dev/null and b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o differ
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.su b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.su
new file mode 100644
index 0000000..03dea47
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.su
@@ -0,0 +1,8 @@
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:115:7:pvPortMalloc	48	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:266:6:vPortFree	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:315:8:xPortGetFreeHeapSize	4	static
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:321:8:xPortGetMinimumEverFreeHeapSize	4	static
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:327:6:vPortInitialiseBlocks	4	static
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:333:13:prvHeapInit	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:381:13:prvInsertBlockIntoFreeList	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c:442:6:vPortGetHeapStats	32	static
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/subdir.mk b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/subdir.mk
new file mode 100644
index 0000000..544c89f
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c 
+
+OBJS += \
+./Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o 
+
+C_DEPS += \
+./Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/%.o Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/%.su Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/%.cyclo: ../Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/%.c Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../USB_HOST/App -I../USB_HOST/Target -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/ST/STM32_USB_Host_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Middlewares-2f-Third_Party-2f-FreeRTOS-2f-Source-2f-portable-2f-MemMang
+
+clean-Middlewares-2f-Third_Party-2f-FreeRTOS-2f-Source-2f-portable-2f-MemMang:
+	-$(RM) ./Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.cyclo ./Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.d ./Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o ./Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.su
+
+.PHONY: clean-Middlewares-2f-Third_Party-2f-FreeRTOS-2f-Source-2f-portable-2f-MemMang
+
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.cyclo b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.cyclo
new file mode 100644
index 0000000..e65b46c
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.cyclo
@@ -0,0 +1,34 @@
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:255:12:xQueueGenericReset	5
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:310:16:xQueueGenericCreateStatic	11
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:368:16:xQueueGenericCreate	3
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:422:13:prvInitialiseNewQueue	2
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:466:14:prvInitialiseMutex	2
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:496:16:xQueueCreateMutex	1
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:512:16:xQueueCreateMutexStatic	1
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:589:13:xQueueGiveMutexRecursive	4
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:644:13:xQueueTakeMutexRecursive	4
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:686:16:xQueueCreateCountingSemaphoreStatic	4
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:714:16:xQueueCreateCountingSemaphore	4
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:740:12:xQueueGenericSend	23
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:950:12:xQueueGenericSendFromISR	14
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1112:12:xQueueGiveFromISR	11
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1277:12:xQueueReceive	19
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1418:12:xQueueSemaphoreTake	21
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1636:12:xQueuePeek	19
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1785:12:xQueueReceiveFromISR	10
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1876:12:xQueuePeekFromISR	7
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1930:13:uxQueueMessagesWaiting	2
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1946:13:uxQueueSpacesAvailable	2
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1963:13:uxQueueMessagesWaitingFromISR	2
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1975:6:vQueueDelete	3
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2049:21:prvGetDisinheritPriorityAfterTimeout	2
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2074:19:prvCopyDataToQueue	8
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2153:13:prvCopyDataFromQueue	3
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2171:13:prvUnlockQueue	7
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2291:19:prvIsQueueEmpty	2
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2312:12:xQueueIsQueueEmptyFromISR	3
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2331:19:prvIsQueueFull	2
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2352:12:xQueueIsQueueFullFromISR	3
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2648:7:vQueueAddToRegistry	3
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2677:14:pcQueueGetName	3
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2705:7:vQueueUnregisterQueue	3
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.d b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.d
new file mode 100644
index 0000000..23ff8db
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.d
@@ -0,0 +1,24 @@
+Middlewares/Third_Party/FreeRTOS/Source/queue.o: \
+ ../Middlewares/Third_Party/FreeRTOS/Source/queue.c \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.o b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.o
new file mode 100644
index 0000000..ed9f7c3
Binary files /dev/null and b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.o differ
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.su b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.su
new file mode 100644
index 0000000..c78b417
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/queue.su
@@ -0,0 +1,34 @@
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:255:12:xQueueGenericReset	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:310:16:xQueueGenericCreateStatic	64	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:368:16:xQueueGenericCreate	48	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:422:13:prvInitialiseNewQueue	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:466:14:prvInitialiseMutex	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:496:16:xQueueCreateMutex	32	static
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:512:16:xQueueCreateMutexStatic	40	static
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:589:13:xQueueGiveMutexRecursive	40	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:644:13:xQueueTakeMutexRecursive	40	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:686:16:xQueueCreateCountingSemaphoreStatic	48	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:714:16:xQueueCreateCountingSemaphore	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:740:12:xQueueGenericSend	64	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:950:12:xQueueGenericSendFromISR	72	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1112:12:xQueueGiveFromISR	64	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1277:12:xQueueReceive	56	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1418:12:xQueueSemaphoreTake	64	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1636:12:xQueuePeek	64	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1785:12:xQueueReceiveFromISR	64	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1876:12:xQueuePeekFromISR	56	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1930:13:uxQueueMessagesWaiting	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1946:13:uxQueueSpacesAvailable	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1963:13:uxQueueMessagesWaitingFromISR	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:1975:6:vQueueDelete	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2049:21:prvGetDisinheritPriorityAfterTimeout	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2074:19:prvCopyDataToQueue	32	static
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2153:13:prvCopyDataFromQueue	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2171:13:prvUnlockQueue	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2291:19:prvIsQueueEmpty	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2312:12:xQueueIsQueueEmptyFromISR	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2331:19:prvIsQueueFull	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2352:12:xQueueIsQueueFullFromISR	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2648:7:vQueueAddToRegistry	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2677:14:pcQueueGetName	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c:2705:7:vQueueUnregisterQueue	24	static
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.cyclo b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.cyclo
new file mode 100644
index 0000000..3c2da12
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.cyclo
@@ -0,0 +1,22 @@
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:219:23:xStreamBufferGenericCreate	7
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:283:23:xStreamBufferGenericCreateStatic	10
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:359:6:vStreamBufferDelete	3
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:392:12:xStreamBufferReset	4
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:441:12:xStreamBufferSetTriggerLevel	4
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:470:8:xStreamBufferSpacesAvailable	3
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:494:8:xStreamBufferBytesAvailable	2
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:506:8:xStreamBufferSend	13
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:610:8:xStreamBufferSendFromISR	7
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:661:15:prvWriteMessageToBuffer	5
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:713:8:xStreamBufferReceive	11
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:817:8:xStreamBufferNextMessageLengthBytes	5
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:861:8:xStreamBufferReceiveFromISR	7
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:918:15:prvReadMessageFromBuffer	3
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:970:12:xStreamBufferIsEmpty	3
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:993:12:xStreamBufferIsFull	4
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:1028:12:xStreamBufferSendCompletedFromISR	3
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:1058:12:xStreamBufferReceiveCompletedFromISR	3
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:1088:15:prvWriteBytesToBuffer	6
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:1134:15:prvReadBytesFromBuffer	7
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:1189:15:prvBytesInBuffer	2
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:1209:13:prvInitialiseNewStreamBuffer	2
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.d b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.d
new file mode 100644
index 0000000..c5439ea
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.d
@@ -0,0 +1,22 @@
+Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o: \
+ ../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/stream_buffer.h
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/stream_buffer.h:
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
new file mode 100644
index 0000000..e5fa17a
Binary files /dev/null and b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o differ
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.su b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.su
new file mode 100644
index 0000000..ea54a6c
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.su
@@ -0,0 +1,22 @@
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:219:23:xStreamBufferGenericCreate	56	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:283:23:xStreamBufferGenericCreateStatic	72	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:359:6:vStreamBufferDelete	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:392:12:xStreamBufferReset	40	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:441:12:xStreamBufferSetTriggerLevel	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:470:8:xStreamBufferSpacesAvailable	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:494:8:xStreamBufferBytesAvailable	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:506:8:xStreamBufferSend	72	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:610:8:xStreamBufferSendFromISR	72	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:661:15:prvWriteMessageToBuffer	32	static
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:713:8:xStreamBufferReceive	64	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:817:8:xStreamBufferNextMessageLengthBytes	48	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:861:8:xStreamBufferReceiveFromISR	72	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:918:15:prvReadMessageFromBuffer	40	static
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:970:12:xStreamBufferIsEmpty	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:993:12:xStreamBufferIsFull	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:1028:12:xStreamBufferSendCompletedFromISR	56	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:1058:12:xStreamBufferReceiveCompletedFromISR	56	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:1088:15:prvWriteBytesToBuffer	48	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:1134:15:prvReadBytesFromBuffer	48	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:1189:15:prvBytesInBuffer	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c:1209:13:prvInitialiseNewStreamBuffer	32	static,ignoring_inline_asm
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/subdir.mk b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/subdir.mk
new file mode 100644
index 0000000..9e6cc87
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/subdir.mk
@@ -0,0 +1,45 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../Middlewares/Third_Party/FreeRTOS/Source/croutine.c \
+../Middlewares/Third_Party/FreeRTOS/Source/event_groups.c \
+../Middlewares/Third_Party/FreeRTOS/Source/list.c \
+../Middlewares/Third_Party/FreeRTOS/Source/queue.c \
+../Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c \
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c \
+../Middlewares/Third_Party/FreeRTOS/Source/timers.c 
+
+OBJS += \
+./Middlewares/Third_Party/FreeRTOS/Source/croutine.o \
+./Middlewares/Third_Party/FreeRTOS/Source/event_groups.o \
+./Middlewares/Third_Party/FreeRTOS/Source/list.o \
+./Middlewares/Third_Party/FreeRTOS/Source/queue.o \
+./Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o \
+./Middlewares/Third_Party/FreeRTOS/Source/tasks.o \
+./Middlewares/Third_Party/FreeRTOS/Source/timers.o 
+
+C_DEPS += \
+./Middlewares/Third_Party/FreeRTOS/Source/croutine.d \
+./Middlewares/Third_Party/FreeRTOS/Source/event_groups.d \
+./Middlewares/Third_Party/FreeRTOS/Source/list.d \
+./Middlewares/Third_Party/FreeRTOS/Source/queue.d \
+./Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.d \
+./Middlewares/Third_Party/FreeRTOS/Source/tasks.d \
+./Middlewares/Third_Party/FreeRTOS/Source/timers.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+Middlewares/Third_Party/FreeRTOS/Source/%.o Middlewares/Third_Party/FreeRTOS/Source/%.su Middlewares/Third_Party/FreeRTOS/Source/%.cyclo: ../Middlewares/Third_Party/FreeRTOS/Source/%.c Middlewares/Third_Party/FreeRTOS/Source/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../USB_HOST/App -I../USB_HOST/Target -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/ST/STM32_USB_Host_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-Middlewares-2f-Third_Party-2f-FreeRTOS-2f-Source
+
+clean-Middlewares-2f-Third_Party-2f-FreeRTOS-2f-Source:
+	-$(RM) ./Middlewares/Third_Party/FreeRTOS/Source/croutine.cyclo ./Middlewares/Third_Party/FreeRTOS/Source/croutine.d ./Middlewares/Third_Party/FreeRTOS/Source/croutine.o ./Middlewares/Third_Party/FreeRTOS/Source/croutine.su ./Middlewares/Third_Party/FreeRTOS/Source/event_groups.cyclo ./Middlewares/Third_Party/FreeRTOS/Source/event_groups.d ./Middlewares/Third_Party/FreeRTOS/Source/event_groups.o ./Middlewares/Third_Party/FreeRTOS/Source/event_groups.su ./Middlewares/Third_Party/FreeRTOS/Source/list.cyclo ./Middlewares/Third_Party/FreeRTOS/Source/list.d ./Middlewares/Third_Party/FreeRTOS/Source/list.o ./Middlewares/Third_Party/FreeRTOS/Source/list.su ./Middlewares/Third_Party/FreeRTOS/Source/queue.cyclo ./Middlewares/Third_Party/FreeRTOS/Source/queue.d ./Middlewares/Third_Party/FreeRTOS/Source/queue.o ./Middlewares/Third_Party/FreeRTOS/Source/queue.su ./Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.cyclo ./Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.d ./Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o ./Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.su ./Middlewares/Third_Party/FreeRTOS/Source/tasks.cyclo ./Middlewares/Third_Party/FreeRTOS/Source/tasks.d ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o ./Middlewares/Third_Party/FreeRTOS/Source/tasks.su ./Middlewares/Third_Party/FreeRTOS/Source/timers.cyclo ./Middlewares/Third_Party/FreeRTOS/Source/timers.d ./Middlewares/Third_Party/FreeRTOS/Source/timers.o ./Middlewares/Third_Party/FreeRTOS/Source/timers.su
+
+.PHONY: clean-Middlewares-2f-Third_Party-2f-FreeRTOS-2f-Source
+
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.cyclo b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.cyclo
new file mode 100644
index 0000000..4c3ce2b
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.cyclo
@@ -0,0 +1,56 @@
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:581:15:xTaskCreateStatic	6
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:733:13:xTaskCreate	4
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:824:13:prvInitialiseNewTask	7
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1077:13:prvAddNewTaskToReadyList	7
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1162:7:vTaskDelete	9
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1341:7:vTaskDelay	4
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1478:14:uxTaskPriorityGet	2
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1500:14:uxTaskPriorityGetFromISR	2
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1540:7:vTaskPrioritySet	14
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1704:7:vTaskSuspend	11
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1805:20:prvTaskIsTaskSuspended	5
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1851:7:vTaskResume	6
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1905:13:xTaskResumeFromISR	5
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1975:6:vTaskStartScheduler	4
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2099:6:vTaskEndScheduler	1
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2110:6:vTaskSuspendAll	1
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2194:12:xTaskResumeAll	11
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2304:12:xTaskGetTickCount	1
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2319:12:xTaskGetTickCountFromISR	1
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2350:13:uxTaskGetNumberOfTasks	1
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2358:7:pcTaskGetName	3
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2609:12:xTaskCatchUpTicks	2
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2707:12:xTaskIncrementTick	11
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2881:7:vTaskSetApplicationTaskTag	2
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2910:21:xTaskGetApplicationTaskTag	2
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2934:21:xTaskGetApplicationTaskTagFromISR	2
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2959:13:xTaskCallApplicationTaskHook	3
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2989:6:vTaskSwitchContext	8
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3064:6:vTaskPlaceOnEventList	2
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3081:6:vTaskPlaceOnUnorderedEventList	3
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3138:12:xTaskRemoveFromEventList	4
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3206:6:vTaskRemoveFromUnorderedEventList	4
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3254:6:vTaskSetTimeOutState	2
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3266:6:vTaskInternalSetTimeOutState	1
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3274:12:xTaskCheckForTimeOut	7
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3337:6:vTaskMissedYield	1
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3392:8:prvIdleTask	2
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3607:13:prvInitialiseTaskLists	2
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3639:13:prvCheckTasksWaitingTermination	2
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3887:14:prvDeleteTCB	4
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3943:13:prvResetNextTaskUnblockTime	2
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3969:15:xTaskGetCurrentTaskHandle	1
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3986:13:xTaskGetSchedulerState	3
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4014:13:xTaskPriorityInherit	7
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4104:13:xTaskPriorityDisinherit	8
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4184:7:vTaskPriorityDisinheritAfterTimeout	10
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4602:12:uxTaskResetEventItemValue	1
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4618:15:pvTaskIncrementMutexHeldCount	2
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4635:11:ulTaskNotifyTake	5
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4703:13:xTaskNotifyWait	5
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4783:13:xTaskGenericNotify	13
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4897:13:xTaskGenericNotifyFromISR	15
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:5026:7:vTaskNotifyGiveFromISR	7
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:5112:13:xTaskNotifyStateClear	3
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:5143:11:ulTaskNotifyValueClear	2
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:5177:13:prvAddCurrentTaskToDelayedList	6
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.d b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.d
new file mode 100644
index 0000000..953067b
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.d
@@ -0,0 +1,26 @@
+Middlewares/Third_Party/FreeRTOS/Source/tasks.o: \
+ ../Middlewares/Third_Party/FreeRTOS/Source/tasks.c \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/stack_macros.h
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/stack_macros.h:
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.o b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.o
new file mode 100644
index 0000000..4d41c21
Binary files /dev/null and b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.o differ
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.su b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.su
new file mode 100644
index 0000000..2b12e08
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/tasks.su
@@ -0,0 +1,56 @@
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:581:15:xTaskCreateStatic	64	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:733:13:xTaskCreate	56	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:824:13:prvInitialiseNewTask	40	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1077:13:prvAddNewTaskToReadyList	16	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1162:7:vTaskDelete	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1341:7:vTaskDelay	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1478:14:uxTaskPriorityGet	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1500:14:uxTaskPriorityGetFromISR	40	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1540:7:vTaskPrioritySet	40	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1704:7:vTaskSuspend	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1805:20:prvTaskIsTaskSuspended	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1851:7:vTaskResume	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1905:13:xTaskResumeFromISR	48	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:1975:6:vTaskStartScheduler	48	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2099:6:vTaskEndScheduler	16	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2110:6:vTaskSuspendAll	4	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2194:12:xTaskResumeAll	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2304:12:xTaskGetTickCount	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2319:12:xTaskGetTickCountFromISR	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2350:13:uxTaskGetNumberOfTasks	4	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2358:7:pcTaskGetName	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2609:12:xTaskCatchUpTicks	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2707:12:xTaskIncrementTick	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2881:7:vTaskSetApplicationTaskTag	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2910:21:xTaskGetApplicationTaskTag	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2934:21:xTaskGetApplicationTaskTagFromISR	40	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2959:13:xTaskCallApplicationTaskHook	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:2989:6:vTaskSwitchContext	40	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3064:6:vTaskPlaceOnEventList	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3081:6:vTaskPlaceOnUnorderedEventList	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3138:12:xTaskRemoveFromEventList	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3206:6:vTaskRemoveFromUnorderedEventList	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3254:6:vTaskSetTimeOutState	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3266:6:vTaskInternalSetTimeOutState	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3274:12:xTaskCheckForTimeOut	40	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3337:6:vTaskMissedYield	4	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3392:8:prvIdleTask	16	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3607:13:prvInitialiseTaskLists	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3639:13:prvCheckTasksWaitingTermination	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3887:14:prvDeleteTCB	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3943:13:prvResetNextTaskUnblockTime	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3969:15:xTaskGetCurrentTaskHandle	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:3986:13:xTaskGetSchedulerState	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4014:13:xTaskPriorityInherit	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4104:13:xTaskPriorityDisinherit	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4184:7:vTaskPriorityDisinheritAfterTimeout	40	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4602:12:uxTaskResetEventItemValue	16	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4618:15:pvTaskIncrementMutexHeldCount	4	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4635:11:ulTaskNotifyTake	24	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4703:13:xTaskNotifyWait	32	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4783:13:xTaskGenericNotify	48	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:4897:13:xTaskGenericNotifyFromISR	64	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:5026:7:vTaskNotifyGiveFromISR	48	static,ignoring_inline_asm
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:5112:13:xTaskNotifyStateClear	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:5143:11:ulTaskNotifyValueClear	24	static
+../Middlewares/Third_Party/FreeRTOS/Source/tasks.c:5177:13:prvAddCurrentTaskToDelayedList	24	static
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.cyclo b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.cyclo
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.d b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.d
new file mode 100644
index 0000000..221036f
--- /dev/null
+++ b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.d
@@ -0,0 +1,26 @@
+Middlewares/Third_Party/FreeRTOS/Source/timers.o: \
+ ../Middlewares/Third_Party/FreeRTOS/Source/timers.c \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.o b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.o
new file mode 100644
index 0000000..abdc839
Binary files /dev/null and b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.o differ
diff --git a/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.su b/TrafficLightsPlus/Debug/Middlewares/Third_Party/FreeRTOS/Source/timers.su
new file mode 100644
index 0000000..e69de29
diff --git a/TrafficLightsPlus/Debug/TrafficLightsPlus.elf b/TrafficLightsPlus/Debug/TrafficLightsPlus.elf
new file mode 100755
index 0000000..6f2852d
Binary files /dev/null and b/TrafficLightsPlus/Debug/TrafficLightsPlus.elf differ
diff --git a/TrafficLightsPlus/Debug/TrafficLightsPlus.list b/TrafficLightsPlus/Debug/TrafficLightsPlus.list
new file mode 100644
index 0000000..978ca2f
--- /dev/null
+++ b/TrafficLightsPlus/Debug/TrafficLightsPlus.list
@@ -0,0 +1,20971 @@
+
+TrafficLightsPlus.elf:     file format elf32-littlearm
+
+Sections:
+Idx Name          Size      VMA       LMA       File off  Algn
+  0 .isr_vector   000001ac  08000000  08000000  00001000  2**0
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  1 .text         00007d3c  080001b0  080001b0  000011b0  2**4
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  2 .rodata       00000018  08007eec  08007eec  00008eec  2**2
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  3 .ARM.extab    00000000  08007f04  08007f04  00009010  2**0
+                  CONTENTS, READONLY
+  4 .ARM          00000008  08007f04  08007f04  00008f04  2**2
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  5 .preinit_array 00000000  08007f0c  08007f0c  00009010  2**0
+                  CONTENTS, ALLOC, LOAD, DATA
+  6 .init_array   00000004  08007f0c  08007f0c  00008f0c  2**2
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  7 .fini_array   00000004  08007f10  08007f10  00008f10  2**2
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  8 .data         00000010  20000000  08007f14  00009000  2**2
+                  CONTENTS, ALLOC, LOAD, DATA
+  9 .ccmram       00000000  10000000  10000000  00009010  2**0
+                  CONTENTS
+ 10 .bss          00000798  20000010  20000010  00009010  2**2
+                  ALLOC
+ 11 ._user_heap_stack 00000600  200007a8  200007a8  00009010  2**0
+                  ALLOC
+ 12 .ARM.attributes 00000030  00000000  00000000  00009010  2**0
+                  CONTENTS, READONLY
+ 13 .debug_info   00024ff9  00000000  00000000  00009040  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 14 .debug_abbrev 00004e61  00000000  00000000  0002e039  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 15 .debug_aranges 00002090  00000000  00000000  00032ea0  2**3
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 16 .debug_rnglists 00001956  00000000  00000000  00034f30  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 17 .debug_macro  00028e0e  00000000  00000000  00036886  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 18 .debug_line   00025432  00000000  00000000  0005f694  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 19 .debug_str    000f4153  00000000  00000000  00084ac6  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 20 .comment      00000043  00000000  00000000  00178c19  2**0
+                  CONTENTS, READONLY
+ 21 .debug_frame  00008bf0  00000000  00000000  00178c5c  2**2
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 22 .debug_line_str 00000051  00000000  00000000  0018184c  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+
+Disassembly of section .text:
+
+080001b0 <__do_global_dtors_aux>:
+ 80001b0:	b510      	push	{r4, lr}
+ 80001b2:	4c05      	ldr	r4, [pc, #20]	@ (80001c8 <__do_global_dtors_aux+0x18>)
+ 80001b4:	7823      	ldrb	r3, [r4, #0]
+ 80001b6:	b933      	cbnz	r3, 80001c6 <__do_global_dtors_aux+0x16>
+ 80001b8:	4b04      	ldr	r3, [pc, #16]	@ (80001cc <__do_global_dtors_aux+0x1c>)
+ 80001ba:	b113      	cbz	r3, 80001c2 <__do_global_dtors_aux+0x12>
+ 80001bc:	4804      	ldr	r0, [pc, #16]	@ (80001d0 <__do_global_dtors_aux+0x20>)
+ 80001be:	f3af 8000 	nop.w
+ 80001c2:	2301      	movs	r3, #1
+ 80001c4:	7023      	strb	r3, [r4, #0]
+ 80001c6:	bd10      	pop	{r4, pc}
+ 80001c8:	20000010 	.word	0x20000010
+ 80001cc:	00000000 	.word	0x00000000
+ 80001d0:	08007ed4 	.word	0x08007ed4
+
+080001d4 <frame_dummy>:
+ 80001d4:	b508      	push	{r3, lr}
+ 80001d6:	4b03      	ldr	r3, [pc, #12]	@ (80001e4 <frame_dummy+0x10>)
+ 80001d8:	b11b      	cbz	r3, 80001e2 <frame_dummy+0xe>
+ 80001da:	4903      	ldr	r1, [pc, #12]	@ (80001e8 <frame_dummy+0x14>)
+ 80001dc:	4803      	ldr	r0, [pc, #12]	@ (80001ec <frame_dummy+0x18>)
+ 80001de:	f3af 8000 	nop.w
+ 80001e2:	bd08      	pop	{r3, pc}
+ 80001e4:	00000000 	.word	0x00000000
+ 80001e8:	20000014 	.word	0x20000014
+ 80001ec:	08007ed4 	.word	0x08007ed4
+
+080001f0 <__aeabi_uldivmod>:
+ 80001f0:	b953      	cbnz	r3, 8000208 <__aeabi_uldivmod+0x18>
+ 80001f2:	b94a      	cbnz	r2, 8000208 <__aeabi_uldivmod+0x18>
+ 80001f4:	2900      	cmp	r1, #0
+ 80001f6:	bf08      	it	eq
+ 80001f8:	2800      	cmpeq	r0, #0
+ 80001fa:	bf1c      	itt	ne
+ 80001fc:	f04f 31ff 	movne.w	r1, #4294967295	@ 0xffffffff
+ 8000200:	f04f 30ff 	movne.w	r0, #4294967295	@ 0xffffffff
+ 8000204:	f000 b988 	b.w	8000518 <__aeabi_idiv0>
+ 8000208:	f1ad 0c08 	sub.w	ip, sp, #8
+ 800020c:	e96d ce04 	strd	ip, lr, [sp, #-16]!
+ 8000210:	f000 f806 	bl	8000220 <__udivmoddi4>
+ 8000214:	f8dd e004 	ldr.w	lr, [sp, #4]
+ 8000218:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
+ 800021c:	b004      	add	sp, #16
+ 800021e:	4770      	bx	lr
+
+08000220 <__udivmoddi4>:
+ 8000220:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
+ 8000224:	9d08      	ldr	r5, [sp, #32]
+ 8000226:	468e      	mov	lr, r1
+ 8000228:	4604      	mov	r4, r0
+ 800022a:	4688      	mov	r8, r1
+ 800022c:	2b00      	cmp	r3, #0
+ 800022e:	d14a      	bne.n	80002c6 <__udivmoddi4+0xa6>
+ 8000230:	428a      	cmp	r2, r1
+ 8000232:	4617      	mov	r7, r2
+ 8000234:	d962      	bls.n	80002fc <__udivmoddi4+0xdc>
+ 8000236:	fab2 f682 	clz	r6, r2
+ 800023a:	b14e      	cbz	r6, 8000250 <__udivmoddi4+0x30>
+ 800023c:	f1c6 0320 	rsb	r3, r6, #32
+ 8000240:	fa01 f806 	lsl.w	r8, r1, r6
+ 8000244:	fa20 f303 	lsr.w	r3, r0, r3
+ 8000248:	40b7      	lsls	r7, r6
+ 800024a:	ea43 0808 	orr.w	r8, r3, r8
+ 800024e:	40b4      	lsls	r4, r6
+ 8000250:	ea4f 4e17 	mov.w	lr, r7, lsr #16
+ 8000254:	fa1f fc87 	uxth.w	ip, r7
+ 8000258:	fbb8 f1fe 	udiv	r1, r8, lr
+ 800025c:	0c23      	lsrs	r3, r4, #16
+ 800025e:	fb0e 8811 	mls	r8, lr, r1, r8
+ 8000262:	ea43 4308 	orr.w	r3, r3, r8, lsl #16
+ 8000266:	fb01 f20c 	mul.w	r2, r1, ip
+ 800026a:	429a      	cmp	r2, r3
+ 800026c:	d909      	bls.n	8000282 <__udivmoddi4+0x62>
+ 800026e:	18fb      	adds	r3, r7, r3
+ 8000270:	f101 30ff 	add.w	r0, r1, #4294967295	@ 0xffffffff
+ 8000274:	f080 80ea 	bcs.w	800044c <__udivmoddi4+0x22c>
+ 8000278:	429a      	cmp	r2, r3
+ 800027a:	f240 80e7 	bls.w	800044c <__udivmoddi4+0x22c>
+ 800027e:	3902      	subs	r1, #2
+ 8000280:	443b      	add	r3, r7
+ 8000282:	1a9a      	subs	r2, r3, r2
+ 8000284:	b2a3      	uxth	r3, r4
+ 8000286:	fbb2 f0fe 	udiv	r0, r2, lr
+ 800028a:	fb0e 2210 	mls	r2, lr, r0, r2
+ 800028e:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
+ 8000292:	fb00 fc0c 	mul.w	ip, r0, ip
+ 8000296:	459c      	cmp	ip, r3
+ 8000298:	d909      	bls.n	80002ae <__udivmoddi4+0x8e>
+ 800029a:	18fb      	adds	r3, r7, r3
+ 800029c:	f100 32ff 	add.w	r2, r0, #4294967295	@ 0xffffffff
+ 80002a0:	f080 80d6 	bcs.w	8000450 <__udivmoddi4+0x230>
+ 80002a4:	459c      	cmp	ip, r3
+ 80002a6:	f240 80d3 	bls.w	8000450 <__udivmoddi4+0x230>
+ 80002aa:	443b      	add	r3, r7
+ 80002ac:	3802      	subs	r0, #2
+ 80002ae:	ea40 4001 	orr.w	r0, r0, r1, lsl #16
+ 80002b2:	eba3 030c 	sub.w	r3, r3, ip
+ 80002b6:	2100      	movs	r1, #0
+ 80002b8:	b11d      	cbz	r5, 80002c2 <__udivmoddi4+0xa2>
+ 80002ba:	40f3      	lsrs	r3, r6
+ 80002bc:	2200      	movs	r2, #0
+ 80002be:	e9c5 3200 	strd	r3, r2, [r5]
+ 80002c2:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 80002c6:	428b      	cmp	r3, r1
+ 80002c8:	d905      	bls.n	80002d6 <__udivmoddi4+0xb6>
+ 80002ca:	b10d      	cbz	r5, 80002d0 <__udivmoddi4+0xb0>
+ 80002cc:	e9c5 0100 	strd	r0, r1, [r5]
+ 80002d0:	2100      	movs	r1, #0
+ 80002d2:	4608      	mov	r0, r1
+ 80002d4:	e7f5      	b.n	80002c2 <__udivmoddi4+0xa2>
+ 80002d6:	fab3 f183 	clz	r1, r3
+ 80002da:	2900      	cmp	r1, #0
+ 80002dc:	d146      	bne.n	800036c <__udivmoddi4+0x14c>
+ 80002de:	4573      	cmp	r3, lr
+ 80002e0:	d302      	bcc.n	80002e8 <__udivmoddi4+0xc8>
+ 80002e2:	4282      	cmp	r2, r0
+ 80002e4:	f200 8105 	bhi.w	80004f2 <__udivmoddi4+0x2d2>
+ 80002e8:	1a84      	subs	r4, r0, r2
+ 80002ea:	eb6e 0203 	sbc.w	r2, lr, r3
+ 80002ee:	2001      	movs	r0, #1
+ 80002f0:	4690      	mov	r8, r2
+ 80002f2:	2d00      	cmp	r5, #0
+ 80002f4:	d0e5      	beq.n	80002c2 <__udivmoddi4+0xa2>
+ 80002f6:	e9c5 4800 	strd	r4, r8, [r5]
+ 80002fa:	e7e2      	b.n	80002c2 <__udivmoddi4+0xa2>
+ 80002fc:	2a00      	cmp	r2, #0
+ 80002fe:	f000 8090 	beq.w	8000422 <__udivmoddi4+0x202>
+ 8000302:	fab2 f682 	clz	r6, r2
+ 8000306:	2e00      	cmp	r6, #0
+ 8000308:	f040 80a4 	bne.w	8000454 <__udivmoddi4+0x234>
+ 800030c:	1a8a      	subs	r2, r1, r2
+ 800030e:	0c03      	lsrs	r3, r0, #16
+ 8000310:	ea4f 4e17 	mov.w	lr, r7, lsr #16
+ 8000314:	b280      	uxth	r0, r0
+ 8000316:	b2bc      	uxth	r4, r7
+ 8000318:	2101      	movs	r1, #1
+ 800031a:	fbb2 fcfe 	udiv	ip, r2, lr
+ 800031e:	fb0e 221c 	mls	r2, lr, ip, r2
+ 8000322:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
+ 8000326:	fb04 f20c 	mul.w	r2, r4, ip
+ 800032a:	429a      	cmp	r2, r3
+ 800032c:	d907      	bls.n	800033e <__udivmoddi4+0x11e>
+ 800032e:	18fb      	adds	r3, r7, r3
+ 8000330:	f10c 38ff 	add.w	r8, ip, #4294967295	@ 0xffffffff
+ 8000334:	d202      	bcs.n	800033c <__udivmoddi4+0x11c>
+ 8000336:	429a      	cmp	r2, r3
+ 8000338:	f200 80e0 	bhi.w	80004fc <__udivmoddi4+0x2dc>
+ 800033c:	46c4      	mov	ip, r8
+ 800033e:	1a9b      	subs	r3, r3, r2
+ 8000340:	fbb3 f2fe 	udiv	r2, r3, lr
+ 8000344:	fb0e 3312 	mls	r3, lr, r2, r3
+ 8000348:	ea40 4303 	orr.w	r3, r0, r3, lsl #16
+ 800034c:	fb02 f404 	mul.w	r4, r2, r4
+ 8000350:	429c      	cmp	r4, r3
+ 8000352:	d907      	bls.n	8000364 <__udivmoddi4+0x144>
+ 8000354:	18fb      	adds	r3, r7, r3
+ 8000356:	f102 30ff 	add.w	r0, r2, #4294967295	@ 0xffffffff
+ 800035a:	d202      	bcs.n	8000362 <__udivmoddi4+0x142>
+ 800035c:	429c      	cmp	r4, r3
+ 800035e:	f200 80ca 	bhi.w	80004f6 <__udivmoddi4+0x2d6>
+ 8000362:	4602      	mov	r2, r0
+ 8000364:	1b1b      	subs	r3, r3, r4
+ 8000366:	ea42 400c 	orr.w	r0, r2, ip, lsl #16
+ 800036a:	e7a5      	b.n	80002b8 <__udivmoddi4+0x98>
+ 800036c:	f1c1 0620 	rsb	r6, r1, #32
+ 8000370:	408b      	lsls	r3, r1
+ 8000372:	fa22 f706 	lsr.w	r7, r2, r6
+ 8000376:	431f      	orrs	r7, r3
+ 8000378:	fa0e f401 	lsl.w	r4, lr, r1
+ 800037c:	fa20 f306 	lsr.w	r3, r0, r6
+ 8000380:	fa2e fe06 	lsr.w	lr, lr, r6
+ 8000384:	ea4f 4917 	mov.w	r9, r7, lsr #16
+ 8000388:	4323      	orrs	r3, r4
+ 800038a:	fa00 f801 	lsl.w	r8, r0, r1
+ 800038e:	fa1f fc87 	uxth.w	ip, r7
+ 8000392:	fbbe f0f9 	udiv	r0, lr, r9
+ 8000396:	0c1c      	lsrs	r4, r3, #16
+ 8000398:	fb09 ee10 	mls	lr, r9, r0, lr
+ 800039c:	ea44 440e 	orr.w	r4, r4, lr, lsl #16
+ 80003a0:	fb00 fe0c 	mul.w	lr, r0, ip
+ 80003a4:	45a6      	cmp	lr, r4
+ 80003a6:	fa02 f201 	lsl.w	r2, r2, r1
+ 80003aa:	d909      	bls.n	80003c0 <__udivmoddi4+0x1a0>
+ 80003ac:	193c      	adds	r4, r7, r4
+ 80003ae:	f100 3aff 	add.w	sl, r0, #4294967295	@ 0xffffffff
+ 80003b2:	f080 809c 	bcs.w	80004ee <__udivmoddi4+0x2ce>
+ 80003b6:	45a6      	cmp	lr, r4
+ 80003b8:	f240 8099 	bls.w	80004ee <__udivmoddi4+0x2ce>
+ 80003bc:	3802      	subs	r0, #2
+ 80003be:	443c      	add	r4, r7
+ 80003c0:	eba4 040e 	sub.w	r4, r4, lr
+ 80003c4:	fa1f fe83 	uxth.w	lr, r3
+ 80003c8:	fbb4 f3f9 	udiv	r3, r4, r9
+ 80003cc:	fb09 4413 	mls	r4, r9, r3, r4
+ 80003d0:	ea4e 4404 	orr.w	r4, lr, r4, lsl #16
+ 80003d4:	fb03 fc0c 	mul.w	ip, r3, ip
+ 80003d8:	45a4      	cmp	ip, r4
+ 80003da:	d908      	bls.n	80003ee <__udivmoddi4+0x1ce>
+ 80003dc:	193c      	adds	r4, r7, r4
+ 80003de:	f103 3eff 	add.w	lr, r3, #4294967295	@ 0xffffffff
+ 80003e2:	f080 8082 	bcs.w	80004ea <__udivmoddi4+0x2ca>
+ 80003e6:	45a4      	cmp	ip, r4
+ 80003e8:	d97f      	bls.n	80004ea <__udivmoddi4+0x2ca>
+ 80003ea:	3b02      	subs	r3, #2
+ 80003ec:	443c      	add	r4, r7
+ 80003ee:	ea43 4000 	orr.w	r0, r3, r0, lsl #16
+ 80003f2:	eba4 040c 	sub.w	r4, r4, ip
+ 80003f6:	fba0 ec02 	umull	lr, ip, r0, r2
+ 80003fa:	4564      	cmp	r4, ip
+ 80003fc:	4673      	mov	r3, lr
+ 80003fe:	46e1      	mov	r9, ip
+ 8000400:	d362      	bcc.n	80004c8 <__udivmoddi4+0x2a8>
+ 8000402:	d05f      	beq.n	80004c4 <__udivmoddi4+0x2a4>
+ 8000404:	b15d      	cbz	r5, 800041e <__udivmoddi4+0x1fe>
+ 8000406:	ebb8 0203 	subs.w	r2, r8, r3
+ 800040a:	eb64 0409 	sbc.w	r4, r4, r9
+ 800040e:	fa04 f606 	lsl.w	r6, r4, r6
+ 8000412:	fa22 f301 	lsr.w	r3, r2, r1
+ 8000416:	431e      	orrs	r6, r3
+ 8000418:	40cc      	lsrs	r4, r1
+ 800041a:	e9c5 6400 	strd	r6, r4, [r5]
+ 800041e:	2100      	movs	r1, #0
+ 8000420:	e74f      	b.n	80002c2 <__udivmoddi4+0xa2>
+ 8000422:	fbb1 fcf2 	udiv	ip, r1, r2
+ 8000426:	0c01      	lsrs	r1, r0, #16
+ 8000428:	ea41 410e 	orr.w	r1, r1, lr, lsl #16
+ 800042c:	b280      	uxth	r0, r0
+ 800042e:	ea40 4201 	orr.w	r2, r0, r1, lsl #16
+ 8000432:	463b      	mov	r3, r7
+ 8000434:	4638      	mov	r0, r7
+ 8000436:	463c      	mov	r4, r7
+ 8000438:	46b8      	mov	r8, r7
+ 800043a:	46be      	mov	lr, r7
+ 800043c:	2620      	movs	r6, #32
+ 800043e:	fbb1 f1f7 	udiv	r1, r1, r7
+ 8000442:	eba2 0208 	sub.w	r2, r2, r8
+ 8000446:	ea41 410c 	orr.w	r1, r1, ip, lsl #16
+ 800044a:	e766      	b.n	800031a <__udivmoddi4+0xfa>
+ 800044c:	4601      	mov	r1, r0
+ 800044e:	e718      	b.n	8000282 <__udivmoddi4+0x62>
+ 8000450:	4610      	mov	r0, r2
+ 8000452:	e72c      	b.n	80002ae <__udivmoddi4+0x8e>
+ 8000454:	f1c6 0220 	rsb	r2, r6, #32
+ 8000458:	fa2e f302 	lsr.w	r3, lr, r2
+ 800045c:	40b7      	lsls	r7, r6
+ 800045e:	40b1      	lsls	r1, r6
+ 8000460:	fa20 f202 	lsr.w	r2, r0, r2
+ 8000464:	ea4f 4e17 	mov.w	lr, r7, lsr #16
+ 8000468:	430a      	orrs	r2, r1
+ 800046a:	fbb3 f8fe 	udiv	r8, r3, lr
+ 800046e:	b2bc      	uxth	r4, r7
+ 8000470:	fb0e 3318 	mls	r3, lr, r8, r3
+ 8000474:	0c11      	lsrs	r1, r2, #16
+ 8000476:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
+ 800047a:	fb08 f904 	mul.w	r9, r8, r4
+ 800047e:	40b0      	lsls	r0, r6
+ 8000480:	4589      	cmp	r9, r1
+ 8000482:	ea4f 4310 	mov.w	r3, r0, lsr #16
+ 8000486:	b280      	uxth	r0, r0
+ 8000488:	d93e      	bls.n	8000508 <__udivmoddi4+0x2e8>
+ 800048a:	1879      	adds	r1, r7, r1
+ 800048c:	f108 3cff 	add.w	ip, r8, #4294967295	@ 0xffffffff
+ 8000490:	d201      	bcs.n	8000496 <__udivmoddi4+0x276>
+ 8000492:	4589      	cmp	r9, r1
+ 8000494:	d81f      	bhi.n	80004d6 <__udivmoddi4+0x2b6>
+ 8000496:	eba1 0109 	sub.w	r1, r1, r9
+ 800049a:	fbb1 f9fe 	udiv	r9, r1, lr
+ 800049e:	fb09 f804 	mul.w	r8, r9, r4
+ 80004a2:	fb0e 1119 	mls	r1, lr, r9, r1
+ 80004a6:	b292      	uxth	r2, r2
+ 80004a8:	ea42 4201 	orr.w	r2, r2, r1, lsl #16
+ 80004ac:	4542      	cmp	r2, r8
+ 80004ae:	d229      	bcs.n	8000504 <__udivmoddi4+0x2e4>
+ 80004b0:	18ba      	adds	r2, r7, r2
+ 80004b2:	f109 31ff 	add.w	r1, r9, #4294967295	@ 0xffffffff
+ 80004b6:	d2c4      	bcs.n	8000442 <__udivmoddi4+0x222>
+ 80004b8:	4542      	cmp	r2, r8
+ 80004ba:	d2c2      	bcs.n	8000442 <__udivmoddi4+0x222>
+ 80004bc:	f1a9 0102 	sub.w	r1, r9, #2
+ 80004c0:	443a      	add	r2, r7
+ 80004c2:	e7be      	b.n	8000442 <__udivmoddi4+0x222>
+ 80004c4:	45f0      	cmp	r8, lr
+ 80004c6:	d29d      	bcs.n	8000404 <__udivmoddi4+0x1e4>
+ 80004c8:	ebbe 0302 	subs.w	r3, lr, r2
+ 80004cc:	eb6c 0c07 	sbc.w	ip, ip, r7
+ 80004d0:	3801      	subs	r0, #1
+ 80004d2:	46e1      	mov	r9, ip
+ 80004d4:	e796      	b.n	8000404 <__udivmoddi4+0x1e4>
+ 80004d6:	eba7 0909 	sub.w	r9, r7, r9
+ 80004da:	4449      	add	r1, r9
+ 80004dc:	f1a8 0c02 	sub.w	ip, r8, #2
+ 80004e0:	fbb1 f9fe 	udiv	r9, r1, lr
+ 80004e4:	fb09 f804 	mul.w	r8, r9, r4
+ 80004e8:	e7db      	b.n	80004a2 <__udivmoddi4+0x282>
+ 80004ea:	4673      	mov	r3, lr
+ 80004ec:	e77f      	b.n	80003ee <__udivmoddi4+0x1ce>
+ 80004ee:	4650      	mov	r0, sl
+ 80004f0:	e766      	b.n	80003c0 <__udivmoddi4+0x1a0>
+ 80004f2:	4608      	mov	r0, r1
+ 80004f4:	e6fd      	b.n	80002f2 <__udivmoddi4+0xd2>
+ 80004f6:	443b      	add	r3, r7
+ 80004f8:	3a02      	subs	r2, #2
+ 80004fa:	e733      	b.n	8000364 <__udivmoddi4+0x144>
+ 80004fc:	f1ac 0c02 	sub.w	ip, ip, #2
+ 8000500:	443b      	add	r3, r7
+ 8000502:	e71c      	b.n	800033e <__udivmoddi4+0x11e>
+ 8000504:	4649      	mov	r1, r9
+ 8000506:	e79c      	b.n	8000442 <__udivmoddi4+0x222>
+ 8000508:	eba1 0109 	sub.w	r1, r1, r9
+ 800050c:	46c4      	mov	ip, r8
+ 800050e:	fbb1 f9fe 	udiv	r9, r1, lr
+ 8000512:	fb09 f804 	mul.w	r8, r9, r4
+ 8000516:	e7c4      	b.n	80004a2 <__udivmoddi4+0x282>
+
+08000518 <__aeabi_idiv0>:
+ 8000518:	4770      	bx	lr
+ 800051a:	bf00      	nop
+
+0800051c <breadboard>:
+#include "breadboard.h"
+
+// HAL_GPIO_WritePin(LED_EXT_GPIO_Port, LED_EXT_Pin, GPIO_PIN_RESET);
+void
+breadboard(int traffSPD)
+{
+ 800051c:	b580      	push	{r7, lr}
+ 800051e:	b082      	sub	sp, #8
+ 8000520:	af00      	add	r7, sp, #0
+ 8000522:	6078      	str	r0, [r7, #4]
+	// Traffic Light
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, RedLight_Pin, GPIO_PIN_RESET);
+ 8000524:	2200      	movs	r2, #0
+ 8000526:	2104      	movs	r1, #4
+ 8000528:	4815      	ldr	r0, [pc, #84]	@ (8000580 <breadboard+0x64>)
+ 800052a:	f001 fd55 	bl	8001fd8 <HAL_GPIO_WritePin>
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, RedLight_Pin, GPIO_PIN_SET);
+ 800052e:	2201      	movs	r2, #1
+ 8000530:	2104      	movs	r1, #4
+ 8000532:	4813      	ldr	r0, [pc, #76]	@ (8000580 <breadboard+0x64>)
+ 8000534:	f001 fd50 	bl	8001fd8 <HAL_GPIO_WritePin>
+	HAL_Delay(traffSPD);
+ 8000538:	687b      	ldr	r3, [r7, #4]
+ 800053a:	4618      	mov	r0, r3
+ 800053c:	f001 f892 	bl	8001664 <HAL_Delay>
+
+	HAL_GPIO_WritePin(RedLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_RESET);
+ 8000540:	2200      	movs	r2, #0
+ 8000542:	2108      	movs	r1, #8
+ 8000544:	480e      	ldr	r0, [pc, #56]	@ (8000580 <breadboard+0x64>)
+ 8000546:	f001 fd47 	bl	8001fd8 <HAL_GPIO_WritePin>
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, YellowLight_Pin, GPIO_PIN_SET);
+ 800054a:	2201      	movs	r2, #1
+ 800054c:	2108      	movs	r1, #8
+ 800054e:	480c      	ldr	r0, [pc, #48]	@ (8000580 <breadboard+0x64>)
+ 8000550:	f001 fd42 	bl	8001fd8 <HAL_GPIO_WritePin>
+	HAL_Delay(traffSPD);
+ 8000554:	687b      	ldr	r3, [r7, #4]
+ 8000556:	4618      	mov	r0, r3
+ 8000558:	f001 f884 	bl	8001664 <HAL_Delay>
+
+	HAL_GPIO_WritePin(YellowLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_RESET);
+ 800055c:	2200      	movs	r2, #0
+ 800055e:	2110      	movs	r1, #16
+ 8000560:	4807      	ldr	r0, [pc, #28]	@ (8000580 <breadboard+0x64>)
+ 8000562:	f001 fd39 	bl	8001fd8 <HAL_GPIO_WritePin>
+	HAL_GPIO_WritePin(GreenLight_GPIO_Port, GreenLight_Pin, GPIO_PIN_SET);
+ 8000566:	2201      	movs	r2, #1
+ 8000568:	2110      	movs	r1, #16
+ 800056a:	4805      	ldr	r0, [pc, #20]	@ (8000580 <breadboard+0x64>)
+ 800056c:	f001 fd34 	bl	8001fd8 <HAL_GPIO_WritePin>
+	HAL_Delay(traffSPD);
+ 8000570:	687b      	ldr	r3, [r7, #4]
+ 8000572:	4618      	mov	r0, r3
+ 8000574:	f001 f876 	bl	8001664 <HAL_Delay>
+
+	// Walk signal
+
+	// Light dimmer
+}
+ 8000578:	bf00      	nop
+ 800057a:	3708      	adds	r7, #8
+ 800057c:	46bd      	mov	sp, r7
+ 800057e:	bd80      	pop	{r7, pc}
+ 8000580:	40021000 	.word	0x40021000
+
+08000584 <vApplicationStackOverflowHook>:
+}
+/* USER CODE END 2 */
+
+/* USER CODE BEGIN 4 */
+__weak void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName)
+{
+ 8000584:	b480      	push	{r7}
+ 8000586:	b083      	sub	sp, #12
+ 8000588:	af00      	add	r7, sp, #0
+ 800058a:	6078      	str	r0, [r7, #4]
+ 800058c:	6039      	str	r1, [r7, #0]
+   /* Run time stack overflow checking is performed if
+   configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is
+   called if a stack overflow is detected. */
+}
+ 800058e:	bf00      	nop
+ 8000590:	370c      	adds	r7, #12
+ 8000592:	46bd      	mov	sp, r7
+ 8000594:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000598:	4770      	bx	lr
+
+0800059a <main>:
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+ 800059a:	b580      	push	{r7, lr}
+ 800059c:	af00      	add	r7, sp, #0
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+ 800059e:	f001 f81f 	bl	80015e0 <HAL_Init>
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+ 80005a2:	f000 f817 	bl	80005d4 <SystemClock_Config>
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+ 80005a6:	f000 fa85 	bl	8000ab4 <MX_GPIO_Init>
+  MX_CRC_Init();
+ 80005aa:	f000 f87d 	bl	80006a8 <MX_CRC_Init>
+  MX_DMA2D_Init();
+ 80005ae:	f000 f88f 	bl	80006d0 <MX_DMA2D_Init>
+  MX_FMC_Init();
+ 80005b2:	f000 fa2f 	bl	8000a14 <MX_FMC_Init>
+  MX_I2C3_Init();
+ 80005b6:	f000 f8bd 	bl	8000734 <MX_I2C3_Init>
+  MX_LTDC_Init();
+ 80005ba:	f000 f8fb 	bl	80007b4 <MX_LTDC_Init>
+  MX_SPI5_Init();
+ 80005be:	f000 f979 	bl	80008b4 <MX_SPI5_Init>
+  MX_TIM1_Init();
+ 80005c2:	f000 f9ad 	bl	8000920 <MX_TIM1_Init>
+  MX_USART1_UART_Init();
+ 80005c6:	f000 f9fb 	bl	80009c0 <MX_USART1_UART_Init>
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+	  breadboard(333);
+ 80005ca:	f240 104d 	movw	r0, #333	@ 0x14d
+ 80005ce:	f7ff ffa5 	bl	800051c <breadboard>
+ 80005d2:	e7fa      	b.n	80005ca <main+0x30>
+
+080005d4 <SystemClock_Config>:
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+ 80005d4:	b580      	push	{r7, lr}
+ 80005d6:	b094      	sub	sp, #80	@ 0x50
+ 80005d8:	af00      	add	r7, sp, #0
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ 80005da:	f107 0320 	add.w	r3, r7, #32
+ 80005de:	2230      	movs	r2, #48	@ 0x30
+ 80005e0:	2100      	movs	r1, #0
+ 80005e2:	4618      	mov	r0, r3
+ 80005e4:	f007 fc3c 	bl	8007e60 <memset>
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ 80005e8:	f107 030c 	add.w	r3, r7, #12
+ 80005ec:	2200      	movs	r2, #0
+ 80005ee:	601a      	str	r2, [r3, #0]
+ 80005f0:	605a      	str	r2, [r3, #4]
+ 80005f2:	609a      	str	r2, [r3, #8]
+ 80005f4:	60da      	str	r2, [r3, #12]
+ 80005f6:	611a      	str	r2, [r3, #16]
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+ 80005f8:	2300      	movs	r3, #0
+ 80005fa:	60bb      	str	r3, [r7, #8]
+ 80005fc:	4b28      	ldr	r3, [pc, #160]	@ (80006a0 <SystemClock_Config+0xcc>)
+ 80005fe:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8000600:	4a27      	ldr	r2, [pc, #156]	@ (80006a0 <SystemClock_Config+0xcc>)
+ 8000602:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
+ 8000606:	6413      	str	r3, [r2, #64]	@ 0x40
+ 8000608:	4b25      	ldr	r3, [pc, #148]	@ (80006a0 <SystemClock_Config+0xcc>)
+ 800060a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 800060c:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
+ 8000610:	60bb      	str	r3, [r7, #8]
+ 8000612:	68bb      	ldr	r3, [r7, #8]
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
+ 8000614:	2300      	movs	r3, #0
+ 8000616:	607b      	str	r3, [r7, #4]
+ 8000618:	4b22      	ldr	r3, [pc, #136]	@ (80006a4 <SystemClock_Config+0xd0>)
+ 800061a:	681b      	ldr	r3, [r3, #0]
+ 800061c:	f423 4340 	bic.w	r3, r3, #49152	@ 0xc000
+ 8000620:	4a20      	ldr	r2, [pc, #128]	@ (80006a4 <SystemClock_Config+0xd0>)
+ 8000622:	f443 4380 	orr.w	r3, r3, #16384	@ 0x4000
+ 8000626:	6013      	str	r3, [r2, #0]
+ 8000628:	4b1e      	ldr	r3, [pc, #120]	@ (80006a4 <SystemClock_Config+0xd0>)
+ 800062a:	681b      	ldr	r3, [r3, #0]
+ 800062c:	f403 4340 	and.w	r3, r3, #49152	@ 0xc000
+ 8000630:	607b      	str	r3, [r7, #4]
+ 8000632:	687b      	ldr	r3, [r7, #4]
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ 8000634:	2301      	movs	r3, #1
+ 8000636:	623b      	str	r3, [r7, #32]
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ 8000638:	f44f 3380 	mov.w	r3, #65536	@ 0x10000
+ 800063c:	627b      	str	r3, [r7, #36]	@ 0x24
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ 800063e:	2302      	movs	r3, #2
+ 8000640:	63bb      	str	r3, [r7, #56]	@ 0x38
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ 8000642:	f44f 0380 	mov.w	r3, #4194304	@ 0x400000
+ 8000646:	63fb      	str	r3, [r7, #60]	@ 0x3c
+  RCC_OscInitStruct.PLL.PLLM = 4;
+ 8000648:	2304      	movs	r3, #4
+ 800064a:	643b      	str	r3, [r7, #64]	@ 0x40
+  RCC_OscInitStruct.PLL.PLLN = 72;
+ 800064c:	2348      	movs	r3, #72	@ 0x48
+ 800064e:	647b      	str	r3, [r7, #68]	@ 0x44
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ 8000650:	2302      	movs	r3, #2
+ 8000652:	64bb      	str	r3, [r7, #72]	@ 0x48
+  RCC_OscInitStruct.PLL.PLLQ = 3;
+ 8000654:	2303      	movs	r3, #3
+ 8000656:	64fb      	str	r3, [r7, #76]	@ 0x4c
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ 8000658:	f107 0320 	add.w	r3, r7, #32
+ 800065c:	4618      	mov	r0, r3
+ 800065e:	f003 ff4b 	bl	80044f8 <HAL_RCC_OscConfig>
+ 8000662:	4603      	mov	r3, r0
+ 8000664:	2b00      	cmp	r3, #0
+ 8000666:	d001      	beq.n	800066c <SystemClock_Config+0x98>
+  {
+    Error_Handler();
+ 8000668:	f000 fb5a 	bl	8000d20 <Error_Handler>
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ 800066c:	230f      	movs	r3, #15
+ 800066e:	60fb      	str	r3, [r7, #12]
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ 8000670:	2302      	movs	r3, #2
+ 8000672:	613b      	str	r3, [r7, #16]
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ 8000674:	2300      	movs	r3, #0
+ 8000676:	617b      	str	r3, [r7, #20]
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+ 8000678:	f44f 5380 	mov.w	r3, #4096	@ 0x1000
+ 800067c:	61bb      	str	r3, [r7, #24]
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ 800067e:	2300      	movs	r3, #0
+ 8000680:	61fb      	str	r3, [r7, #28]
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+ 8000682:	f107 030c 	add.w	r3, r7, #12
+ 8000686:	2102      	movs	r1, #2
+ 8000688:	4618      	mov	r0, r3
+ 800068a:	f004 f9ad 	bl	80049e8 <HAL_RCC_ClockConfig>
+ 800068e:	4603      	mov	r3, r0
+ 8000690:	2b00      	cmp	r3, #0
+ 8000692:	d001      	beq.n	8000698 <SystemClock_Config+0xc4>
+  {
+    Error_Handler();
+ 8000694:	f000 fb44 	bl	8000d20 <Error_Handler>
+  }
+}
+ 8000698:	bf00      	nop
+ 800069a:	3750      	adds	r7, #80	@ 0x50
+ 800069c:	46bd      	mov	sp, r7
+ 800069e:	bd80      	pop	{r7, pc}
+ 80006a0:	40023800 	.word	0x40023800
+ 80006a4:	40007000 	.word	0x40007000
+
+080006a8 <MX_CRC_Init>:
+  * @brief CRC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_CRC_Init(void)
+{
+ 80006a8:	b580      	push	{r7, lr}
+ 80006aa:	af00      	add	r7, sp, #0
+  /* USER CODE END CRC_Init 0 */
+
+  /* USER CODE BEGIN CRC_Init 1 */
+
+  /* USER CODE END CRC_Init 1 */
+  hcrc.Instance = CRC;
+ 80006ac:	4b06      	ldr	r3, [pc, #24]	@ (80006c8 <MX_CRC_Init+0x20>)
+ 80006ae:	4a07      	ldr	r2, [pc, #28]	@ (80006cc <MX_CRC_Init+0x24>)
+ 80006b0:	601a      	str	r2, [r3, #0]
+  if (HAL_CRC_Init(&hcrc) != HAL_OK)
+ 80006b2:	4805      	ldr	r0, [pc, #20]	@ (80006c8 <MX_CRC_Init+0x20>)
+ 80006b4:	f001 f8dc 	bl	8001870 <HAL_CRC_Init>
+ 80006b8:	4603      	mov	r3, r0
+ 80006ba:	2b00      	cmp	r3, #0
+ 80006bc:	d001      	beq.n	80006c2 <MX_CRC_Init+0x1a>
+  {
+    Error_Handler();
+ 80006be:	f000 fb2f 	bl	8000d20 <Error_Handler>
+  }
+  /* USER CODE BEGIN CRC_Init 2 */
+
+  /* USER CODE END CRC_Init 2 */
+
+}
+ 80006c2:	bf00      	nop
+ 80006c4:	bd80      	pop	{r7, pc}
+ 80006c6:	bf00      	nop
+ 80006c8:	2000002c 	.word	0x2000002c
+ 80006cc:	40023000 	.word	0x40023000
+
+080006d0 <MX_DMA2D_Init>:
+  * @brief DMA2D Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DMA2D_Init(void)
+{
+ 80006d0:	b580      	push	{r7, lr}
+ 80006d2:	af00      	add	r7, sp, #0
+  /* USER CODE END DMA2D_Init 0 */
+
+  /* USER CODE BEGIN DMA2D_Init 1 */
+
+  /* USER CODE END DMA2D_Init 1 */
+  hdma2d.Instance = DMA2D;
+ 80006d4:	4b15      	ldr	r3, [pc, #84]	@ (800072c <MX_DMA2D_Init+0x5c>)
+ 80006d6:	4a16      	ldr	r2, [pc, #88]	@ (8000730 <MX_DMA2D_Init+0x60>)
+ 80006d8:	601a      	str	r2, [r3, #0]
+  hdma2d.Init.Mode = DMA2D_M2M;
+ 80006da:	4b14      	ldr	r3, [pc, #80]	@ (800072c <MX_DMA2D_Init+0x5c>)
+ 80006dc:	2200      	movs	r2, #0
+ 80006de:	605a      	str	r2, [r3, #4]
+  hdma2d.Init.ColorMode = DMA2D_OUTPUT_ARGB8888;
+ 80006e0:	4b12      	ldr	r3, [pc, #72]	@ (800072c <MX_DMA2D_Init+0x5c>)
+ 80006e2:	2200      	movs	r2, #0
+ 80006e4:	609a      	str	r2, [r3, #8]
+  hdma2d.Init.OutputOffset = 0;
+ 80006e6:	4b11      	ldr	r3, [pc, #68]	@ (800072c <MX_DMA2D_Init+0x5c>)
+ 80006e8:	2200      	movs	r2, #0
+ 80006ea:	60da      	str	r2, [r3, #12]
+  hdma2d.LayerCfg[1].InputOffset = 0;
+ 80006ec:	4b0f      	ldr	r3, [pc, #60]	@ (800072c <MX_DMA2D_Init+0x5c>)
+ 80006ee:	2200      	movs	r2, #0
+ 80006f0:	629a      	str	r2, [r3, #40]	@ 0x28
+  hdma2d.LayerCfg[1].InputColorMode = DMA2D_INPUT_ARGB8888;
+ 80006f2:	4b0e      	ldr	r3, [pc, #56]	@ (800072c <MX_DMA2D_Init+0x5c>)
+ 80006f4:	2200      	movs	r2, #0
+ 80006f6:	62da      	str	r2, [r3, #44]	@ 0x2c
+  hdma2d.LayerCfg[1].AlphaMode = DMA2D_NO_MODIF_ALPHA;
+ 80006f8:	4b0c      	ldr	r3, [pc, #48]	@ (800072c <MX_DMA2D_Init+0x5c>)
+ 80006fa:	2200      	movs	r2, #0
+ 80006fc:	631a      	str	r2, [r3, #48]	@ 0x30
+  hdma2d.LayerCfg[1].InputAlpha = 0;
+ 80006fe:	4b0b      	ldr	r3, [pc, #44]	@ (800072c <MX_DMA2D_Init+0x5c>)
+ 8000700:	2200      	movs	r2, #0
+ 8000702:	635a      	str	r2, [r3, #52]	@ 0x34
+  if (HAL_DMA2D_Init(&hdma2d) != HAL_OK)
+ 8000704:	4809      	ldr	r0, [pc, #36]	@ (800072c <MX_DMA2D_Init+0x5c>)
+ 8000706:	f001 f8cf 	bl	80018a8 <HAL_DMA2D_Init>
+ 800070a:	4603      	mov	r3, r0
+ 800070c:	2b00      	cmp	r3, #0
+ 800070e:	d001      	beq.n	8000714 <MX_DMA2D_Init+0x44>
+  {
+    Error_Handler();
+ 8000710:	f000 fb06 	bl	8000d20 <Error_Handler>
+  }
+  if (HAL_DMA2D_ConfigLayer(&hdma2d, 1) != HAL_OK)
+ 8000714:	2101      	movs	r1, #1
+ 8000716:	4805      	ldr	r0, [pc, #20]	@ (800072c <MX_DMA2D_Init+0x5c>)
+ 8000718:	f001 fa20 	bl	8001b5c <HAL_DMA2D_ConfigLayer>
+ 800071c:	4603      	mov	r3, r0
+ 800071e:	2b00      	cmp	r3, #0
+ 8000720:	d001      	beq.n	8000726 <MX_DMA2D_Init+0x56>
+  {
+    Error_Handler();
+ 8000722:	f000 fafd 	bl	8000d20 <Error_Handler>
+  }
+  /* USER CODE BEGIN DMA2D_Init 2 */
+
+  /* USER CODE END DMA2D_Init 2 */
+
+}
+ 8000726:	bf00      	nop
+ 8000728:	bd80      	pop	{r7, pc}
+ 800072a:	bf00      	nop
+ 800072c:	20000034 	.word	0x20000034
+ 8000730:	4002b000 	.word	0x4002b000
+
+08000734 <MX_I2C3_Init>:
+  * @brief I2C3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_I2C3_Init(void)
+{
+ 8000734:	b580      	push	{r7, lr}
+ 8000736:	af00      	add	r7, sp, #0
+  /* USER CODE END I2C3_Init 0 */
+
+  /* USER CODE BEGIN I2C3_Init 1 */
+
+  /* USER CODE END I2C3_Init 1 */
+  hi2c3.Instance = I2C3;
+ 8000738:	4b1b      	ldr	r3, [pc, #108]	@ (80007a8 <MX_I2C3_Init+0x74>)
+ 800073a:	4a1c      	ldr	r2, [pc, #112]	@ (80007ac <MX_I2C3_Init+0x78>)
+ 800073c:	601a      	str	r2, [r3, #0]
+  hi2c3.Init.ClockSpeed = 100000;
+ 800073e:	4b1a      	ldr	r3, [pc, #104]	@ (80007a8 <MX_I2C3_Init+0x74>)
+ 8000740:	4a1b      	ldr	r2, [pc, #108]	@ (80007b0 <MX_I2C3_Init+0x7c>)
+ 8000742:	605a      	str	r2, [r3, #4]
+  hi2c3.Init.DutyCycle = I2C_DUTYCYCLE_2;
+ 8000744:	4b18      	ldr	r3, [pc, #96]	@ (80007a8 <MX_I2C3_Init+0x74>)
+ 8000746:	2200      	movs	r2, #0
+ 8000748:	609a      	str	r2, [r3, #8]
+  hi2c3.Init.OwnAddress1 = 0;
+ 800074a:	4b17      	ldr	r3, [pc, #92]	@ (80007a8 <MX_I2C3_Init+0x74>)
+ 800074c:	2200      	movs	r2, #0
+ 800074e:	60da      	str	r2, [r3, #12]
+  hi2c3.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
+ 8000750:	4b15      	ldr	r3, [pc, #84]	@ (80007a8 <MX_I2C3_Init+0x74>)
+ 8000752:	f44f 4280 	mov.w	r2, #16384	@ 0x4000
+ 8000756:	611a      	str	r2, [r3, #16]
+  hi2c3.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
+ 8000758:	4b13      	ldr	r3, [pc, #76]	@ (80007a8 <MX_I2C3_Init+0x74>)
+ 800075a:	2200      	movs	r2, #0
+ 800075c:	615a      	str	r2, [r3, #20]
+  hi2c3.Init.OwnAddress2 = 0;
+ 800075e:	4b12      	ldr	r3, [pc, #72]	@ (80007a8 <MX_I2C3_Init+0x74>)
+ 8000760:	2200      	movs	r2, #0
+ 8000762:	619a      	str	r2, [r3, #24]
+  hi2c3.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
+ 8000764:	4b10      	ldr	r3, [pc, #64]	@ (80007a8 <MX_I2C3_Init+0x74>)
+ 8000766:	2200      	movs	r2, #0
+ 8000768:	61da      	str	r2, [r3, #28]
+  hi2c3.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
+ 800076a:	4b0f      	ldr	r3, [pc, #60]	@ (80007a8 <MX_I2C3_Init+0x74>)
+ 800076c:	2200      	movs	r2, #0
+ 800076e:	621a      	str	r2, [r3, #32]
+  if (HAL_I2C_Init(&hi2c3) != HAL_OK)
+ 8000770:	480d      	ldr	r0, [pc, #52]	@ (80007a8 <MX_I2C3_Init+0x74>)
+ 8000772:	f003 f9f1 	bl	8003b58 <HAL_I2C_Init>
+ 8000776:	4603      	mov	r3, r0
+ 8000778:	2b00      	cmp	r3, #0
+ 800077a:	d001      	beq.n	8000780 <MX_I2C3_Init+0x4c>
+  {
+    Error_Handler();
+ 800077c:	f000 fad0 	bl	8000d20 <Error_Handler>
+  }
+
+  /** Configure Analogue filter
+  */
+  if (HAL_I2CEx_ConfigAnalogFilter(&hi2c3, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
+ 8000780:	2100      	movs	r1, #0
+ 8000782:	4809      	ldr	r0, [pc, #36]	@ (80007a8 <MX_I2C3_Init+0x74>)
+ 8000784:	f003 fb2c 	bl	8003de0 <HAL_I2CEx_ConfigAnalogFilter>
+ 8000788:	4603      	mov	r3, r0
+ 800078a:	2b00      	cmp	r3, #0
+ 800078c:	d001      	beq.n	8000792 <MX_I2C3_Init+0x5e>
+  {
+    Error_Handler();
+ 800078e:	f000 fac7 	bl	8000d20 <Error_Handler>
+  }
+
+  /** Configure Digital filter
+  */
+  if (HAL_I2CEx_ConfigDigitalFilter(&hi2c3, 0) != HAL_OK)
+ 8000792:	2100      	movs	r1, #0
+ 8000794:	4804      	ldr	r0, [pc, #16]	@ (80007a8 <MX_I2C3_Init+0x74>)
+ 8000796:	f003 fb5f 	bl	8003e58 <HAL_I2CEx_ConfigDigitalFilter>
+ 800079a:	4603      	mov	r3, r0
+ 800079c:	2b00      	cmp	r3, #0
+ 800079e:	d001      	beq.n	80007a4 <MX_I2C3_Init+0x70>
+  {
+    Error_Handler();
+ 80007a0:	f000 fabe 	bl	8000d20 <Error_Handler>
+  }
+  /* USER CODE BEGIN I2C3_Init 2 */
+
+  /* USER CODE END I2C3_Init 2 */
+
+}
+ 80007a4:	bf00      	nop
+ 80007a6:	bd80      	pop	{r7, pc}
+ 80007a8:	20000074 	.word	0x20000074
+ 80007ac:	40005c00 	.word	0x40005c00
+ 80007b0:	000186a0 	.word	0x000186a0
+
+080007b4 <MX_LTDC_Init>:
+  * @brief LTDC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_LTDC_Init(void)
+{
+ 80007b4:	b580      	push	{r7, lr}
+ 80007b6:	b08e      	sub	sp, #56	@ 0x38
+ 80007b8:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN LTDC_Init 0 */
+
+  /* USER CODE END LTDC_Init 0 */
+
+  LTDC_LayerCfgTypeDef pLayerCfg = {0};
+ 80007ba:	1d3b      	adds	r3, r7, #4
+ 80007bc:	2234      	movs	r2, #52	@ 0x34
+ 80007be:	2100      	movs	r1, #0
+ 80007c0:	4618      	mov	r0, r3
+ 80007c2:	f007 fb4d 	bl	8007e60 <memset>
+
+  /* USER CODE BEGIN LTDC_Init 1 */
+
+  /* USER CODE END LTDC_Init 1 */
+  hltdc.Instance = LTDC;
+ 80007c6:	4b39      	ldr	r3, [pc, #228]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 80007c8:	4a39      	ldr	r2, [pc, #228]	@ (80008b0 <MX_LTDC_Init+0xfc>)
+ 80007ca:	601a      	str	r2, [r3, #0]
+  hltdc.Init.HSPolarity = LTDC_HSPOLARITY_AL;
+ 80007cc:	4b37      	ldr	r3, [pc, #220]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 80007ce:	2200      	movs	r2, #0
+ 80007d0:	605a      	str	r2, [r3, #4]
+  hltdc.Init.VSPolarity = LTDC_VSPOLARITY_AL;
+ 80007d2:	4b36      	ldr	r3, [pc, #216]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 80007d4:	2200      	movs	r2, #0
+ 80007d6:	609a      	str	r2, [r3, #8]
+  hltdc.Init.DEPolarity = LTDC_DEPOLARITY_AL;
+ 80007d8:	4b34      	ldr	r3, [pc, #208]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 80007da:	2200      	movs	r2, #0
+ 80007dc:	60da      	str	r2, [r3, #12]
+  hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
+ 80007de:	4b33      	ldr	r3, [pc, #204]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 80007e0:	2200      	movs	r2, #0
+ 80007e2:	611a      	str	r2, [r3, #16]
+  hltdc.Init.HorizontalSync = 9;
+ 80007e4:	4b31      	ldr	r3, [pc, #196]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 80007e6:	2209      	movs	r2, #9
+ 80007e8:	615a      	str	r2, [r3, #20]
+  hltdc.Init.VerticalSync = 1;
+ 80007ea:	4b30      	ldr	r3, [pc, #192]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 80007ec:	2201      	movs	r2, #1
+ 80007ee:	619a      	str	r2, [r3, #24]
+  hltdc.Init.AccumulatedHBP = 29;
+ 80007f0:	4b2e      	ldr	r3, [pc, #184]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 80007f2:	221d      	movs	r2, #29
+ 80007f4:	61da      	str	r2, [r3, #28]
+  hltdc.Init.AccumulatedVBP = 3;
+ 80007f6:	4b2d      	ldr	r3, [pc, #180]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 80007f8:	2203      	movs	r2, #3
+ 80007fa:	621a      	str	r2, [r3, #32]
+  hltdc.Init.AccumulatedActiveW = 269;
+ 80007fc:	4b2b      	ldr	r3, [pc, #172]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 80007fe:	f240 120d 	movw	r2, #269	@ 0x10d
+ 8000802:	625a      	str	r2, [r3, #36]	@ 0x24
+  hltdc.Init.AccumulatedActiveH = 323;
+ 8000804:	4b29      	ldr	r3, [pc, #164]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 8000806:	f240 1243 	movw	r2, #323	@ 0x143
+ 800080a:	629a      	str	r2, [r3, #40]	@ 0x28
+  hltdc.Init.TotalWidth = 279;
+ 800080c:	4b27      	ldr	r3, [pc, #156]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 800080e:	f240 1217 	movw	r2, #279	@ 0x117
+ 8000812:	62da      	str	r2, [r3, #44]	@ 0x2c
+  hltdc.Init.TotalHeigh = 327;
+ 8000814:	4b25      	ldr	r3, [pc, #148]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 8000816:	f240 1247 	movw	r2, #327	@ 0x147
+ 800081a:	631a      	str	r2, [r3, #48]	@ 0x30
+  hltdc.Init.Backcolor.Blue = 0;
+ 800081c:	4b23      	ldr	r3, [pc, #140]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 800081e:	2200      	movs	r2, #0
+ 8000820:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
+  hltdc.Init.Backcolor.Green = 0;
+ 8000824:	4b21      	ldr	r3, [pc, #132]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 8000826:	2200      	movs	r2, #0
+ 8000828:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35
+  hltdc.Init.Backcolor.Red = 0;
+ 800082c:	4b1f      	ldr	r3, [pc, #124]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 800082e:	2200      	movs	r2, #0
+ 8000830:	f883 2036 	strb.w	r2, [r3, #54]	@ 0x36
+  if (HAL_LTDC_Init(&hltdc) != HAL_OK)
+ 8000834:	481d      	ldr	r0, [pc, #116]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 8000836:	f003 fb4e 	bl	8003ed6 <HAL_LTDC_Init>
+ 800083a:	4603      	mov	r3, r0
+ 800083c:	2b00      	cmp	r3, #0
+ 800083e:	d001      	beq.n	8000844 <MX_LTDC_Init+0x90>
+  {
+    Error_Handler();
+ 8000840:	f000 fa6e 	bl	8000d20 <Error_Handler>
+  }
+  pLayerCfg.WindowX0 = 0;
+ 8000844:	2300      	movs	r3, #0
+ 8000846:	607b      	str	r3, [r7, #4]
+  pLayerCfg.WindowX1 = 240;
+ 8000848:	23f0      	movs	r3, #240	@ 0xf0
+ 800084a:	60bb      	str	r3, [r7, #8]
+  pLayerCfg.WindowY0 = 0;
+ 800084c:	2300      	movs	r3, #0
+ 800084e:	60fb      	str	r3, [r7, #12]
+  pLayerCfg.WindowY1 = 320;
+ 8000850:	f44f 73a0 	mov.w	r3, #320	@ 0x140
+ 8000854:	613b      	str	r3, [r7, #16]
+  pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_RGB565;
+ 8000856:	2302      	movs	r3, #2
+ 8000858:	617b      	str	r3, [r7, #20]
+  pLayerCfg.Alpha = 255;
+ 800085a:	23ff      	movs	r3, #255	@ 0xff
+ 800085c:	61bb      	str	r3, [r7, #24]
+  pLayerCfg.Alpha0 = 0;
+ 800085e:	2300      	movs	r3, #0
+ 8000860:	61fb      	str	r3, [r7, #28]
+  pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA;
+ 8000862:	f44f 63c0 	mov.w	r3, #1536	@ 0x600
+ 8000866:	623b      	str	r3, [r7, #32]
+  pLayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA;
+ 8000868:	2307      	movs	r3, #7
+ 800086a:	627b      	str	r3, [r7, #36]	@ 0x24
+  pLayerCfg.FBStartAdress = 0xD0000000;
+ 800086c:	f04f 4350 	mov.w	r3, #3489660928	@ 0xd0000000
+ 8000870:	62bb      	str	r3, [r7, #40]	@ 0x28
+  pLayerCfg.ImageWidth = 240;
+ 8000872:	23f0      	movs	r3, #240	@ 0xf0
+ 8000874:	62fb      	str	r3, [r7, #44]	@ 0x2c
+  pLayerCfg.ImageHeight = 320;
+ 8000876:	f44f 73a0 	mov.w	r3, #320	@ 0x140
+ 800087a:	633b      	str	r3, [r7, #48]	@ 0x30
+  pLayerCfg.Backcolor.Blue = 0;
+ 800087c:	2300      	movs	r3, #0
+ 800087e:	f887 3034 	strb.w	r3, [r7, #52]	@ 0x34
+  pLayerCfg.Backcolor.Green = 0;
+ 8000882:	2300      	movs	r3, #0
+ 8000884:	f887 3035 	strb.w	r3, [r7, #53]	@ 0x35
+  pLayerCfg.Backcolor.Red = 0;
+ 8000888:	2300      	movs	r3, #0
+ 800088a:	f887 3036 	strb.w	r3, [r7, #54]	@ 0x36
+  if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg, 0) != HAL_OK)
+ 800088e:	1d3b      	adds	r3, r7, #4
+ 8000890:	2200      	movs	r2, #0
+ 8000892:	4619      	mov	r1, r3
+ 8000894:	4805      	ldr	r0, [pc, #20]	@ (80008ac <MX_LTDC_Init+0xf8>)
+ 8000896:	f003 fc7d 	bl	8004194 <HAL_LTDC_ConfigLayer>
+ 800089a:	4603      	mov	r3, r0
+ 800089c:	2b00      	cmp	r3, #0
+ 800089e:	d001      	beq.n	80008a4 <MX_LTDC_Init+0xf0>
+  {
+    Error_Handler();
+ 80008a0:	f000 fa3e 	bl	8000d20 <Error_Handler>
+  }
+  /* USER CODE BEGIN LTDC_Init 2 */
+
+  /* USER CODE END LTDC_Init 2 */
+
+}
+ 80008a4:	bf00      	nop
+ 80008a6:	3738      	adds	r7, #56	@ 0x38
+ 80008a8:	46bd      	mov	sp, r7
+ 80008aa:	bd80      	pop	{r7, pc}
+ 80008ac:	200000c8 	.word	0x200000c8
+ 80008b0:	40016800 	.word	0x40016800
+
+080008b4 <MX_SPI5_Init>:
+  * @brief SPI5 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_SPI5_Init(void)
+{
+ 80008b4:	b580      	push	{r7, lr}
+ 80008b6:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN SPI5_Init 1 */
+
+  /* USER CODE END SPI5_Init 1 */
+  /* SPI5 parameter configuration*/
+  hspi5.Instance = SPI5;
+ 80008b8:	4b17      	ldr	r3, [pc, #92]	@ (8000918 <MX_SPI5_Init+0x64>)
+ 80008ba:	4a18      	ldr	r2, [pc, #96]	@ (800091c <MX_SPI5_Init+0x68>)
+ 80008bc:	601a      	str	r2, [r3, #0]
+  hspi5.Init.Mode = SPI_MODE_MASTER;
+ 80008be:	4b16      	ldr	r3, [pc, #88]	@ (8000918 <MX_SPI5_Init+0x64>)
+ 80008c0:	f44f 7282 	mov.w	r2, #260	@ 0x104
+ 80008c4:	605a      	str	r2, [r3, #4]
+  hspi5.Init.Direction = SPI_DIRECTION_2LINES;
+ 80008c6:	4b14      	ldr	r3, [pc, #80]	@ (8000918 <MX_SPI5_Init+0x64>)
+ 80008c8:	2200      	movs	r2, #0
+ 80008ca:	609a      	str	r2, [r3, #8]
+  hspi5.Init.DataSize = SPI_DATASIZE_8BIT;
+ 80008cc:	4b12      	ldr	r3, [pc, #72]	@ (8000918 <MX_SPI5_Init+0x64>)
+ 80008ce:	2200      	movs	r2, #0
+ 80008d0:	60da      	str	r2, [r3, #12]
+  hspi5.Init.CLKPolarity = SPI_POLARITY_LOW;
+ 80008d2:	4b11      	ldr	r3, [pc, #68]	@ (8000918 <MX_SPI5_Init+0x64>)
+ 80008d4:	2200      	movs	r2, #0
+ 80008d6:	611a      	str	r2, [r3, #16]
+  hspi5.Init.CLKPhase = SPI_PHASE_1EDGE;
+ 80008d8:	4b0f      	ldr	r3, [pc, #60]	@ (8000918 <MX_SPI5_Init+0x64>)
+ 80008da:	2200      	movs	r2, #0
+ 80008dc:	615a      	str	r2, [r3, #20]
+  hspi5.Init.NSS = SPI_NSS_SOFT;
+ 80008de:	4b0e      	ldr	r3, [pc, #56]	@ (8000918 <MX_SPI5_Init+0x64>)
+ 80008e0:	f44f 7200 	mov.w	r2, #512	@ 0x200
+ 80008e4:	619a      	str	r2, [r3, #24]
+  hspi5.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
+ 80008e6:	4b0c      	ldr	r3, [pc, #48]	@ (8000918 <MX_SPI5_Init+0x64>)
+ 80008e8:	2218      	movs	r2, #24
+ 80008ea:	61da      	str	r2, [r3, #28]
+  hspi5.Init.FirstBit = SPI_FIRSTBIT_MSB;
+ 80008ec:	4b0a      	ldr	r3, [pc, #40]	@ (8000918 <MX_SPI5_Init+0x64>)
+ 80008ee:	2200      	movs	r2, #0
+ 80008f0:	621a      	str	r2, [r3, #32]
+  hspi5.Init.TIMode = SPI_TIMODE_DISABLE;
+ 80008f2:	4b09      	ldr	r3, [pc, #36]	@ (8000918 <MX_SPI5_Init+0x64>)
+ 80008f4:	2200      	movs	r2, #0
+ 80008f6:	625a      	str	r2, [r3, #36]	@ 0x24
+  hspi5.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+ 80008f8:	4b07      	ldr	r3, [pc, #28]	@ (8000918 <MX_SPI5_Init+0x64>)
+ 80008fa:	2200      	movs	r2, #0
+ 80008fc:	629a      	str	r2, [r3, #40]	@ 0x28
+  hspi5.Init.CRCPolynomial = 10;
+ 80008fe:	4b06      	ldr	r3, [pc, #24]	@ (8000918 <MX_SPI5_Init+0x64>)
+ 8000900:	220a      	movs	r2, #10
+ 8000902:	62da      	str	r2, [r3, #44]	@ 0x2c
+  if (HAL_SPI_Init(&hspi5) != HAL_OK)
+ 8000904:	4804      	ldr	r0, [pc, #16]	@ (8000918 <MX_SPI5_Init+0x64>)
+ 8000906:	f004 fcb5 	bl	8005274 <HAL_SPI_Init>
+ 800090a:	4603      	mov	r3, r0
+ 800090c:	2b00      	cmp	r3, #0
+ 800090e:	d001      	beq.n	8000914 <MX_SPI5_Init+0x60>
+  {
+    Error_Handler();
+ 8000910:	f000 fa06 	bl	8000d20 <Error_Handler>
+  }
+  /* USER CODE BEGIN SPI5_Init 2 */
+
+  /* USER CODE END SPI5_Init 2 */
+
+}
+ 8000914:	bf00      	nop
+ 8000916:	bd80      	pop	{r7, pc}
+ 8000918:	20000170 	.word	0x20000170
+ 800091c:	40015000 	.word	0x40015000
+
+08000920 <MX_TIM1_Init>:
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+ 8000920:	b580      	push	{r7, lr}
+ 8000922:	b086      	sub	sp, #24
+ 8000924:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ 8000926:	f107 0308 	add.w	r3, r7, #8
+ 800092a:	2200      	movs	r2, #0
+ 800092c:	601a      	str	r2, [r3, #0]
+ 800092e:	605a      	str	r2, [r3, #4]
+ 8000930:	609a      	str	r2, [r3, #8]
+ 8000932:	60da      	str	r2, [r3, #12]
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+ 8000934:	463b      	mov	r3, r7
+ 8000936:	2200      	movs	r2, #0
+ 8000938:	601a      	str	r2, [r3, #0]
+ 800093a:	605a      	str	r2, [r3, #4]
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+ 800093c:	4b1e      	ldr	r3, [pc, #120]	@ (80009b8 <MX_TIM1_Init+0x98>)
+ 800093e:	4a1f      	ldr	r2, [pc, #124]	@ (80009bc <MX_TIM1_Init+0x9c>)
+ 8000940:	601a      	str	r2, [r3, #0]
+  htim1.Init.Prescaler = 0;
+ 8000942:	4b1d      	ldr	r3, [pc, #116]	@ (80009b8 <MX_TIM1_Init+0x98>)
+ 8000944:	2200      	movs	r2, #0
+ 8000946:	605a      	str	r2, [r3, #4]
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 8000948:	4b1b      	ldr	r3, [pc, #108]	@ (80009b8 <MX_TIM1_Init+0x98>)
+ 800094a:	2200      	movs	r2, #0
+ 800094c:	609a      	str	r2, [r3, #8]
+  htim1.Init.Period = 65535;
+ 800094e:	4b1a      	ldr	r3, [pc, #104]	@ (80009b8 <MX_TIM1_Init+0x98>)
+ 8000950:	f64f 72ff 	movw	r2, #65535	@ 0xffff
+ 8000954:	60da      	str	r2, [r3, #12]
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 8000956:	4b18      	ldr	r3, [pc, #96]	@ (80009b8 <MX_TIM1_Init+0x98>)
+ 8000958:	2200      	movs	r2, #0
+ 800095a:	611a      	str	r2, [r3, #16]
+  htim1.Init.RepetitionCounter = 0;
+ 800095c:	4b16      	ldr	r3, [pc, #88]	@ (80009b8 <MX_TIM1_Init+0x98>)
+ 800095e:	2200      	movs	r2, #0
+ 8000960:	615a      	str	r2, [r3, #20]
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 8000962:	4b15      	ldr	r3, [pc, #84]	@ (80009b8 <MX_TIM1_Init+0x98>)
+ 8000964:	2200      	movs	r2, #0
+ 8000966:	619a      	str	r2, [r3, #24]
+  if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+ 8000968:	4813      	ldr	r0, [pc, #76]	@ (80009b8 <MX_TIM1_Init+0x98>)
+ 800096a:	f004 fd0c 	bl	8005386 <HAL_TIM_Base_Init>
+ 800096e:	4603      	mov	r3, r0
+ 8000970:	2b00      	cmp	r3, #0
+ 8000972:	d001      	beq.n	8000978 <MX_TIM1_Init+0x58>
+  {
+    Error_Handler();
+ 8000974:	f000 f9d4 	bl	8000d20 <Error_Handler>
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ 8000978:	f44f 5380 	mov.w	r3, #4096	@ 0x1000
+ 800097c:	60bb      	str	r3, [r7, #8]
+  if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+ 800097e:	f107 0308 	add.w	r3, r7, #8
+ 8000982:	4619      	mov	r1, r3
+ 8000984:	480c      	ldr	r0, [pc, #48]	@ (80009b8 <MX_TIM1_Init+0x98>)
+ 8000986:	f004 fead 	bl	80056e4 <HAL_TIM_ConfigClockSource>
+ 800098a:	4603      	mov	r3, r0
+ 800098c:	2b00      	cmp	r3, #0
+ 800098e:	d001      	beq.n	8000994 <MX_TIM1_Init+0x74>
+  {
+    Error_Handler();
+ 8000990:	f000 f9c6 	bl	8000d20 <Error_Handler>
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+ 8000994:	2300      	movs	r3, #0
+ 8000996:	603b      	str	r3, [r7, #0]
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+ 8000998:	2300      	movs	r3, #0
+ 800099a:	607b      	str	r3, [r7, #4]
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+ 800099c:	463b      	mov	r3, r7
+ 800099e:	4619      	mov	r1, r3
+ 80009a0:	4805      	ldr	r0, [pc, #20]	@ (80009b8 <MX_TIM1_Init+0x98>)
+ 80009a2:	f005 f8cf 	bl	8005b44 <HAL_TIMEx_MasterConfigSynchronization>
+ 80009a6:	4603      	mov	r3, r0
+ 80009a8:	2b00      	cmp	r3, #0
+ 80009aa:	d001      	beq.n	80009b0 <MX_TIM1_Init+0x90>
+  {
+    Error_Handler();
+ 80009ac:	f000 f9b8 	bl	8000d20 <Error_Handler>
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+
+}
+ 80009b0:	bf00      	nop
+ 80009b2:	3718      	adds	r7, #24
+ 80009b4:	46bd      	mov	sp, r7
+ 80009b6:	bd80      	pop	{r7, pc}
+ 80009b8:	200001c8 	.word	0x200001c8
+ 80009bc:	40010000 	.word	0x40010000
+
+080009c0 <MX_USART1_UART_Init>:
+  * @brief USART1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_USART1_UART_Init(void)
+{
+ 80009c0:	b580      	push	{r7, lr}
+ 80009c2:	af00      	add	r7, sp, #0
+  /* USER CODE END USART1_Init 0 */
+
+  /* USER CODE BEGIN USART1_Init 1 */
+
+  /* USER CODE END USART1_Init 1 */
+  huart1.Instance = USART1;
+ 80009c4:	4b11      	ldr	r3, [pc, #68]	@ (8000a0c <MX_USART1_UART_Init+0x4c>)
+ 80009c6:	4a12      	ldr	r2, [pc, #72]	@ (8000a10 <MX_USART1_UART_Init+0x50>)
+ 80009c8:	601a      	str	r2, [r3, #0]
+  huart1.Init.BaudRate = 115200;
+ 80009ca:	4b10      	ldr	r3, [pc, #64]	@ (8000a0c <MX_USART1_UART_Init+0x4c>)
+ 80009cc:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
+ 80009d0:	605a      	str	r2, [r3, #4]
+  huart1.Init.WordLength = UART_WORDLENGTH_8B;
+ 80009d2:	4b0e      	ldr	r3, [pc, #56]	@ (8000a0c <MX_USART1_UART_Init+0x4c>)
+ 80009d4:	2200      	movs	r2, #0
+ 80009d6:	609a      	str	r2, [r3, #8]
+  huart1.Init.StopBits = UART_STOPBITS_1;
+ 80009d8:	4b0c      	ldr	r3, [pc, #48]	@ (8000a0c <MX_USART1_UART_Init+0x4c>)
+ 80009da:	2200      	movs	r2, #0
+ 80009dc:	60da      	str	r2, [r3, #12]
+  huart1.Init.Parity = UART_PARITY_NONE;
+ 80009de:	4b0b      	ldr	r3, [pc, #44]	@ (8000a0c <MX_USART1_UART_Init+0x4c>)
+ 80009e0:	2200      	movs	r2, #0
+ 80009e2:	611a      	str	r2, [r3, #16]
+  huart1.Init.Mode = UART_MODE_TX_RX;
+ 80009e4:	4b09      	ldr	r3, [pc, #36]	@ (8000a0c <MX_USART1_UART_Init+0x4c>)
+ 80009e6:	220c      	movs	r2, #12
+ 80009e8:	615a      	str	r2, [r3, #20]
+  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ 80009ea:	4b08      	ldr	r3, [pc, #32]	@ (8000a0c <MX_USART1_UART_Init+0x4c>)
+ 80009ec:	2200      	movs	r2, #0
+ 80009ee:	619a      	str	r2, [r3, #24]
+  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
+ 80009f0:	4b06      	ldr	r3, [pc, #24]	@ (8000a0c <MX_USART1_UART_Init+0x4c>)
+ 80009f2:	2200      	movs	r2, #0
+ 80009f4:	61da      	str	r2, [r3, #28]
+  if (HAL_UART_Init(&huart1) != HAL_OK)
+ 80009f6:	4805      	ldr	r0, [pc, #20]	@ (8000a0c <MX_USART1_UART_Init+0x4c>)
+ 80009f8:	f005 f934 	bl	8005c64 <HAL_UART_Init>
+ 80009fc:	4603      	mov	r3, r0
+ 80009fe:	2b00      	cmp	r3, #0
+ 8000a00:	d001      	beq.n	8000a06 <MX_USART1_UART_Init+0x46>
+  {
+    Error_Handler();
+ 8000a02:	f000 f98d 	bl	8000d20 <Error_Handler>
+  }
+  /* USER CODE BEGIN USART1_Init 2 */
+
+  /* USER CODE END USART1_Init 2 */
+
+}
+ 8000a06:	bf00      	nop
+ 8000a08:	bd80      	pop	{r7, pc}
+ 8000a0a:	bf00      	nop
+ 8000a0c:	20000210 	.word	0x20000210
+ 8000a10:	40011000 	.word	0x40011000
+
+08000a14 <MX_FMC_Init>:
+
+/* FMC initialization function */
+static void MX_FMC_Init(void)
+{
+ 8000a14:	b580      	push	{r7, lr}
+ 8000a16:	b088      	sub	sp, #32
+ 8000a18:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN FMC_Init 0 */
+
+  /* USER CODE END FMC_Init 0 */
+
+  FMC_SDRAM_TimingTypeDef SdramTiming = {0};
+ 8000a1a:	1d3b      	adds	r3, r7, #4
+ 8000a1c:	2200      	movs	r2, #0
+ 8000a1e:	601a      	str	r2, [r3, #0]
+ 8000a20:	605a      	str	r2, [r3, #4]
+ 8000a22:	609a      	str	r2, [r3, #8]
+ 8000a24:	60da      	str	r2, [r3, #12]
+ 8000a26:	611a      	str	r2, [r3, #16]
+ 8000a28:	615a      	str	r2, [r3, #20]
+ 8000a2a:	619a      	str	r2, [r3, #24]
+
+  /* USER CODE END FMC_Init 1 */
+
+  /** Perform the SDRAM1 memory initialization sequence
+  */
+  hsdram1.Instance = FMC_SDRAM_DEVICE;
+ 8000a2c:	4b1f      	ldr	r3, [pc, #124]	@ (8000aac <MX_FMC_Init+0x98>)
+ 8000a2e:	4a20      	ldr	r2, [pc, #128]	@ (8000ab0 <MX_FMC_Init+0x9c>)
+ 8000a30:	601a      	str	r2, [r3, #0]
+  /* hsdram1.Init */
+  hsdram1.Init.SDBank = FMC_SDRAM_BANK2;
+ 8000a32:	4b1e      	ldr	r3, [pc, #120]	@ (8000aac <MX_FMC_Init+0x98>)
+ 8000a34:	2201      	movs	r2, #1
+ 8000a36:	605a      	str	r2, [r3, #4]
+  hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_8;
+ 8000a38:	4b1c      	ldr	r3, [pc, #112]	@ (8000aac <MX_FMC_Init+0x98>)
+ 8000a3a:	2200      	movs	r2, #0
+ 8000a3c:	609a      	str	r2, [r3, #8]
+  hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_12;
+ 8000a3e:	4b1b      	ldr	r3, [pc, #108]	@ (8000aac <MX_FMC_Init+0x98>)
+ 8000a40:	2204      	movs	r2, #4
+ 8000a42:	60da      	str	r2, [r3, #12]
+  hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_16;
+ 8000a44:	4b19      	ldr	r3, [pc, #100]	@ (8000aac <MX_FMC_Init+0x98>)
+ 8000a46:	2210      	movs	r2, #16
+ 8000a48:	611a      	str	r2, [r3, #16]
+  hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
+ 8000a4a:	4b18      	ldr	r3, [pc, #96]	@ (8000aac <MX_FMC_Init+0x98>)
+ 8000a4c:	2240      	movs	r2, #64	@ 0x40
+ 8000a4e:	615a      	str	r2, [r3, #20]
+  hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
+ 8000a50:	4b16      	ldr	r3, [pc, #88]	@ (8000aac <MX_FMC_Init+0x98>)
+ 8000a52:	f44f 72c0 	mov.w	r2, #384	@ 0x180
+ 8000a56:	619a      	str	r2, [r3, #24]
+  hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
+ 8000a58:	4b14      	ldr	r3, [pc, #80]	@ (8000aac <MX_FMC_Init+0x98>)
+ 8000a5a:	2200      	movs	r2, #0
+ 8000a5c:	61da      	str	r2, [r3, #28]
+  hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
+ 8000a5e:	4b13      	ldr	r3, [pc, #76]	@ (8000aac <MX_FMC_Init+0x98>)
+ 8000a60:	f44f 6200 	mov.w	r2, #2048	@ 0x800
+ 8000a64:	621a      	str	r2, [r3, #32]
+  hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_DISABLE;
+ 8000a66:	4b11      	ldr	r3, [pc, #68]	@ (8000aac <MX_FMC_Init+0x98>)
+ 8000a68:	2200      	movs	r2, #0
+ 8000a6a:	625a      	str	r2, [r3, #36]	@ 0x24
+  hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1;
+ 8000a6c:	4b0f      	ldr	r3, [pc, #60]	@ (8000aac <MX_FMC_Init+0x98>)
+ 8000a6e:	f44f 5200 	mov.w	r2, #8192	@ 0x2000
+ 8000a72:	629a      	str	r2, [r3, #40]	@ 0x28
+  /* SdramTiming */
+  SdramTiming.LoadToActiveDelay = 2;
+ 8000a74:	2302      	movs	r3, #2
+ 8000a76:	607b      	str	r3, [r7, #4]
+  SdramTiming.ExitSelfRefreshDelay = 7;
+ 8000a78:	2307      	movs	r3, #7
+ 8000a7a:	60bb      	str	r3, [r7, #8]
+  SdramTiming.SelfRefreshTime = 4;
+ 8000a7c:	2304      	movs	r3, #4
+ 8000a7e:	60fb      	str	r3, [r7, #12]
+  SdramTiming.RowCycleDelay = 7;
+ 8000a80:	2307      	movs	r3, #7
+ 8000a82:	613b      	str	r3, [r7, #16]
+  SdramTiming.WriteRecoveryTime = 3;
+ 8000a84:	2303      	movs	r3, #3
+ 8000a86:	617b      	str	r3, [r7, #20]
+  SdramTiming.RPDelay = 2;
+ 8000a88:	2302      	movs	r3, #2
+ 8000a8a:	61bb      	str	r3, [r7, #24]
+  SdramTiming.RCDDelay = 2;
+ 8000a8c:	2302      	movs	r3, #2
+ 8000a8e:	61fb      	str	r3, [r7, #28]
+
+  if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
+ 8000a90:	1d3b      	adds	r3, r7, #4
+ 8000a92:	4619      	mov	r1, r3
+ 8000a94:	4805      	ldr	r0, [pc, #20]	@ (8000aac <MX_FMC_Init+0x98>)
+ 8000a96:	f004 fbb9 	bl	800520c <HAL_SDRAM_Init>
+ 8000a9a:	4603      	mov	r3, r0
+ 8000a9c:	2b00      	cmp	r3, #0
+ 8000a9e:	d001      	beq.n	8000aa4 <MX_FMC_Init+0x90>
+  {
+    Error_Handler( );
+ 8000aa0:	f000 f93e 	bl	8000d20 <Error_Handler>
+  }
+
+  /* USER CODE BEGIN FMC_Init 2 */
+
+  /* USER CODE END FMC_Init 2 */
+}
+ 8000aa4:	bf00      	nop
+ 8000aa6:	3720      	adds	r7, #32
+ 8000aa8:	46bd      	mov	sp, r7
+ 8000aaa:	bd80      	pop	{r7, pc}
+ 8000aac:	20000258 	.word	0x20000258
+ 8000ab0:	a0000140 	.word	0xa0000140
+
+08000ab4 <MX_GPIO_Init>:
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+ 8000ab4:	b580      	push	{r7, lr}
+ 8000ab6:	b08e      	sub	sp, #56	@ 0x38
+ 8000ab8:	af00      	add	r7, sp, #0
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 8000aba:	f107 0324 	add.w	r3, r7, #36	@ 0x24
+ 8000abe:	2200      	movs	r2, #0
+ 8000ac0:	601a      	str	r2, [r3, #0]
+ 8000ac2:	605a      	str	r2, [r3, #4]
+ 8000ac4:	609a      	str	r2, [r3, #8]
+ 8000ac6:	60da      	str	r2, [r3, #12]
+ 8000ac8:	611a      	str	r2, [r3, #16]
+  /* USER CODE BEGIN MX_GPIO_Init_1 */
+
+  /* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+ 8000aca:	2300      	movs	r3, #0
+ 8000acc:	623b      	str	r3, [r7, #32]
+ 8000ace:	4b84      	ldr	r3, [pc, #528]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000ad0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000ad2:	4a83      	ldr	r2, [pc, #524]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000ad4:	f043 0310 	orr.w	r3, r3, #16
+ 8000ad8:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000ada:	4b81      	ldr	r3, [pc, #516]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000adc:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000ade:	f003 0310 	and.w	r3, r3, #16
+ 8000ae2:	623b      	str	r3, [r7, #32]
+ 8000ae4:	6a3b      	ldr	r3, [r7, #32]
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+ 8000ae6:	2300      	movs	r3, #0
+ 8000ae8:	61fb      	str	r3, [r7, #28]
+ 8000aea:	4b7d      	ldr	r3, [pc, #500]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000aec:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000aee:	4a7c      	ldr	r2, [pc, #496]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000af0:	f043 0304 	orr.w	r3, r3, #4
+ 8000af4:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000af6:	4b7a      	ldr	r3, [pc, #488]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000af8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000afa:	f003 0304 	and.w	r3, r3, #4
+ 8000afe:	61fb      	str	r3, [r7, #28]
+ 8000b00:	69fb      	ldr	r3, [r7, #28]
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+ 8000b02:	2300      	movs	r3, #0
+ 8000b04:	61bb      	str	r3, [r7, #24]
+ 8000b06:	4b76      	ldr	r3, [pc, #472]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b08:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000b0a:	4a75      	ldr	r2, [pc, #468]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b0c:	f043 0320 	orr.w	r3, r3, #32
+ 8000b10:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000b12:	4b73      	ldr	r3, [pc, #460]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b14:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000b16:	f003 0320 	and.w	r3, r3, #32
+ 8000b1a:	61bb      	str	r3, [r7, #24]
+ 8000b1c:	69bb      	ldr	r3, [r7, #24]
+  __HAL_RCC_GPIOH_CLK_ENABLE();
+ 8000b1e:	2300      	movs	r3, #0
+ 8000b20:	617b      	str	r3, [r7, #20]
+ 8000b22:	4b6f      	ldr	r3, [pc, #444]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b24:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000b26:	4a6e      	ldr	r2, [pc, #440]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b28:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
+ 8000b2c:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000b2e:	4b6c      	ldr	r3, [pc, #432]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b30:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000b32:	f003 0380 	and.w	r3, r3, #128	@ 0x80
+ 8000b36:	617b      	str	r3, [r7, #20]
+ 8000b38:	697b      	ldr	r3, [r7, #20]
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+ 8000b3a:	2300      	movs	r3, #0
+ 8000b3c:	613b      	str	r3, [r7, #16]
+ 8000b3e:	4b68      	ldr	r3, [pc, #416]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b40:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000b42:	4a67      	ldr	r2, [pc, #412]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b44:	f043 0301 	orr.w	r3, r3, #1
+ 8000b48:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000b4a:	4b65      	ldr	r3, [pc, #404]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b4c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000b4e:	f003 0301 	and.w	r3, r3, #1
+ 8000b52:	613b      	str	r3, [r7, #16]
+ 8000b54:	693b      	ldr	r3, [r7, #16]
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+ 8000b56:	2300      	movs	r3, #0
+ 8000b58:	60fb      	str	r3, [r7, #12]
+ 8000b5a:	4b61      	ldr	r3, [pc, #388]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b5c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000b5e:	4a60      	ldr	r2, [pc, #384]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b60:	f043 0302 	orr.w	r3, r3, #2
+ 8000b64:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000b66:	4b5e      	ldr	r3, [pc, #376]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b68:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000b6a:	f003 0302 	and.w	r3, r3, #2
+ 8000b6e:	60fb      	str	r3, [r7, #12]
+ 8000b70:	68fb      	ldr	r3, [r7, #12]
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+ 8000b72:	2300      	movs	r3, #0
+ 8000b74:	60bb      	str	r3, [r7, #8]
+ 8000b76:	4b5a      	ldr	r3, [pc, #360]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b78:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000b7a:	4a59      	ldr	r2, [pc, #356]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b7c:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
+ 8000b80:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000b82:	4b57      	ldr	r3, [pc, #348]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b84:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000b86:	f003 0340 	and.w	r3, r3, #64	@ 0x40
+ 8000b8a:	60bb      	str	r3, [r7, #8]
+ 8000b8c:	68bb      	ldr	r3, [r7, #8]
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+ 8000b8e:	2300      	movs	r3, #0
+ 8000b90:	607b      	str	r3, [r7, #4]
+ 8000b92:	4b53      	ldr	r3, [pc, #332]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b94:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000b96:	4a52      	ldr	r2, [pc, #328]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000b98:	f043 0308 	orr.w	r3, r3, #8
+ 8000b9c:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000b9e:	4b50      	ldr	r3, [pc, #320]	@ (8000ce0 <MX_GPIO_Init+0x22c>)
+ 8000ba0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000ba2:	f003 0308 	and.w	r3, r3, #8
+ 8000ba6:	607b      	str	r3, [r7, #4]
+ 8000ba8:	687b      	ldr	r3, [r7, #4]
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOE, RedLight_Pin|YellowLight_Pin|GreenLight_Pin, GPIO_PIN_RESET);
+ 8000baa:	2200      	movs	r2, #0
+ 8000bac:	211c      	movs	r1, #28
+ 8000bae:	484d      	ldr	r0, [pc, #308]	@ (8000ce4 <MX_GPIO_Init+0x230>)
+ 8000bb0:	f001 fa12 	bl	8001fd8 <HAL_GPIO_WritePin>
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOC, NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin, GPIO_PIN_RESET);
+ 8000bb4:	2200      	movs	r2, #0
+ 8000bb6:	2116      	movs	r1, #22
+ 8000bb8:	484b      	ldr	r0, [pc, #300]	@ (8000ce8 <MX_GPIO_Init+0x234>)
+ 8000bba:	f001 fa0d 	bl	8001fd8 <HAL_GPIO_WritePin>
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(ACP_RST_GPIO_Port, ACP_RST_Pin, GPIO_PIN_RESET);
+ 8000bbe:	2200      	movs	r2, #0
+ 8000bc0:	2180      	movs	r1, #128	@ 0x80
+ 8000bc2:	484a      	ldr	r0, [pc, #296]	@ (8000cec <MX_GPIO_Init+0x238>)
+ 8000bc4:	f001 fa08 	bl	8001fd8 <HAL_GPIO_WritePin>
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOD, RDX_Pin|WRX_DCX_Pin, GPIO_PIN_RESET);
+ 8000bc8:	2200      	movs	r2, #0
+ 8000bca:	f44f 5140 	mov.w	r1, #12288	@ 0x3000
+ 8000bce:	4848      	ldr	r0, [pc, #288]	@ (8000cf0 <MX_GPIO_Init+0x23c>)
+ 8000bd0:	f001 fa02 	bl	8001fd8 <HAL_GPIO_WritePin>
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOG, LD3_Pin|LD4_Pin, GPIO_PIN_RESET);
+ 8000bd4:	2200      	movs	r2, #0
+ 8000bd6:	f44f 41c0 	mov.w	r1, #24576	@ 0x6000
+ 8000bda:	4846      	ldr	r0, [pc, #280]	@ (8000cf4 <MX_GPIO_Init+0x240>)
+ 8000bdc:	f001 f9fc 	bl	8001fd8 <HAL_GPIO_WritePin>
+
+  /*Configure GPIO pins : RedLight_Pin YellowLight_Pin GreenLight_Pin */
+  GPIO_InitStruct.Pin = RedLight_Pin|YellowLight_Pin|GreenLight_Pin;
+ 8000be0:	231c      	movs	r3, #28
+ 8000be2:	627b      	str	r3, [r7, #36]	@ 0x24
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 8000be4:	2301      	movs	r3, #1
+ 8000be6:	62bb      	str	r3, [r7, #40]	@ 0x28
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8000be8:	2300      	movs	r3, #0
+ 8000bea:	62fb      	str	r3, [r7, #44]	@ 0x2c
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8000bec:	2300      	movs	r3, #0
+ 8000bee:	633b      	str	r3, [r7, #48]	@ 0x30
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 8000bf0:	f107 0324 	add.w	r3, r7, #36	@ 0x24
+ 8000bf4:	4619      	mov	r1, r3
+ 8000bf6:	483b      	ldr	r0, [pc, #236]	@ (8000ce4 <MX_GPIO_Init+0x230>)
+ 8000bf8:	f001 f842 	bl	8001c80 <HAL_GPIO_Init>
+
+  /*Configure GPIO pins : NCS_MEMS_SPI_Pin CSX_Pin OTG_FS_PSO_Pin */
+  GPIO_InitStruct.Pin = NCS_MEMS_SPI_Pin|CSX_Pin|OTG_FS_PSO_Pin;
+ 8000bfc:	2316      	movs	r3, #22
+ 8000bfe:	627b      	str	r3, [r7, #36]	@ 0x24
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 8000c00:	2301      	movs	r3, #1
+ 8000c02:	62bb      	str	r3, [r7, #40]	@ 0x28
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8000c04:	2300      	movs	r3, #0
+ 8000c06:	62fb      	str	r3, [r7, #44]	@ 0x2c
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8000c08:	2300      	movs	r3, #0
+ 8000c0a:	633b      	str	r3, [r7, #48]	@ 0x30
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+ 8000c0c:	f107 0324 	add.w	r3, r7, #36	@ 0x24
+ 8000c10:	4619      	mov	r1, r3
+ 8000c12:	4835      	ldr	r0, [pc, #212]	@ (8000ce8 <MX_GPIO_Init+0x234>)
+ 8000c14:	f001 f834 	bl	8001c80 <HAL_GPIO_Init>
+
+  /*Configure GPIO pins : B1_Pin MEMS_INT1_Pin MEMS_INT2_Pin TP_INT1_Pin */
+  GPIO_InitStruct.Pin = B1_Pin|MEMS_INT1_Pin|MEMS_INT2_Pin|TP_INT1_Pin;
+ 8000c18:	f248 0307 	movw	r3, #32775	@ 0x8007
+ 8000c1c:	627b      	str	r3, [r7, #36]	@ 0x24
+  GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
+ 8000c1e:	f44f 1390 	mov.w	r3, #1179648	@ 0x120000
+ 8000c22:	62bb      	str	r3, [r7, #40]	@ 0x28
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8000c24:	2300      	movs	r3, #0
+ 8000c26:	62fb      	str	r3, [r7, #44]	@ 0x2c
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 8000c28:	f107 0324 	add.w	r3, r7, #36	@ 0x24
+ 8000c2c:	4619      	mov	r1, r3
+ 8000c2e:	482f      	ldr	r0, [pc, #188]	@ (8000cec <MX_GPIO_Init+0x238>)
+ 8000c30:	f001 f826 	bl	8001c80 <HAL_GPIO_Init>
+
+  /*Configure GPIO pin : ACP_RST_Pin */
+  GPIO_InitStruct.Pin = ACP_RST_Pin;
+ 8000c34:	2380      	movs	r3, #128	@ 0x80
+ 8000c36:	627b      	str	r3, [r7, #36]	@ 0x24
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 8000c38:	2301      	movs	r3, #1
+ 8000c3a:	62bb      	str	r3, [r7, #40]	@ 0x28
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8000c3c:	2300      	movs	r3, #0
+ 8000c3e:	62fb      	str	r3, [r7, #44]	@ 0x2c
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8000c40:	2300      	movs	r3, #0
+ 8000c42:	633b      	str	r3, [r7, #48]	@ 0x30
+  HAL_GPIO_Init(ACP_RST_GPIO_Port, &GPIO_InitStruct);
+ 8000c44:	f107 0324 	add.w	r3, r7, #36	@ 0x24
+ 8000c48:	4619      	mov	r1, r3
+ 8000c4a:	4828      	ldr	r0, [pc, #160]	@ (8000cec <MX_GPIO_Init+0x238>)
+ 8000c4c:	f001 f818 	bl	8001c80 <HAL_GPIO_Init>
+
+  /*Configure GPIO pin : OTG_FS_OC_Pin */
+  GPIO_InitStruct.Pin = OTG_FS_OC_Pin;
+ 8000c50:	2320      	movs	r3, #32
+ 8000c52:	627b      	str	r3, [r7, #36]	@ 0x24
+  GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
+ 8000c54:	f44f 1390 	mov.w	r3, #1179648	@ 0x120000
+ 8000c58:	62bb      	str	r3, [r7, #40]	@ 0x28
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8000c5a:	2300      	movs	r3, #0
+ 8000c5c:	62fb      	str	r3, [r7, #44]	@ 0x2c
+  HAL_GPIO_Init(OTG_FS_OC_GPIO_Port, &GPIO_InitStruct);
+ 8000c5e:	f107 0324 	add.w	r3, r7, #36	@ 0x24
+ 8000c62:	4619      	mov	r1, r3
+ 8000c64:	4820      	ldr	r0, [pc, #128]	@ (8000ce8 <MX_GPIO_Init+0x234>)
+ 8000c66:	f001 f80b 	bl	8001c80 <HAL_GPIO_Init>
+
+  /*Configure GPIO pin : BOOT1_Pin */
+  GPIO_InitStruct.Pin = BOOT1_Pin;
+ 8000c6a:	2304      	movs	r3, #4
+ 8000c6c:	627b      	str	r3, [r7, #36]	@ 0x24
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 8000c6e:	2300      	movs	r3, #0
+ 8000c70:	62bb      	str	r3, [r7, #40]	@ 0x28
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8000c72:	2300      	movs	r3, #0
+ 8000c74:	62fb      	str	r3, [r7, #44]	@ 0x2c
+  HAL_GPIO_Init(BOOT1_GPIO_Port, &GPIO_InitStruct);
+ 8000c76:	f107 0324 	add.w	r3, r7, #36	@ 0x24
+ 8000c7a:	4619      	mov	r1, r3
+ 8000c7c:	481e      	ldr	r0, [pc, #120]	@ (8000cf8 <MX_GPIO_Init+0x244>)
+ 8000c7e:	f000 ffff 	bl	8001c80 <HAL_GPIO_Init>
+
+  /*Configure GPIO pin : TE_Pin */
+  GPIO_InitStruct.Pin = TE_Pin;
+ 8000c82:	f44f 6300 	mov.w	r3, #2048	@ 0x800
+ 8000c86:	627b      	str	r3, [r7, #36]	@ 0x24
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 8000c88:	2300      	movs	r3, #0
+ 8000c8a:	62bb      	str	r3, [r7, #40]	@ 0x28
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8000c8c:	2300      	movs	r3, #0
+ 8000c8e:	62fb      	str	r3, [r7, #44]	@ 0x2c
+  HAL_GPIO_Init(TE_GPIO_Port, &GPIO_InitStruct);
+ 8000c90:	f107 0324 	add.w	r3, r7, #36	@ 0x24
+ 8000c94:	4619      	mov	r1, r3
+ 8000c96:	4816      	ldr	r0, [pc, #88]	@ (8000cf0 <MX_GPIO_Init+0x23c>)
+ 8000c98:	f000 fff2 	bl	8001c80 <HAL_GPIO_Init>
+
+  /*Configure GPIO pins : RDX_Pin WRX_DCX_Pin */
+  GPIO_InitStruct.Pin = RDX_Pin|WRX_DCX_Pin;
+ 8000c9c:	f44f 5340 	mov.w	r3, #12288	@ 0x3000
+ 8000ca0:	627b      	str	r3, [r7, #36]	@ 0x24
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 8000ca2:	2301      	movs	r3, #1
+ 8000ca4:	62bb      	str	r3, [r7, #40]	@ 0x28
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8000ca6:	2300      	movs	r3, #0
+ 8000ca8:	62fb      	str	r3, [r7, #44]	@ 0x2c
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8000caa:	2300      	movs	r3, #0
+ 8000cac:	633b      	str	r3, [r7, #48]	@ 0x30
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+ 8000cae:	f107 0324 	add.w	r3, r7, #36	@ 0x24
+ 8000cb2:	4619      	mov	r1, r3
+ 8000cb4:	480e      	ldr	r0, [pc, #56]	@ (8000cf0 <MX_GPIO_Init+0x23c>)
+ 8000cb6:	f000 ffe3 	bl	8001c80 <HAL_GPIO_Init>
+
+  /*Configure GPIO pins : LD3_Pin LD4_Pin */
+  GPIO_InitStruct.Pin = LD3_Pin|LD4_Pin;
+ 8000cba:	f44f 43c0 	mov.w	r3, #24576	@ 0x6000
+ 8000cbe:	627b      	str	r3, [r7, #36]	@ 0x24
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 8000cc0:	2301      	movs	r3, #1
+ 8000cc2:	62bb      	str	r3, [r7, #40]	@ 0x28
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8000cc4:	2300      	movs	r3, #0
+ 8000cc6:	62fb      	str	r3, [r7, #44]	@ 0x2c
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8000cc8:	2300      	movs	r3, #0
+ 8000cca:	633b      	str	r3, [r7, #48]	@ 0x30
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+ 8000ccc:	f107 0324 	add.w	r3, r7, #36	@ 0x24
+ 8000cd0:	4619      	mov	r1, r3
+ 8000cd2:	4808      	ldr	r0, [pc, #32]	@ (8000cf4 <MX_GPIO_Init+0x240>)
+ 8000cd4:	f000 ffd4 	bl	8001c80 <HAL_GPIO_Init>
+
+  /* USER CODE BEGIN MX_GPIO_Init_2 */
+
+  /* USER CODE END MX_GPIO_Init_2 */
+}
+ 8000cd8:	bf00      	nop
+ 8000cda:	3738      	adds	r7, #56	@ 0x38
+ 8000cdc:	46bd      	mov	sp, r7
+ 8000cde:	bd80      	pop	{r7, pc}
+ 8000ce0:	40023800 	.word	0x40023800
+ 8000ce4:	40021000 	.word	0x40021000
+ 8000ce8:	40020800 	.word	0x40020800
+ 8000cec:	40020000 	.word	0x40020000
+ 8000cf0:	40020c00 	.word	0x40020c00
+ 8000cf4:	40021800 	.word	0x40021800
+ 8000cf8:	40020400 	.word	0x40020400
+
+08000cfc <HAL_TIM_PeriodElapsedCallback>:
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ 8000cfc:	b580      	push	{r7, lr}
+ 8000cfe:	b082      	sub	sp, #8
+ 8000d00:	af00      	add	r7, sp, #0
+ 8000d02:	6078      	str	r0, [r7, #4]
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6)
+ 8000d04:	687b      	ldr	r3, [r7, #4]
+ 8000d06:	681b      	ldr	r3, [r3, #0]
+ 8000d08:	4a04      	ldr	r2, [pc, #16]	@ (8000d1c <HAL_TIM_PeriodElapsedCallback+0x20>)
+ 8000d0a:	4293      	cmp	r3, r2
+ 8000d0c:	d101      	bne.n	8000d12 <HAL_TIM_PeriodElapsedCallback+0x16>
+  {
+    HAL_IncTick();
+ 8000d0e:	f000 fc89 	bl	8001624 <HAL_IncTick>
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+ 8000d12:	bf00      	nop
+ 8000d14:	3708      	adds	r7, #8
+ 8000d16:	46bd      	mov	sp, r7
+ 8000d18:	bd80      	pop	{r7, pc}
+ 8000d1a:	bf00      	nop
+ 8000d1c:	40001000 	.word	0x40001000
+
+08000d20 <Error_Handler>:
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+ 8000d20:	b480      	push	{r7}
+ 8000d22:	af00      	add	r7, sp, #0
+  \details Disables IRQ interrupts by setting special-purpose register PRIMASK.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __disable_irq(void)
+{
+  __ASM volatile ("cpsid i" : : : "memory");
+ 8000d24:	b672      	cpsid	i
+}
+ 8000d26:	bf00      	nop
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+ 8000d28:	bf00      	nop
+ 8000d2a:	e7fd      	b.n	8000d28 <Error_Handler+0x8>
+
+08000d2c <HAL_MspInit>:
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+ 8000d2c:	b580      	push	{r7, lr}
+ 8000d2e:	b082      	sub	sp, #8
+ 8000d30:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+ 8000d32:	2300      	movs	r3, #0
+ 8000d34:	607b      	str	r3, [r7, #4]
+ 8000d36:	4b12      	ldr	r3, [pc, #72]	@ (8000d80 <HAL_MspInit+0x54>)
+ 8000d38:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 8000d3a:	4a11      	ldr	r2, [pc, #68]	@ (8000d80 <HAL_MspInit+0x54>)
+ 8000d3c:	f443 4380 	orr.w	r3, r3, #16384	@ 0x4000
+ 8000d40:	6453      	str	r3, [r2, #68]	@ 0x44
+ 8000d42:	4b0f      	ldr	r3, [pc, #60]	@ (8000d80 <HAL_MspInit+0x54>)
+ 8000d44:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 8000d46:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
+ 8000d4a:	607b      	str	r3, [r7, #4]
+ 8000d4c:	687b      	ldr	r3, [r7, #4]
+  __HAL_RCC_PWR_CLK_ENABLE();
+ 8000d4e:	2300      	movs	r3, #0
+ 8000d50:	603b      	str	r3, [r7, #0]
+ 8000d52:	4b0b      	ldr	r3, [pc, #44]	@ (8000d80 <HAL_MspInit+0x54>)
+ 8000d54:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8000d56:	4a0a      	ldr	r2, [pc, #40]	@ (8000d80 <HAL_MspInit+0x54>)
+ 8000d58:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
+ 8000d5c:	6413      	str	r3, [r2, #64]	@ 0x40
+ 8000d5e:	4b08      	ldr	r3, [pc, #32]	@ (8000d80 <HAL_MspInit+0x54>)
+ 8000d60:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8000d62:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
+ 8000d66:	603b      	str	r3, [r7, #0]
+ 8000d68:	683b      	ldr	r3, [r7, #0]
+
+  /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+ 8000d6a:	2200      	movs	r2, #0
+ 8000d6c:	210f      	movs	r1, #15
+ 8000d6e:	f06f 0001 	mvn.w	r0, #1
+ 8000d72:	f000 fd53 	bl	800181c <HAL_NVIC_SetPriority>
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+ 8000d76:	bf00      	nop
+ 8000d78:	3708      	adds	r7, #8
+ 8000d7a:	46bd      	mov	sp, r7
+ 8000d7c:	bd80      	pop	{r7, pc}
+ 8000d7e:	bf00      	nop
+ 8000d80:	40023800 	.word	0x40023800
+
+08000d84 <HAL_CRC_MspInit>:
+  * This function configures the hardware resources used in this example
+  * @param hcrc: CRC handle pointer
+  * @retval None
+  */
+void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
+{
+ 8000d84:	b480      	push	{r7}
+ 8000d86:	b085      	sub	sp, #20
+ 8000d88:	af00      	add	r7, sp, #0
+ 8000d8a:	6078      	str	r0, [r7, #4]
+  if(hcrc->Instance==CRC)
+ 8000d8c:	687b      	ldr	r3, [r7, #4]
+ 8000d8e:	681b      	ldr	r3, [r3, #0]
+ 8000d90:	4a0b      	ldr	r2, [pc, #44]	@ (8000dc0 <HAL_CRC_MspInit+0x3c>)
+ 8000d92:	4293      	cmp	r3, r2
+ 8000d94:	d10d      	bne.n	8000db2 <HAL_CRC_MspInit+0x2e>
+  {
+    /* USER CODE BEGIN CRC_MspInit 0 */
+
+    /* USER CODE END CRC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_CRC_CLK_ENABLE();
+ 8000d96:	2300      	movs	r3, #0
+ 8000d98:	60fb      	str	r3, [r7, #12]
+ 8000d9a:	4b0a      	ldr	r3, [pc, #40]	@ (8000dc4 <HAL_CRC_MspInit+0x40>)
+ 8000d9c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000d9e:	4a09      	ldr	r2, [pc, #36]	@ (8000dc4 <HAL_CRC_MspInit+0x40>)
+ 8000da0:	f443 5380 	orr.w	r3, r3, #4096	@ 0x1000
+ 8000da4:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000da6:	4b07      	ldr	r3, [pc, #28]	@ (8000dc4 <HAL_CRC_MspInit+0x40>)
+ 8000da8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000daa:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
+ 8000dae:	60fb      	str	r3, [r7, #12]
+ 8000db0:	68fb      	ldr	r3, [r7, #12]
+
+    /* USER CODE END CRC_MspInit 1 */
+
+  }
+
+}
+ 8000db2:	bf00      	nop
+ 8000db4:	3714      	adds	r7, #20
+ 8000db6:	46bd      	mov	sp, r7
+ 8000db8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000dbc:	4770      	bx	lr
+ 8000dbe:	bf00      	nop
+ 8000dc0:	40023000 	.word	0x40023000
+ 8000dc4:	40023800 	.word	0x40023800
+
+08000dc8 <HAL_DMA2D_MspInit>:
+  * This function configures the hardware resources used in this example
+  * @param hdma2d: DMA2D handle pointer
+  * @retval None
+  */
+void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
+{
+ 8000dc8:	b580      	push	{r7, lr}
+ 8000dca:	b084      	sub	sp, #16
+ 8000dcc:	af00      	add	r7, sp, #0
+ 8000dce:	6078      	str	r0, [r7, #4]
+  if(hdma2d->Instance==DMA2D)
+ 8000dd0:	687b      	ldr	r3, [r7, #4]
+ 8000dd2:	681b      	ldr	r3, [r3, #0]
+ 8000dd4:	4a0e      	ldr	r2, [pc, #56]	@ (8000e10 <HAL_DMA2D_MspInit+0x48>)
+ 8000dd6:	4293      	cmp	r3, r2
+ 8000dd8:	d115      	bne.n	8000e06 <HAL_DMA2D_MspInit+0x3e>
+  {
+    /* USER CODE BEGIN DMA2D_MspInit 0 */
+
+    /* USER CODE END DMA2D_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_DMA2D_CLK_ENABLE();
+ 8000dda:	2300      	movs	r3, #0
+ 8000ddc:	60fb      	str	r3, [r7, #12]
+ 8000dde:	4b0d      	ldr	r3, [pc, #52]	@ (8000e14 <HAL_DMA2D_MspInit+0x4c>)
+ 8000de0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000de2:	4a0c      	ldr	r2, [pc, #48]	@ (8000e14 <HAL_DMA2D_MspInit+0x4c>)
+ 8000de4:	f443 0300 	orr.w	r3, r3, #8388608	@ 0x800000
+ 8000de8:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000dea:	4b0a      	ldr	r3, [pc, #40]	@ (8000e14 <HAL_DMA2D_MspInit+0x4c>)
+ 8000dec:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000dee:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
+ 8000df2:	60fb      	str	r3, [r7, #12]
+ 8000df4:	68fb      	ldr	r3, [r7, #12]
+    /* DMA2D interrupt Init */
+    HAL_NVIC_SetPriority(DMA2D_IRQn, 5, 0);
+ 8000df6:	2200      	movs	r2, #0
+ 8000df8:	2105      	movs	r1, #5
+ 8000dfa:	205a      	movs	r0, #90	@ 0x5a
+ 8000dfc:	f000 fd0e 	bl	800181c <HAL_NVIC_SetPriority>
+    HAL_NVIC_EnableIRQ(DMA2D_IRQn);
+ 8000e00:	205a      	movs	r0, #90	@ 0x5a
+ 8000e02:	f000 fd27 	bl	8001854 <HAL_NVIC_EnableIRQ>
+
+    /* USER CODE END DMA2D_MspInit 1 */
+
+  }
+
+}
+ 8000e06:	bf00      	nop
+ 8000e08:	3710      	adds	r7, #16
+ 8000e0a:	46bd      	mov	sp, r7
+ 8000e0c:	bd80      	pop	{r7, pc}
+ 8000e0e:	bf00      	nop
+ 8000e10:	4002b000 	.word	0x4002b000
+ 8000e14:	40023800 	.word	0x40023800
+
+08000e18 <HAL_I2C_MspInit>:
+  * This function configures the hardware resources used in this example
+  * @param hi2c: I2C handle pointer
+  * @retval None
+  */
+void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
+{
+ 8000e18:	b580      	push	{r7, lr}
+ 8000e1a:	b08a      	sub	sp, #40	@ 0x28
+ 8000e1c:	af00      	add	r7, sp, #0
+ 8000e1e:	6078      	str	r0, [r7, #4]
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 8000e20:	f107 0314 	add.w	r3, r7, #20
+ 8000e24:	2200      	movs	r2, #0
+ 8000e26:	601a      	str	r2, [r3, #0]
+ 8000e28:	605a      	str	r2, [r3, #4]
+ 8000e2a:	609a      	str	r2, [r3, #8]
+ 8000e2c:	60da      	str	r2, [r3, #12]
+ 8000e2e:	611a      	str	r2, [r3, #16]
+  if(hi2c->Instance==I2C3)
+ 8000e30:	687b      	ldr	r3, [r7, #4]
+ 8000e32:	681b      	ldr	r3, [r3, #0]
+ 8000e34:	4a29      	ldr	r2, [pc, #164]	@ (8000edc <HAL_I2C_MspInit+0xc4>)
+ 8000e36:	4293      	cmp	r3, r2
+ 8000e38:	d14b      	bne.n	8000ed2 <HAL_I2C_MspInit+0xba>
+  {
+    /* USER CODE BEGIN I2C3_MspInit 0 */
+
+    /* USER CODE END I2C3_MspInit 0 */
+
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+ 8000e3a:	2300      	movs	r3, #0
+ 8000e3c:	613b      	str	r3, [r7, #16]
+ 8000e3e:	4b28      	ldr	r3, [pc, #160]	@ (8000ee0 <HAL_I2C_MspInit+0xc8>)
+ 8000e40:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000e42:	4a27      	ldr	r2, [pc, #156]	@ (8000ee0 <HAL_I2C_MspInit+0xc8>)
+ 8000e44:	f043 0304 	orr.w	r3, r3, #4
+ 8000e48:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000e4a:	4b25      	ldr	r3, [pc, #148]	@ (8000ee0 <HAL_I2C_MspInit+0xc8>)
+ 8000e4c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000e4e:	f003 0304 	and.w	r3, r3, #4
+ 8000e52:	613b      	str	r3, [r7, #16]
+ 8000e54:	693b      	ldr	r3, [r7, #16]
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+ 8000e56:	2300      	movs	r3, #0
+ 8000e58:	60fb      	str	r3, [r7, #12]
+ 8000e5a:	4b21      	ldr	r3, [pc, #132]	@ (8000ee0 <HAL_I2C_MspInit+0xc8>)
+ 8000e5c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000e5e:	4a20      	ldr	r2, [pc, #128]	@ (8000ee0 <HAL_I2C_MspInit+0xc8>)
+ 8000e60:	f043 0301 	orr.w	r3, r3, #1
+ 8000e64:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000e66:	4b1e      	ldr	r3, [pc, #120]	@ (8000ee0 <HAL_I2C_MspInit+0xc8>)
+ 8000e68:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000e6a:	f003 0301 	and.w	r3, r3, #1
+ 8000e6e:	60fb      	str	r3, [r7, #12]
+ 8000e70:	68fb      	ldr	r3, [r7, #12]
+    /**I2C3 GPIO Configuration
+    PC9     ------> I2C3_SDA
+    PA8     ------> I2C3_SCL
+    */
+    GPIO_InitStruct.Pin = I2C3_SDA_Pin;
+ 8000e72:	f44f 7300 	mov.w	r3, #512	@ 0x200
+ 8000e76:	617b      	str	r3, [r7, #20]
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+ 8000e78:	2312      	movs	r3, #18
+ 8000e7a:	61bb      	str	r3, [r7, #24]
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+ 8000e7c:	2301      	movs	r3, #1
+ 8000e7e:	61fb      	str	r3, [r7, #28]
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8000e80:	2300      	movs	r3, #0
+ 8000e82:	623b      	str	r3, [r7, #32]
+    GPIO_InitStruct.Alternate = GPIO_AF4_I2C3;
+ 8000e84:	2304      	movs	r3, #4
+ 8000e86:	627b      	str	r3, [r7, #36]	@ 0x24
+    HAL_GPIO_Init(I2C3_SDA_GPIO_Port, &GPIO_InitStruct);
+ 8000e88:	f107 0314 	add.w	r3, r7, #20
+ 8000e8c:	4619      	mov	r1, r3
+ 8000e8e:	4815      	ldr	r0, [pc, #84]	@ (8000ee4 <HAL_I2C_MspInit+0xcc>)
+ 8000e90:	f000 fef6 	bl	8001c80 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = I2C3_SCL_Pin;
+ 8000e94:	f44f 7380 	mov.w	r3, #256	@ 0x100
+ 8000e98:	617b      	str	r3, [r7, #20]
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+ 8000e9a:	2312      	movs	r3, #18
+ 8000e9c:	61bb      	str	r3, [r7, #24]
+    GPIO_InitStruct.Pull = GPIO_PULLUP;
+ 8000e9e:	2301      	movs	r3, #1
+ 8000ea0:	61fb      	str	r3, [r7, #28]
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8000ea2:	2300      	movs	r3, #0
+ 8000ea4:	623b      	str	r3, [r7, #32]
+    GPIO_InitStruct.Alternate = GPIO_AF4_I2C3;
+ 8000ea6:	2304      	movs	r3, #4
+ 8000ea8:	627b      	str	r3, [r7, #36]	@ 0x24
+    HAL_GPIO_Init(I2C3_SCL_GPIO_Port, &GPIO_InitStruct);
+ 8000eaa:	f107 0314 	add.w	r3, r7, #20
+ 8000eae:	4619      	mov	r1, r3
+ 8000eb0:	480d      	ldr	r0, [pc, #52]	@ (8000ee8 <HAL_I2C_MspInit+0xd0>)
+ 8000eb2:	f000 fee5 	bl	8001c80 <HAL_GPIO_Init>
+
+    /* Peripheral clock enable */
+    __HAL_RCC_I2C3_CLK_ENABLE();
+ 8000eb6:	2300      	movs	r3, #0
+ 8000eb8:	60bb      	str	r3, [r7, #8]
+ 8000eba:	4b09      	ldr	r3, [pc, #36]	@ (8000ee0 <HAL_I2C_MspInit+0xc8>)
+ 8000ebc:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8000ebe:	4a08      	ldr	r2, [pc, #32]	@ (8000ee0 <HAL_I2C_MspInit+0xc8>)
+ 8000ec0:	f443 0300 	orr.w	r3, r3, #8388608	@ 0x800000
+ 8000ec4:	6413      	str	r3, [r2, #64]	@ 0x40
+ 8000ec6:	4b06      	ldr	r3, [pc, #24]	@ (8000ee0 <HAL_I2C_MspInit+0xc8>)
+ 8000ec8:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8000eca:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
+ 8000ece:	60bb      	str	r3, [r7, #8]
+ 8000ed0:	68bb      	ldr	r3, [r7, #8]
+
+    /* USER CODE END I2C3_MspInit 1 */
+
+  }
+
+}
+ 8000ed2:	bf00      	nop
+ 8000ed4:	3728      	adds	r7, #40	@ 0x28
+ 8000ed6:	46bd      	mov	sp, r7
+ 8000ed8:	bd80      	pop	{r7, pc}
+ 8000eda:	bf00      	nop
+ 8000edc:	40005c00 	.word	0x40005c00
+ 8000ee0:	40023800 	.word	0x40023800
+ 8000ee4:	40020800 	.word	0x40020800
+ 8000ee8:	40020000 	.word	0x40020000
+
+08000eec <HAL_LTDC_MspInit>:
+  * This function configures the hardware resources used in this example
+  * @param hltdc: LTDC handle pointer
+  * @retval None
+  */
+void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
+{
+ 8000eec:	b580      	push	{r7, lr}
+ 8000eee:	b09a      	sub	sp, #104	@ 0x68
+ 8000ef0:	af00      	add	r7, sp, #0
+ 8000ef2:	6078      	str	r0, [r7, #4]
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 8000ef4:	f107 0354 	add.w	r3, r7, #84	@ 0x54
+ 8000ef8:	2200      	movs	r2, #0
+ 8000efa:	601a      	str	r2, [r3, #0]
+ 8000efc:	605a      	str	r2, [r3, #4]
+ 8000efe:	609a      	str	r2, [r3, #8]
+ 8000f00:	60da      	str	r2, [r3, #12]
+ 8000f02:	611a      	str	r2, [r3, #16]
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+ 8000f04:	f107 0324 	add.w	r3, r7, #36	@ 0x24
+ 8000f08:	2230      	movs	r2, #48	@ 0x30
+ 8000f0a:	2100      	movs	r1, #0
+ 8000f0c:	4618      	mov	r0, r3
+ 8000f0e:	f006 ffa7 	bl	8007e60 <memset>
+  if(hltdc->Instance==LTDC)
+ 8000f12:	687b      	ldr	r3, [r7, #4]
+ 8000f14:	681b      	ldr	r3, [r3, #0]
+ 8000f16:	4a85      	ldr	r2, [pc, #532]	@ (800112c <HAL_LTDC_MspInit+0x240>)
+ 8000f18:	4293      	cmp	r3, r2
+ 8000f1a:	f040 8102 	bne.w	8001122 <HAL_LTDC_MspInit+0x236>
+
+    /* USER CODE END LTDC_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
+ 8000f1e:	2308      	movs	r3, #8
+ 8000f20:	627b      	str	r3, [r7, #36]	@ 0x24
+    PeriphClkInitStruct.PLLSAI.PLLSAIN = 50;
+ 8000f22:	2332      	movs	r3, #50	@ 0x32
+ 8000f24:	637b      	str	r3, [r7, #52]	@ 0x34
+    PeriphClkInitStruct.PLLSAI.PLLSAIR = 2;
+ 8000f26:	2302      	movs	r3, #2
+ 8000f28:	63fb      	str	r3, [r7, #60]	@ 0x3c
+    PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2;
+ 8000f2a:	2300      	movs	r3, #0
+ 8000f2c:	64bb      	str	r3, [r7, #72]	@ 0x48
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ 8000f2e:	f107 0324 	add.w	r3, r7, #36	@ 0x24
+ 8000f32:	4618      	mov	r0, r3
+ 8000f34:	f003 ffaa 	bl	8004e8c <HAL_RCCEx_PeriphCLKConfig>
+ 8000f38:	4603      	mov	r3, r0
+ 8000f3a:	2b00      	cmp	r3, #0
+ 8000f3c:	d001      	beq.n	8000f42 <HAL_LTDC_MspInit+0x56>
+    {
+      Error_Handler();
+ 8000f3e:	f7ff feef 	bl	8000d20 <Error_Handler>
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_LTDC_CLK_ENABLE();
+ 8000f42:	2300      	movs	r3, #0
+ 8000f44:	623b      	str	r3, [r7, #32]
+ 8000f46:	4b7a      	ldr	r3, [pc, #488]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000f48:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 8000f4a:	4a79      	ldr	r2, [pc, #484]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000f4c:	f043 6380 	orr.w	r3, r3, #67108864	@ 0x4000000
+ 8000f50:	6453      	str	r3, [r2, #68]	@ 0x44
+ 8000f52:	4b77      	ldr	r3, [pc, #476]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000f54:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 8000f56:	f003 6380 	and.w	r3, r3, #67108864	@ 0x4000000
+ 8000f5a:	623b      	str	r3, [r7, #32]
+ 8000f5c:	6a3b      	ldr	r3, [r7, #32]
+
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+ 8000f5e:	2300      	movs	r3, #0
+ 8000f60:	61fb      	str	r3, [r7, #28]
+ 8000f62:	4b73      	ldr	r3, [pc, #460]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000f64:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000f66:	4a72      	ldr	r2, [pc, #456]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000f68:	f043 0320 	orr.w	r3, r3, #32
+ 8000f6c:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000f6e:	4b70      	ldr	r3, [pc, #448]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000f70:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000f72:	f003 0320 	and.w	r3, r3, #32
+ 8000f76:	61fb      	str	r3, [r7, #28]
+ 8000f78:	69fb      	ldr	r3, [r7, #28]
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+ 8000f7a:	2300      	movs	r3, #0
+ 8000f7c:	61bb      	str	r3, [r7, #24]
+ 8000f7e:	4b6c      	ldr	r3, [pc, #432]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000f80:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000f82:	4a6b      	ldr	r2, [pc, #428]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000f84:	f043 0301 	orr.w	r3, r3, #1
+ 8000f88:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000f8a:	4b69      	ldr	r3, [pc, #420]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000f8c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000f8e:	f003 0301 	and.w	r3, r3, #1
+ 8000f92:	61bb      	str	r3, [r7, #24]
+ 8000f94:	69bb      	ldr	r3, [r7, #24]
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+ 8000f96:	2300      	movs	r3, #0
+ 8000f98:	617b      	str	r3, [r7, #20]
+ 8000f9a:	4b65      	ldr	r3, [pc, #404]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000f9c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000f9e:	4a64      	ldr	r2, [pc, #400]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000fa0:	f043 0302 	orr.w	r3, r3, #2
+ 8000fa4:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000fa6:	4b62      	ldr	r3, [pc, #392]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000fa8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000faa:	f003 0302 	and.w	r3, r3, #2
+ 8000fae:	617b      	str	r3, [r7, #20]
+ 8000fb0:	697b      	ldr	r3, [r7, #20]
+    __HAL_RCC_GPIOG_CLK_ENABLE();
+ 8000fb2:	2300      	movs	r3, #0
+ 8000fb4:	613b      	str	r3, [r7, #16]
+ 8000fb6:	4b5e      	ldr	r3, [pc, #376]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000fb8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000fba:	4a5d      	ldr	r2, [pc, #372]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000fbc:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
+ 8000fc0:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000fc2:	4b5b      	ldr	r3, [pc, #364]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000fc4:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000fc6:	f003 0340 	and.w	r3, r3, #64	@ 0x40
+ 8000fca:	613b      	str	r3, [r7, #16]
+ 8000fcc:	693b      	ldr	r3, [r7, #16]
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+ 8000fce:	2300      	movs	r3, #0
+ 8000fd0:	60fb      	str	r3, [r7, #12]
+ 8000fd2:	4b57      	ldr	r3, [pc, #348]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000fd4:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000fd6:	4a56      	ldr	r2, [pc, #344]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000fd8:	f043 0304 	orr.w	r3, r3, #4
+ 8000fdc:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000fde:	4b54      	ldr	r3, [pc, #336]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000fe0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000fe2:	f003 0304 	and.w	r3, r3, #4
+ 8000fe6:	60fb      	str	r3, [r7, #12]
+ 8000fe8:	68fb      	ldr	r3, [r7, #12]
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+ 8000fea:	2300      	movs	r3, #0
+ 8000fec:	60bb      	str	r3, [r7, #8]
+ 8000fee:	4b50      	ldr	r3, [pc, #320]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000ff0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000ff2:	4a4f      	ldr	r2, [pc, #316]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000ff4:	f043 0308 	orr.w	r3, r3, #8
+ 8000ff8:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000ffa:	4b4d      	ldr	r3, [pc, #308]	@ (8001130 <HAL_LTDC_MspInit+0x244>)
+ 8000ffc:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000ffe:	f003 0308 	and.w	r3, r3, #8
+ 8001002:	60bb      	str	r3, [r7, #8]
+ 8001004:	68bb      	ldr	r3, [r7, #8]
+    PG11     ------> LTDC_B3
+    PG12     ------> LTDC_B4
+    PB8     ------> LTDC_B6
+    PB9     ------> LTDC_B7
+    */
+    GPIO_InitStruct.Pin = ENABLE_Pin;
+ 8001006:	f44f 6380 	mov.w	r3, #1024	@ 0x400
+ 800100a:	657b      	str	r3, [r7, #84]	@ 0x54
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 800100c:	2302      	movs	r3, #2
+ 800100e:	65bb      	str	r3, [r7, #88]	@ 0x58
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001010:	2300      	movs	r3, #0
+ 8001012:	65fb      	str	r3, [r7, #92]	@ 0x5c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8001014:	2300      	movs	r3, #0
+ 8001016:	663b      	str	r3, [r7, #96]	@ 0x60
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+ 8001018:	230e      	movs	r3, #14
+ 800101a:	667b      	str	r3, [r7, #100]	@ 0x64
+    HAL_GPIO_Init(ENABLE_GPIO_Port, &GPIO_InitStruct);
+ 800101c:	f107 0354 	add.w	r3, r7, #84	@ 0x54
+ 8001020:	4619      	mov	r1, r3
+ 8001022:	4844      	ldr	r0, [pc, #272]	@ (8001134 <HAL_LTDC_MspInit+0x248>)
+ 8001024:	f000 fe2c 	bl	8001c80 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = B5_Pin|VSYNC_Pin|G2_Pin|R4_Pin
+ 8001028:	f641 0358 	movw	r3, #6232	@ 0x1858
+ 800102c:	657b      	str	r3, [r7, #84]	@ 0x54
+                          |R5_Pin;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 800102e:	2302      	movs	r3, #2
+ 8001030:	65bb      	str	r3, [r7, #88]	@ 0x58
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001032:	2300      	movs	r3, #0
+ 8001034:	65fb      	str	r3, [r7, #92]	@ 0x5c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8001036:	2300      	movs	r3, #0
+ 8001038:	663b      	str	r3, [r7, #96]	@ 0x60
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+ 800103a:	230e      	movs	r3, #14
+ 800103c:	667b      	str	r3, [r7, #100]	@ 0x64
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 800103e:	f107 0354 	add.w	r3, r7, #84	@ 0x54
+ 8001042:	4619      	mov	r1, r3
+ 8001044:	483c      	ldr	r0, [pc, #240]	@ (8001138 <HAL_LTDC_MspInit+0x24c>)
+ 8001046:	f000 fe1b 	bl	8001c80 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = R3_Pin|R6_Pin;
+ 800104a:	2303      	movs	r3, #3
+ 800104c:	657b      	str	r3, [r7, #84]	@ 0x54
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 800104e:	2302      	movs	r3, #2
+ 8001050:	65bb      	str	r3, [r7, #88]	@ 0x58
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001052:	2300      	movs	r3, #0
+ 8001054:	65fb      	str	r3, [r7, #92]	@ 0x5c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8001056:	2300      	movs	r3, #0
+ 8001058:	663b      	str	r3, [r7, #96]	@ 0x60
+    GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
+ 800105a:	2309      	movs	r3, #9
+ 800105c:	667b      	str	r3, [r7, #100]	@ 0x64
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 800105e:	f107 0354 	add.w	r3, r7, #84	@ 0x54
+ 8001062:	4619      	mov	r1, r3
+ 8001064:	4835      	ldr	r0, [pc, #212]	@ (800113c <HAL_LTDC_MspInit+0x250>)
+ 8001066:	f000 fe0b 	bl	8001c80 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = G4_Pin|G5_Pin|B6_Pin|B7_Pin;
+ 800106a:	f44f 6370 	mov.w	r3, #3840	@ 0xf00
+ 800106e:	657b      	str	r3, [r7, #84]	@ 0x54
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8001070:	2302      	movs	r3, #2
+ 8001072:	65bb      	str	r3, [r7, #88]	@ 0x58
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001074:	2300      	movs	r3, #0
+ 8001076:	65fb      	str	r3, [r7, #92]	@ 0x5c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8001078:	2300      	movs	r3, #0
+ 800107a:	663b      	str	r3, [r7, #96]	@ 0x60
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+ 800107c:	230e      	movs	r3, #14
+ 800107e:	667b      	str	r3, [r7, #100]	@ 0x64
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 8001080:	f107 0354 	add.w	r3, r7, #84	@ 0x54
+ 8001084:	4619      	mov	r1, r3
+ 8001086:	482d      	ldr	r0, [pc, #180]	@ (800113c <HAL_LTDC_MspInit+0x250>)
+ 8001088:	f000 fdfa 	bl	8001c80 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = R7_Pin|DOTCLK_Pin|B3_Pin;
+ 800108c:	f44f 630c 	mov.w	r3, #2240	@ 0x8c0
+ 8001090:	657b      	str	r3, [r7, #84]	@ 0x54
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8001092:	2302      	movs	r3, #2
+ 8001094:	65bb      	str	r3, [r7, #88]	@ 0x58
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001096:	2300      	movs	r3, #0
+ 8001098:	65fb      	str	r3, [r7, #92]	@ 0x5c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 800109a:	2300      	movs	r3, #0
+ 800109c:	663b      	str	r3, [r7, #96]	@ 0x60
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+ 800109e:	230e      	movs	r3, #14
+ 80010a0:	667b      	str	r3, [r7, #100]	@ 0x64
+    HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+ 80010a2:	f107 0354 	add.w	r3, r7, #84	@ 0x54
+ 80010a6:	4619      	mov	r1, r3
+ 80010a8:	4825      	ldr	r0, [pc, #148]	@ (8001140 <HAL_LTDC_MspInit+0x254>)
+ 80010aa:	f000 fde9 	bl	8001c80 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = HSYNC_Pin|G6_Pin|R2_Pin;
+ 80010ae:	f44f 6398 	mov.w	r3, #1216	@ 0x4c0
+ 80010b2:	657b      	str	r3, [r7, #84]	@ 0x54
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80010b4:	2302      	movs	r3, #2
+ 80010b6:	65bb      	str	r3, [r7, #88]	@ 0x58
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80010b8:	2300      	movs	r3, #0
+ 80010ba:	65fb      	str	r3, [r7, #92]	@ 0x5c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 80010bc:	2300      	movs	r3, #0
+ 80010be:	663b      	str	r3, [r7, #96]	@ 0x60
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+ 80010c0:	230e      	movs	r3, #14
+ 80010c2:	667b      	str	r3, [r7, #100]	@ 0x64
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+ 80010c4:	f107 0354 	add.w	r3, r7, #84	@ 0x54
+ 80010c8:	4619      	mov	r1, r3
+ 80010ca:	481e      	ldr	r0, [pc, #120]	@ (8001144 <HAL_LTDC_MspInit+0x258>)
+ 80010cc:	f000 fdd8 	bl	8001c80 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = G7_Pin|B2_Pin;
+ 80010d0:	2348      	movs	r3, #72	@ 0x48
+ 80010d2:	657b      	str	r3, [r7, #84]	@ 0x54
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80010d4:	2302      	movs	r3, #2
+ 80010d6:	65bb      	str	r3, [r7, #88]	@ 0x58
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80010d8:	2300      	movs	r3, #0
+ 80010da:	65fb      	str	r3, [r7, #92]	@ 0x5c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 80010dc:	2300      	movs	r3, #0
+ 80010de:	663b      	str	r3, [r7, #96]	@ 0x60
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+ 80010e0:	230e      	movs	r3, #14
+ 80010e2:	667b      	str	r3, [r7, #100]	@ 0x64
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+ 80010e4:	f107 0354 	add.w	r3, r7, #84	@ 0x54
+ 80010e8:	4619      	mov	r1, r3
+ 80010ea:	4817      	ldr	r0, [pc, #92]	@ (8001148 <HAL_LTDC_MspInit+0x25c>)
+ 80010ec:	f000 fdc8 	bl	8001c80 <HAL_GPIO_Init>
+
+    GPIO_InitStruct.Pin = G3_Pin|B4_Pin;
+ 80010f0:	f44f 53a0 	mov.w	r3, #5120	@ 0x1400
+ 80010f4:	657b      	str	r3, [r7, #84]	@ 0x54
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80010f6:	2302      	movs	r3, #2
+ 80010f8:	65bb      	str	r3, [r7, #88]	@ 0x58
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80010fa:	2300      	movs	r3, #0
+ 80010fc:	65fb      	str	r3, [r7, #92]	@ 0x5c
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 80010fe:	2300      	movs	r3, #0
+ 8001100:	663b      	str	r3, [r7, #96]	@ 0x60
+    GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
+ 8001102:	2309      	movs	r3, #9
+ 8001104:	667b      	str	r3, [r7, #100]	@ 0x64
+    HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+ 8001106:	f107 0354 	add.w	r3, r7, #84	@ 0x54
+ 800110a:	4619      	mov	r1, r3
+ 800110c:	480c      	ldr	r0, [pc, #48]	@ (8001140 <HAL_LTDC_MspInit+0x254>)
+ 800110e:	f000 fdb7 	bl	8001c80 <HAL_GPIO_Init>
+
+    /* LTDC interrupt Init */
+    HAL_NVIC_SetPriority(LTDC_IRQn, 5, 0);
+ 8001112:	2200      	movs	r2, #0
+ 8001114:	2105      	movs	r1, #5
+ 8001116:	2058      	movs	r0, #88	@ 0x58
+ 8001118:	f000 fb80 	bl	800181c <HAL_NVIC_SetPriority>
+    HAL_NVIC_EnableIRQ(LTDC_IRQn);
+ 800111c:	2058      	movs	r0, #88	@ 0x58
+ 800111e:	f000 fb99 	bl	8001854 <HAL_NVIC_EnableIRQ>
+
+    /* USER CODE END LTDC_MspInit 1 */
+
+  }
+
+}
+ 8001122:	bf00      	nop
+ 8001124:	3768      	adds	r7, #104	@ 0x68
+ 8001126:	46bd      	mov	sp, r7
+ 8001128:	bd80      	pop	{r7, pc}
+ 800112a:	bf00      	nop
+ 800112c:	40016800 	.word	0x40016800
+ 8001130:	40023800 	.word	0x40023800
+ 8001134:	40021400 	.word	0x40021400
+ 8001138:	40020000 	.word	0x40020000
+ 800113c:	40020400 	.word	0x40020400
+ 8001140:	40021800 	.word	0x40021800
+ 8001144:	40020800 	.word	0x40020800
+ 8001148:	40020c00 	.word	0x40020c00
+
+0800114c <HAL_SPI_MspInit>:
+  * This function configures the hardware resources used in this example
+  * @param hspi: SPI handle pointer
+  * @retval None
+  */
+void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
+{
+ 800114c:	b580      	push	{r7, lr}
+ 800114e:	b08a      	sub	sp, #40	@ 0x28
+ 8001150:	af00      	add	r7, sp, #0
+ 8001152:	6078      	str	r0, [r7, #4]
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 8001154:	f107 0314 	add.w	r3, r7, #20
+ 8001158:	2200      	movs	r2, #0
+ 800115a:	601a      	str	r2, [r3, #0]
+ 800115c:	605a      	str	r2, [r3, #4]
+ 800115e:	609a      	str	r2, [r3, #8]
+ 8001160:	60da      	str	r2, [r3, #12]
+ 8001162:	611a      	str	r2, [r3, #16]
+  if(hspi->Instance==SPI5)
+ 8001164:	687b      	ldr	r3, [r7, #4]
+ 8001166:	681b      	ldr	r3, [r3, #0]
+ 8001168:	4a19      	ldr	r2, [pc, #100]	@ (80011d0 <HAL_SPI_MspInit+0x84>)
+ 800116a:	4293      	cmp	r3, r2
+ 800116c:	d12c      	bne.n	80011c8 <HAL_SPI_MspInit+0x7c>
+  {
+    /* USER CODE BEGIN SPI5_MspInit 0 */
+
+    /* USER CODE END SPI5_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_SPI5_CLK_ENABLE();
+ 800116e:	2300      	movs	r3, #0
+ 8001170:	613b      	str	r3, [r7, #16]
+ 8001172:	4b18      	ldr	r3, [pc, #96]	@ (80011d4 <HAL_SPI_MspInit+0x88>)
+ 8001174:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 8001176:	4a17      	ldr	r2, [pc, #92]	@ (80011d4 <HAL_SPI_MspInit+0x88>)
+ 8001178:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
+ 800117c:	6453      	str	r3, [r2, #68]	@ 0x44
+ 800117e:	4b15      	ldr	r3, [pc, #84]	@ (80011d4 <HAL_SPI_MspInit+0x88>)
+ 8001180:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 8001182:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
+ 8001186:	613b      	str	r3, [r7, #16]
+ 8001188:	693b      	ldr	r3, [r7, #16]
+
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+ 800118a:	2300      	movs	r3, #0
+ 800118c:	60fb      	str	r3, [r7, #12]
+ 800118e:	4b11      	ldr	r3, [pc, #68]	@ (80011d4 <HAL_SPI_MspInit+0x88>)
+ 8001190:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8001192:	4a10      	ldr	r2, [pc, #64]	@ (80011d4 <HAL_SPI_MspInit+0x88>)
+ 8001194:	f043 0320 	orr.w	r3, r3, #32
+ 8001198:	6313      	str	r3, [r2, #48]	@ 0x30
+ 800119a:	4b0e      	ldr	r3, [pc, #56]	@ (80011d4 <HAL_SPI_MspInit+0x88>)
+ 800119c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 800119e:	f003 0320 	and.w	r3, r3, #32
+ 80011a2:	60fb      	str	r3, [r7, #12]
+ 80011a4:	68fb      	ldr	r3, [r7, #12]
+    /**SPI5 GPIO Configuration
+    PF7     ------> SPI5_SCK
+    PF8     ------> SPI5_MISO
+    PF9     ------> SPI5_MOSI
+    */
+    GPIO_InitStruct.Pin = SPI5_SCK_Pin|SPI5_MISO_Pin|SPI5_MOSI_Pin;
+ 80011a6:	f44f 7360 	mov.w	r3, #896	@ 0x380
+ 80011aa:	617b      	str	r3, [r7, #20]
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80011ac:	2302      	movs	r3, #2
+ 80011ae:	61bb      	str	r3, [r7, #24]
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80011b0:	2300      	movs	r3, #0
+ 80011b2:	61fb      	str	r3, [r7, #28]
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 80011b4:	2300      	movs	r3, #0
+ 80011b6:	623b      	str	r3, [r7, #32]
+    GPIO_InitStruct.Alternate = GPIO_AF5_SPI5;
+ 80011b8:	2305      	movs	r3, #5
+ 80011ba:	627b      	str	r3, [r7, #36]	@ 0x24
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 80011bc:	f107 0314 	add.w	r3, r7, #20
+ 80011c0:	4619      	mov	r1, r3
+ 80011c2:	4805      	ldr	r0, [pc, #20]	@ (80011d8 <HAL_SPI_MspInit+0x8c>)
+ 80011c4:	f000 fd5c 	bl	8001c80 <HAL_GPIO_Init>
+
+    /* USER CODE END SPI5_MspInit 1 */
+
+  }
+
+}
+ 80011c8:	bf00      	nop
+ 80011ca:	3728      	adds	r7, #40	@ 0x28
+ 80011cc:	46bd      	mov	sp, r7
+ 80011ce:	bd80      	pop	{r7, pc}
+ 80011d0:	40015000 	.word	0x40015000
+ 80011d4:	40023800 	.word	0x40023800
+ 80011d8:	40021400 	.word	0x40021400
+
+080011dc <HAL_TIM_Base_MspInit>:
+  * This function configures the hardware resources used in this example
+  * @param htim_base: TIM_Base handle pointer
+  * @retval None
+  */
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+ 80011dc:	b480      	push	{r7}
+ 80011de:	b085      	sub	sp, #20
+ 80011e0:	af00      	add	r7, sp, #0
+ 80011e2:	6078      	str	r0, [r7, #4]
+  if(htim_base->Instance==TIM1)
+ 80011e4:	687b      	ldr	r3, [r7, #4]
+ 80011e6:	681b      	ldr	r3, [r3, #0]
+ 80011e8:	4a0b      	ldr	r2, [pc, #44]	@ (8001218 <HAL_TIM_Base_MspInit+0x3c>)
+ 80011ea:	4293      	cmp	r3, r2
+ 80011ec:	d10d      	bne.n	800120a <HAL_TIM_Base_MspInit+0x2e>
+  {
+    /* USER CODE BEGIN TIM1_MspInit 0 */
+
+    /* USER CODE END TIM1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM1_CLK_ENABLE();
+ 80011ee:	2300      	movs	r3, #0
+ 80011f0:	60fb      	str	r3, [r7, #12]
+ 80011f2:	4b0a      	ldr	r3, [pc, #40]	@ (800121c <HAL_TIM_Base_MspInit+0x40>)
+ 80011f4:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 80011f6:	4a09      	ldr	r2, [pc, #36]	@ (800121c <HAL_TIM_Base_MspInit+0x40>)
+ 80011f8:	f043 0301 	orr.w	r3, r3, #1
+ 80011fc:	6453      	str	r3, [r2, #68]	@ 0x44
+ 80011fe:	4b07      	ldr	r3, [pc, #28]	@ (800121c <HAL_TIM_Base_MspInit+0x40>)
+ 8001200:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 8001202:	f003 0301 	and.w	r3, r3, #1
+ 8001206:	60fb      	str	r3, [r7, #12]
+ 8001208:	68fb      	ldr	r3, [r7, #12]
+
+    /* USER CODE END TIM1_MspInit 1 */
+
+  }
+
+}
+ 800120a:	bf00      	nop
+ 800120c:	3714      	adds	r7, #20
+ 800120e:	46bd      	mov	sp, r7
+ 8001210:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001214:	4770      	bx	lr
+ 8001216:	bf00      	nop
+ 8001218:	40010000 	.word	0x40010000
+ 800121c:	40023800 	.word	0x40023800
+
+08001220 <HAL_UART_MspInit>:
+  * This function configures the hardware resources used in this example
+  * @param huart: UART handle pointer
+  * @retval None
+  */
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+ 8001220:	b580      	push	{r7, lr}
+ 8001222:	b08a      	sub	sp, #40	@ 0x28
+ 8001224:	af00      	add	r7, sp, #0
+ 8001226:	6078      	str	r0, [r7, #4]
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 8001228:	f107 0314 	add.w	r3, r7, #20
+ 800122c:	2200      	movs	r2, #0
+ 800122e:	601a      	str	r2, [r3, #0]
+ 8001230:	605a      	str	r2, [r3, #4]
+ 8001232:	609a      	str	r2, [r3, #8]
+ 8001234:	60da      	str	r2, [r3, #12]
+ 8001236:	611a      	str	r2, [r3, #16]
+  if(huart->Instance==USART1)
+ 8001238:	687b      	ldr	r3, [r7, #4]
+ 800123a:	681b      	ldr	r3, [r3, #0]
+ 800123c:	4a19      	ldr	r2, [pc, #100]	@ (80012a4 <HAL_UART_MspInit+0x84>)
+ 800123e:	4293      	cmp	r3, r2
+ 8001240:	d12c      	bne.n	800129c <HAL_UART_MspInit+0x7c>
+  {
+    /* USER CODE BEGIN USART1_MspInit 0 */
+
+    /* USER CODE END USART1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_USART1_CLK_ENABLE();
+ 8001242:	2300      	movs	r3, #0
+ 8001244:	613b      	str	r3, [r7, #16]
+ 8001246:	4b18      	ldr	r3, [pc, #96]	@ (80012a8 <HAL_UART_MspInit+0x88>)
+ 8001248:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 800124a:	4a17      	ldr	r2, [pc, #92]	@ (80012a8 <HAL_UART_MspInit+0x88>)
+ 800124c:	f043 0310 	orr.w	r3, r3, #16
+ 8001250:	6453      	str	r3, [r2, #68]	@ 0x44
+ 8001252:	4b15      	ldr	r3, [pc, #84]	@ (80012a8 <HAL_UART_MspInit+0x88>)
+ 8001254:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 8001256:	f003 0310 	and.w	r3, r3, #16
+ 800125a:	613b      	str	r3, [r7, #16]
+ 800125c:	693b      	ldr	r3, [r7, #16]
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+ 800125e:	2300      	movs	r3, #0
+ 8001260:	60fb      	str	r3, [r7, #12]
+ 8001262:	4b11      	ldr	r3, [pc, #68]	@ (80012a8 <HAL_UART_MspInit+0x88>)
+ 8001264:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8001266:	4a10      	ldr	r2, [pc, #64]	@ (80012a8 <HAL_UART_MspInit+0x88>)
+ 8001268:	f043 0301 	orr.w	r3, r3, #1
+ 800126c:	6313      	str	r3, [r2, #48]	@ 0x30
+ 800126e:	4b0e      	ldr	r3, [pc, #56]	@ (80012a8 <HAL_UART_MspInit+0x88>)
+ 8001270:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8001272:	f003 0301 	and.w	r3, r3, #1
+ 8001276:	60fb      	str	r3, [r7, #12]
+ 8001278:	68fb      	ldr	r3, [r7, #12]
+    /**USART1 GPIO Configuration
+    PA9     ------> USART1_TX
+    PA10     ------> USART1_RX
+    */
+    GPIO_InitStruct.Pin = STLINK_RX_Pin|STLINK_TX_Pin;
+ 800127a:	f44f 63c0 	mov.w	r3, #1536	@ 0x600
+ 800127e:	617b      	str	r3, [r7, #20]
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8001280:	2302      	movs	r3, #2
+ 8001282:	61bb      	str	r3, [r7, #24]
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001284:	2300      	movs	r3, #0
+ 8001286:	61fb      	str	r3, [r7, #28]
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 8001288:	2303      	movs	r3, #3
+ 800128a:	623b      	str	r3, [r7, #32]
+    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
+ 800128c:	2307      	movs	r3, #7
+ 800128e:	627b      	str	r3, [r7, #36]	@ 0x24
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 8001290:	f107 0314 	add.w	r3, r7, #20
+ 8001294:	4619      	mov	r1, r3
+ 8001296:	4805      	ldr	r0, [pc, #20]	@ (80012ac <HAL_UART_MspInit+0x8c>)
+ 8001298:	f000 fcf2 	bl	8001c80 <HAL_GPIO_Init>
+
+    /* USER CODE END USART1_MspInit 1 */
+
+  }
+
+}
+ 800129c:	bf00      	nop
+ 800129e:	3728      	adds	r7, #40	@ 0x28
+ 80012a0:	46bd      	mov	sp, r7
+ 80012a2:	bd80      	pop	{r7, pc}
+ 80012a4:	40011000 	.word	0x40011000
+ 80012a8:	40023800 	.word	0x40023800
+ 80012ac:	40020000 	.word	0x40020000
+
+080012b0 <HAL_FMC_MspInit>:
+
+}
+
+static uint32_t FMC_Initialized = 0;
+
+static void HAL_FMC_MspInit(void){
+ 80012b0:	b580      	push	{r7, lr}
+ 80012b2:	b086      	sub	sp, #24
+ 80012b4:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN FMC_MspInit 0 */
+
+  /* USER CODE END FMC_MspInit 0 */
+  GPIO_InitTypeDef GPIO_InitStruct ={0};
+ 80012b6:	1d3b      	adds	r3, r7, #4
+ 80012b8:	2200      	movs	r2, #0
+ 80012ba:	601a      	str	r2, [r3, #0]
+ 80012bc:	605a      	str	r2, [r3, #4]
+ 80012be:	609a      	str	r2, [r3, #8]
+ 80012c0:	60da      	str	r2, [r3, #12]
+ 80012c2:	611a      	str	r2, [r3, #16]
+  if (FMC_Initialized) {
+ 80012c4:	4b3b      	ldr	r3, [pc, #236]	@ (80013b4 <HAL_FMC_MspInit+0x104>)
+ 80012c6:	681b      	ldr	r3, [r3, #0]
+ 80012c8:	2b00      	cmp	r3, #0
+ 80012ca:	d16f      	bne.n	80013ac <HAL_FMC_MspInit+0xfc>
+    return;
+  }
+  FMC_Initialized = 1;
+ 80012cc:	4b39      	ldr	r3, [pc, #228]	@ (80013b4 <HAL_FMC_MspInit+0x104>)
+ 80012ce:	2201      	movs	r2, #1
+ 80012d0:	601a      	str	r2, [r3, #0]
+
+  /* Peripheral clock enable */
+  __HAL_RCC_FMC_CLK_ENABLE();
+ 80012d2:	2300      	movs	r3, #0
+ 80012d4:	603b      	str	r3, [r7, #0]
+ 80012d6:	4b38      	ldr	r3, [pc, #224]	@ (80013b8 <HAL_FMC_MspInit+0x108>)
+ 80012d8:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
+ 80012da:	4a37      	ldr	r2, [pc, #220]	@ (80013b8 <HAL_FMC_MspInit+0x108>)
+ 80012dc:	f043 0301 	orr.w	r3, r3, #1
+ 80012e0:	6393      	str	r3, [r2, #56]	@ 0x38
+ 80012e2:	4b35      	ldr	r3, [pc, #212]	@ (80013b8 <HAL_FMC_MspInit+0x108>)
+ 80012e4:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
+ 80012e6:	f003 0301 	and.w	r3, r3, #1
+ 80012ea:	603b      	str	r3, [r7, #0]
+ 80012ec:	683b      	ldr	r3, [r7, #0]
+  PB5   ------> FMC_SDCKE1
+  PB6   ------> FMC_SDNE1
+  PE0   ------> FMC_NBL0
+  PE1   ------> FMC_NBL1
+  */
+  GPIO_InitStruct.Pin = A0_Pin|A1_Pin|A2_Pin|A3_Pin
+ 80012ee:	f64f 033f 	movw	r3, #63551	@ 0xf83f
+ 80012f2:	607b      	str	r3, [r7, #4]
+                          |A4_Pin|A5_Pin|SDNRAS_Pin|A6_Pin
+                          |A7_Pin|A8_Pin|A9_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 80012f4:	2302      	movs	r3, #2
+ 80012f6:	60bb      	str	r3, [r7, #8]
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80012f8:	2300      	movs	r3, #0
+ 80012fa:	60fb      	str	r3, [r7, #12]
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 80012fc:	2303      	movs	r3, #3
+ 80012fe:	613b      	str	r3, [r7, #16]
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 8001300:	230c      	movs	r3, #12
+ 8001302:	617b      	str	r3, [r7, #20]
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 8001304:	1d3b      	adds	r3, r7, #4
+ 8001306:	4619      	mov	r1, r3
+ 8001308:	482c      	ldr	r0, [pc, #176]	@ (80013bc <HAL_FMC_MspInit+0x10c>)
+ 800130a:	f000 fcb9 	bl	8001c80 <HAL_GPIO_Init>
+
+  GPIO_InitStruct.Pin = SDNWE_Pin;
+ 800130e:	2301      	movs	r3, #1
+ 8001310:	607b      	str	r3, [r7, #4]
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8001312:	2302      	movs	r3, #2
+ 8001314:	60bb      	str	r3, [r7, #8]
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001316:	2300      	movs	r3, #0
+ 8001318:	60fb      	str	r3, [r7, #12]
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 800131a:	2303      	movs	r3, #3
+ 800131c:	613b      	str	r3, [r7, #16]
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 800131e:	230c      	movs	r3, #12
+ 8001320:	617b      	str	r3, [r7, #20]
+  HAL_GPIO_Init(SDNWE_GPIO_Port, &GPIO_InitStruct);
+ 8001322:	1d3b      	adds	r3, r7, #4
+ 8001324:	4619      	mov	r1, r3
+ 8001326:	4826      	ldr	r0, [pc, #152]	@ (80013c0 <HAL_FMC_MspInit+0x110>)
+ 8001328:	f000 fcaa 	bl	8001c80 <HAL_GPIO_Init>
+
+  GPIO_InitStruct.Pin = A10_Pin|A11_Pin|BA0_Pin|BA1_Pin
+ 800132c:	f248 1333 	movw	r3, #33075	@ 0x8133
+ 8001330:	607b      	str	r3, [r7, #4]
+                          |SDCLK_Pin|SDNCAS_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8001332:	2302      	movs	r3, #2
+ 8001334:	60bb      	str	r3, [r7, #8]
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001336:	2300      	movs	r3, #0
+ 8001338:	60fb      	str	r3, [r7, #12]
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 800133a:	2303      	movs	r3, #3
+ 800133c:	613b      	str	r3, [r7, #16]
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 800133e:	230c      	movs	r3, #12
+ 8001340:	617b      	str	r3, [r7, #20]
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+ 8001342:	1d3b      	adds	r3, r7, #4
+ 8001344:	4619      	mov	r1, r3
+ 8001346:	481f      	ldr	r0, [pc, #124]	@ (80013c4 <HAL_FMC_MspInit+0x114>)
+ 8001348:	f000 fc9a 	bl	8001c80 <HAL_GPIO_Init>
+
+  GPIO_InitStruct.Pin = D4_Pin|D5_Pin|D6_Pin|D7_Pin
+ 800134c:	f64f 7383 	movw	r3, #65411	@ 0xff83
+ 8001350:	607b      	str	r3, [r7, #4]
+                          |D8_Pin|D9_Pin|D10_Pin|D11_Pin
+                          |D12_Pin|NBL0_Pin|NBL1_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8001352:	2302      	movs	r3, #2
+ 8001354:	60bb      	str	r3, [r7, #8]
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001356:	2300      	movs	r3, #0
+ 8001358:	60fb      	str	r3, [r7, #12]
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 800135a:	2303      	movs	r3, #3
+ 800135c:	613b      	str	r3, [r7, #16]
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 800135e:	230c      	movs	r3, #12
+ 8001360:	617b      	str	r3, [r7, #20]
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 8001362:	1d3b      	adds	r3, r7, #4
+ 8001364:	4619      	mov	r1, r3
+ 8001366:	4818      	ldr	r0, [pc, #96]	@ (80013c8 <HAL_FMC_MspInit+0x118>)
+ 8001368:	f000 fc8a 	bl	8001c80 <HAL_GPIO_Init>
+
+  GPIO_InitStruct.Pin = D13_Pin|D14_Pin|D15_Pin|D0_Pin
+ 800136c:	f24c 7303 	movw	r3, #50947	@ 0xc703
+ 8001370:	607b      	str	r3, [r7, #4]
+                          |D1_Pin|D2_Pin|D3_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8001372:	2302      	movs	r3, #2
+ 8001374:	60bb      	str	r3, [r7, #8]
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001376:	2300      	movs	r3, #0
+ 8001378:	60fb      	str	r3, [r7, #12]
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 800137a:	2303      	movs	r3, #3
+ 800137c:	613b      	str	r3, [r7, #16]
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 800137e:	230c      	movs	r3, #12
+ 8001380:	617b      	str	r3, [r7, #20]
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+ 8001382:	1d3b      	adds	r3, r7, #4
+ 8001384:	4619      	mov	r1, r3
+ 8001386:	4811      	ldr	r0, [pc, #68]	@ (80013cc <HAL_FMC_MspInit+0x11c>)
+ 8001388:	f000 fc7a 	bl	8001c80 <HAL_GPIO_Init>
+
+  GPIO_InitStruct.Pin = SDCKE1_Pin|SDNE1_Pin;
+ 800138c:	2360      	movs	r3, #96	@ 0x60
+ 800138e:	607b      	str	r3, [r7, #4]
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 8001390:	2302      	movs	r3, #2
+ 8001392:	60bb      	str	r3, [r7, #8]
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8001394:	2300      	movs	r3, #0
+ 8001396:	60fb      	str	r3, [r7, #12]
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 8001398:	2303      	movs	r3, #3
+ 800139a:	613b      	str	r3, [r7, #16]
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ 800139c:	230c      	movs	r3, #12
+ 800139e:	617b      	str	r3, [r7, #20]
+  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 80013a0:	1d3b      	adds	r3, r7, #4
+ 80013a2:	4619      	mov	r1, r3
+ 80013a4:	480a      	ldr	r0, [pc, #40]	@ (80013d0 <HAL_FMC_MspInit+0x120>)
+ 80013a6:	f000 fc6b 	bl	8001c80 <HAL_GPIO_Init>
+ 80013aa:	e000      	b.n	80013ae <HAL_FMC_MspInit+0xfe>
+    return;
+ 80013ac:	bf00      	nop
+
+  /* USER CODE BEGIN FMC_MspInit 1 */
+
+  /* USER CODE END FMC_MspInit 1 */
+}
+ 80013ae:	3718      	adds	r7, #24
+ 80013b0:	46bd      	mov	sp, r7
+ 80013b2:	bd80      	pop	{r7, pc}
+ 80013b4:	2000028c 	.word	0x2000028c
+ 80013b8:	40023800 	.word	0x40023800
+ 80013bc:	40021400 	.word	0x40021400
+ 80013c0:	40020800 	.word	0x40020800
+ 80013c4:	40021800 	.word	0x40021800
+ 80013c8:	40021000 	.word	0x40021000
+ 80013cc:	40020c00 	.word	0x40020c00
+ 80013d0:	40020400 	.word	0x40020400
+
+080013d4 <HAL_SDRAM_MspInit>:
+
+void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef* hsdram){
+ 80013d4:	b580      	push	{r7, lr}
+ 80013d6:	b082      	sub	sp, #8
+ 80013d8:	af00      	add	r7, sp, #0
+ 80013da:	6078      	str	r0, [r7, #4]
+  /* USER CODE BEGIN SDRAM_MspInit 0 */
+
+  /* USER CODE END SDRAM_MspInit 0 */
+  HAL_FMC_MspInit();
+ 80013dc:	f7ff ff68 	bl	80012b0 <HAL_FMC_MspInit>
+  /* USER CODE BEGIN SDRAM_MspInit 1 */
+
+  /* USER CODE END SDRAM_MspInit 1 */
+}
+ 80013e0:	bf00      	nop
+ 80013e2:	3708      	adds	r7, #8
+ 80013e4:	46bd      	mov	sp, r7
+ 80013e6:	bd80      	pop	{r7, pc}
+
+080013e8 <HAL_InitTick>:
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority: Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ 80013e8:	b580      	push	{r7, lr}
+ 80013ea:	b08e      	sub	sp, #56	@ 0x38
+ 80013ec:	af00      	add	r7, sp, #0
+ 80013ee:	6078      	str	r0, [r7, #4]
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock, uwAPB1Prescaler = 0U;
+ 80013f0:	2300      	movs	r3, #0
+ 80013f2:	62fb      	str	r3, [r7, #44]	@ 0x2c
+
+  uint32_t              uwPrescalerValue = 0U;
+ 80013f4:	2300      	movs	r3, #0
+ 80013f6:	62bb      	str	r3, [r7, #40]	@ 0x28
+  uint32_t              pFLatency;
+
+  HAL_StatusTypeDef     status;
+
+  /* Enable TIM6 clock */
+  __HAL_RCC_TIM6_CLK_ENABLE();
+ 80013f8:	2300      	movs	r3, #0
+ 80013fa:	60fb      	str	r3, [r7, #12]
+ 80013fc:	4b33      	ldr	r3, [pc, #204]	@ (80014cc <HAL_InitTick+0xe4>)
+ 80013fe:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8001400:	4a32      	ldr	r2, [pc, #200]	@ (80014cc <HAL_InitTick+0xe4>)
+ 8001402:	f043 0310 	orr.w	r3, r3, #16
+ 8001406:	6413      	str	r3, [r2, #64]	@ 0x40
+ 8001408:	4b30      	ldr	r3, [pc, #192]	@ (80014cc <HAL_InitTick+0xe4>)
+ 800140a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 800140c:	f003 0310 	and.w	r3, r3, #16
+ 8001410:	60fb      	str	r3, [r7, #12]
+ 8001412:	68fb      	ldr	r3, [r7, #12]
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+ 8001414:	f107 0210 	add.w	r2, r7, #16
+ 8001418:	f107 0314 	add.w	r3, r7, #20
+ 800141c:	4611      	mov	r1, r2
+ 800141e:	4618      	mov	r0, r3
+ 8001420:	f003 fd02 	bl	8004e28 <HAL_RCC_GetClockConfig>
+
+  /* Get APB1 prescaler */
+  uwAPB1Prescaler = clkconfig.APB1CLKDivider;
+ 8001424:	6a3b      	ldr	r3, [r7, #32]
+ 8001426:	62fb      	str	r3, [r7, #44]	@ 0x2c
+  /* Compute TIM6 clock */
+  if (uwAPB1Prescaler == RCC_HCLK_DIV1)
+ 8001428:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
+ 800142a:	2b00      	cmp	r3, #0
+ 800142c:	d103      	bne.n	8001436 <HAL_InitTick+0x4e>
+  {
+    uwTimclock = HAL_RCC_GetPCLK1Freq();
+ 800142e:	f003 fcd3 	bl	8004dd8 <HAL_RCC_GetPCLK1Freq>
+ 8001432:	6378      	str	r0, [r7, #52]	@ 0x34
+ 8001434:	e004      	b.n	8001440 <HAL_InitTick+0x58>
+  }
+  else
+  {
+    uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq();
+ 8001436:	f003 fccf 	bl	8004dd8 <HAL_RCC_GetPCLK1Freq>
+ 800143a:	4603      	mov	r3, r0
+ 800143c:	005b      	lsls	r3, r3, #1
+ 800143e:	637b      	str	r3, [r7, #52]	@ 0x34
+  }
+
+  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+ 8001440:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
+ 8001442:	4a23      	ldr	r2, [pc, #140]	@ (80014d0 <HAL_InitTick+0xe8>)
+ 8001444:	fba2 2303 	umull	r2, r3, r2, r3
+ 8001448:	0c9b      	lsrs	r3, r3, #18
+ 800144a:	3b01      	subs	r3, #1
+ 800144c:	62bb      	str	r3, [r7, #40]	@ 0x28
+
+  /* Initialize TIM6 */
+  htim6.Instance = TIM6;
+ 800144e:	4b21      	ldr	r3, [pc, #132]	@ (80014d4 <HAL_InitTick+0xec>)
+ 8001450:	4a21      	ldr	r2, [pc, #132]	@ (80014d8 <HAL_InitTick+0xf0>)
+ 8001452:	601a      	str	r2, [r3, #0]
+   * Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+   * Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+   * ClockDivision = 0
+   * Counter direction = Up
+   */
+  htim6.Init.Period = (1000000U / 1000U) - 1U;
+ 8001454:	4b1f      	ldr	r3, [pc, #124]	@ (80014d4 <HAL_InitTick+0xec>)
+ 8001456:	f240 32e7 	movw	r2, #999	@ 0x3e7
+ 800145a:	60da      	str	r2, [r3, #12]
+  htim6.Init.Prescaler = uwPrescalerValue;
+ 800145c:	4a1d      	ldr	r2, [pc, #116]	@ (80014d4 <HAL_InitTick+0xec>)
+ 800145e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
+ 8001460:	6053      	str	r3, [r2, #4]
+  htim6.Init.ClockDivision = 0;
+ 8001462:	4b1c      	ldr	r3, [pc, #112]	@ (80014d4 <HAL_InitTick+0xec>)
+ 8001464:	2200      	movs	r2, #0
+ 8001466:	611a      	str	r2, [r3, #16]
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 8001468:	4b1a      	ldr	r3, [pc, #104]	@ (80014d4 <HAL_InitTick+0xec>)
+ 800146a:	2200      	movs	r2, #0
+ 800146c:	609a      	str	r2, [r3, #8]
+  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 800146e:	4b19      	ldr	r3, [pc, #100]	@ (80014d4 <HAL_InitTick+0xec>)
+ 8001470:	2200      	movs	r2, #0
+ 8001472:	619a      	str	r2, [r3, #24]
+
+  status = HAL_TIM_Base_Init(&htim6);
+ 8001474:	4817      	ldr	r0, [pc, #92]	@ (80014d4 <HAL_InitTick+0xec>)
+ 8001476:	f003 ff86 	bl	8005386 <HAL_TIM_Base_Init>
+ 800147a:	4603      	mov	r3, r0
+ 800147c:	f887 3033 	strb.w	r3, [r7, #51]	@ 0x33
+  if (status == HAL_OK)
+ 8001480:	f897 3033 	ldrb.w	r3, [r7, #51]	@ 0x33
+ 8001484:	2b00      	cmp	r3, #0
+ 8001486:	d11b      	bne.n	80014c0 <HAL_InitTick+0xd8>
+  {
+    /* Start the TIM time Base generation in interrupt mode */
+    status = HAL_TIM_Base_Start_IT(&htim6);
+ 8001488:	4812      	ldr	r0, [pc, #72]	@ (80014d4 <HAL_InitTick+0xec>)
+ 800148a:	f003 ffcb 	bl	8005424 <HAL_TIM_Base_Start_IT>
+ 800148e:	4603      	mov	r3, r0
+ 8001490:	f887 3033 	strb.w	r3, [r7, #51]	@ 0x33
+    if (status == HAL_OK)
+ 8001494:	f897 3033 	ldrb.w	r3, [r7, #51]	@ 0x33
+ 8001498:	2b00      	cmp	r3, #0
+ 800149a:	d111      	bne.n	80014c0 <HAL_InitTick+0xd8>
+    {
+    /* Enable the TIM6 global Interrupt */
+        HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ 800149c:	2036      	movs	r0, #54	@ 0x36
+ 800149e:	f000 f9d9 	bl	8001854 <HAL_NVIC_EnableIRQ>
+      /* Configure the SysTick IRQ priority */
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ 80014a2:	687b      	ldr	r3, [r7, #4]
+ 80014a4:	2b0f      	cmp	r3, #15
+ 80014a6:	d808      	bhi.n	80014ba <HAL_InitTick+0xd2>
+      {
+        /* Configure the TIM IRQ priority */
+        HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+ 80014a8:	2200      	movs	r2, #0
+ 80014aa:	6879      	ldr	r1, [r7, #4]
+ 80014ac:	2036      	movs	r0, #54	@ 0x36
+ 80014ae:	f000 f9b5 	bl	800181c <HAL_NVIC_SetPriority>
+        uwTickPrio = TickPriority;
+ 80014b2:	4a0a      	ldr	r2, [pc, #40]	@ (80014dc <HAL_InitTick+0xf4>)
+ 80014b4:	687b      	ldr	r3, [r7, #4]
+ 80014b6:	6013      	str	r3, [r2, #0]
+ 80014b8:	e002      	b.n	80014c0 <HAL_InitTick+0xd8>
+      }
+      else
+      {
+        status = HAL_ERROR;
+ 80014ba:	2301      	movs	r3, #1
+ 80014bc:	f887 3033 	strb.w	r3, [r7, #51]	@ 0x33
+      }
+    }
+  }
+
+ /* Return function status */
+  return status;
+ 80014c0:	f897 3033 	ldrb.w	r3, [r7, #51]	@ 0x33
+}
+ 80014c4:	4618      	mov	r0, r3
+ 80014c6:	3738      	adds	r7, #56	@ 0x38
+ 80014c8:	46bd      	mov	sp, r7
+ 80014ca:	bd80      	pop	{r7, pc}
+ 80014cc:	40023800 	.word	0x40023800
+ 80014d0:	431bde83 	.word	0x431bde83
+ 80014d4:	20000290 	.word	0x20000290
+ 80014d8:	40001000 	.word	0x40001000
+ 80014dc:	20000004 	.word	0x20000004
+
+080014e0 <NMI_Handler>:
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+ 80014e0:	b480      	push	{r7}
+ 80014e2:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+   while (1)
+ 80014e4:	bf00      	nop
+ 80014e6:	e7fd      	b.n	80014e4 <NMI_Handler+0x4>
+
+080014e8 <HardFault_Handler>:
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+ 80014e8:	b480      	push	{r7}
+ 80014ea:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+ 80014ec:	bf00      	nop
+ 80014ee:	e7fd      	b.n	80014ec <HardFault_Handler+0x4>
+
+080014f0 <MemManage_Handler>:
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+ 80014f0:	b480      	push	{r7}
+ 80014f2:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+ 80014f4:	bf00      	nop
+ 80014f6:	e7fd      	b.n	80014f4 <MemManage_Handler+0x4>
+
+080014f8 <BusFault_Handler>:
+
+/**
+  * @brief This function handles Pre-fetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+ 80014f8:	b480      	push	{r7}
+ 80014fa:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+ 80014fc:	bf00      	nop
+ 80014fe:	e7fd      	b.n	80014fc <BusFault_Handler+0x4>
+
+08001500 <UsageFault_Handler>:
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+ 8001500:	b480      	push	{r7}
+ 8001502:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+ 8001504:	bf00      	nop
+ 8001506:	e7fd      	b.n	8001504 <UsageFault_Handler+0x4>
+
+08001508 <DebugMon_Handler>:
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+ 8001508:	b480      	push	{r7}
+ 800150a:	af00      	add	r7, sp, #0
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+ 800150c:	bf00      	nop
+ 800150e:	46bd      	mov	sp, r7
+ 8001510:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001514:	4770      	bx	lr
+	...
+
+08001518 <TIM6_DAC_IRQHandler>:
+
+/**
+  * @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
+  */
+void TIM6_DAC_IRQHandler(void)
+{
+ 8001518:	b580      	push	{r7, lr}
+ 800151a:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+  /* USER CODE END TIM6_DAC_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim6);
+ 800151c:	4802      	ldr	r0, [pc, #8]	@ (8001528 <TIM6_DAC_IRQHandler+0x10>)
+ 800151e:	f003 fff1 	bl	8005504 <HAL_TIM_IRQHandler>
+  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+  /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+ 8001522:	bf00      	nop
+ 8001524:	bd80      	pop	{r7, pc}
+ 8001526:	bf00      	nop
+ 8001528:	20000290 	.word	0x20000290
+
+0800152c <OTG_HS_IRQHandler>:
+
+/**
+  * @brief This function handles USB On The Go HS global interrupt.
+  */
+void OTG_HS_IRQHandler(void)
+{
+ 800152c:	b580      	push	{r7, lr}
+ 800152e:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN OTG_HS_IRQn 0 */
+
+  /* USER CODE END OTG_HS_IRQn 0 */
+  HAL_HCD_IRQHandler(&hhcd_USB_OTG_HS);
+ 8001530:	4802      	ldr	r0, [pc, #8]	@ (800153c <OTG_HS_IRQHandler+0x10>)
+ 8001532:	f000 fd6a 	bl	800200a <HAL_HCD_IRQHandler>
+  /* USER CODE BEGIN OTG_HS_IRQn 1 */
+
+  /* USER CODE END OTG_HS_IRQn 1 */
+}
+ 8001536:	bf00      	nop
+ 8001538:	bd80      	pop	{r7, pc}
+ 800153a:	bf00      	nop
+ 800153c:	200003c8 	.word	0x200003c8
+
+08001540 <LTDC_IRQHandler>:
+
+/**
+  * @brief This function handles LTDC global interrupt.
+  */
+void LTDC_IRQHandler(void)
+{
+ 8001540:	b580      	push	{r7, lr}
+ 8001542:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN LTDC_IRQn 0 */
+
+  /* USER CODE END LTDC_IRQn 0 */
+  HAL_LTDC_IRQHandler(&hltdc);
+ 8001544:	4802      	ldr	r0, [pc, #8]	@ (8001550 <LTDC_IRQHandler+0x10>)
+ 8001546:	f002 fd63 	bl	8004010 <HAL_LTDC_IRQHandler>
+  /* USER CODE BEGIN LTDC_IRQn 1 */
+
+  /* USER CODE END LTDC_IRQn 1 */
+}
+ 800154a:	bf00      	nop
+ 800154c:	bd80      	pop	{r7, pc}
+ 800154e:	bf00      	nop
+ 8001550:	200000c8 	.word	0x200000c8
+
+08001554 <DMA2D_IRQHandler>:
+
+/**
+  * @brief This function handles DMA2D global interrupt.
+  */
+void DMA2D_IRQHandler(void)
+{
+ 8001554:	b580      	push	{r7, lr}
+ 8001556:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN DMA2D_IRQn 0 */
+
+  /* USER CODE END DMA2D_IRQn 0 */
+  HAL_DMA2D_IRQHandler(&hdma2d);
+ 8001558:	4802      	ldr	r0, [pc, #8]	@ (8001564 <DMA2D_IRQHandler+0x10>)
+ 800155a:	f000 f9ee 	bl	800193a <HAL_DMA2D_IRQHandler>
+  /* USER CODE BEGIN DMA2D_IRQn 1 */
+
+  /* USER CODE END DMA2D_IRQn 1 */
+}
+ 800155e:	bf00      	nop
+ 8001560:	bd80      	pop	{r7, pc}
+ 8001562:	bf00      	nop
+ 8001564:	20000034 	.word	0x20000034
+
+08001568 <SystemInit>:
+  *         configuration.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+ 8001568:	b480      	push	{r7}
+ 800156a:	af00      	add	r7, sp, #0
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
+ 800156c:	4b06      	ldr	r3, [pc, #24]	@ (8001588 <SystemInit+0x20>)
+ 800156e:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
+ 8001572:	4a05      	ldr	r2, [pc, #20]	@ (8001588 <SystemInit+0x20>)
+ 8001574:	f443 0370 	orr.w	r3, r3, #15728640	@ 0xf00000
+ 8001578:	f8c2 3088 	str.w	r3, [r2, #136]	@ 0x88
+
+  /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+}
+ 800157c:	bf00      	nop
+ 800157e:	46bd      	mov	sp, r7
+ 8001580:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001584:	4770      	bx	lr
+ 8001586:	bf00      	nop
+ 8001588:	e000ed00 	.word	0xe000ed00
+
+0800158c <Reset_Handler>:
+
+    .section  .text.Reset_Handler
+  .weak  Reset_Handler
+  .type  Reset_Handler, %function
+Reset_Handler: 
+  ldr   sp, =_estack       /* set stack pointer */
+ 800158c:	f8df d034 	ldr.w	sp, [pc, #52]	@ 80015c4 <LoopFillZerobss+0xe>
+
+/* Call the clock system initialization function.*/
+  bl  SystemInit   
+ 8001590:	f7ff ffea 	bl	8001568 <SystemInit>
+ 
+/* Copy the data segment initializers from flash to SRAM */  
+  ldr r0, =_sdata
+ 8001594:	480c      	ldr	r0, [pc, #48]	@ (80015c8 <LoopFillZerobss+0x12>)
+  ldr r1, =_edata
+ 8001596:	490d      	ldr	r1, [pc, #52]	@ (80015cc <LoopFillZerobss+0x16>)
+  ldr r2, =_sidata
+ 8001598:	4a0d      	ldr	r2, [pc, #52]	@ (80015d0 <LoopFillZerobss+0x1a>)
+  movs r3, #0
+ 800159a:	2300      	movs	r3, #0
+  b LoopCopyDataInit
+ 800159c:	e002      	b.n	80015a4 <LoopCopyDataInit>
+
+0800159e <CopyDataInit>:
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+ 800159e:	58d4      	ldr	r4, [r2, r3]
+  str r4, [r0, r3]
+ 80015a0:	50c4      	str	r4, [r0, r3]
+  adds r3, r3, #4
+ 80015a2:	3304      	adds	r3, #4
+
+080015a4 <LoopCopyDataInit>:
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+ 80015a4:	18c4      	adds	r4, r0, r3
+  cmp r4, r1
+ 80015a6:	428c      	cmp	r4, r1
+  bcc CopyDataInit
+ 80015a8:	d3f9      	bcc.n	800159e <CopyDataInit>
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+ 80015aa:	4a0a      	ldr	r2, [pc, #40]	@ (80015d4 <LoopFillZerobss+0x1e>)
+  ldr r4, =_ebss
+ 80015ac:	4c0a      	ldr	r4, [pc, #40]	@ (80015d8 <LoopFillZerobss+0x22>)
+  movs r3, #0
+ 80015ae:	2300      	movs	r3, #0
+  b LoopFillZerobss
+ 80015b0:	e001      	b.n	80015b6 <LoopFillZerobss>
+
+080015b2 <FillZerobss>:
+
+FillZerobss:
+  str  r3, [r2]
+ 80015b2:	6013      	str	r3, [r2, #0]
+  adds r2, r2, #4
+ 80015b4:	3204      	adds	r2, #4
+
+080015b6 <LoopFillZerobss>:
+
+LoopFillZerobss:
+  cmp r2, r4
+ 80015b6:	42a2      	cmp	r2, r4
+  bcc FillZerobss
+ 80015b8:	d3fb      	bcc.n	80015b2 <FillZerobss>
+  
+/* Call static constructors */
+    bl __libc_init_array
+ 80015ba:	f006 fc59 	bl	8007e70 <__libc_init_array>
+/* Call the application's entry point.*/
+  bl  main
+ 80015be:	f7fe ffec 	bl	800059a <main>
+  bx  lr    
+ 80015c2:	4770      	bx	lr
+  ldr   sp, =_estack       /* set stack pointer */
+ 80015c4:	20030000 	.word	0x20030000
+  ldr r0, =_sdata
+ 80015c8:	20000000 	.word	0x20000000
+  ldr r1, =_edata
+ 80015cc:	20000010 	.word	0x20000010
+  ldr r2, =_sidata
+ 80015d0:	08007f14 	.word	0x08007f14
+  ldr r2, =_sbss
+ 80015d4:	20000010 	.word	0x20000010
+  ldr r4, =_ebss
+ 80015d8:	200007a8 	.word	0x200007a8
+
+080015dc <ADC_IRQHandler>:
+ * @retval None       
+*/
+    .section  .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+  b  Infinite_Loop
+ 80015dc:	e7fe      	b.n	80015dc <ADC_IRQHandler>
+	...
+
+080015e0 <HAL_Init>:
+  *         need to ensure that the SysTick time base is always set to 1 millisecond
+  *         to have correct HAL operation.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_Init(void)
+{
+ 80015e0:	b580      	push	{r7, lr}
+ 80015e2:	af00      	add	r7, sp, #0
+  /* Configure Flash prefetch, Instruction cache, Data cache */ 
+#if (INSTRUCTION_CACHE_ENABLE != 0U)
+  __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
+ 80015e4:	4b0e      	ldr	r3, [pc, #56]	@ (8001620 <HAL_Init+0x40>)
+ 80015e6:	681b      	ldr	r3, [r3, #0]
+ 80015e8:	4a0d      	ldr	r2, [pc, #52]	@ (8001620 <HAL_Init+0x40>)
+ 80015ea:	f443 7300 	orr.w	r3, r3, #512	@ 0x200
+ 80015ee:	6013      	str	r3, [r2, #0]
+#endif /* INSTRUCTION_CACHE_ENABLE */
+
+#if (DATA_CACHE_ENABLE != 0U)
+  __HAL_FLASH_DATA_CACHE_ENABLE();
+ 80015f0:	4b0b      	ldr	r3, [pc, #44]	@ (8001620 <HAL_Init+0x40>)
+ 80015f2:	681b      	ldr	r3, [r3, #0]
+ 80015f4:	4a0a      	ldr	r2, [pc, #40]	@ (8001620 <HAL_Init+0x40>)
+ 80015f6:	f443 6380 	orr.w	r3, r3, #1024	@ 0x400
+ 80015fa:	6013      	str	r3, [r2, #0]
+#endif /* DATA_CACHE_ENABLE */
+
+#if (PREFETCH_ENABLE != 0U)
+  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
+ 80015fc:	4b08      	ldr	r3, [pc, #32]	@ (8001620 <HAL_Init+0x40>)
+ 80015fe:	681b      	ldr	r3, [r3, #0]
+ 8001600:	4a07      	ldr	r2, [pc, #28]	@ (8001620 <HAL_Init+0x40>)
+ 8001602:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
+ 8001606:	6013      	str	r3, [r2, #0]
+#endif /* PREFETCH_ENABLE */
+
+  /* Set Interrupt Group Priority */
+  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
+ 8001608:	2003      	movs	r0, #3
+ 800160a:	f000 f8fc 	bl	8001806 <HAL_NVIC_SetPriorityGrouping>
+
+  /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
+  HAL_InitTick(TICK_INT_PRIORITY);
+ 800160e:	2000      	movs	r0, #0
+ 8001610:	f7ff feea 	bl	80013e8 <HAL_InitTick>
+
+  /* Init the low level hardware */
+  HAL_MspInit();
+ 8001614:	f7ff fb8a 	bl	8000d2c <HAL_MspInit>
+
+  /* Return function status */
+  return HAL_OK;
+ 8001618:	2300      	movs	r3, #0
+}
+ 800161a:	4618      	mov	r0, r3
+ 800161c:	bd80      	pop	{r7, pc}
+ 800161e:	bf00      	nop
+ 8001620:	40023c00 	.word	0x40023c00
+
+08001624 <HAL_IncTick>:
+ * @note This function is declared as __weak to be overwritten in case of other 
+  *      implementations in user file.
+  * @retval None
+  */
+__weak void HAL_IncTick(void)
+{
+ 8001624:	b480      	push	{r7}
+ 8001626:	af00      	add	r7, sp, #0
+  uwTick += uwTickFreq;
+ 8001628:	4b06      	ldr	r3, [pc, #24]	@ (8001644 <HAL_IncTick+0x20>)
+ 800162a:	781b      	ldrb	r3, [r3, #0]
+ 800162c:	461a      	mov	r2, r3
+ 800162e:	4b06      	ldr	r3, [pc, #24]	@ (8001648 <HAL_IncTick+0x24>)
+ 8001630:	681b      	ldr	r3, [r3, #0]
+ 8001632:	4413      	add	r3, r2
+ 8001634:	4a04      	ldr	r2, [pc, #16]	@ (8001648 <HAL_IncTick+0x24>)
+ 8001636:	6013      	str	r3, [r2, #0]
+}
+ 8001638:	bf00      	nop
+ 800163a:	46bd      	mov	sp, r7
+ 800163c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001640:	4770      	bx	lr
+ 8001642:	bf00      	nop
+ 8001644:	20000008 	.word	0x20000008
+ 8001648:	200002d8 	.word	0x200002d8
+
+0800164c <HAL_GetTick>:
+  * @note This function is declared as __weak to be overwritten in case of other 
+  *       implementations in user file.
+  * @retval tick value
+  */
+__weak uint32_t HAL_GetTick(void)
+{
+ 800164c:	b480      	push	{r7}
+ 800164e:	af00      	add	r7, sp, #0
+  return uwTick;
+ 8001650:	4b03      	ldr	r3, [pc, #12]	@ (8001660 <HAL_GetTick+0x14>)
+ 8001652:	681b      	ldr	r3, [r3, #0]
+}
+ 8001654:	4618      	mov	r0, r3
+ 8001656:	46bd      	mov	sp, r7
+ 8001658:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800165c:	4770      	bx	lr
+ 800165e:	bf00      	nop
+ 8001660:	200002d8 	.word	0x200002d8
+
+08001664 <HAL_Delay>:
+  *       implementations in user file.
+  * @param Delay specifies the delay time length, in milliseconds.
+  * @retval None
+  */
+__weak void HAL_Delay(uint32_t Delay)
+{
+ 8001664:	b580      	push	{r7, lr}
+ 8001666:	b084      	sub	sp, #16
+ 8001668:	af00      	add	r7, sp, #0
+ 800166a:	6078      	str	r0, [r7, #4]
+  uint32_t tickstart = HAL_GetTick();
+ 800166c:	f7ff ffee 	bl	800164c <HAL_GetTick>
+ 8001670:	60b8      	str	r0, [r7, #8]
+  uint32_t wait = Delay;
+ 8001672:	687b      	ldr	r3, [r7, #4]
+ 8001674:	60fb      	str	r3, [r7, #12]
+
+  /* Add a freq to guarantee minimum wait */
+  if (wait < HAL_MAX_DELAY)
+ 8001676:	68fb      	ldr	r3, [r7, #12]
+ 8001678:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
+ 800167c:	d005      	beq.n	800168a <HAL_Delay+0x26>
+  {
+    wait += (uint32_t)(uwTickFreq);
+ 800167e:	4b0a      	ldr	r3, [pc, #40]	@ (80016a8 <HAL_Delay+0x44>)
+ 8001680:	781b      	ldrb	r3, [r3, #0]
+ 8001682:	461a      	mov	r2, r3
+ 8001684:	68fb      	ldr	r3, [r7, #12]
+ 8001686:	4413      	add	r3, r2
+ 8001688:	60fb      	str	r3, [r7, #12]
+  }
+
+  while((HAL_GetTick() - tickstart) < wait)
+ 800168a:	bf00      	nop
+ 800168c:	f7ff ffde 	bl	800164c <HAL_GetTick>
+ 8001690:	4602      	mov	r2, r0
+ 8001692:	68bb      	ldr	r3, [r7, #8]
+ 8001694:	1ad3      	subs	r3, r2, r3
+ 8001696:	68fa      	ldr	r2, [r7, #12]
+ 8001698:	429a      	cmp	r2, r3
+ 800169a:	d8f7      	bhi.n	800168c <HAL_Delay+0x28>
+  {
+  }
+}
+ 800169c:	bf00      	nop
+ 800169e:	bf00      	nop
+ 80016a0:	3710      	adds	r7, #16
+ 80016a2:	46bd      	mov	sp, r7
+ 80016a4:	bd80      	pop	{r7, pc}
+ 80016a6:	bf00      	nop
+ 80016a8:	20000008 	.word	0x20000008
+
+080016ac <__NVIC_SetPriorityGrouping>:
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ 80016ac:	b480      	push	{r7}
+ 80016ae:	b085      	sub	sp, #20
+ 80016b0:	af00      	add	r7, sp, #0
+ 80016b2:	6078      	str	r0, [r7, #4]
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+ 80016b4:	687b      	ldr	r3, [r7, #4]
+ 80016b6:	f003 0307 	and.w	r3, r3, #7
+ 80016ba:	60fb      	str	r3, [r7, #12]
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+ 80016bc:	4b0c      	ldr	r3, [pc, #48]	@ (80016f0 <__NVIC_SetPriorityGrouping+0x44>)
+ 80016be:	68db      	ldr	r3, [r3, #12]
+ 80016c0:	60bb      	str	r3, [r7, #8]
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+ 80016c2:	68ba      	ldr	r2, [r7, #8]
+ 80016c4:	f64f 03ff 	movw	r3, #63743	@ 0xf8ff
+ 80016c8:	4013      	ands	r3, r2
+ 80016ca:	60bb      	str	r3, [r7, #8]
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+ 80016cc:	68fb      	ldr	r3, [r7, #12]
+ 80016ce:	021a      	lsls	r2, r3, #8
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ 80016d0:	68bb      	ldr	r3, [r7, #8]
+ 80016d2:	4313      	orrs	r3, r2
+  reg_value  =  (reg_value                                   |
+ 80016d4:	f043 63bf 	orr.w	r3, r3, #100139008	@ 0x5f80000
+ 80016d8:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
+ 80016dc:	60bb      	str	r3, [r7, #8]
+  SCB->AIRCR =  reg_value;
+ 80016de:	4a04      	ldr	r2, [pc, #16]	@ (80016f0 <__NVIC_SetPriorityGrouping+0x44>)
+ 80016e0:	68bb      	ldr	r3, [r7, #8]
+ 80016e2:	60d3      	str	r3, [r2, #12]
+}
+ 80016e4:	bf00      	nop
+ 80016e6:	3714      	adds	r7, #20
+ 80016e8:	46bd      	mov	sp, r7
+ 80016ea:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80016ee:	4770      	bx	lr
+ 80016f0:	e000ed00 	.word	0xe000ed00
+
+080016f4 <__NVIC_GetPriorityGrouping>:
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+ 80016f4:	b480      	push	{r7}
+ 80016f6:	af00      	add	r7, sp, #0
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+ 80016f8:	4b04      	ldr	r3, [pc, #16]	@ (800170c <__NVIC_GetPriorityGrouping+0x18>)
+ 80016fa:	68db      	ldr	r3, [r3, #12]
+ 80016fc:	0a1b      	lsrs	r3, r3, #8
+ 80016fe:	f003 0307 	and.w	r3, r3, #7
+}
+ 8001702:	4618      	mov	r0, r3
+ 8001704:	46bd      	mov	sp, r7
+ 8001706:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800170a:	4770      	bx	lr
+ 800170c:	e000ed00 	.word	0xe000ed00
+
+08001710 <__NVIC_EnableIRQ>:
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ 8001710:	b480      	push	{r7}
+ 8001712:	b083      	sub	sp, #12
+ 8001714:	af00      	add	r7, sp, #0
+ 8001716:	4603      	mov	r3, r0
+ 8001718:	71fb      	strb	r3, [r7, #7]
+  if ((int32_t)(IRQn) >= 0)
+ 800171a:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 800171e:	2b00      	cmp	r3, #0
+ 8001720:	db0b      	blt.n	800173a <__NVIC_EnableIRQ+0x2a>
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+ 8001722:	79fb      	ldrb	r3, [r7, #7]
+ 8001724:	f003 021f 	and.w	r2, r3, #31
+ 8001728:	4907      	ldr	r1, [pc, #28]	@ (8001748 <__NVIC_EnableIRQ+0x38>)
+ 800172a:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 800172e:	095b      	lsrs	r3, r3, #5
+ 8001730:	2001      	movs	r0, #1
+ 8001732:	fa00 f202 	lsl.w	r2, r0, r2
+ 8001736:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
+    __COMPILER_BARRIER();
+  }
+}
+ 800173a:	bf00      	nop
+ 800173c:	370c      	adds	r7, #12
+ 800173e:	46bd      	mov	sp, r7
+ 8001740:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001744:	4770      	bx	lr
+ 8001746:	bf00      	nop
+ 8001748:	e000e100 	.word	0xe000e100
+
+0800174c <__NVIC_SetPriority>:
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+ 800174c:	b480      	push	{r7}
+ 800174e:	b083      	sub	sp, #12
+ 8001750:	af00      	add	r7, sp, #0
+ 8001752:	4603      	mov	r3, r0
+ 8001754:	6039      	str	r1, [r7, #0]
+ 8001756:	71fb      	strb	r3, [r7, #7]
+  if ((int32_t)(IRQn) >= 0)
+ 8001758:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 800175c:	2b00      	cmp	r3, #0
+ 800175e:	db0a      	blt.n	8001776 <__NVIC_SetPriority+0x2a>
+  {
+    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ 8001760:	683b      	ldr	r3, [r7, #0]
+ 8001762:	b2da      	uxtb	r2, r3
+ 8001764:	490c      	ldr	r1, [pc, #48]	@ (8001798 <__NVIC_SetPriority+0x4c>)
+ 8001766:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 800176a:	0112      	lsls	r2, r2, #4
+ 800176c:	b2d2      	uxtb	r2, r2
+ 800176e:	440b      	add	r3, r1
+ 8001770:	f883 2300 	strb.w	r2, [r3, #768]	@ 0x300
+  }
+  else
+  {
+    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+ 8001774:	e00a      	b.n	800178c <__NVIC_SetPriority+0x40>
+    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ 8001776:	683b      	ldr	r3, [r7, #0]
+ 8001778:	b2da      	uxtb	r2, r3
+ 800177a:	4908      	ldr	r1, [pc, #32]	@ (800179c <__NVIC_SetPriority+0x50>)
+ 800177c:	79fb      	ldrb	r3, [r7, #7]
+ 800177e:	f003 030f 	and.w	r3, r3, #15
+ 8001782:	3b04      	subs	r3, #4
+ 8001784:	0112      	lsls	r2, r2, #4
+ 8001786:	b2d2      	uxtb	r2, r2
+ 8001788:	440b      	add	r3, r1
+ 800178a:	761a      	strb	r2, [r3, #24]
+}
+ 800178c:	bf00      	nop
+ 800178e:	370c      	adds	r7, #12
+ 8001790:	46bd      	mov	sp, r7
+ 8001792:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001796:	4770      	bx	lr
+ 8001798:	e000e100 	.word	0xe000e100
+ 800179c:	e000ed00 	.word	0xe000ed00
+
+080017a0 <NVIC_EncodePriority>:
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+ 80017a0:	b480      	push	{r7}
+ 80017a2:	b089      	sub	sp, #36	@ 0x24
+ 80017a4:	af00      	add	r7, sp, #0
+ 80017a6:	60f8      	str	r0, [r7, #12]
+ 80017a8:	60b9      	str	r1, [r7, #8]
+ 80017aa:	607a      	str	r2, [r7, #4]
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+ 80017ac:	68fb      	ldr	r3, [r7, #12]
+ 80017ae:	f003 0307 	and.w	r3, r3, #7
+ 80017b2:	61fb      	str	r3, [r7, #28]
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+ 80017b4:	69fb      	ldr	r3, [r7, #28]
+ 80017b6:	f1c3 0307 	rsb	r3, r3, #7
+ 80017ba:	2b04      	cmp	r3, #4
+ 80017bc:	bf28      	it	cs
+ 80017be:	2304      	movcs	r3, #4
+ 80017c0:	61bb      	str	r3, [r7, #24]
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+ 80017c2:	69fb      	ldr	r3, [r7, #28]
+ 80017c4:	3304      	adds	r3, #4
+ 80017c6:	2b06      	cmp	r3, #6
+ 80017c8:	d902      	bls.n	80017d0 <NVIC_EncodePriority+0x30>
+ 80017ca:	69fb      	ldr	r3, [r7, #28]
+ 80017cc:	3b03      	subs	r3, #3
+ 80017ce:	e000      	b.n	80017d2 <NVIC_EncodePriority+0x32>
+ 80017d0:	2300      	movs	r3, #0
+ 80017d2:	617b      	str	r3, [r7, #20]
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ 80017d4:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
+ 80017d8:	69bb      	ldr	r3, [r7, #24]
+ 80017da:	fa02 f303 	lsl.w	r3, r2, r3
+ 80017de:	43da      	mvns	r2, r3
+ 80017e0:	68bb      	ldr	r3, [r7, #8]
+ 80017e2:	401a      	ands	r2, r3
+ 80017e4:	697b      	ldr	r3, [r7, #20]
+ 80017e6:	409a      	lsls	r2, r3
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+ 80017e8:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
+ 80017ec:	697b      	ldr	r3, [r7, #20]
+ 80017ee:	fa01 f303 	lsl.w	r3, r1, r3
+ 80017f2:	43d9      	mvns	r1, r3
+ 80017f4:	687b      	ldr	r3, [r7, #4]
+ 80017f6:	400b      	ands	r3, r1
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ 80017f8:	4313      	orrs	r3, r2
+         );
+}
+ 80017fa:	4618      	mov	r0, r3
+ 80017fc:	3724      	adds	r7, #36	@ 0x24
+ 80017fe:	46bd      	mov	sp, r7
+ 8001800:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001804:	4770      	bx	lr
+
+08001806 <HAL_NVIC_SetPriorityGrouping>:
+  * @note   When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. 
+  *         The pending IRQ priority will be managed only by the subpriority. 
+  * @retval None
+  */
+void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ 8001806:	b580      	push	{r7, lr}
+ 8001808:	b082      	sub	sp, #8
+ 800180a:	af00      	add	r7, sp, #0
+ 800180c:	6078      	str	r0, [r7, #4]
+  /* Check the parameters */
+  assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
+  
+  /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
+  NVIC_SetPriorityGrouping(PriorityGroup);
+ 800180e:	6878      	ldr	r0, [r7, #4]
+ 8001810:	f7ff ff4c 	bl	80016ac <__NVIC_SetPriorityGrouping>
+}
+ 8001814:	bf00      	nop
+ 8001816:	3708      	adds	r7, #8
+ 8001818:	46bd      	mov	sp, r7
+ 800181a:	bd80      	pop	{r7, pc}
+
+0800181c <HAL_NVIC_SetPriority>:
+  *         This parameter can be a value between 0 and 15
+  *         A lower priority value indicates a higher priority.          
+  * @retval None
+  */
+void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
+{ 
+ 800181c:	b580      	push	{r7, lr}
+ 800181e:	b086      	sub	sp, #24
+ 8001820:	af00      	add	r7, sp, #0
+ 8001822:	4603      	mov	r3, r0
+ 8001824:	60b9      	str	r1, [r7, #8]
+ 8001826:	607a      	str	r2, [r7, #4]
+ 8001828:	73fb      	strb	r3, [r7, #15]
+  uint32_t prioritygroup = 0x00U;
+ 800182a:	2300      	movs	r3, #0
+ 800182c:	617b      	str	r3, [r7, #20]
+  
+  /* Check the parameters */
+  assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
+  assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
+  
+  prioritygroup = NVIC_GetPriorityGrouping();
+ 800182e:	f7ff ff61 	bl	80016f4 <__NVIC_GetPriorityGrouping>
+ 8001832:	6178      	str	r0, [r7, #20]
+  
+  NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
+ 8001834:	687a      	ldr	r2, [r7, #4]
+ 8001836:	68b9      	ldr	r1, [r7, #8]
+ 8001838:	6978      	ldr	r0, [r7, #20]
+ 800183a:	f7ff ffb1 	bl	80017a0 <NVIC_EncodePriority>
+ 800183e:	4602      	mov	r2, r0
+ 8001840:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 8001844:	4611      	mov	r1, r2
+ 8001846:	4618      	mov	r0, r3
+ 8001848:	f7ff ff80 	bl	800174c <__NVIC_SetPriority>
+}
+ 800184c:	bf00      	nop
+ 800184e:	3718      	adds	r7, #24
+ 8001850:	46bd      	mov	sp, r7
+ 8001852:	bd80      	pop	{r7, pc}
+
+08001854 <HAL_NVIC_EnableIRQ>:
+  *         This parameter can be an enumerator of IRQn_Type enumeration
+  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
+  * @retval None
+  */
+void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ 8001854:	b580      	push	{r7, lr}
+ 8001856:	b082      	sub	sp, #8
+ 8001858:	af00      	add	r7, sp, #0
+ 800185a:	4603      	mov	r3, r0
+ 800185c:	71fb      	strb	r3, [r7, #7]
+  /* Check the parameters */
+  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
+  
+  /* Enable interrupt */
+  NVIC_EnableIRQ(IRQn);
+ 800185e:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 8001862:	4618      	mov	r0, r3
+ 8001864:	f7ff ff54 	bl	8001710 <__NVIC_EnableIRQ>
+}
+ 8001868:	bf00      	nop
+ 800186a:	3708      	adds	r7, #8
+ 800186c:	46bd      	mov	sp, r7
+ 800186e:	bd80      	pop	{r7, pc}
+
+08001870 <HAL_CRC_Init>:
+  *         parameters in the CRC_InitTypeDef and create the associated handle.
+  * @param  hcrc CRC handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
+{
+ 8001870:	b580      	push	{r7, lr}
+ 8001872:	b082      	sub	sp, #8
+ 8001874:	af00      	add	r7, sp, #0
+ 8001876:	6078      	str	r0, [r7, #4]
+  /* Check the CRC handle allocation */
+  if (hcrc == NULL)
+ 8001878:	687b      	ldr	r3, [r7, #4]
+ 800187a:	2b00      	cmp	r3, #0
+ 800187c:	d101      	bne.n	8001882 <HAL_CRC_Init+0x12>
+  {
+    return HAL_ERROR;
+ 800187e:	2301      	movs	r3, #1
+ 8001880:	e00e      	b.n	80018a0 <HAL_CRC_Init+0x30>
+  }
+
+  /* Check the parameters */
+  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
+
+  if (hcrc->State == HAL_CRC_STATE_RESET)
+ 8001882:	687b      	ldr	r3, [r7, #4]
+ 8001884:	795b      	ldrb	r3, [r3, #5]
+ 8001886:	b2db      	uxtb	r3, r3
+ 8001888:	2b00      	cmp	r3, #0
+ 800188a:	d105      	bne.n	8001898 <HAL_CRC_Init+0x28>
+  {
+    /* Allocate lock resource and initialize it */
+    hcrc->Lock = HAL_UNLOCKED;
+ 800188c:	687b      	ldr	r3, [r7, #4]
+ 800188e:	2200      	movs	r2, #0
+ 8001890:	711a      	strb	r2, [r3, #4]
+    /* Init the low level hardware */
+    HAL_CRC_MspInit(hcrc);
+ 8001892:	6878      	ldr	r0, [r7, #4]
+ 8001894:	f7ff fa76 	bl	8000d84 <HAL_CRC_MspInit>
+  }
+
+  /* Change CRC peripheral state */
+  hcrc->State = HAL_CRC_STATE_READY;
+ 8001898:	687b      	ldr	r3, [r7, #4]
+ 800189a:	2201      	movs	r2, #1
+ 800189c:	715a      	strb	r2, [r3, #5]
+
+  /* Return function status */
+  return HAL_OK;
+ 800189e:	2300      	movs	r3, #0
+}
+ 80018a0:	4618      	mov	r0, r3
+ 80018a2:	3708      	adds	r7, #8
+ 80018a4:	46bd      	mov	sp, r7
+ 80018a6:	bd80      	pop	{r7, pc}
+
+080018a8 <HAL_DMA2D_Init>:
+  * @param  hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
+  *                 the configuration information for the DMA2D.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
+{
+ 80018a8:	b580      	push	{r7, lr}
+ 80018aa:	b082      	sub	sp, #8
+ 80018ac:	af00      	add	r7, sp, #0
+ 80018ae:	6078      	str	r0, [r7, #4]
+  /* Check the DMA2D peripheral state */
+  if (hdma2d == NULL)
+ 80018b0:	687b      	ldr	r3, [r7, #4]
+ 80018b2:	2b00      	cmp	r3, #0
+ 80018b4:	d101      	bne.n	80018ba <HAL_DMA2D_Init+0x12>
+  {
+    return HAL_ERROR;
+ 80018b6:	2301      	movs	r3, #1
+ 80018b8:	e03b      	b.n	8001932 <HAL_DMA2D_Init+0x8a>
+
+    /* Init the low level hardware */
+    hdma2d->MspInitCallback(hdma2d);
+  }
+#else
+  if (hdma2d->State == HAL_DMA2D_STATE_RESET)
+ 80018ba:	687b      	ldr	r3, [r7, #4]
+ 80018bc:	f893 3039 	ldrb.w	r3, [r3, #57]	@ 0x39
+ 80018c0:	b2db      	uxtb	r3, r3
+ 80018c2:	2b00      	cmp	r3, #0
+ 80018c4:	d106      	bne.n	80018d4 <HAL_DMA2D_Init+0x2c>
+  {
+    /* Allocate lock resource and initialize it */
+    hdma2d->Lock = HAL_UNLOCKED;
+ 80018c6:	687b      	ldr	r3, [r7, #4]
+ 80018c8:	2200      	movs	r2, #0
+ 80018ca:	f883 2038 	strb.w	r2, [r3, #56]	@ 0x38
+    /* Init the low level hardware */
+    HAL_DMA2D_MspInit(hdma2d);
+ 80018ce:	6878      	ldr	r0, [r7, #4]
+ 80018d0:	f7ff fa7a 	bl	8000dc8 <HAL_DMA2D_MspInit>
+  }
+#endif /* (USE_HAL_DMA2D_REGISTER_CALLBACKS) */
+
+  /* Change DMA2D peripheral state */
+  hdma2d->State = HAL_DMA2D_STATE_BUSY;
+ 80018d4:	687b      	ldr	r3, [r7, #4]
+ 80018d6:	2202      	movs	r2, #2
+ 80018d8:	f883 2039 	strb.w	r2, [r3, #57]	@ 0x39
+
+  /* DMA2D CR register configuration -------------------------------------------*/
+  MODIFY_REG(hdma2d->Instance->CR, DMA2D_CR_MODE, hdma2d->Init.Mode);
+ 80018dc:	687b      	ldr	r3, [r7, #4]
+ 80018de:	681b      	ldr	r3, [r3, #0]
+ 80018e0:	681b      	ldr	r3, [r3, #0]
+ 80018e2:	f423 3140 	bic.w	r1, r3, #196608	@ 0x30000
+ 80018e6:	687b      	ldr	r3, [r7, #4]
+ 80018e8:	685a      	ldr	r2, [r3, #4]
+ 80018ea:	687b      	ldr	r3, [r7, #4]
+ 80018ec:	681b      	ldr	r3, [r3, #0]
+ 80018ee:	430a      	orrs	r2, r1
+ 80018f0:	601a      	str	r2, [r3, #0]
+
+  /* DMA2D OPFCCR register configuration ---------------------------------------*/
+  MODIFY_REG(hdma2d->Instance->OPFCCR, DMA2D_OPFCCR_CM, hdma2d->Init.ColorMode);
+ 80018f2:	687b      	ldr	r3, [r7, #4]
+ 80018f4:	681b      	ldr	r3, [r3, #0]
+ 80018f6:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
+ 80018f8:	f023 0107 	bic.w	r1, r3, #7
+ 80018fc:	687b      	ldr	r3, [r7, #4]
+ 80018fe:	689a      	ldr	r2, [r3, #8]
+ 8001900:	687b      	ldr	r3, [r7, #4]
+ 8001902:	681b      	ldr	r3, [r3, #0]
+ 8001904:	430a      	orrs	r2, r1
+ 8001906:	635a      	str	r2, [r3, #52]	@ 0x34
+
+  /* DMA2D OOR register configuration ------------------------------------------*/
+  MODIFY_REG(hdma2d->Instance->OOR, DMA2D_OOR_LO, hdma2d->Init.OutputOffset);
+ 8001908:	687b      	ldr	r3, [r7, #4]
+ 800190a:	681b      	ldr	r3, [r3, #0]
+ 800190c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 800190e:	f423 537f 	bic.w	r3, r3, #16320	@ 0x3fc0
+ 8001912:	f023 033f 	bic.w	r3, r3, #63	@ 0x3f
+ 8001916:	687a      	ldr	r2, [r7, #4]
+ 8001918:	68d1      	ldr	r1, [r2, #12]
+ 800191a:	687a      	ldr	r2, [r7, #4]
+ 800191c:	6812      	ldr	r2, [r2, #0]
+ 800191e:	430b      	orrs	r3, r1
+ 8001920:	6413      	str	r3, [r2, #64]	@ 0x40
+
+
+  /* Update error code */
+  hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
+ 8001922:	687b      	ldr	r3, [r7, #4]
+ 8001924:	2200      	movs	r2, #0
+ 8001926:	63da      	str	r2, [r3, #60]	@ 0x3c
+
+  /* Initialize the DMA2D state*/
+  hdma2d->State  = HAL_DMA2D_STATE_READY;
+ 8001928:	687b      	ldr	r3, [r7, #4]
+ 800192a:	2201      	movs	r2, #1
+ 800192c:	f883 2039 	strb.w	r2, [r3, #57]	@ 0x39
+
+  return HAL_OK;
+ 8001930:	2300      	movs	r3, #0
+}
+ 8001932:	4618      	mov	r0, r3
+ 8001934:	3708      	adds	r7, #8
+ 8001936:	46bd      	mov	sp, r7
+ 8001938:	bd80      	pop	{r7, pc}
+
+0800193a <HAL_DMA2D_IRQHandler>:
+  * @param  hdma2d Pointer to a DMA2D_HandleTypeDef structure that contains
+  *                 the configuration information for the DMA2D.
+  * @retval HAL status
+  */
+void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
+{
+ 800193a:	b580      	push	{r7, lr}
+ 800193c:	b084      	sub	sp, #16
+ 800193e:	af00      	add	r7, sp, #0
+ 8001940:	6078      	str	r0, [r7, #4]
+  uint32_t isrflags = READ_REG(hdma2d->Instance->ISR);
+ 8001942:	687b      	ldr	r3, [r7, #4]
+ 8001944:	681b      	ldr	r3, [r3, #0]
+ 8001946:	685b      	ldr	r3, [r3, #4]
+ 8001948:	60fb      	str	r3, [r7, #12]
+  uint32_t crflags = READ_REG(hdma2d->Instance->CR);
+ 800194a:	687b      	ldr	r3, [r7, #4]
+ 800194c:	681b      	ldr	r3, [r3, #0]
+ 800194e:	681b      	ldr	r3, [r3, #0]
+ 8001950:	60bb      	str	r3, [r7, #8]
+
+  /* Transfer Error Interrupt management ***************************************/
+  if ((isrflags & DMA2D_FLAG_TE) != 0U)
+ 8001952:	68fb      	ldr	r3, [r7, #12]
+ 8001954:	f003 0301 	and.w	r3, r3, #1
+ 8001958:	2b00      	cmp	r3, #0
+ 800195a:	d026      	beq.n	80019aa <HAL_DMA2D_IRQHandler+0x70>
+  {
+    if ((crflags & DMA2D_IT_TE) != 0U)
+ 800195c:	68bb      	ldr	r3, [r7, #8]
+ 800195e:	f403 7380 	and.w	r3, r3, #256	@ 0x100
+ 8001962:	2b00      	cmp	r3, #0
+ 8001964:	d021      	beq.n	80019aa <HAL_DMA2D_IRQHandler+0x70>
+    {
+      /* Disable the transfer Error interrupt */
+      __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TE);
+ 8001966:	687b      	ldr	r3, [r7, #4]
+ 8001968:	681b      	ldr	r3, [r3, #0]
+ 800196a:	681a      	ldr	r2, [r3, #0]
+ 800196c:	687b      	ldr	r3, [r7, #4]
+ 800196e:	681b      	ldr	r3, [r3, #0]
+ 8001970:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
+ 8001974:	601a      	str	r2, [r3, #0]
+
+      /* Update error code */
+      hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
+ 8001976:	687b      	ldr	r3, [r7, #4]
+ 8001978:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
+ 800197a:	f043 0201 	orr.w	r2, r3, #1
+ 800197e:	687b      	ldr	r3, [r7, #4]
+ 8001980:	63da      	str	r2, [r3, #60]	@ 0x3c
+
+      /* Clear the transfer error flag */
+      __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
+ 8001982:	687b      	ldr	r3, [r7, #4]
+ 8001984:	681b      	ldr	r3, [r3, #0]
+ 8001986:	2201      	movs	r2, #1
+ 8001988:	609a      	str	r2, [r3, #8]
+
+      /* Change DMA2D state */
+      hdma2d->State = HAL_DMA2D_STATE_ERROR;
+ 800198a:	687b      	ldr	r3, [r7, #4]
+ 800198c:	2204      	movs	r2, #4
+ 800198e:	f883 2039 	strb.w	r2, [r3, #57]	@ 0x39
+
+      /* Process Unlocked */
+      __HAL_UNLOCK(hdma2d);
+ 8001992:	687b      	ldr	r3, [r7, #4]
+ 8001994:	2200      	movs	r2, #0
+ 8001996:	f883 2038 	strb.w	r2, [r3, #56]	@ 0x38
+
+      if (hdma2d->XferErrorCallback != NULL)
+ 800199a:	687b      	ldr	r3, [r7, #4]
+ 800199c:	695b      	ldr	r3, [r3, #20]
+ 800199e:	2b00      	cmp	r3, #0
+ 80019a0:	d003      	beq.n	80019aa <HAL_DMA2D_IRQHandler+0x70>
+      {
+        /* Transfer error Callback */
+        hdma2d->XferErrorCallback(hdma2d);
+ 80019a2:	687b      	ldr	r3, [r7, #4]
+ 80019a4:	695b      	ldr	r3, [r3, #20]
+ 80019a6:	6878      	ldr	r0, [r7, #4]
+ 80019a8:	4798      	blx	r3
+      }
+    }
+  }
+  /* Configuration Error Interrupt management **********************************/
+  if ((isrflags & DMA2D_FLAG_CE) != 0U)
+ 80019aa:	68fb      	ldr	r3, [r7, #12]
+ 80019ac:	f003 0320 	and.w	r3, r3, #32
+ 80019b0:	2b00      	cmp	r3, #0
+ 80019b2:	d026      	beq.n	8001a02 <HAL_DMA2D_IRQHandler+0xc8>
+  {
+    if ((crflags & DMA2D_IT_CE) != 0U)
+ 80019b4:	68bb      	ldr	r3, [r7, #8]
+ 80019b6:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
+ 80019ba:	2b00      	cmp	r3, #0
+ 80019bc:	d021      	beq.n	8001a02 <HAL_DMA2D_IRQHandler+0xc8>
+    {
+      /* Disable the Configuration Error interrupt */
+      __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CE);
+ 80019be:	687b      	ldr	r3, [r7, #4]
+ 80019c0:	681b      	ldr	r3, [r3, #0]
+ 80019c2:	681a      	ldr	r2, [r3, #0]
+ 80019c4:	687b      	ldr	r3, [r7, #4]
+ 80019c6:	681b      	ldr	r3, [r3, #0]
+ 80019c8:	f422 5200 	bic.w	r2, r2, #8192	@ 0x2000
+ 80019cc:	601a      	str	r2, [r3, #0]
+
+      /* Clear the Configuration error flag */
+      __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
+ 80019ce:	687b      	ldr	r3, [r7, #4]
+ 80019d0:	681b      	ldr	r3, [r3, #0]
+ 80019d2:	2220      	movs	r2, #32
+ 80019d4:	609a      	str	r2, [r3, #8]
+
+      /* Update error code */
+      hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
+ 80019d6:	687b      	ldr	r3, [r7, #4]
+ 80019d8:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
+ 80019da:	f043 0202 	orr.w	r2, r3, #2
+ 80019de:	687b      	ldr	r3, [r7, #4]
+ 80019e0:	63da      	str	r2, [r3, #60]	@ 0x3c
+
+      /* Change DMA2D state */
+      hdma2d->State = HAL_DMA2D_STATE_ERROR;
+ 80019e2:	687b      	ldr	r3, [r7, #4]
+ 80019e4:	2204      	movs	r2, #4
+ 80019e6:	f883 2039 	strb.w	r2, [r3, #57]	@ 0x39
+
+      /* Process Unlocked */
+      __HAL_UNLOCK(hdma2d);
+ 80019ea:	687b      	ldr	r3, [r7, #4]
+ 80019ec:	2200      	movs	r2, #0
+ 80019ee:	f883 2038 	strb.w	r2, [r3, #56]	@ 0x38
+
+      if (hdma2d->XferErrorCallback != NULL)
+ 80019f2:	687b      	ldr	r3, [r7, #4]
+ 80019f4:	695b      	ldr	r3, [r3, #20]
+ 80019f6:	2b00      	cmp	r3, #0
+ 80019f8:	d003      	beq.n	8001a02 <HAL_DMA2D_IRQHandler+0xc8>
+      {
+        /* Transfer error Callback */
+        hdma2d->XferErrorCallback(hdma2d);
+ 80019fa:	687b      	ldr	r3, [r7, #4]
+ 80019fc:	695b      	ldr	r3, [r3, #20]
+ 80019fe:	6878      	ldr	r0, [r7, #4]
+ 8001a00:	4798      	blx	r3
+      }
+    }
+  }
+  /* CLUT access Error Interrupt management ***********************************/
+  if ((isrflags & DMA2D_FLAG_CAE) != 0U)
+ 8001a02:	68fb      	ldr	r3, [r7, #12]
+ 8001a04:	f003 0308 	and.w	r3, r3, #8
+ 8001a08:	2b00      	cmp	r3, #0
+ 8001a0a:	d026      	beq.n	8001a5a <HAL_DMA2D_IRQHandler+0x120>
+  {
+    if ((crflags & DMA2D_IT_CAE) != 0U)
+ 8001a0c:	68bb      	ldr	r3, [r7, #8]
+ 8001a0e:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
+ 8001a12:	2b00      	cmp	r3, #0
+ 8001a14:	d021      	beq.n	8001a5a <HAL_DMA2D_IRQHandler+0x120>
+    {
+      /* Disable the CLUT access error interrupt */
+      __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CAE);
+ 8001a16:	687b      	ldr	r3, [r7, #4]
+ 8001a18:	681b      	ldr	r3, [r3, #0]
+ 8001a1a:	681a      	ldr	r2, [r3, #0]
+ 8001a1c:	687b      	ldr	r3, [r7, #4]
+ 8001a1e:	681b      	ldr	r3, [r3, #0]
+ 8001a20:	f422 6200 	bic.w	r2, r2, #2048	@ 0x800
+ 8001a24:	601a      	str	r2, [r3, #0]
+
+      /* Clear the CLUT access error flag */
+      __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE);
+ 8001a26:	687b      	ldr	r3, [r7, #4]
+ 8001a28:	681b      	ldr	r3, [r3, #0]
+ 8001a2a:	2208      	movs	r2, #8
+ 8001a2c:	609a      	str	r2, [r3, #8]
+
+      /* Update error code */
+      hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CAE;
+ 8001a2e:	687b      	ldr	r3, [r7, #4]
+ 8001a30:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
+ 8001a32:	f043 0204 	orr.w	r2, r3, #4
+ 8001a36:	687b      	ldr	r3, [r7, #4]
+ 8001a38:	63da      	str	r2, [r3, #60]	@ 0x3c
+
+      /* Change DMA2D state */
+      hdma2d->State = HAL_DMA2D_STATE_ERROR;
+ 8001a3a:	687b      	ldr	r3, [r7, #4]
+ 8001a3c:	2204      	movs	r2, #4
+ 8001a3e:	f883 2039 	strb.w	r2, [r3, #57]	@ 0x39
+
+      /* Process Unlocked */
+      __HAL_UNLOCK(hdma2d);
+ 8001a42:	687b      	ldr	r3, [r7, #4]
+ 8001a44:	2200      	movs	r2, #0
+ 8001a46:	f883 2038 	strb.w	r2, [r3, #56]	@ 0x38
+
+      if (hdma2d->XferErrorCallback != NULL)
+ 8001a4a:	687b      	ldr	r3, [r7, #4]
+ 8001a4c:	695b      	ldr	r3, [r3, #20]
+ 8001a4e:	2b00      	cmp	r3, #0
+ 8001a50:	d003      	beq.n	8001a5a <HAL_DMA2D_IRQHandler+0x120>
+      {
+        /* Transfer error Callback */
+        hdma2d->XferErrorCallback(hdma2d);
+ 8001a52:	687b      	ldr	r3, [r7, #4]
+ 8001a54:	695b      	ldr	r3, [r3, #20]
+ 8001a56:	6878      	ldr	r0, [r7, #4]
+ 8001a58:	4798      	blx	r3
+      }
+    }
+  }
+  /* Transfer watermark Interrupt management **********************************/
+  if ((isrflags & DMA2D_FLAG_TW) != 0U)
+ 8001a5a:	68fb      	ldr	r3, [r7, #12]
+ 8001a5c:	f003 0304 	and.w	r3, r3, #4
+ 8001a60:	2b00      	cmp	r3, #0
+ 8001a62:	d013      	beq.n	8001a8c <HAL_DMA2D_IRQHandler+0x152>
+  {
+    if ((crflags & DMA2D_IT_TW) != 0U)
+ 8001a64:	68bb      	ldr	r3, [r7, #8]
+ 8001a66:	f403 6380 	and.w	r3, r3, #1024	@ 0x400
+ 8001a6a:	2b00      	cmp	r3, #0
+ 8001a6c:	d00e      	beq.n	8001a8c <HAL_DMA2D_IRQHandler+0x152>
+    {
+      /* Disable the transfer watermark interrupt */
+      __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TW);
+ 8001a6e:	687b      	ldr	r3, [r7, #4]
+ 8001a70:	681b      	ldr	r3, [r3, #0]
+ 8001a72:	681a      	ldr	r2, [r3, #0]
+ 8001a74:	687b      	ldr	r3, [r7, #4]
+ 8001a76:	681b      	ldr	r3, [r3, #0]
+ 8001a78:	f422 6280 	bic.w	r2, r2, #1024	@ 0x400
+ 8001a7c:	601a      	str	r2, [r3, #0]
+
+      /* Clear the transfer watermark flag */
+      __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TW);
+ 8001a7e:	687b      	ldr	r3, [r7, #4]
+ 8001a80:	681b      	ldr	r3, [r3, #0]
+ 8001a82:	2204      	movs	r2, #4
+ 8001a84:	609a      	str	r2, [r3, #8]
+
+      /* Transfer watermark Callback */
+#if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
+      hdma2d->LineEventCallback(hdma2d);
+#else
+      HAL_DMA2D_LineEventCallback(hdma2d);
+ 8001a86:	6878      	ldr	r0, [r7, #4]
+ 8001a88:	f000 f853 	bl	8001b32 <HAL_DMA2D_LineEventCallback>
+#endif /* USE_HAL_DMA2D_REGISTER_CALLBACKS */
+
+    }
+  }
+  /* Transfer Complete Interrupt management ************************************/
+  if ((isrflags & DMA2D_FLAG_TC) != 0U)
+ 8001a8c:	68fb      	ldr	r3, [r7, #12]
+ 8001a8e:	f003 0302 	and.w	r3, r3, #2
+ 8001a92:	2b00      	cmp	r3, #0
+ 8001a94:	d024      	beq.n	8001ae0 <HAL_DMA2D_IRQHandler+0x1a6>
+  {
+    if ((crflags & DMA2D_IT_TC) != 0U)
+ 8001a96:	68bb      	ldr	r3, [r7, #8]
+ 8001a98:	f403 7300 	and.w	r3, r3, #512	@ 0x200
+ 8001a9c:	2b00      	cmp	r3, #0
+ 8001a9e:	d01f      	beq.n	8001ae0 <HAL_DMA2D_IRQHandler+0x1a6>
+    {
+      /* Disable the transfer complete interrupt */
+      __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TC);
+ 8001aa0:	687b      	ldr	r3, [r7, #4]
+ 8001aa2:	681b      	ldr	r3, [r3, #0]
+ 8001aa4:	681a      	ldr	r2, [r3, #0]
+ 8001aa6:	687b      	ldr	r3, [r7, #4]
+ 8001aa8:	681b      	ldr	r3, [r3, #0]
+ 8001aaa:	f422 7200 	bic.w	r2, r2, #512	@ 0x200
+ 8001aae:	601a      	str	r2, [r3, #0]
+
+      /* Clear the transfer complete flag */
+      __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
+ 8001ab0:	687b      	ldr	r3, [r7, #4]
+ 8001ab2:	681b      	ldr	r3, [r3, #0]
+ 8001ab4:	2202      	movs	r2, #2
+ 8001ab6:	609a      	str	r2, [r3, #8]
+
+      /* Update error code */
+      hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
+ 8001ab8:	687b      	ldr	r3, [r7, #4]
+ 8001aba:	6bda      	ldr	r2, [r3, #60]	@ 0x3c
+ 8001abc:	687b      	ldr	r3, [r7, #4]
+ 8001abe:	63da      	str	r2, [r3, #60]	@ 0x3c
+
+      /* Change DMA2D state */
+      hdma2d->State = HAL_DMA2D_STATE_READY;
+ 8001ac0:	687b      	ldr	r3, [r7, #4]
+ 8001ac2:	2201      	movs	r2, #1
+ 8001ac4:	f883 2039 	strb.w	r2, [r3, #57]	@ 0x39
+
+      /* Process Unlocked */
+      __HAL_UNLOCK(hdma2d);
+ 8001ac8:	687b      	ldr	r3, [r7, #4]
+ 8001aca:	2200      	movs	r2, #0
+ 8001acc:	f883 2038 	strb.w	r2, [r3, #56]	@ 0x38
+
+      if (hdma2d->XferCpltCallback != NULL)
+ 8001ad0:	687b      	ldr	r3, [r7, #4]
+ 8001ad2:	691b      	ldr	r3, [r3, #16]
+ 8001ad4:	2b00      	cmp	r3, #0
+ 8001ad6:	d003      	beq.n	8001ae0 <HAL_DMA2D_IRQHandler+0x1a6>
+      {
+        /* Transfer complete Callback */
+        hdma2d->XferCpltCallback(hdma2d);
+ 8001ad8:	687b      	ldr	r3, [r7, #4]
+ 8001ada:	691b      	ldr	r3, [r3, #16]
+ 8001adc:	6878      	ldr	r0, [r7, #4]
+ 8001ade:	4798      	blx	r3
+      }
+    }
+  }
+  /* CLUT Transfer Complete Interrupt management ******************************/
+  if ((isrflags & DMA2D_FLAG_CTC) != 0U)
+ 8001ae0:	68fb      	ldr	r3, [r7, #12]
+ 8001ae2:	f003 0310 	and.w	r3, r3, #16
+ 8001ae6:	2b00      	cmp	r3, #0
+ 8001ae8:	d01f      	beq.n	8001b2a <HAL_DMA2D_IRQHandler+0x1f0>
+  {
+    if ((crflags & DMA2D_IT_CTC) != 0U)
+ 8001aea:	68bb      	ldr	r3, [r7, #8]
+ 8001aec:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
+ 8001af0:	2b00      	cmp	r3, #0
+ 8001af2:	d01a      	beq.n	8001b2a <HAL_DMA2D_IRQHandler+0x1f0>
+    {
+      /* Disable the CLUT transfer complete interrupt */
+      __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CTC);
+ 8001af4:	687b      	ldr	r3, [r7, #4]
+ 8001af6:	681b      	ldr	r3, [r3, #0]
+ 8001af8:	681a      	ldr	r2, [r3, #0]
+ 8001afa:	687b      	ldr	r3, [r7, #4]
+ 8001afc:	681b      	ldr	r3, [r3, #0]
+ 8001afe:	f422 5280 	bic.w	r2, r2, #4096	@ 0x1000
+ 8001b02:	601a      	str	r2, [r3, #0]
+
+      /* Clear the CLUT transfer complete flag */
+      __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CTC);
+ 8001b04:	687b      	ldr	r3, [r7, #4]
+ 8001b06:	681b      	ldr	r3, [r3, #0]
+ 8001b08:	2210      	movs	r2, #16
+ 8001b0a:	609a      	str	r2, [r3, #8]
+
+      /* Update error code */
+      hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
+ 8001b0c:	687b      	ldr	r3, [r7, #4]
+ 8001b0e:	6bda      	ldr	r2, [r3, #60]	@ 0x3c
+ 8001b10:	687b      	ldr	r3, [r7, #4]
+ 8001b12:	63da      	str	r2, [r3, #60]	@ 0x3c
+
+      /* Change DMA2D state */
+      hdma2d->State = HAL_DMA2D_STATE_READY;
+ 8001b14:	687b      	ldr	r3, [r7, #4]
+ 8001b16:	2201      	movs	r2, #1
+ 8001b18:	f883 2039 	strb.w	r2, [r3, #57]	@ 0x39
+
+      /* Process Unlocked */
+      __HAL_UNLOCK(hdma2d);
+ 8001b1c:	687b      	ldr	r3, [r7, #4]
+ 8001b1e:	2200      	movs	r2, #0
+ 8001b20:	f883 2038 	strb.w	r2, [r3, #56]	@ 0x38
+
+      /* CLUT Transfer complete Callback */
+#if (USE_HAL_DMA2D_REGISTER_CALLBACKS == 1)
+      hdma2d->CLUTLoadingCpltCallback(hdma2d);
+#else
+      HAL_DMA2D_CLUTLoadingCpltCallback(hdma2d);
+ 8001b24:	6878      	ldr	r0, [r7, #4]
+ 8001b26:	f000 f80e 	bl	8001b46 <HAL_DMA2D_CLUTLoadingCpltCallback>
+#endif /* USE_HAL_DMA2D_REGISTER_CALLBACKS */
+    }
+  }
+
+}
+ 8001b2a:	bf00      	nop
+ 8001b2c:	3710      	adds	r7, #16
+ 8001b2e:	46bd      	mov	sp, r7
+ 8001b30:	bd80      	pop	{r7, pc}
+
+08001b32 <HAL_DMA2D_LineEventCallback>:
+  * @param  hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
+  *                 the configuration information for the DMA2D.
+  * @retval None
+  */
+__weak void HAL_DMA2D_LineEventCallback(DMA2D_HandleTypeDef *hdma2d)
+{
+ 8001b32:	b480      	push	{r7}
+ 8001b34:	b083      	sub	sp, #12
+ 8001b36:	af00      	add	r7, sp, #0
+ 8001b38:	6078      	str	r0, [r7, #4]
+  UNUSED(hdma2d);
+
+  /* NOTE : This function should not be modified; when the callback is needed,
+            the HAL_DMA2D_LineEventCallback can be implemented in the user file.
+   */
+}
+ 8001b3a:	bf00      	nop
+ 8001b3c:	370c      	adds	r7, #12
+ 8001b3e:	46bd      	mov	sp, r7
+ 8001b40:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001b44:	4770      	bx	lr
+
+08001b46 <HAL_DMA2D_CLUTLoadingCpltCallback>:
+  * @param  hdma2d pointer to a DMA2D_HandleTypeDef structure that contains
+  *                 the configuration information for the DMA2D.
+  * @retval None
+  */
+__weak void HAL_DMA2D_CLUTLoadingCpltCallback(DMA2D_HandleTypeDef *hdma2d)
+{
+ 8001b46:	b480      	push	{r7}
+ 8001b48:	b083      	sub	sp, #12
+ 8001b4a:	af00      	add	r7, sp, #0
+ 8001b4c:	6078      	str	r0, [r7, #4]
+  UNUSED(hdma2d);
+
+  /* NOTE : This function should not be modified; when the callback is needed,
+            the HAL_DMA2D_CLUTLoadingCpltCallback can be implemented in the user file.
+   */
+}
+ 8001b4e:	bf00      	nop
+ 8001b50:	370c      	adds	r7, #12
+ 8001b52:	46bd      	mov	sp, r7
+ 8001b54:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001b58:	4770      	bx	lr
+	...
+
+08001b5c <HAL_DMA2D_ConfigLayer>:
+  *                   This parameter can be one of the following values:
+  *                   DMA2D_BACKGROUND_LAYER(0) / DMA2D_FOREGROUND_LAYER(1)
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
+{
+ 8001b5c:	b480      	push	{r7}
+ 8001b5e:	b087      	sub	sp, #28
+ 8001b60:	af00      	add	r7, sp, #0
+ 8001b62:	6078      	str	r0, [r7, #4]
+ 8001b64:	6039      	str	r1, [r7, #0]
+  uint32_t regValue;
+
+  /* Check the parameters */
+  assert_param(IS_DMA2D_LAYER(LayerIdx));
+  assert_param(IS_DMA2D_OFFSET(hdma2d->LayerCfg[LayerIdx].InputOffset));
+  if (hdma2d->Init.Mode != DMA2D_R2M)
+ 8001b66:	687b      	ldr	r3, [r7, #4]
+ 8001b68:	685b      	ldr	r3, [r3, #4]
+ 8001b6a:	f5b3 3f40 	cmp.w	r3, #196608	@ 0x30000
+      assert_param(IS_DMA2D_ALPHA_MODE(hdma2d->LayerCfg[LayerIdx].AlphaMode));
+    }
+  }
+
+  /* Process locked */
+  __HAL_LOCK(hdma2d);
+ 8001b6e:	687b      	ldr	r3, [r7, #4]
+ 8001b70:	f893 3038 	ldrb.w	r3, [r3, #56]	@ 0x38
+ 8001b74:	2b01      	cmp	r3, #1
+ 8001b76:	d101      	bne.n	8001b7c <HAL_DMA2D_ConfigLayer+0x20>
+ 8001b78:	2302      	movs	r3, #2
+ 8001b7a:	e079      	b.n	8001c70 <HAL_DMA2D_ConfigLayer+0x114>
+ 8001b7c:	687b      	ldr	r3, [r7, #4]
+ 8001b7e:	2201      	movs	r2, #1
+ 8001b80:	f883 2038 	strb.w	r2, [r3, #56]	@ 0x38
+
+  /* Change DMA2D peripheral state */
+  hdma2d->State = HAL_DMA2D_STATE_BUSY;
+ 8001b84:	687b      	ldr	r3, [r7, #4]
+ 8001b86:	2202      	movs	r2, #2
+ 8001b88:	f883 2039 	strb.w	r2, [r3, #57]	@ 0x39
+
+  pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
+ 8001b8c:	683b      	ldr	r3, [r7, #0]
+ 8001b8e:	011b      	lsls	r3, r3, #4
+ 8001b90:	3318      	adds	r3, #24
+ 8001b92:	687a      	ldr	r2, [r7, #4]
+ 8001b94:	4413      	add	r3, r2
+ 8001b96:	613b      	str	r3, [r7, #16]
+
+  /* Prepare the value to be written to the BGPFCCR or FGPFCCR register */
+  regValue = pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << DMA2D_BGPFCCR_AM_Pos);
+ 8001b98:	693b      	ldr	r3, [r7, #16]
+ 8001b9a:	685a      	ldr	r2, [r3, #4]
+ 8001b9c:	693b      	ldr	r3, [r7, #16]
+ 8001b9e:	689b      	ldr	r3, [r3, #8]
+ 8001ba0:	041b      	lsls	r3, r3, #16
+ 8001ba2:	4313      	orrs	r3, r2
+ 8001ba4:	617b      	str	r3, [r7, #20]
+  regMask  = DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA;
+ 8001ba6:	4b35      	ldr	r3, [pc, #212]	@ (8001c7c <HAL_DMA2D_ConfigLayer+0x120>)
+ 8001ba8:	60fb      	str	r3, [r7, #12]
+
+
+  if ((pLayerCfg->InputColorMode == DMA2D_INPUT_A4) || (pLayerCfg->InputColorMode == DMA2D_INPUT_A8))
+ 8001baa:	693b      	ldr	r3, [r7, #16]
+ 8001bac:	685b      	ldr	r3, [r3, #4]
+ 8001bae:	2b0a      	cmp	r3, #10
+ 8001bb0:	d003      	beq.n	8001bba <HAL_DMA2D_ConfigLayer+0x5e>
+ 8001bb2:	693b      	ldr	r3, [r7, #16]
+ 8001bb4:	685b      	ldr	r3, [r3, #4]
+ 8001bb6:	2b09      	cmp	r3, #9
+ 8001bb8:	d107      	bne.n	8001bca <HAL_DMA2D_ConfigLayer+0x6e>
+  {
+    regValue |= (pLayerCfg->InputAlpha & DMA2D_BGPFCCR_ALPHA);
+ 8001bba:	693b      	ldr	r3, [r7, #16]
+ 8001bbc:	68db      	ldr	r3, [r3, #12]
+ 8001bbe:	f003 437f 	and.w	r3, r3, #4278190080	@ 0xff000000
+ 8001bc2:	697a      	ldr	r2, [r7, #20]
+ 8001bc4:	4313      	orrs	r3, r2
+ 8001bc6:	617b      	str	r3, [r7, #20]
+ 8001bc8:	e005      	b.n	8001bd6 <HAL_DMA2D_ConfigLayer+0x7a>
+  }
+  else
+  {
+    regValue |= (pLayerCfg->InputAlpha << DMA2D_BGPFCCR_ALPHA_Pos);
+ 8001bca:	693b      	ldr	r3, [r7, #16]
+ 8001bcc:	68db      	ldr	r3, [r3, #12]
+ 8001bce:	061b      	lsls	r3, r3, #24
+ 8001bd0:	697a      	ldr	r2, [r7, #20]
+ 8001bd2:	4313      	orrs	r3, r2
+ 8001bd4:	617b      	str	r3, [r7, #20]
+  }
+
+  /* Configure the background DMA2D layer */
+  if (LayerIdx == DMA2D_BACKGROUND_LAYER)
+ 8001bd6:	683b      	ldr	r3, [r7, #0]
+ 8001bd8:	2b00      	cmp	r3, #0
+ 8001bda:	d120      	bne.n	8001c1e <HAL_DMA2D_ConfigLayer+0xc2>
+  {
+    /* Write DMA2D BGPFCCR register */
+    MODIFY_REG(hdma2d->Instance->BGPFCCR, regMask, regValue);
+ 8001bdc:	687b      	ldr	r3, [r7, #4]
+ 8001bde:	681b      	ldr	r3, [r3, #0]
+ 8001be0:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
+ 8001be2:	68fb      	ldr	r3, [r7, #12]
+ 8001be4:	43db      	mvns	r3, r3
+ 8001be6:	ea02 0103 	and.w	r1, r2, r3
+ 8001bea:	687b      	ldr	r3, [r7, #4]
+ 8001bec:	681b      	ldr	r3, [r3, #0]
+ 8001bee:	697a      	ldr	r2, [r7, #20]
+ 8001bf0:	430a      	orrs	r2, r1
+ 8001bf2:	625a      	str	r2, [r3, #36]	@ 0x24
+
+    /* DMA2D BGOR register configuration -------------------------------------*/
+    WRITE_REG(hdma2d->Instance->BGOR, pLayerCfg->InputOffset);
+ 8001bf4:	687b      	ldr	r3, [r7, #4]
+ 8001bf6:	681b      	ldr	r3, [r3, #0]
+ 8001bf8:	693a      	ldr	r2, [r7, #16]
+ 8001bfa:	6812      	ldr	r2, [r2, #0]
+ 8001bfc:	619a      	str	r2, [r3, #24]
+
+    /* DMA2D BGCOLR register configuration -------------------------------------*/
+    if ((pLayerCfg->InputColorMode == DMA2D_INPUT_A4) || (pLayerCfg->InputColorMode == DMA2D_INPUT_A8))
+ 8001bfe:	693b      	ldr	r3, [r7, #16]
+ 8001c00:	685b      	ldr	r3, [r3, #4]
+ 8001c02:	2b0a      	cmp	r3, #10
+ 8001c04:	d003      	beq.n	8001c0e <HAL_DMA2D_ConfigLayer+0xb2>
+ 8001c06:	693b      	ldr	r3, [r7, #16]
+ 8001c08:	685b      	ldr	r3, [r3, #4]
+ 8001c0a:	2b09      	cmp	r3, #9
+ 8001c0c:	d127      	bne.n	8001c5e <HAL_DMA2D_ConfigLayer+0x102>
+    {
+      WRITE_REG(hdma2d->Instance->BGCOLR, pLayerCfg->InputAlpha & (DMA2D_BGCOLR_BLUE | DMA2D_BGCOLR_GREEN | \
+ 8001c0e:	693b      	ldr	r3, [r7, #16]
+ 8001c10:	68da      	ldr	r2, [r3, #12]
+ 8001c12:	687b      	ldr	r3, [r7, #4]
+ 8001c14:	681b      	ldr	r3, [r3, #0]
+ 8001c16:	f022 427f 	bic.w	r2, r2, #4278190080	@ 0xff000000
+ 8001c1a:	629a      	str	r2, [r3, #40]	@ 0x28
+ 8001c1c:	e01f      	b.n	8001c5e <HAL_DMA2D_ConfigLayer+0x102>
+  else
+  {
+
+
+    /* Write DMA2D FGPFCCR register */
+    MODIFY_REG(hdma2d->Instance->FGPFCCR, regMask, regValue);
+ 8001c1e:	687b      	ldr	r3, [r7, #4]
+ 8001c20:	681b      	ldr	r3, [r3, #0]
+ 8001c22:	69da      	ldr	r2, [r3, #28]
+ 8001c24:	68fb      	ldr	r3, [r7, #12]
+ 8001c26:	43db      	mvns	r3, r3
+ 8001c28:	ea02 0103 	and.w	r1, r2, r3
+ 8001c2c:	687b      	ldr	r3, [r7, #4]
+ 8001c2e:	681b      	ldr	r3, [r3, #0]
+ 8001c30:	697a      	ldr	r2, [r7, #20]
+ 8001c32:	430a      	orrs	r2, r1
+ 8001c34:	61da      	str	r2, [r3, #28]
+
+    /* DMA2D FGOR register configuration -------------------------------------*/
+    WRITE_REG(hdma2d->Instance->FGOR, pLayerCfg->InputOffset);
+ 8001c36:	687b      	ldr	r3, [r7, #4]
+ 8001c38:	681b      	ldr	r3, [r3, #0]
+ 8001c3a:	693a      	ldr	r2, [r7, #16]
+ 8001c3c:	6812      	ldr	r2, [r2, #0]
+ 8001c3e:	611a      	str	r2, [r3, #16]
+
+    /* DMA2D FGCOLR register configuration -------------------------------------*/
+    if ((pLayerCfg->InputColorMode == DMA2D_INPUT_A4) || (pLayerCfg->InputColorMode == DMA2D_INPUT_A8))
+ 8001c40:	693b      	ldr	r3, [r7, #16]
+ 8001c42:	685b      	ldr	r3, [r3, #4]
+ 8001c44:	2b0a      	cmp	r3, #10
+ 8001c46:	d003      	beq.n	8001c50 <HAL_DMA2D_ConfigLayer+0xf4>
+ 8001c48:	693b      	ldr	r3, [r7, #16]
+ 8001c4a:	685b      	ldr	r3, [r3, #4]
+ 8001c4c:	2b09      	cmp	r3, #9
+ 8001c4e:	d106      	bne.n	8001c5e <HAL_DMA2D_ConfigLayer+0x102>
+    {
+      WRITE_REG(hdma2d->Instance->FGCOLR, pLayerCfg->InputAlpha & (DMA2D_FGCOLR_BLUE | DMA2D_FGCOLR_GREEN | \
+ 8001c50:	693b      	ldr	r3, [r7, #16]
+ 8001c52:	68da      	ldr	r2, [r3, #12]
+ 8001c54:	687b      	ldr	r3, [r7, #4]
+ 8001c56:	681b      	ldr	r3, [r3, #0]
+ 8001c58:	f022 427f 	bic.w	r2, r2, #4278190080	@ 0xff000000
+ 8001c5c:	621a      	str	r2, [r3, #32]
+                                                                   DMA2D_FGCOLR_RED));
+    }
+  }
+  /* Initialize the DMA2D state*/
+  hdma2d->State = HAL_DMA2D_STATE_READY;
+ 8001c5e:	687b      	ldr	r3, [r7, #4]
+ 8001c60:	2201      	movs	r2, #1
+ 8001c62:	f883 2039 	strb.w	r2, [r3, #57]	@ 0x39
+
+  /* Process unlocked */
+  __HAL_UNLOCK(hdma2d);
+ 8001c66:	687b      	ldr	r3, [r7, #4]
+ 8001c68:	2200      	movs	r2, #0
+ 8001c6a:	f883 2038 	strb.w	r2, [r3, #56]	@ 0x38
+
+  return HAL_OK;
+ 8001c6e:	2300      	movs	r3, #0
+}
+ 8001c70:	4618      	mov	r0, r3
+ 8001c72:	371c      	adds	r7, #28
+ 8001c74:	46bd      	mov	sp, r7
+ 8001c76:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001c7a:	4770      	bx	lr
+ 8001c7c:	ff03000f 	.word	0xff03000f
+
+08001c80 <HAL_GPIO_Init>:
+  * @param  GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
+  *         the configuration information for the specified GPIO peripheral.
+  * @retval None
+  */
+void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
+{
+ 8001c80:	b480      	push	{r7}
+ 8001c82:	b089      	sub	sp, #36	@ 0x24
+ 8001c84:	af00      	add	r7, sp, #0
+ 8001c86:	6078      	str	r0, [r7, #4]
+ 8001c88:	6039      	str	r1, [r7, #0]
+  uint32_t position;
+  uint32_t ioposition = 0x00U;
+ 8001c8a:	2300      	movs	r3, #0
+ 8001c8c:	617b      	str	r3, [r7, #20]
+  uint32_t iocurrent = 0x00U;
+ 8001c8e:	2300      	movs	r3, #0
+ 8001c90:	613b      	str	r3, [r7, #16]
+  uint32_t temp = 0x00U;
+ 8001c92:	2300      	movs	r3, #0
+ 8001c94:	61bb      	str	r3, [r7, #24]
+  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
+  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
+  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
+
+  /* Configure the port pins */
+  for(position = 0U; position < GPIO_NUMBER; position++)
+ 8001c96:	2300      	movs	r3, #0
+ 8001c98:	61fb      	str	r3, [r7, #28]
+ 8001c9a:	e177      	b.n	8001f8c <HAL_GPIO_Init+0x30c>
+  {
+    /* Get the IO position */
+    ioposition = 0x01U << position;
+ 8001c9c:	2201      	movs	r2, #1
+ 8001c9e:	69fb      	ldr	r3, [r7, #28]
+ 8001ca0:	fa02 f303 	lsl.w	r3, r2, r3
+ 8001ca4:	617b      	str	r3, [r7, #20]
+    /* Get the current IO position */
+    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
+ 8001ca6:	683b      	ldr	r3, [r7, #0]
+ 8001ca8:	681b      	ldr	r3, [r3, #0]
+ 8001caa:	697a      	ldr	r2, [r7, #20]
+ 8001cac:	4013      	ands	r3, r2
+ 8001cae:	613b      	str	r3, [r7, #16]
+
+    if(iocurrent == ioposition)
+ 8001cb0:	693a      	ldr	r2, [r7, #16]
+ 8001cb2:	697b      	ldr	r3, [r7, #20]
+ 8001cb4:	429a      	cmp	r2, r3
+ 8001cb6:	f040 8166 	bne.w	8001f86 <HAL_GPIO_Init+0x306>
+    {
+      /*--------------------- GPIO Mode Configuration ------------------------*/
+      /* In case of Output or Alternate function mode selection */
+      if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \
+ 8001cba:	683b      	ldr	r3, [r7, #0]
+ 8001cbc:	685b      	ldr	r3, [r3, #4]
+ 8001cbe:	f003 0303 	and.w	r3, r3, #3
+ 8001cc2:	2b01      	cmp	r3, #1
+ 8001cc4:	d005      	beq.n	8001cd2 <HAL_GPIO_Init+0x52>
+          (GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
+ 8001cc6:	683b      	ldr	r3, [r7, #0]
+ 8001cc8:	685b      	ldr	r3, [r3, #4]
+ 8001cca:	f003 0303 	and.w	r3, r3, #3
+      if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \
+ 8001cce:	2b02      	cmp	r3, #2
+ 8001cd0:	d130      	bne.n	8001d34 <HAL_GPIO_Init+0xb4>
+      {
+        /* Check the Speed parameter */
+        assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
+        /* Configure the IO Speed */
+        temp = GPIOx->OSPEEDR; 
+ 8001cd2:	687b      	ldr	r3, [r7, #4]
+ 8001cd4:	689b      	ldr	r3, [r3, #8]
+ 8001cd6:	61bb      	str	r3, [r7, #24]
+        temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
+ 8001cd8:	69fb      	ldr	r3, [r7, #28]
+ 8001cda:	005b      	lsls	r3, r3, #1
+ 8001cdc:	2203      	movs	r2, #3
+ 8001cde:	fa02 f303 	lsl.w	r3, r2, r3
+ 8001ce2:	43db      	mvns	r3, r3
+ 8001ce4:	69ba      	ldr	r2, [r7, #24]
+ 8001ce6:	4013      	ands	r3, r2
+ 8001ce8:	61bb      	str	r3, [r7, #24]
+        temp |= (GPIO_Init->Speed << (position * 2U));
+ 8001cea:	683b      	ldr	r3, [r7, #0]
+ 8001cec:	68da      	ldr	r2, [r3, #12]
+ 8001cee:	69fb      	ldr	r3, [r7, #28]
+ 8001cf0:	005b      	lsls	r3, r3, #1
+ 8001cf2:	fa02 f303 	lsl.w	r3, r2, r3
+ 8001cf6:	69ba      	ldr	r2, [r7, #24]
+ 8001cf8:	4313      	orrs	r3, r2
+ 8001cfa:	61bb      	str	r3, [r7, #24]
+        GPIOx->OSPEEDR = temp;
+ 8001cfc:	687b      	ldr	r3, [r7, #4]
+ 8001cfe:	69ba      	ldr	r2, [r7, #24]
+ 8001d00:	609a      	str	r2, [r3, #8]
+
+        /* Configure the IO Output Type */
+        temp = GPIOx->OTYPER;
+ 8001d02:	687b      	ldr	r3, [r7, #4]
+ 8001d04:	685b      	ldr	r3, [r3, #4]
+ 8001d06:	61bb      	str	r3, [r7, #24]
+        temp &= ~(GPIO_OTYPER_OT_0 << position) ;
+ 8001d08:	2201      	movs	r2, #1
+ 8001d0a:	69fb      	ldr	r3, [r7, #28]
+ 8001d0c:	fa02 f303 	lsl.w	r3, r2, r3
+ 8001d10:	43db      	mvns	r3, r3
+ 8001d12:	69ba      	ldr	r2, [r7, #24]
+ 8001d14:	4013      	ands	r3, r2
+ 8001d16:	61bb      	str	r3, [r7, #24]
+        temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
+ 8001d18:	683b      	ldr	r3, [r7, #0]
+ 8001d1a:	685b      	ldr	r3, [r3, #4]
+ 8001d1c:	091b      	lsrs	r3, r3, #4
+ 8001d1e:	f003 0201 	and.w	r2, r3, #1
+ 8001d22:	69fb      	ldr	r3, [r7, #28]
+ 8001d24:	fa02 f303 	lsl.w	r3, r2, r3
+ 8001d28:	69ba      	ldr	r2, [r7, #24]
+ 8001d2a:	4313      	orrs	r3, r2
+ 8001d2c:	61bb      	str	r3, [r7, #24]
+        GPIOx->OTYPER = temp;
+ 8001d2e:	687b      	ldr	r3, [r7, #4]
+ 8001d30:	69ba      	ldr	r2, [r7, #24]
+ 8001d32:	605a      	str	r2, [r3, #4]
+       }
+
+      if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
+ 8001d34:	683b      	ldr	r3, [r7, #0]
+ 8001d36:	685b      	ldr	r3, [r3, #4]
+ 8001d38:	f003 0303 	and.w	r3, r3, #3
+ 8001d3c:	2b03      	cmp	r3, #3
+ 8001d3e:	d017      	beq.n	8001d70 <HAL_GPIO_Init+0xf0>
+      {
+        /* Check the parameters */
+        assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
+        
+        /* Activate the Pull-up or Pull down resistor for the current IO */
+        temp = GPIOx->PUPDR;
+ 8001d40:	687b      	ldr	r3, [r7, #4]
+ 8001d42:	68db      	ldr	r3, [r3, #12]
+ 8001d44:	61bb      	str	r3, [r7, #24]
+        temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
+ 8001d46:	69fb      	ldr	r3, [r7, #28]
+ 8001d48:	005b      	lsls	r3, r3, #1
+ 8001d4a:	2203      	movs	r2, #3
+ 8001d4c:	fa02 f303 	lsl.w	r3, r2, r3
+ 8001d50:	43db      	mvns	r3, r3
+ 8001d52:	69ba      	ldr	r2, [r7, #24]
+ 8001d54:	4013      	ands	r3, r2
+ 8001d56:	61bb      	str	r3, [r7, #24]
+        temp |= ((GPIO_Init->Pull) << (position * 2U));
+ 8001d58:	683b      	ldr	r3, [r7, #0]
+ 8001d5a:	689a      	ldr	r2, [r3, #8]
+ 8001d5c:	69fb      	ldr	r3, [r7, #28]
+ 8001d5e:	005b      	lsls	r3, r3, #1
+ 8001d60:	fa02 f303 	lsl.w	r3, r2, r3
+ 8001d64:	69ba      	ldr	r2, [r7, #24]
+ 8001d66:	4313      	orrs	r3, r2
+ 8001d68:	61bb      	str	r3, [r7, #24]
+        GPIOx->PUPDR = temp;
+ 8001d6a:	687b      	ldr	r3, [r7, #4]
+ 8001d6c:	69ba      	ldr	r2, [r7, #24]
+ 8001d6e:	60da      	str	r2, [r3, #12]
+      }
+
+      /* In case of Alternate function mode selection */
+      if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
+ 8001d70:	683b      	ldr	r3, [r7, #0]
+ 8001d72:	685b      	ldr	r3, [r3, #4]
+ 8001d74:	f003 0303 	and.w	r3, r3, #3
+ 8001d78:	2b02      	cmp	r3, #2
+ 8001d7a:	d123      	bne.n	8001dc4 <HAL_GPIO_Init+0x144>
+      {
+        /* Check the Alternate function parameter */
+        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
+        /* Configure Alternate function mapped with the current IO */
+        temp = GPIOx->AFR[position >> 3U];
+ 8001d7c:	69fb      	ldr	r3, [r7, #28]
+ 8001d7e:	08da      	lsrs	r2, r3, #3
+ 8001d80:	687b      	ldr	r3, [r7, #4]
+ 8001d82:	3208      	adds	r2, #8
+ 8001d84:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
+ 8001d88:	61bb      	str	r3, [r7, #24]
+        temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
+ 8001d8a:	69fb      	ldr	r3, [r7, #28]
+ 8001d8c:	f003 0307 	and.w	r3, r3, #7
+ 8001d90:	009b      	lsls	r3, r3, #2
+ 8001d92:	220f      	movs	r2, #15
+ 8001d94:	fa02 f303 	lsl.w	r3, r2, r3
+ 8001d98:	43db      	mvns	r3, r3
+ 8001d9a:	69ba      	ldr	r2, [r7, #24]
+ 8001d9c:	4013      	ands	r3, r2
+ 8001d9e:	61bb      	str	r3, [r7, #24]
+        temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
+ 8001da0:	683b      	ldr	r3, [r7, #0]
+ 8001da2:	691a      	ldr	r2, [r3, #16]
+ 8001da4:	69fb      	ldr	r3, [r7, #28]
+ 8001da6:	f003 0307 	and.w	r3, r3, #7
+ 8001daa:	009b      	lsls	r3, r3, #2
+ 8001dac:	fa02 f303 	lsl.w	r3, r2, r3
+ 8001db0:	69ba      	ldr	r2, [r7, #24]
+ 8001db2:	4313      	orrs	r3, r2
+ 8001db4:	61bb      	str	r3, [r7, #24]
+        GPIOx->AFR[position >> 3U] = temp;
+ 8001db6:	69fb      	ldr	r3, [r7, #28]
+ 8001db8:	08da      	lsrs	r2, r3, #3
+ 8001dba:	687b      	ldr	r3, [r7, #4]
+ 8001dbc:	3208      	adds	r2, #8
+ 8001dbe:	69b9      	ldr	r1, [r7, #24]
+ 8001dc0:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
+      }
+
+      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
+      temp = GPIOx->MODER;
+ 8001dc4:	687b      	ldr	r3, [r7, #4]
+ 8001dc6:	681b      	ldr	r3, [r3, #0]
+ 8001dc8:	61bb      	str	r3, [r7, #24]
+      temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
+ 8001dca:	69fb      	ldr	r3, [r7, #28]
+ 8001dcc:	005b      	lsls	r3, r3, #1
+ 8001dce:	2203      	movs	r2, #3
+ 8001dd0:	fa02 f303 	lsl.w	r3, r2, r3
+ 8001dd4:	43db      	mvns	r3, r3
+ 8001dd6:	69ba      	ldr	r2, [r7, #24]
+ 8001dd8:	4013      	ands	r3, r2
+ 8001dda:	61bb      	str	r3, [r7, #24]
+      temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
+ 8001ddc:	683b      	ldr	r3, [r7, #0]
+ 8001dde:	685b      	ldr	r3, [r3, #4]
+ 8001de0:	f003 0203 	and.w	r2, r3, #3
+ 8001de4:	69fb      	ldr	r3, [r7, #28]
+ 8001de6:	005b      	lsls	r3, r3, #1
+ 8001de8:	fa02 f303 	lsl.w	r3, r2, r3
+ 8001dec:	69ba      	ldr	r2, [r7, #24]
+ 8001dee:	4313      	orrs	r3, r2
+ 8001df0:	61bb      	str	r3, [r7, #24]
+      GPIOx->MODER = temp;
+ 8001df2:	687b      	ldr	r3, [r7, #4]
+ 8001df4:	69ba      	ldr	r2, [r7, #24]
+ 8001df6:	601a      	str	r2, [r3, #0]
+
+      /*--------------------- EXTI Mode Configuration ------------------------*/
+      /* Configure the External Interrupt or event for the current IO */
+      if((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
+ 8001df8:	683b      	ldr	r3, [r7, #0]
+ 8001dfa:	685b      	ldr	r3, [r3, #4]
+ 8001dfc:	f403 3340 	and.w	r3, r3, #196608	@ 0x30000
+ 8001e00:	2b00      	cmp	r3, #0
+ 8001e02:	f000 80c0 	beq.w	8001f86 <HAL_GPIO_Init+0x306>
+      {
+        /* Enable SYSCFG Clock */
+        __HAL_RCC_SYSCFG_CLK_ENABLE();
+ 8001e06:	2300      	movs	r3, #0
+ 8001e08:	60fb      	str	r3, [r7, #12]
+ 8001e0a:	4b66      	ldr	r3, [pc, #408]	@ (8001fa4 <HAL_GPIO_Init+0x324>)
+ 8001e0c:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 8001e0e:	4a65      	ldr	r2, [pc, #404]	@ (8001fa4 <HAL_GPIO_Init+0x324>)
+ 8001e10:	f443 4380 	orr.w	r3, r3, #16384	@ 0x4000
+ 8001e14:	6453      	str	r3, [r2, #68]	@ 0x44
+ 8001e16:	4b63      	ldr	r3, [pc, #396]	@ (8001fa4 <HAL_GPIO_Init+0x324>)
+ 8001e18:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 8001e1a:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
+ 8001e1e:	60fb      	str	r3, [r7, #12]
+ 8001e20:	68fb      	ldr	r3, [r7, #12]
+
+        temp = SYSCFG->EXTICR[position >> 2U];
+ 8001e22:	4a61      	ldr	r2, [pc, #388]	@ (8001fa8 <HAL_GPIO_Init+0x328>)
+ 8001e24:	69fb      	ldr	r3, [r7, #28]
+ 8001e26:	089b      	lsrs	r3, r3, #2
+ 8001e28:	3302      	adds	r3, #2
+ 8001e2a:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 8001e2e:	61bb      	str	r3, [r7, #24]
+        temp &= ~(0x0FU << (4U * (position & 0x03U)));
+ 8001e30:	69fb      	ldr	r3, [r7, #28]
+ 8001e32:	f003 0303 	and.w	r3, r3, #3
+ 8001e36:	009b      	lsls	r3, r3, #2
+ 8001e38:	220f      	movs	r2, #15
+ 8001e3a:	fa02 f303 	lsl.w	r3, r2, r3
+ 8001e3e:	43db      	mvns	r3, r3
+ 8001e40:	69ba      	ldr	r2, [r7, #24]
+ 8001e42:	4013      	ands	r3, r2
+ 8001e44:	61bb      	str	r3, [r7, #24]
+        temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
+ 8001e46:	687b      	ldr	r3, [r7, #4]
+ 8001e48:	4a58      	ldr	r2, [pc, #352]	@ (8001fac <HAL_GPIO_Init+0x32c>)
+ 8001e4a:	4293      	cmp	r3, r2
+ 8001e4c:	d037      	beq.n	8001ebe <HAL_GPIO_Init+0x23e>
+ 8001e4e:	687b      	ldr	r3, [r7, #4]
+ 8001e50:	4a57      	ldr	r2, [pc, #348]	@ (8001fb0 <HAL_GPIO_Init+0x330>)
+ 8001e52:	4293      	cmp	r3, r2
+ 8001e54:	d031      	beq.n	8001eba <HAL_GPIO_Init+0x23a>
+ 8001e56:	687b      	ldr	r3, [r7, #4]
+ 8001e58:	4a56      	ldr	r2, [pc, #344]	@ (8001fb4 <HAL_GPIO_Init+0x334>)
+ 8001e5a:	4293      	cmp	r3, r2
+ 8001e5c:	d02b      	beq.n	8001eb6 <HAL_GPIO_Init+0x236>
+ 8001e5e:	687b      	ldr	r3, [r7, #4]
+ 8001e60:	4a55      	ldr	r2, [pc, #340]	@ (8001fb8 <HAL_GPIO_Init+0x338>)
+ 8001e62:	4293      	cmp	r3, r2
+ 8001e64:	d025      	beq.n	8001eb2 <HAL_GPIO_Init+0x232>
+ 8001e66:	687b      	ldr	r3, [r7, #4]
+ 8001e68:	4a54      	ldr	r2, [pc, #336]	@ (8001fbc <HAL_GPIO_Init+0x33c>)
+ 8001e6a:	4293      	cmp	r3, r2
+ 8001e6c:	d01f      	beq.n	8001eae <HAL_GPIO_Init+0x22e>
+ 8001e6e:	687b      	ldr	r3, [r7, #4]
+ 8001e70:	4a53      	ldr	r2, [pc, #332]	@ (8001fc0 <HAL_GPIO_Init+0x340>)
+ 8001e72:	4293      	cmp	r3, r2
+ 8001e74:	d019      	beq.n	8001eaa <HAL_GPIO_Init+0x22a>
+ 8001e76:	687b      	ldr	r3, [r7, #4]
+ 8001e78:	4a52      	ldr	r2, [pc, #328]	@ (8001fc4 <HAL_GPIO_Init+0x344>)
+ 8001e7a:	4293      	cmp	r3, r2
+ 8001e7c:	d013      	beq.n	8001ea6 <HAL_GPIO_Init+0x226>
+ 8001e7e:	687b      	ldr	r3, [r7, #4]
+ 8001e80:	4a51      	ldr	r2, [pc, #324]	@ (8001fc8 <HAL_GPIO_Init+0x348>)
+ 8001e82:	4293      	cmp	r3, r2
+ 8001e84:	d00d      	beq.n	8001ea2 <HAL_GPIO_Init+0x222>
+ 8001e86:	687b      	ldr	r3, [r7, #4]
+ 8001e88:	4a50      	ldr	r2, [pc, #320]	@ (8001fcc <HAL_GPIO_Init+0x34c>)
+ 8001e8a:	4293      	cmp	r3, r2
+ 8001e8c:	d007      	beq.n	8001e9e <HAL_GPIO_Init+0x21e>
+ 8001e8e:	687b      	ldr	r3, [r7, #4]
+ 8001e90:	4a4f      	ldr	r2, [pc, #316]	@ (8001fd0 <HAL_GPIO_Init+0x350>)
+ 8001e92:	4293      	cmp	r3, r2
+ 8001e94:	d101      	bne.n	8001e9a <HAL_GPIO_Init+0x21a>
+ 8001e96:	2309      	movs	r3, #9
+ 8001e98:	e012      	b.n	8001ec0 <HAL_GPIO_Init+0x240>
+ 8001e9a:	230a      	movs	r3, #10
+ 8001e9c:	e010      	b.n	8001ec0 <HAL_GPIO_Init+0x240>
+ 8001e9e:	2308      	movs	r3, #8
+ 8001ea0:	e00e      	b.n	8001ec0 <HAL_GPIO_Init+0x240>
+ 8001ea2:	2307      	movs	r3, #7
+ 8001ea4:	e00c      	b.n	8001ec0 <HAL_GPIO_Init+0x240>
+ 8001ea6:	2306      	movs	r3, #6
+ 8001ea8:	e00a      	b.n	8001ec0 <HAL_GPIO_Init+0x240>
+ 8001eaa:	2305      	movs	r3, #5
+ 8001eac:	e008      	b.n	8001ec0 <HAL_GPIO_Init+0x240>
+ 8001eae:	2304      	movs	r3, #4
+ 8001eb0:	e006      	b.n	8001ec0 <HAL_GPIO_Init+0x240>
+ 8001eb2:	2303      	movs	r3, #3
+ 8001eb4:	e004      	b.n	8001ec0 <HAL_GPIO_Init+0x240>
+ 8001eb6:	2302      	movs	r3, #2
+ 8001eb8:	e002      	b.n	8001ec0 <HAL_GPIO_Init+0x240>
+ 8001eba:	2301      	movs	r3, #1
+ 8001ebc:	e000      	b.n	8001ec0 <HAL_GPIO_Init+0x240>
+ 8001ebe:	2300      	movs	r3, #0
+ 8001ec0:	69fa      	ldr	r2, [r7, #28]
+ 8001ec2:	f002 0203 	and.w	r2, r2, #3
+ 8001ec6:	0092      	lsls	r2, r2, #2
+ 8001ec8:	4093      	lsls	r3, r2
+ 8001eca:	69ba      	ldr	r2, [r7, #24]
+ 8001ecc:	4313      	orrs	r3, r2
+ 8001ece:	61bb      	str	r3, [r7, #24]
+        SYSCFG->EXTICR[position >> 2U] = temp;
+ 8001ed0:	4935      	ldr	r1, [pc, #212]	@ (8001fa8 <HAL_GPIO_Init+0x328>)
+ 8001ed2:	69fb      	ldr	r3, [r7, #28]
+ 8001ed4:	089b      	lsrs	r3, r3, #2
+ 8001ed6:	3302      	adds	r3, #2
+ 8001ed8:	69ba      	ldr	r2, [r7, #24]
+ 8001eda:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
+
+        /* Clear Rising Falling edge configuration */
+        temp = EXTI->RTSR;
+ 8001ede:	4b3d      	ldr	r3, [pc, #244]	@ (8001fd4 <HAL_GPIO_Init+0x354>)
+ 8001ee0:	689b      	ldr	r3, [r3, #8]
+ 8001ee2:	61bb      	str	r3, [r7, #24]
+        temp &= ~((uint32_t)iocurrent);
+ 8001ee4:	693b      	ldr	r3, [r7, #16]
+ 8001ee6:	43db      	mvns	r3, r3
+ 8001ee8:	69ba      	ldr	r2, [r7, #24]
+ 8001eea:	4013      	ands	r3, r2
+ 8001eec:	61bb      	str	r3, [r7, #24]
+        if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
+ 8001eee:	683b      	ldr	r3, [r7, #0]
+ 8001ef0:	685b      	ldr	r3, [r3, #4]
+ 8001ef2:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
+ 8001ef6:	2b00      	cmp	r3, #0
+ 8001ef8:	d003      	beq.n	8001f02 <HAL_GPIO_Init+0x282>
+        {
+          temp |= iocurrent;
+ 8001efa:	69ba      	ldr	r2, [r7, #24]
+ 8001efc:	693b      	ldr	r3, [r7, #16]
+ 8001efe:	4313      	orrs	r3, r2
+ 8001f00:	61bb      	str	r3, [r7, #24]
+        }
+        EXTI->RTSR = temp;
+ 8001f02:	4a34      	ldr	r2, [pc, #208]	@ (8001fd4 <HAL_GPIO_Init+0x354>)
+ 8001f04:	69bb      	ldr	r3, [r7, #24]
+ 8001f06:	6093      	str	r3, [r2, #8]
+
+        temp = EXTI->FTSR;
+ 8001f08:	4b32      	ldr	r3, [pc, #200]	@ (8001fd4 <HAL_GPIO_Init+0x354>)
+ 8001f0a:	68db      	ldr	r3, [r3, #12]
+ 8001f0c:	61bb      	str	r3, [r7, #24]
+        temp &= ~((uint32_t)iocurrent);
+ 8001f0e:	693b      	ldr	r3, [r7, #16]
+ 8001f10:	43db      	mvns	r3, r3
+ 8001f12:	69ba      	ldr	r2, [r7, #24]
+ 8001f14:	4013      	ands	r3, r2
+ 8001f16:	61bb      	str	r3, [r7, #24]
+        if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
+ 8001f18:	683b      	ldr	r3, [r7, #0]
+ 8001f1a:	685b      	ldr	r3, [r3, #4]
+ 8001f1c:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
+ 8001f20:	2b00      	cmp	r3, #0
+ 8001f22:	d003      	beq.n	8001f2c <HAL_GPIO_Init+0x2ac>
+        {
+          temp |= iocurrent;
+ 8001f24:	69ba      	ldr	r2, [r7, #24]
+ 8001f26:	693b      	ldr	r3, [r7, #16]
+ 8001f28:	4313      	orrs	r3, r2
+ 8001f2a:	61bb      	str	r3, [r7, #24]
+        }
+        EXTI->FTSR = temp;
+ 8001f2c:	4a29      	ldr	r2, [pc, #164]	@ (8001fd4 <HAL_GPIO_Init+0x354>)
+ 8001f2e:	69bb      	ldr	r3, [r7, #24]
+ 8001f30:	60d3      	str	r3, [r2, #12]
+
+        temp = EXTI->EMR;
+ 8001f32:	4b28      	ldr	r3, [pc, #160]	@ (8001fd4 <HAL_GPIO_Init+0x354>)
+ 8001f34:	685b      	ldr	r3, [r3, #4]
+ 8001f36:	61bb      	str	r3, [r7, #24]
+        temp &= ~((uint32_t)iocurrent);
+ 8001f38:	693b      	ldr	r3, [r7, #16]
+ 8001f3a:	43db      	mvns	r3, r3
+ 8001f3c:	69ba      	ldr	r2, [r7, #24]
+ 8001f3e:	4013      	ands	r3, r2
+ 8001f40:	61bb      	str	r3, [r7, #24]
+        if((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
+ 8001f42:	683b      	ldr	r3, [r7, #0]
+ 8001f44:	685b      	ldr	r3, [r3, #4]
+ 8001f46:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
+ 8001f4a:	2b00      	cmp	r3, #0
+ 8001f4c:	d003      	beq.n	8001f56 <HAL_GPIO_Init+0x2d6>
+        {
+          temp |= iocurrent;
+ 8001f4e:	69ba      	ldr	r2, [r7, #24]
+ 8001f50:	693b      	ldr	r3, [r7, #16]
+ 8001f52:	4313      	orrs	r3, r2
+ 8001f54:	61bb      	str	r3, [r7, #24]
+        }
+        EXTI->EMR = temp;
+ 8001f56:	4a1f      	ldr	r2, [pc, #124]	@ (8001fd4 <HAL_GPIO_Init+0x354>)
+ 8001f58:	69bb      	ldr	r3, [r7, #24]
+ 8001f5a:	6053      	str	r3, [r2, #4]
+
+        /* Clear EXTI line configuration */
+        temp = EXTI->IMR;
+ 8001f5c:	4b1d      	ldr	r3, [pc, #116]	@ (8001fd4 <HAL_GPIO_Init+0x354>)
+ 8001f5e:	681b      	ldr	r3, [r3, #0]
+ 8001f60:	61bb      	str	r3, [r7, #24]
+        temp &= ~((uint32_t)iocurrent);
+ 8001f62:	693b      	ldr	r3, [r7, #16]
+ 8001f64:	43db      	mvns	r3, r3
+ 8001f66:	69ba      	ldr	r2, [r7, #24]
+ 8001f68:	4013      	ands	r3, r2
+ 8001f6a:	61bb      	str	r3, [r7, #24]
+        if((GPIO_Init->Mode & EXTI_IT) != 0x00U)
+ 8001f6c:	683b      	ldr	r3, [r7, #0]
+ 8001f6e:	685b      	ldr	r3, [r3, #4]
+ 8001f70:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
+ 8001f74:	2b00      	cmp	r3, #0
+ 8001f76:	d003      	beq.n	8001f80 <HAL_GPIO_Init+0x300>
+        {
+          temp |= iocurrent;
+ 8001f78:	69ba      	ldr	r2, [r7, #24]
+ 8001f7a:	693b      	ldr	r3, [r7, #16]
+ 8001f7c:	4313      	orrs	r3, r2
+ 8001f7e:	61bb      	str	r3, [r7, #24]
+        }
+        EXTI->IMR = temp;
+ 8001f80:	4a14      	ldr	r2, [pc, #80]	@ (8001fd4 <HAL_GPIO_Init+0x354>)
+ 8001f82:	69bb      	ldr	r3, [r7, #24]
+ 8001f84:	6013      	str	r3, [r2, #0]
+  for(position = 0U; position < GPIO_NUMBER; position++)
+ 8001f86:	69fb      	ldr	r3, [r7, #28]
+ 8001f88:	3301      	adds	r3, #1
+ 8001f8a:	61fb      	str	r3, [r7, #28]
+ 8001f8c:	69fb      	ldr	r3, [r7, #28]
+ 8001f8e:	2b0f      	cmp	r3, #15
+ 8001f90:	f67f ae84 	bls.w	8001c9c <HAL_GPIO_Init+0x1c>
+      }
+    }
+  }
+}
+ 8001f94:	bf00      	nop
+ 8001f96:	bf00      	nop
+ 8001f98:	3724      	adds	r7, #36	@ 0x24
+ 8001f9a:	46bd      	mov	sp, r7
+ 8001f9c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001fa0:	4770      	bx	lr
+ 8001fa2:	bf00      	nop
+ 8001fa4:	40023800 	.word	0x40023800
+ 8001fa8:	40013800 	.word	0x40013800
+ 8001fac:	40020000 	.word	0x40020000
+ 8001fb0:	40020400 	.word	0x40020400
+ 8001fb4:	40020800 	.word	0x40020800
+ 8001fb8:	40020c00 	.word	0x40020c00
+ 8001fbc:	40021000 	.word	0x40021000
+ 8001fc0:	40021400 	.word	0x40021400
+ 8001fc4:	40021800 	.word	0x40021800
+ 8001fc8:	40021c00 	.word	0x40021c00
+ 8001fcc:	40022000 	.word	0x40022000
+ 8001fd0:	40022400 	.word	0x40022400
+ 8001fd4:	40013c00 	.word	0x40013c00
+
+08001fd8 <HAL_GPIO_WritePin>:
+  *            @arg GPIO_PIN_RESET: to clear the port pin
+  *            @arg GPIO_PIN_SET: to set the port pin
+  * @retval None
+  */
+void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
+{
+ 8001fd8:	b480      	push	{r7}
+ 8001fda:	b083      	sub	sp, #12
+ 8001fdc:	af00      	add	r7, sp, #0
+ 8001fde:	6078      	str	r0, [r7, #4]
+ 8001fe0:	460b      	mov	r3, r1
+ 8001fe2:	807b      	strh	r3, [r7, #2]
+ 8001fe4:	4613      	mov	r3, r2
+ 8001fe6:	707b      	strb	r3, [r7, #1]
+  /* Check the parameters */
+  assert_param(IS_GPIO_PIN(GPIO_Pin));
+  assert_param(IS_GPIO_PIN_ACTION(PinState));
+
+  if(PinState != GPIO_PIN_RESET)
+ 8001fe8:	787b      	ldrb	r3, [r7, #1]
+ 8001fea:	2b00      	cmp	r3, #0
+ 8001fec:	d003      	beq.n	8001ff6 <HAL_GPIO_WritePin+0x1e>
+  {
+    GPIOx->BSRR = GPIO_Pin;
+ 8001fee:	887a      	ldrh	r2, [r7, #2]
+ 8001ff0:	687b      	ldr	r3, [r7, #4]
+ 8001ff2:	619a      	str	r2, [r3, #24]
+  }
+  else
+  {
+    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
+  }
+}
+ 8001ff4:	e003      	b.n	8001ffe <HAL_GPIO_WritePin+0x26>
+    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
+ 8001ff6:	887b      	ldrh	r3, [r7, #2]
+ 8001ff8:	041a      	lsls	r2, r3, #16
+ 8001ffa:	687b      	ldr	r3, [r7, #4]
+ 8001ffc:	619a      	str	r2, [r3, #24]
+}
+ 8001ffe:	bf00      	nop
+ 8002000:	370c      	adds	r7, #12
+ 8002002:	46bd      	mov	sp, r7
+ 8002004:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8002008:	4770      	bx	lr
+
+0800200a <HAL_HCD_IRQHandler>:
+  * @brief  Handle HCD interrupt request.
+  * @param  hhcd HCD handle
+  * @retval None
+  */
+void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd)
+{
+ 800200a:	b580      	push	{r7, lr}
+ 800200c:	b086      	sub	sp, #24
+ 800200e:	af00      	add	r7, sp, #0
+ 8002010:	6078      	str	r0, [r7, #4]
+  USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
+ 8002012:	687b      	ldr	r3, [r7, #4]
+ 8002014:	681b      	ldr	r3, [r3, #0]
+ 8002016:	613b      	str	r3, [r7, #16]
+  uint32_t USBx_BASE = (uint32_t)USBx;
+ 8002018:	693b      	ldr	r3, [r7, #16]
+ 800201a:	60fb      	str	r3, [r7, #12]
+  uint32_t i;
+  uint32_t interrupt;
+
+  /* Ensure that we are in device mode */
+  if (USB_GetMode(hhcd->Instance) == USB_OTG_MODE_HOST)
+ 800201c:	687b      	ldr	r3, [r7, #4]
+ 800201e:	681b      	ldr	r3, [r3, #0]
+ 8002020:	4618      	mov	r0, r3
+ 8002022:	f004 fab7 	bl	8006594 <USB_GetMode>
+ 8002026:	4603      	mov	r3, r0
+ 8002028:	2b01      	cmp	r3, #1
+ 800202a:	f040 80fb 	bne.w	8002224 <HAL_HCD_IRQHandler+0x21a>
+  {
+    /* Avoid spurious interrupt */
+    if (__HAL_HCD_IS_INVALID_INTERRUPT(hhcd))
+ 800202e:	687b      	ldr	r3, [r7, #4]
+ 8002030:	681b      	ldr	r3, [r3, #0]
+ 8002032:	4618      	mov	r0, r3
+ 8002034:	f004 fa7a 	bl	800652c <USB_ReadInterrupts>
+ 8002038:	4603      	mov	r3, r0
+ 800203a:	2b00      	cmp	r3, #0
+ 800203c:	f000 80f1 	beq.w	8002222 <HAL_HCD_IRQHandler+0x218>
+    {
+      return;
+    }
+
+    if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT))
+ 8002040:	687b      	ldr	r3, [r7, #4]
+ 8002042:	681b      	ldr	r3, [r3, #0]
+ 8002044:	4618      	mov	r0, r3
+ 8002046:	f004 fa71 	bl	800652c <USB_ReadInterrupts>
+ 800204a:	4603      	mov	r3, r0
+ 800204c:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
+ 8002050:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
+ 8002054:	d104      	bne.n	8002060 <HAL_HCD_IRQHandler+0x56>
+    {
+      /* Incorrect mode, acknowledge the interrupt */
+      __HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT);
+ 8002056:	687b      	ldr	r3, [r7, #4]
+ 8002058:	681b      	ldr	r3, [r3, #0]
+ 800205a:	f44f 1200 	mov.w	r2, #2097152	@ 0x200000
+ 800205e:	615a      	str	r2, [r3, #20]
+    }
+
+    if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_IISOIXFR))
+ 8002060:	687b      	ldr	r3, [r7, #4]
+ 8002062:	681b      	ldr	r3, [r3, #0]
+ 8002064:	4618      	mov	r0, r3
+ 8002066:	f004 fa61 	bl	800652c <USB_ReadInterrupts>
+ 800206a:	4603      	mov	r3, r0
+ 800206c:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
+ 8002070:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
+ 8002074:	d104      	bne.n	8002080 <HAL_HCD_IRQHandler+0x76>
+    {
+      /* Incorrect mode, acknowledge the interrupt */
+      __HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_IISOIXFR);
+ 8002076:	687b      	ldr	r3, [r7, #4]
+ 8002078:	681b      	ldr	r3, [r3, #0]
+ 800207a:	f44f 1280 	mov.w	r2, #1048576	@ 0x100000
+ 800207e:	615a      	str	r2, [r3, #20]
+    }
+
+    if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_PTXFE))
+ 8002080:	687b      	ldr	r3, [r7, #4]
+ 8002082:	681b      	ldr	r3, [r3, #0]
+ 8002084:	4618      	mov	r0, r3
+ 8002086:	f004 fa51 	bl	800652c <USB_ReadInterrupts>
+ 800208a:	4603      	mov	r3, r0
+ 800208c:	f003 6380 	and.w	r3, r3, #67108864	@ 0x4000000
+ 8002090:	f1b3 6f80 	cmp.w	r3, #67108864	@ 0x4000000
+ 8002094:	d104      	bne.n	80020a0 <HAL_HCD_IRQHandler+0x96>
+    {
+      /* Incorrect mode, acknowledge the interrupt */
+      __HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_PTXFE);
+ 8002096:	687b      	ldr	r3, [r7, #4]
+ 8002098:	681b      	ldr	r3, [r3, #0]
+ 800209a:	f04f 6280 	mov.w	r2, #67108864	@ 0x4000000
+ 800209e:	615a      	str	r2, [r3, #20]
+    }
+
+    if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_MMIS))
+ 80020a0:	687b      	ldr	r3, [r7, #4]
+ 80020a2:	681b      	ldr	r3, [r3, #0]
+ 80020a4:	4618      	mov	r0, r3
+ 80020a6:	f004 fa41 	bl	800652c <USB_ReadInterrupts>
+ 80020aa:	4603      	mov	r3, r0
+ 80020ac:	f003 0302 	and.w	r3, r3, #2
+ 80020b0:	2b02      	cmp	r3, #2
+ 80020b2:	d103      	bne.n	80020bc <HAL_HCD_IRQHandler+0xb2>
+    {
+      /* Incorrect mode, acknowledge the interrupt */
+      __HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_MMIS);
+ 80020b4:	687b      	ldr	r3, [r7, #4]
+ 80020b6:	681b      	ldr	r3, [r3, #0]
+ 80020b8:	2202      	movs	r2, #2
+ 80020ba:	615a      	str	r2, [r3, #20]
+    }
+
+    /* Handle Host Disconnect Interrupts */
+    if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_DISCINT))
+ 80020bc:	687b      	ldr	r3, [r7, #4]
+ 80020be:	681b      	ldr	r3, [r3, #0]
+ 80020c0:	4618      	mov	r0, r3
+ 80020c2:	f004 fa33 	bl	800652c <USB_ReadInterrupts>
+ 80020c6:	4603      	mov	r3, r0
+ 80020c8:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
+ 80020cc:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
+ 80020d0:	d120      	bne.n	8002114 <HAL_HCD_IRQHandler+0x10a>
+    {
+      __HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_DISCINT);
+ 80020d2:	687b      	ldr	r3, [r7, #4]
+ 80020d4:	681b      	ldr	r3, [r3, #0]
+ 80020d6:	f04f 5200 	mov.w	r2, #536870912	@ 0x20000000
+ 80020da:	615a      	str	r2, [r3, #20]
+
+      if ((USBx_HPRT0 & USB_OTG_HPRT_PCSTS) == 0U)
+ 80020dc:	68fb      	ldr	r3, [r7, #12]
+ 80020de:	f503 6388 	add.w	r3, r3, #1088	@ 0x440
+ 80020e2:	681b      	ldr	r3, [r3, #0]
+ 80020e4:	f003 0301 	and.w	r3, r3, #1
+ 80020e8:	2b00      	cmp	r3, #0
+ 80020ea:	d113      	bne.n	8002114 <HAL_HCD_IRQHandler+0x10a>
+      {
+        /* Flush USB Fifo */
+        (void)USB_FlushTxFifo(USBx, 0x10U);
+ 80020ec:	2110      	movs	r1, #16
+ 80020ee:	6938      	ldr	r0, [r7, #16]
+ 80020f0:	f004 f964 	bl	80063bc <USB_FlushTxFifo>
+        (void)USB_FlushRxFifo(USBx);
+ 80020f4:	6938      	ldr	r0, [r7, #16]
+ 80020f6:	f004 f993 	bl	8006420 <USB_FlushRxFifo>
+
+        if (hhcd->Init.phy_itface == USB_OTG_EMBEDDED_PHY)
+ 80020fa:	687b      	ldr	r3, [r7, #4]
+ 80020fc:	7a5b      	ldrb	r3, [r3, #9]
+ 80020fe:	2b02      	cmp	r3, #2
+ 8002100:	d105      	bne.n	800210e <HAL_HCD_IRQHandler+0x104>
+        {
+          /* Restore FS Clock */
+          (void)USB_InitFSLSPClkSel(hhcd->Instance, HCFG_48_MHZ);
+ 8002102:	687b      	ldr	r3, [r7, #4]
+ 8002104:	681b      	ldr	r3, [r3, #0]
+ 8002106:	2101      	movs	r1, #1
+ 8002108:	4618      	mov	r0, r3
+ 800210a:	f004 fa51 	bl	80065b0 <USB_InitFSLSPClkSel>
+
+        /* Handle Host Port Disconnect Interrupt */
+#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
+        hhcd->DisconnectCallback(hhcd);
+#else
+        HAL_HCD_Disconnect_Callback(hhcd);
+ 800210e:	6878      	ldr	r0, [r7, #4]
+ 8002110:	f005 fe22 	bl	8007d58 <HAL_HCD_Disconnect_Callback>
+#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
+      }
+    }
+
+    /* Handle Host Port Interrupts */
+    if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_HPRTINT))
+ 8002114:	687b      	ldr	r3, [r7, #4]
+ 8002116:	681b      	ldr	r3, [r3, #0]
+ 8002118:	4618      	mov	r0, r3
+ 800211a:	f004 fa07 	bl	800652c <USB_ReadInterrupts>
+ 800211e:	4603      	mov	r3, r0
+ 8002120:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
+ 8002124:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
+ 8002128:	d102      	bne.n	8002130 <HAL_HCD_IRQHandler+0x126>
+    {
+      HCD_Port_IRQHandler(hhcd);
+ 800212a:	6878      	ldr	r0, [r7, #4]
+ 800212c:	f001 fca1 	bl	8003a72 <HCD_Port_IRQHandler>
+    }
+
+    /* Handle Host SOF Interrupt */
+    if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_SOF))
+ 8002130:	687b      	ldr	r3, [r7, #4]
+ 8002132:	681b      	ldr	r3, [r3, #0]
+ 8002134:	4618      	mov	r0, r3
+ 8002136:	f004 f9f9 	bl	800652c <USB_ReadInterrupts>
+ 800213a:	4603      	mov	r3, r0
+ 800213c:	f003 0308 	and.w	r3, r3, #8
+ 8002140:	2b08      	cmp	r3, #8
+ 8002142:	d106      	bne.n	8002152 <HAL_HCD_IRQHandler+0x148>
+    {
+#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
+      hhcd->SOFCallback(hhcd);
+#else
+      HAL_HCD_SOF_Callback(hhcd);
+ 8002144:	6878      	ldr	r0, [r7, #4]
+ 8002146:	f005 fdeb 	bl	8007d20 <HAL_HCD_SOF_Callback>
+#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
+
+      __HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_SOF);
+ 800214a:	687b      	ldr	r3, [r7, #4]
+ 800214c:	681b      	ldr	r3, [r3, #0]
+ 800214e:	2208      	movs	r2, #8
+ 8002150:	615a      	str	r2, [r3, #20]
+    }
+
+    /* Handle Host channel Interrupt */
+    if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_HCINT))
+ 8002152:	687b      	ldr	r3, [r7, #4]
+ 8002154:	681b      	ldr	r3, [r3, #0]
+ 8002156:	4618      	mov	r0, r3
+ 8002158:	f004 f9e8 	bl	800652c <USB_ReadInterrupts>
+ 800215c:	4603      	mov	r3, r0
+ 800215e:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
+ 8002162:	f1b3 7f00 	cmp.w	r3, #33554432	@ 0x2000000
+ 8002166:	d139      	bne.n	80021dc <HAL_HCD_IRQHandler+0x1d2>
+    {
+      interrupt = USB_HC_ReadInterrupt(hhcd->Instance);
+ 8002168:	687b      	ldr	r3, [r7, #4]
+ 800216a:	681b      	ldr	r3, [r3, #0]
+ 800216c:	4618      	mov	r0, r3
+ 800216e:	f004 fa5c 	bl	800662a <USB_HC_ReadInterrupt>
+ 8002172:	60b8      	str	r0, [r7, #8]
+      for (i = 0U; i < hhcd->Init.Host_channels; i++)
+ 8002174:	2300      	movs	r3, #0
+ 8002176:	617b      	str	r3, [r7, #20]
+ 8002178:	e025      	b.n	80021c6 <HAL_HCD_IRQHandler+0x1bc>
+      {
+        if ((interrupt & (1UL << (i & 0xFU))) != 0U)
+ 800217a:	697b      	ldr	r3, [r7, #20]
+ 800217c:	f003 030f 	and.w	r3, r3, #15
+ 8002180:	68ba      	ldr	r2, [r7, #8]
+ 8002182:	fa22 f303 	lsr.w	r3, r2, r3
+ 8002186:	f003 0301 	and.w	r3, r3, #1
+ 800218a:	2b00      	cmp	r3, #0
+ 800218c:	d018      	beq.n	80021c0 <HAL_HCD_IRQHandler+0x1b6>
+        {
+          if ((USBx_HC(i)->HCCHAR & USB_OTG_HCCHAR_EPDIR) == USB_OTG_HCCHAR_EPDIR)
+ 800218e:	697b      	ldr	r3, [r7, #20]
+ 8002190:	015a      	lsls	r2, r3, #5
+ 8002192:	68fb      	ldr	r3, [r7, #12]
+ 8002194:	4413      	add	r3, r2
+ 8002196:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800219a:	681b      	ldr	r3, [r3, #0]
+ 800219c:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
+ 80021a0:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
+ 80021a4:	d106      	bne.n	80021b4 <HAL_HCD_IRQHandler+0x1aa>
+          {
+            HCD_HC_IN_IRQHandler(hhcd, (uint8_t)i);
+ 80021a6:	697b      	ldr	r3, [r7, #20]
+ 80021a8:	b2db      	uxtb	r3, r3
+ 80021aa:	4619      	mov	r1, r3
+ 80021ac:	6878      	ldr	r0, [r7, #4]
+ 80021ae:	f000 f859 	bl	8002264 <HCD_HC_IN_IRQHandler>
+ 80021b2:	e005      	b.n	80021c0 <HAL_HCD_IRQHandler+0x1b6>
+          }
+          else
+          {
+            HCD_HC_OUT_IRQHandler(hhcd, (uint8_t)i);
+ 80021b4:	697b      	ldr	r3, [r7, #20]
+ 80021b6:	b2db      	uxtb	r3, r3
+ 80021b8:	4619      	mov	r1, r3
+ 80021ba:	6878      	ldr	r0, [r7, #4]
+ 80021bc:	f000 febb 	bl	8002f36 <HCD_HC_OUT_IRQHandler>
+      for (i = 0U; i < hhcd->Init.Host_channels; i++)
+ 80021c0:	697b      	ldr	r3, [r7, #20]
+ 80021c2:	3301      	adds	r3, #1
+ 80021c4:	617b      	str	r3, [r7, #20]
+ 80021c6:	687b      	ldr	r3, [r7, #4]
+ 80021c8:	795b      	ldrb	r3, [r3, #5]
+ 80021ca:	461a      	mov	r2, r3
+ 80021cc:	697b      	ldr	r3, [r7, #20]
+ 80021ce:	4293      	cmp	r3, r2
+ 80021d0:	d3d3      	bcc.n	800217a <HAL_HCD_IRQHandler+0x170>
+          }
+        }
+      }
+      __HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_HCINT);
+ 80021d2:	687b      	ldr	r3, [r7, #4]
+ 80021d4:	681b      	ldr	r3, [r3, #0]
+ 80021d6:	f04f 7200 	mov.w	r2, #33554432	@ 0x2000000
+ 80021da:	615a      	str	r2, [r3, #20]
+    }
+
+    /* Handle Rx Queue Level Interrupts */
+    if ((__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_RXFLVL)) != 0U)
+ 80021dc:	687b      	ldr	r3, [r7, #4]
+ 80021de:	681b      	ldr	r3, [r3, #0]
+ 80021e0:	4618      	mov	r0, r3
+ 80021e2:	f004 f9a3 	bl	800652c <USB_ReadInterrupts>
+ 80021e6:	4603      	mov	r3, r0
+ 80021e8:	f003 0310 	and.w	r3, r3, #16
+ 80021ec:	2b10      	cmp	r3, #16
+ 80021ee:	d101      	bne.n	80021f4 <HAL_HCD_IRQHandler+0x1ea>
+ 80021f0:	2301      	movs	r3, #1
+ 80021f2:	e000      	b.n	80021f6 <HAL_HCD_IRQHandler+0x1ec>
+ 80021f4:	2300      	movs	r3, #0
+ 80021f6:	2b00      	cmp	r3, #0
+ 80021f8:	d014      	beq.n	8002224 <HAL_HCD_IRQHandler+0x21a>
+    {
+      USB_MASK_INTERRUPT(hhcd->Instance, USB_OTG_GINTSTS_RXFLVL);
+ 80021fa:	687b      	ldr	r3, [r7, #4]
+ 80021fc:	681b      	ldr	r3, [r3, #0]
+ 80021fe:	699a      	ldr	r2, [r3, #24]
+ 8002200:	687b      	ldr	r3, [r7, #4]
+ 8002202:	681b      	ldr	r3, [r3, #0]
+ 8002204:	f022 0210 	bic.w	r2, r2, #16
+ 8002208:	619a      	str	r2, [r3, #24]
+
+      HCD_RXQLVL_IRQHandler(hhcd);
+ 800220a:	6878      	ldr	r0, [r7, #4]
+ 800220c:	f001 fb52 	bl	80038b4 <HCD_RXQLVL_IRQHandler>
+
+      USB_UNMASK_INTERRUPT(hhcd->Instance, USB_OTG_GINTSTS_RXFLVL);
+ 8002210:	687b      	ldr	r3, [r7, #4]
+ 8002212:	681b      	ldr	r3, [r3, #0]
+ 8002214:	699a      	ldr	r2, [r3, #24]
+ 8002216:	687b      	ldr	r3, [r7, #4]
+ 8002218:	681b      	ldr	r3, [r3, #0]
+ 800221a:	f042 0210 	orr.w	r2, r2, #16
+ 800221e:	619a      	str	r2, [r3, #24]
+ 8002220:	e000      	b.n	8002224 <HAL_HCD_IRQHandler+0x21a>
+      return;
+ 8002222:	bf00      	nop
+    }
+  }
+}
+ 8002224:	3718      	adds	r7, #24
+ 8002226:	46bd      	mov	sp, r7
+ 8002228:	bd80      	pop	{r7, pc}
+
+0800222a <HAL_HCD_Stop>:
+  * @param  hhcd HCD handle
+  * @retval HAL status
+  */
+
+HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd)
+{
+ 800222a:	b580      	push	{r7, lr}
+ 800222c:	b082      	sub	sp, #8
+ 800222e:	af00      	add	r7, sp, #0
+ 8002230:	6078      	str	r0, [r7, #4]
+  __HAL_LOCK(hhcd);
+ 8002232:	687b      	ldr	r3, [r7, #4]
+ 8002234:	f893 33d4 	ldrb.w	r3, [r3, #980]	@ 0x3d4
+ 8002238:	2b01      	cmp	r3, #1
+ 800223a:	d101      	bne.n	8002240 <HAL_HCD_Stop+0x16>
+ 800223c:	2302      	movs	r3, #2
+ 800223e:	e00d      	b.n	800225c <HAL_HCD_Stop+0x32>
+ 8002240:	687b      	ldr	r3, [r7, #4]
+ 8002242:	2201      	movs	r2, #1
+ 8002244:	f883 23d4 	strb.w	r2, [r3, #980]	@ 0x3d4
+  (void)USB_StopHost(hhcd->Instance);
+ 8002248:	687b      	ldr	r3, [r7, #4]
+ 800224a:	681b      	ldr	r3, [r3, #0]
+ 800224c:	4618      	mov	r0, r3
+ 800224e:	f004 fb1d 	bl	800688c <USB_StopHost>
+  __HAL_UNLOCK(hhcd);
+ 8002252:	687b      	ldr	r3, [r7, #4]
+ 8002254:	2200      	movs	r2, #0
+ 8002256:	f883 23d4 	strb.w	r2, [r3, #980]	@ 0x3d4
+
+  return HAL_OK;
+ 800225a:	2300      	movs	r3, #0
+}
+ 800225c:	4618      	mov	r0, r3
+ 800225e:	3708      	adds	r7, #8
+ 8002260:	46bd      	mov	sp, r7
+ 8002262:	bd80      	pop	{r7, pc}
+
+08002264 <HCD_HC_IN_IRQHandler>:
+  * @param  chnum Channel number.
+  *         This parameter can be a value from 1 to 15
+  * @retval none
+  */
+static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
+{
+ 8002264:	b580      	push	{r7, lr}
+ 8002266:	b086      	sub	sp, #24
+ 8002268:	af00      	add	r7, sp, #0
+ 800226a:	6078      	str	r0, [r7, #4]
+ 800226c:	460b      	mov	r3, r1
+ 800226e:	70fb      	strb	r3, [r7, #3]
+  const USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
+ 8002270:	687b      	ldr	r3, [r7, #4]
+ 8002272:	681b      	ldr	r3, [r3, #0]
+ 8002274:	617b      	str	r3, [r7, #20]
+  uint32_t USBx_BASE = (uint32_t)USBx;
+ 8002276:	697b      	ldr	r3, [r7, #20]
+ 8002278:	613b      	str	r3, [r7, #16]
+  uint32_t tmpreg;
+
+  if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_AHBERR))
+ 800227a:	687b      	ldr	r3, [r7, #4]
+ 800227c:	681b      	ldr	r3, [r3, #0]
+ 800227e:	78fa      	ldrb	r2, [r7, #3]
+ 8002280:	4611      	mov	r1, r2
+ 8002282:	4618      	mov	r0, r3
+ 8002284:	f004 f965 	bl	8006552 <USB_ReadChInterrupts>
+ 8002288:	4603      	mov	r3, r0
+ 800228a:	f003 0304 	and.w	r3, r3, #4
+ 800228e:	2b04      	cmp	r3, #4
+ 8002290:	d11a      	bne.n	80022c8 <HCD_HC_IN_IRQHandler+0x64>
+  {
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_AHBERR);
+ 8002292:	78fb      	ldrb	r3, [r7, #3]
+ 8002294:	015a      	lsls	r2, r3, #5
+ 8002296:	693b      	ldr	r3, [r7, #16]
+ 8002298:	4413      	add	r3, r2
+ 800229a:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800229e:	461a      	mov	r2, r3
+ 80022a0:	2304      	movs	r3, #4
+ 80022a2:	6093      	str	r3, [r2, #8]
+    hhcd->hc[chnum].state = HC_XACTERR;
+ 80022a4:	78fa      	ldrb	r2, [r7, #3]
+ 80022a6:	6879      	ldr	r1, [r7, #4]
+ 80022a8:	4613      	mov	r3, r2
+ 80022aa:	011b      	lsls	r3, r3, #4
+ 80022ac:	1a9b      	subs	r3, r3, r2
+ 80022ae:	009b      	lsls	r3, r3, #2
+ 80022b0:	440b      	add	r3, r1
+ 80022b2:	334d      	adds	r3, #77	@ 0x4d
+ 80022b4:	2207      	movs	r2, #7
+ 80022b6:	701a      	strb	r2, [r3, #0]
+    (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 80022b8:	687b      	ldr	r3, [r7, #4]
+ 80022ba:	681b      	ldr	r3, [r3, #0]
+ 80022bc:	78fa      	ldrb	r2, [r7, #3]
+ 80022be:	4611      	mov	r1, r2
+ 80022c0:	4618      	mov	r0, r3
+ 80022c2:	f004 f9c3 	bl	800664c <USB_HC_Halt>
+ 80022c6:	e09e      	b.n	8002406 <HCD_HC_IN_IRQHandler+0x1a2>
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_BBERR))
+ 80022c8:	687b      	ldr	r3, [r7, #4]
+ 80022ca:	681b      	ldr	r3, [r3, #0]
+ 80022cc:	78fa      	ldrb	r2, [r7, #3]
+ 80022ce:	4611      	mov	r1, r2
+ 80022d0:	4618      	mov	r0, r3
+ 80022d2:	f004 f93e 	bl	8006552 <USB_ReadChInterrupts>
+ 80022d6:	4603      	mov	r3, r0
+ 80022d8:	f403 7380 	and.w	r3, r3, #256	@ 0x100
+ 80022dc:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
+ 80022e0:	d11b      	bne.n	800231a <HCD_HC_IN_IRQHandler+0xb6>
+  {
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_BBERR);
+ 80022e2:	78fb      	ldrb	r3, [r7, #3]
+ 80022e4:	015a      	lsls	r2, r3, #5
+ 80022e6:	693b      	ldr	r3, [r7, #16]
+ 80022e8:	4413      	add	r3, r2
+ 80022ea:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80022ee:	461a      	mov	r2, r3
+ 80022f0:	f44f 7380 	mov.w	r3, #256	@ 0x100
+ 80022f4:	6093      	str	r3, [r2, #8]
+    hhcd->hc[chnum].state = HC_BBLERR;
+ 80022f6:	78fa      	ldrb	r2, [r7, #3]
+ 80022f8:	6879      	ldr	r1, [r7, #4]
+ 80022fa:	4613      	mov	r3, r2
+ 80022fc:	011b      	lsls	r3, r3, #4
+ 80022fe:	1a9b      	subs	r3, r3, r2
+ 8002300:	009b      	lsls	r3, r3, #2
+ 8002302:	440b      	add	r3, r1
+ 8002304:	334d      	adds	r3, #77	@ 0x4d
+ 8002306:	2208      	movs	r2, #8
+ 8002308:	701a      	strb	r2, [r3, #0]
+    (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 800230a:	687b      	ldr	r3, [r7, #4]
+ 800230c:	681b      	ldr	r3, [r3, #0]
+ 800230e:	78fa      	ldrb	r2, [r7, #3]
+ 8002310:	4611      	mov	r1, r2
+ 8002312:	4618      	mov	r0, r3
+ 8002314:	f004 f99a 	bl	800664c <USB_HC_Halt>
+ 8002318:	e075      	b.n	8002406 <HCD_HC_IN_IRQHandler+0x1a2>
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_STALL))
+ 800231a:	687b      	ldr	r3, [r7, #4]
+ 800231c:	681b      	ldr	r3, [r3, #0]
+ 800231e:	78fa      	ldrb	r2, [r7, #3]
+ 8002320:	4611      	mov	r1, r2
+ 8002322:	4618      	mov	r0, r3
+ 8002324:	f004 f915 	bl	8006552 <USB_ReadChInterrupts>
+ 8002328:	4603      	mov	r3, r0
+ 800232a:	f003 0308 	and.w	r3, r3, #8
+ 800232e:	2b08      	cmp	r3, #8
+ 8002330:	d11a      	bne.n	8002368 <HCD_HC_IN_IRQHandler+0x104>
+  {
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_STALL);
+ 8002332:	78fb      	ldrb	r3, [r7, #3]
+ 8002334:	015a      	lsls	r2, r3, #5
+ 8002336:	693b      	ldr	r3, [r7, #16]
+ 8002338:	4413      	add	r3, r2
+ 800233a:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800233e:	461a      	mov	r2, r3
+ 8002340:	2308      	movs	r3, #8
+ 8002342:	6093      	str	r3, [r2, #8]
+    hhcd->hc[chnum].state = HC_STALL;
+ 8002344:	78fa      	ldrb	r2, [r7, #3]
+ 8002346:	6879      	ldr	r1, [r7, #4]
+ 8002348:	4613      	mov	r3, r2
+ 800234a:	011b      	lsls	r3, r3, #4
+ 800234c:	1a9b      	subs	r3, r3, r2
+ 800234e:	009b      	lsls	r3, r3, #2
+ 8002350:	440b      	add	r3, r1
+ 8002352:	334d      	adds	r3, #77	@ 0x4d
+ 8002354:	2206      	movs	r2, #6
+ 8002356:	701a      	strb	r2, [r3, #0]
+    (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 8002358:	687b      	ldr	r3, [r7, #4]
+ 800235a:	681b      	ldr	r3, [r3, #0]
+ 800235c:	78fa      	ldrb	r2, [r7, #3]
+ 800235e:	4611      	mov	r1, r2
+ 8002360:	4618      	mov	r0, r3
+ 8002362:	f004 f973 	bl	800664c <USB_HC_Halt>
+ 8002366:	e04e      	b.n	8002406 <HCD_HC_IN_IRQHandler+0x1a2>
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_DTERR))
+ 8002368:	687b      	ldr	r3, [r7, #4]
+ 800236a:	681b      	ldr	r3, [r3, #0]
+ 800236c:	78fa      	ldrb	r2, [r7, #3]
+ 800236e:	4611      	mov	r1, r2
+ 8002370:	4618      	mov	r0, r3
+ 8002372:	f004 f8ee 	bl	8006552 <USB_ReadChInterrupts>
+ 8002376:	4603      	mov	r3, r0
+ 8002378:	f403 6380 	and.w	r3, r3, #1024	@ 0x400
+ 800237c:	f5b3 6f80 	cmp.w	r3, #1024	@ 0x400
+ 8002380:	d11b      	bne.n	80023ba <HCD_HC_IN_IRQHandler+0x156>
+  {
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_DTERR);
+ 8002382:	78fb      	ldrb	r3, [r7, #3]
+ 8002384:	015a      	lsls	r2, r3, #5
+ 8002386:	693b      	ldr	r3, [r7, #16]
+ 8002388:	4413      	add	r3, r2
+ 800238a:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800238e:	461a      	mov	r2, r3
+ 8002390:	f44f 6380 	mov.w	r3, #1024	@ 0x400
+ 8002394:	6093      	str	r3, [r2, #8]
+    hhcd->hc[chnum].state = HC_DATATGLERR;
+ 8002396:	78fa      	ldrb	r2, [r7, #3]
+ 8002398:	6879      	ldr	r1, [r7, #4]
+ 800239a:	4613      	mov	r3, r2
+ 800239c:	011b      	lsls	r3, r3, #4
+ 800239e:	1a9b      	subs	r3, r3, r2
+ 80023a0:	009b      	lsls	r3, r3, #2
+ 80023a2:	440b      	add	r3, r1
+ 80023a4:	334d      	adds	r3, #77	@ 0x4d
+ 80023a6:	2209      	movs	r2, #9
+ 80023a8:	701a      	strb	r2, [r3, #0]
+    (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 80023aa:	687b      	ldr	r3, [r7, #4]
+ 80023ac:	681b      	ldr	r3, [r3, #0]
+ 80023ae:	78fa      	ldrb	r2, [r7, #3]
+ 80023b0:	4611      	mov	r1, r2
+ 80023b2:	4618      	mov	r0, r3
+ 80023b4:	f004 f94a 	bl	800664c <USB_HC_Halt>
+ 80023b8:	e025      	b.n	8002406 <HCD_HC_IN_IRQHandler+0x1a2>
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_TXERR))
+ 80023ba:	687b      	ldr	r3, [r7, #4]
+ 80023bc:	681b      	ldr	r3, [r3, #0]
+ 80023be:	78fa      	ldrb	r2, [r7, #3]
+ 80023c0:	4611      	mov	r1, r2
+ 80023c2:	4618      	mov	r0, r3
+ 80023c4:	f004 f8c5 	bl	8006552 <USB_ReadChInterrupts>
+ 80023c8:	4603      	mov	r3, r0
+ 80023ca:	f003 0380 	and.w	r3, r3, #128	@ 0x80
+ 80023ce:	2b80      	cmp	r3, #128	@ 0x80
+ 80023d0:	d119      	bne.n	8002406 <HCD_HC_IN_IRQHandler+0x1a2>
+  {
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_TXERR);
+ 80023d2:	78fb      	ldrb	r3, [r7, #3]
+ 80023d4:	015a      	lsls	r2, r3, #5
+ 80023d6:	693b      	ldr	r3, [r7, #16]
+ 80023d8:	4413      	add	r3, r2
+ 80023da:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80023de:	461a      	mov	r2, r3
+ 80023e0:	2380      	movs	r3, #128	@ 0x80
+ 80023e2:	6093      	str	r3, [r2, #8]
+    hhcd->hc[chnum].state = HC_XACTERR;
+ 80023e4:	78fa      	ldrb	r2, [r7, #3]
+ 80023e6:	6879      	ldr	r1, [r7, #4]
+ 80023e8:	4613      	mov	r3, r2
+ 80023ea:	011b      	lsls	r3, r3, #4
+ 80023ec:	1a9b      	subs	r3, r3, r2
+ 80023ee:	009b      	lsls	r3, r3, #2
+ 80023f0:	440b      	add	r3, r1
+ 80023f2:	334d      	adds	r3, #77	@ 0x4d
+ 80023f4:	2207      	movs	r2, #7
+ 80023f6:	701a      	strb	r2, [r3, #0]
+    (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 80023f8:	687b      	ldr	r3, [r7, #4]
+ 80023fa:	681b      	ldr	r3, [r3, #0]
+ 80023fc:	78fa      	ldrb	r2, [r7, #3]
+ 80023fe:	4611      	mov	r1, r2
+ 8002400:	4618      	mov	r0, r3
+ 8002402:	f004 f923 	bl	800664c <USB_HC_Halt>
+  else
+  {
+    /* ... */
+  }
+
+  if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_FRMOR))
+ 8002406:	687b      	ldr	r3, [r7, #4]
+ 8002408:	681b      	ldr	r3, [r3, #0]
+ 800240a:	78fa      	ldrb	r2, [r7, #3]
+ 800240c:	4611      	mov	r1, r2
+ 800240e:	4618      	mov	r0, r3
+ 8002410:	f004 f89f 	bl	8006552 <USB_ReadChInterrupts>
+ 8002414:	4603      	mov	r3, r0
+ 8002416:	f403 7300 	and.w	r3, r3, #512	@ 0x200
+ 800241a:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
+ 800241e:	d112      	bne.n	8002446 <HCD_HC_IN_IRQHandler+0x1e2>
+  {
+    (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 8002420:	687b      	ldr	r3, [r7, #4]
+ 8002422:	681b      	ldr	r3, [r3, #0]
+ 8002424:	78fa      	ldrb	r2, [r7, #3]
+ 8002426:	4611      	mov	r1, r2
+ 8002428:	4618      	mov	r0, r3
+ 800242a:	f004 f90f 	bl	800664c <USB_HC_Halt>
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_FRMOR);
+ 800242e:	78fb      	ldrb	r3, [r7, #3]
+ 8002430:	015a      	lsls	r2, r3, #5
+ 8002432:	693b      	ldr	r3, [r7, #16]
+ 8002434:	4413      	add	r3, r2
+ 8002436:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800243a:	461a      	mov	r2, r3
+ 800243c:	f44f 7300 	mov.w	r3, #512	@ 0x200
+ 8002440:	6093      	str	r3, [r2, #8]
+ 8002442:	f000 bd75 	b.w	8002f30 <HCD_HC_IN_IRQHandler+0xccc>
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_XFRC))
+ 8002446:	687b      	ldr	r3, [r7, #4]
+ 8002448:	681b      	ldr	r3, [r3, #0]
+ 800244a:	78fa      	ldrb	r2, [r7, #3]
+ 800244c:	4611      	mov	r1, r2
+ 800244e:	4618      	mov	r0, r3
+ 8002450:	f004 f87f 	bl	8006552 <USB_ReadChInterrupts>
+ 8002454:	4603      	mov	r3, r0
+ 8002456:	f003 0301 	and.w	r3, r3, #1
+ 800245a:	2b01      	cmp	r3, #1
+ 800245c:	f040 8128 	bne.w	80026b0 <HCD_HC_IN_IRQHandler+0x44c>
+  {
+    /* Clear any pending ACK IT */
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_ACK);
+ 8002460:	78fb      	ldrb	r3, [r7, #3]
+ 8002462:	015a      	lsls	r2, r3, #5
+ 8002464:	693b      	ldr	r3, [r7, #16]
+ 8002466:	4413      	add	r3, r2
+ 8002468:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800246c:	461a      	mov	r2, r3
+ 800246e:	2320      	movs	r3, #32
+ 8002470:	6093      	str	r3, [r2, #8]
+
+    if (hhcd->hc[chnum].do_csplit == 1U)
+ 8002472:	78fa      	ldrb	r2, [r7, #3]
+ 8002474:	6879      	ldr	r1, [r7, #4]
+ 8002476:	4613      	mov	r3, r2
+ 8002478:	011b      	lsls	r3, r3, #4
+ 800247a:	1a9b      	subs	r3, r3, r2
+ 800247c:	009b      	lsls	r3, r3, #2
+ 800247e:	440b      	add	r3, r1
+ 8002480:	331b      	adds	r3, #27
+ 8002482:	781b      	ldrb	r3, [r3, #0]
+ 8002484:	2b01      	cmp	r3, #1
+ 8002486:	d119      	bne.n	80024bc <HCD_HC_IN_IRQHandler+0x258>
+    {
+      hhcd->hc[chnum].do_csplit = 0U;
+ 8002488:	78fa      	ldrb	r2, [r7, #3]
+ 800248a:	6879      	ldr	r1, [r7, #4]
+ 800248c:	4613      	mov	r3, r2
+ 800248e:	011b      	lsls	r3, r3, #4
+ 8002490:	1a9b      	subs	r3, r3, r2
+ 8002492:	009b      	lsls	r3, r3, #2
+ 8002494:	440b      	add	r3, r1
+ 8002496:	331b      	adds	r3, #27
+ 8002498:	2200      	movs	r2, #0
+ 800249a:	701a      	strb	r2, [r3, #0]
+      __HAL_HCD_CLEAR_HC_CSPLT(chnum);
+ 800249c:	78fb      	ldrb	r3, [r7, #3]
+ 800249e:	015a      	lsls	r2, r3, #5
+ 80024a0:	693b      	ldr	r3, [r7, #16]
+ 80024a2:	4413      	add	r3, r2
+ 80024a4:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80024a8:	685b      	ldr	r3, [r3, #4]
+ 80024aa:	78fa      	ldrb	r2, [r7, #3]
+ 80024ac:	0151      	lsls	r1, r2, #5
+ 80024ae:	693a      	ldr	r2, [r7, #16]
+ 80024b0:	440a      	add	r2, r1
+ 80024b2:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 80024b6:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
+ 80024ba:	6053      	str	r3, [r2, #4]
+    }
+
+    if (hhcd->Init.dma_enable != 0U)
+ 80024bc:	687b      	ldr	r3, [r7, #4]
+ 80024be:	799b      	ldrb	r3, [r3, #6]
+ 80024c0:	2b00      	cmp	r3, #0
+ 80024c2:	d01b      	beq.n	80024fc <HCD_HC_IN_IRQHandler+0x298>
+    {
+      hhcd->hc[chnum].xfer_count = hhcd->hc[chnum].XferSize - (USBx_HC(chnum)->HCTSIZ & USB_OTG_HCTSIZ_XFRSIZ);
+ 80024c4:	78fa      	ldrb	r2, [r7, #3]
+ 80024c6:	6879      	ldr	r1, [r7, #4]
+ 80024c8:	4613      	mov	r3, r2
+ 80024ca:	011b      	lsls	r3, r3, #4
+ 80024cc:	1a9b      	subs	r3, r3, r2
+ 80024ce:	009b      	lsls	r3, r3, #2
+ 80024d0:	440b      	add	r3, r1
+ 80024d2:	3330      	adds	r3, #48	@ 0x30
+ 80024d4:	6819      	ldr	r1, [r3, #0]
+ 80024d6:	78fb      	ldrb	r3, [r7, #3]
+ 80024d8:	015a      	lsls	r2, r3, #5
+ 80024da:	693b      	ldr	r3, [r7, #16]
+ 80024dc:	4413      	add	r3, r2
+ 80024de:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80024e2:	691b      	ldr	r3, [r3, #16]
+ 80024e4:	f3c3 0312 	ubfx	r3, r3, #0, #19
+ 80024e8:	78fa      	ldrb	r2, [r7, #3]
+ 80024ea:	1ac9      	subs	r1, r1, r3
+ 80024ec:	6878      	ldr	r0, [r7, #4]
+ 80024ee:	4613      	mov	r3, r2
+ 80024f0:	011b      	lsls	r3, r3, #4
+ 80024f2:	1a9b      	subs	r3, r3, r2
+ 80024f4:	009b      	lsls	r3, r3, #2
+ 80024f6:	4403      	add	r3, r0
+ 80024f8:	3338      	adds	r3, #56	@ 0x38
+ 80024fa:	6019      	str	r1, [r3, #0]
+    }
+
+    hhcd->hc[chnum].state = HC_XFRC;
+ 80024fc:	78fa      	ldrb	r2, [r7, #3]
+ 80024fe:	6879      	ldr	r1, [r7, #4]
+ 8002500:	4613      	mov	r3, r2
+ 8002502:	011b      	lsls	r3, r3, #4
+ 8002504:	1a9b      	subs	r3, r3, r2
+ 8002506:	009b      	lsls	r3, r3, #2
+ 8002508:	440b      	add	r3, r1
+ 800250a:	334d      	adds	r3, #77	@ 0x4d
+ 800250c:	2201      	movs	r2, #1
+ 800250e:	701a      	strb	r2, [r3, #0]
+    hhcd->hc[chnum].ErrCnt = 0U;
+ 8002510:	78fa      	ldrb	r2, [r7, #3]
+ 8002512:	6879      	ldr	r1, [r7, #4]
+ 8002514:	4613      	mov	r3, r2
+ 8002516:	011b      	lsls	r3, r3, #4
+ 8002518:	1a9b      	subs	r3, r3, r2
+ 800251a:	009b      	lsls	r3, r3, #2
+ 800251c:	440b      	add	r3, r1
+ 800251e:	3344      	adds	r3, #68	@ 0x44
+ 8002520:	2200      	movs	r2, #0
+ 8002522:	601a      	str	r2, [r3, #0]
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_XFRC);
+ 8002524:	78fb      	ldrb	r3, [r7, #3]
+ 8002526:	015a      	lsls	r2, r3, #5
+ 8002528:	693b      	ldr	r3, [r7, #16]
+ 800252a:	4413      	add	r3, r2
+ 800252c:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002530:	461a      	mov	r2, r3
+ 8002532:	2301      	movs	r3, #1
+ 8002534:	6093      	str	r3, [r2, #8]
+
+    if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ 8002536:	78fa      	ldrb	r2, [r7, #3]
+ 8002538:	6879      	ldr	r1, [r7, #4]
+ 800253a:	4613      	mov	r3, r2
+ 800253c:	011b      	lsls	r3, r3, #4
+ 800253e:	1a9b      	subs	r3, r3, r2
+ 8002540:	009b      	lsls	r3, r3, #2
+ 8002542:	440b      	add	r3, r1
+ 8002544:	3326      	adds	r3, #38	@ 0x26
+ 8002546:	781b      	ldrb	r3, [r3, #0]
+ 8002548:	2b00      	cmp	r3, #0
+ 800254a:	d00a      	beq.n	8002562 <HCD_HC_IN_IRQHandler+0x2fe>
+        (hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
+ 800254c:	78fa      	ldrb	r2, [r7, #3]
+ 800254e:	6879      	ldr	r1, [r7, #4]
+ 8002550:	4613      	mov	r3, r2
+ 8002552:	011b      	lsls	r3, r3, #4
+ 8002554:	1a9b      	subs	r3, r3, r2
+ 8002556:	009b      	lsls	r3, r3, #2
+ 8002558:	440b      	add	r3, r1
+ 800255a:	3326      	adds	r3, #38	@ 0x26
+ 800255c:	781b      	ldrb	r3, [r3, #0]
+    if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ 800255e:	2b02      	cmp	r3, #2
+ 8002560:	d110      	bne.n	8002584 <HCD_HC_IN_IRQHandler+0x320>
+    {
+      (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 8002562:	687b      	ldr	r3, [r7, #4]
+ 8002564:	681b      	ldr	r3, [r3, #0]
+ 8002566:	78fa      	ldrb	r2, [r7, #3]
+ 8002568:	4611      	mov	r1, r2
+ 800256a:	4618      	mov	r0, r3
+ 800256c:	f004 f86e 	bl	800664c <USB_HC_Halt>
+      __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK);
+ 8002570:	78fb      	ldrb	r3, [r7, #3]
+ 8002572:	015a      	lsls	r2, r3, #5
+ 8002574:	693b      	ldr	r3, [r7, #16]
+ 8002576:	4413      	add	r3, r2
+ 8002578:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800257c:	461a      	mov	r2, r3
+ 800257e:	2310      	movs	r3, #16
+ 8002580:	6093      	str	r3, [r2, #8]
+ 8002582:	e03d      	b.n	8002600 <HCD_HC_IN_IRQHandler+0x39c>
+    }
+    else if ((hhcd->hc[chnum].ep_type == EP_TYPE_INTR) ||
+ 8002584:	78fa      	ldrb	r2, [r7, #3]
+ 8002586:	6879      	ldr	r1, [r7, #4]
+ 8002588:	4613      	mov	r3, r2
+ 800258a:	011b      	lsls	r3, r3, #4
+ 800258c:	1a9b      	subs	r3, r3, r2
+ 800258e:	009b      	lsls	r3, r3, #2
+ 8002590:	440b      	add	r3, r1
+ 8002592:	3326      	adds	r3, #38	@ 0x26
+ 8002594:	781b      	ldrb	r3, [r3, #0]
+ 8002596:	2b03      	cmp	r3, #3
+ 8002598:	d00a      	beq.n	80025b0 <HCD_HC_IN_IRQHandler+0x34c>
+             (hhcd->hc[chnum].ep_type == EP_TYPE_ISOC))
+ 800259a:	78fa      	ldrb	r2, [r7, #3]
+ 800259c:	6879      	ldr	r1, [r7, #4]
+ 800259e:	4613      	mov	r3, r2
+ 80025a0:	011b      	lsls	r3, r3, #4
+ 80025a2:	1a9b      	subs	r3, r3, r2
+ 80025a4:	009b      	lsls	r3, r3, #2
+ 80025a6:	440b      	add	r3, r1
+ 80025a8:	3326      	adds	r3, #38	@ 0x26
+ 80025aa:	781b      	ldrb	r3, [r3, #0]
+    else if ((hhcd->hc[chnum].ep_type == EP_TYPE_INTR) ||
+ 80025ac:	2b01      	cmp	r3, #1
+ 80025ae:	d127      	bne.n	8002600 <HCD_HC_IN_IRQHandler+0x39c>
+    {
+      USBx_HC(chnum)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM;
+ 80025b0:	78fb      	ldrb	r3, [r7, #3]
+ 80025b2:	015a      	lsls	r2, r3, #5
+ 80025b4:	693b      	ldr	r3, [r7, #16]
+ 80025b6:	4413      	add	r3, r2
+ 80025b8:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80025bc:	681b      	ldr	r3, [r3, #0]
+ 80025be:	78fa      	ldrb	r2, [r7, #3]
+ 80025c0:	0151      	lsls	r1, r2, #5
+ 80025c2:	693a      	ldr	r2, [r7, #16]
+ 80025c4:	440a      	add	r2, r1
+ 80025c6:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 80025ca:	f043 5300 	orr.w	r3, r3, #536870912	@ 0x20000000
+ 80025ce:	6013      	str	r3, [r2, #0]
+      hhcd->hc[chnum].urb_state = URB_DONE;
+ 80025d0:	78fa      	ldrb	r2, [r7, #3]
+ 80025d2:	6879      	ldr	r1, [r7, #4]
+ 80025d4:	4613      	mov	r3, r2
+ 80025d6:	011b      	lsls	r3, r3, #4
+ 80025d8:	1a9b      	subs	r3, r3, r2
+ 80025da:	009b      	lsls	r3, r3, #2
+ 80025dc:	440b      	add	r3, r1
+ 80025de:	334c      	adds	r3, #76	@ 0x4c
+ 80025e0:	2201      	movs	r2, #1
+ 80025e2:	701a      	strb	r2, [r3, #0]
+
+#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
+      hhcd->HC_NotifyURBChangeCallback(hhcd, chnum, hhcd->hc[chnum].urb_state);
+#else
+      HAL_HCD_HC_NotifyURBChange_Callback(hhcd, chnum, hhcd->hc[chnum].urb_state);
+ 80025e4:	78fa      	ldrb	r2, [r7, #3]
+ 80025e6:	6879      	ldr	r1, [r7, #4]
+ 80025e8:	4613      	mov	r3, r2
+ 80025ea:	011b      	lsls	r3, r3, #4
+ 80025ec:	1a9b      	subs	r3, r3, r2
+ 80025ee:	009b      	lsls	r3, r3, #2
+ 80025f0:	440b      	add	r3, r1
+ 80025f2:	334c      	adds	r3, #76	@ 0x4c
+ 80025f4:	781a      	ldrb	r2, [r3, #0]
+ 80025f6:	78fb      	ldrb	r3, [r7, #3]
+ 80025f8:	4619      	mov	r1, r3
+ 80025fa:	6878      	ldr	r0, [r7, #4]
+ 80025fc:	f005 fbba 	bl	8007d74 <HAL_HCD_HC_NotifyURBChange_Callback>
+    else
+    {
+      /* ... */
+    }
+
+    if (hhcd->Init.dma_enable == 1U)
+ 8002600:	687b      	ldr	r3, [r7, #4]
+ 8002602:	799b      	ldrb	r3, [r3, #6]
+ 8002604:	2b01      	cmp	r3, #1
+ 8002606:	d13b      	bne.n	8002680 <HCD_HC_IN_IRQHandler+0x41c>
+    {
+      if ((((hhcd->hc[chnum].xfer_count + hhcd->hc[chnum].max_packet - 1U) / hhcd->hc[chnum].max_packet) & 1U) != 0U)
+ 8002608:	78fa      	ldrb	r2, [r7, #3]
+ 800260a:	6879      	ldr	r1, [r7, #4]
+ 800260c:	4613      	mov	r3, r2
+ 800260e:	011b      	lsls	r3, r3, #4
+ 8002610:	1a9b      	subs	r3, r3, r2
+ 8002612:	009b      	lsls	r3, r3, #2
+ 8002614:	440b      	add	r3, r1
+ 8002616:	3338      	adds	r3, #56	@ 0x38
+ 8002618:	6819      	ldr	r1, [r3, #0]
+ 800261a:	78fa      	ldrb	r2, [r7, #3]
+ 800261c:	6878      	ldr	r0, [r7, #4]
+ 800261e:	4613      	mov	r3, r2
+ 8002620:	011b      	lsls	r3, r3, #4
+ 8002622:	1a9b      	subs	r3, r3, r2
+ 8002624:	009b      	lsls	r3, r3, #2
+ 8002626:	4403      	add	r3, r0
+ 8002628:	3328      	adds	r3, #40	@ 0x28
+ 800262a:	881b      	ldrh	r3, [r3, #0]
+ 800262c:	440b      	add	r3, r1
+ 800262e:	1e59      	subs	r1, r3, #1
+ 8002630:	78fa      	ldrb	r2, [r7, #3]
+ 8002632:	6878      	ldr	r0, [r7, #4]
+ 8002634:	4613      	mov	r3, r2
+ 8002636:	011b      	lsls	r3, r3, #4
+ 8002638:	1a9b      	subs	r3, r3, r2
+ 800263a:	009b      	lsls	r3, r3, #2
+ 800263c:	4403      	add	r3, r0
+ 800263e:	3328      	adds	r3, #40	@ 0x28
+ 8002640:	881b      	ldrh	r3, [r3, #0]
+ 8002642:	fbb1 f3f3 	udiv	r3, r1, r3
+ 8002646:	f003 0301 	and.w	r3, r3, #1
+ 800264a:	2b00      	cmp	r3, #0
+ 800264c:	f000 8470 	beq.w	8002f30 <HCD_HC_IN_IRQHandler+0xccc>
+      {
+        hhcd->hc[chnum].toggle_in ^= 1U;
+ 8002650:	78fa      	ldrb	r2, [r7, #3]
+ 8002652:	6879      	ldr	r1, [r7, #4]
+ 8002654:	4613      	mov	r3, r2
+ 8002656:	011b      	lsls	r3, r3, #4
+ 8002658:	1a9b      	subs	r3, r3, r2
+ 800265a:	009b      	lsls	r3, r3, #2
+ 800265c:	440b      	add	r3, r1
+ 800265e:	333c      	adds	r3, #60	@ 0x3c
+ 8002660:	781b      	ldrb	r3, [r3, #0]
+ 8002662:	78fa      	ldrb	r2, [r7, #3]
+ 8002664:	f083 0301 	eor.w	r3, r3, #1
+ 8002668:	b2d8      	uxtb	r0, r3
+ 800266a:	6879      	ldr	r1, [r7, #4]
+ 800266c:	4613      	mov	r3, r2
+ 800266e:	011b      	lsls	r3, r3, #4
+ 8002670:	1a9b      	subs	r3, r3, r2
+ 8002672:	009b      	lsls	r3, r3, #2
+ 8002674:	440b      	add	r3, r1
+ 8002676:	333c      	adds	r3, #60	@ 0x3c
+ 8002678:	4602      	mov	r2, r0
+ 800267a:	701a      	strb	r2, [r3, #0]
+ 800267c:	f000 bc58 	b.w	8002f30 <HCD_HC_IN_IRQHandler+0xccc>
+      }
+    }
+    else
+    {
+      hhcd->hc[chnum].toggle_in ^= 1U;
+ 8002680:	78fa      	ldrb	r2, [r7, #3]
+ 8002682:	6879      	ldr	r1, [r7, #4]
+ 8002684:	4613      	mov	r3, r2
+ 8002686:	011b      	lsls	r3, r3, #4
+ 8002688:	1a9b      	subs	r3, r3, r2
+ 800268a:	009b      	lsls	r3, r3, #2
+ 800268c:	440b      	add	r3, r1
+ 800268e:	333c      	adds	r3, #60	@ 0x3c
+ 8002690:	781b      	ldrb	r3, [r3, #0]
+ 8002692:	78fa      	ldrb	r2, [r7, #3]
+ 8002694:	f083 0301 	eor.w	r3, r3, #1
+ 8002698:	b2d8      	uxtb	r0, r3
+ 800269a:	6879      	ldr	r1, [r7, #4]
+ 800269c:	4613      	mov	r3, r2
+ 800269e:	011b      	lsls	r3, r3, #4
+ 80026a0:	1a9b      	subs	r3, r3, r2
+ 80026a2:	009b      	lsls	r3, r3, #2
+ 80026a4:	440b      	add	r3, r1
+ 80026a6:	333c      	adds	r3, #60	@ 0x3c
+ 80026a8:	4602      	mov	r2, r0
+ 80026aa:	701a      	strb	r2, [r3, #0]
+ 80026ac:	f000 bc40 	b.w	8002f30 <HCD_HC_IN_IRQHandler+0xccc>
+    }
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_ACK))
+ 80026b0:	687b      	ldr	r3, [r7, #4]
+ 80026b2:	681b      	ldr	r3, [r3, #0]
+ 80026b4:	78fa      	ldrb	r2, [r7, #3]
+ 80026b6:	4611      	mov	r1, r2
+ 80026b8:	4618      	mov	r0, r3
+ 80026ba:	f003 ff4a 	bl	8006552 <USB_ReadChInterrupts>
+ 80026be:	4603      	mov	r3, r0
+ 80026c0:	f003 0320 	and.w	r3, r3, #32
+ 80026c4:	2b20      	cmp	r3, #32
+ 80026c6:	d131      	bne.n	800272c <HCD_HC_IN_IRQHandler+0x4c8>
+  {
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_ACK);
+ 80026c8:	78fb      	ldrb	r3, [r7, #3]
+ 80026ca:	015a      	lsls	r2, r3, #5
+ 80026cc:	693b      	ldr	r3, [r7, #16]
+ 80026ce:	4413      	add	r3, r2
+ 80026d0:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80026d4:	461a      	mov	r2, r3
+ 80026d6:	2320      	movs	r3, #32
+ 80026d8:	6093      	str	r3, [r2, #8]
+
+    if (hhcd->hc[chnum].do_ssplit == 1U)
+ 80026da:	78fa      	ldrb	r2, [r7, #3]
+ 80026dc:	6879      	ldr	r1, [r7, #4]
+ 80026de:	4613      	mov	r3, r2
+ 80026e0:	011b      	lsls	r3, r3, #4
+ 80026e2:	1a9b      	subs	r3, r3, r2
+ 80026e4:	009b      	lsls	r3, r3, #2
+ 80026e6:	440b      	add	r3, r1
+ 80026e8:	331a      	adds	r3, #26
+ 80026ea:	781b      	ldrb	r3, [r3, #0]
+ 80026ec:	2b01      	cmp	r3, #1
+ 80026ee:	f040 841f 	bne.w	8002f30 <HCD_HC_IN_IRQHandler+0xccc>
+    {
+      hhcd->hc[chnum].do_csplit = 1U;
+ 80026f2:	78fa      	ldrb	r2, [r7, #3]
+ 80026f4:	6879      	ldr	r1, [r7, #4]
+ 80026f6:	4613      	mov	r3, r2
+ 80026f8:	011b      	lsls	r3, r3, #4
+ 80026fa:	1a9b      	subs	r3, r3, r2
+ 80026fc:	009b      	lsls	r3, r3, #2
+ 80026fe:	440b      	add	r3, r1
+ 8002700:	331b      	adds	r3, #27
+ 8002702:	2201      	movs	r2, #1
+ 8002704:	701a      	strb	r2, [r3, #0]
+      hhcd->hc[chnum].state = HC_ACK;
+ 8002706:	78fa      	ldrb	r2, [r7, #3]
+ 8002708:	6879      	ldr	r1, [r7, #4]
+ 800270a:	4613      	mov	r3, r2
+ 800270c:	011b      	lsls	r3, r3, #4
+ 800270e:	1a9b      	subs	r3, r3, r2
+ 8002710:	009b      	lsls	r3, r3, #2
+ 8002712:	440b      	add	r3, r1
+ 8002714:	334d      	adds	r3, #77	@ 0x4d
+ 8002716:	2203      	movs	r2, #3
+ 8002718:	701a      	strb	r2, [r3, #0]
+
+      (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 800271a:	687b      	ldr	r3, [r7, #4]
+ 800271c:	681b      	ldr	r3, [r3, #0]
+ 800271e:	78fa      	ldrb	r2, [r7, #3]
+ 8002720:	4611      	mov	r1, r2
+ 8002722:	4618      	mov	r0, r3
+ 8002724:	f003 ff92 	bl	800664c <USB_HC_Halt>
+ 8002728:	f000 bc02 	b.w	8002f30 <HCD_HC_IN_IRQHandler+0xccc>
+    }
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_CHH))
+ 800272c:	687b      	ldr	r3, [r7, #4]
+ 800272e:	681b      	ldr	r3, [r3, #0]
+ 8002730:	78fa      	ldrb	r2, [r7, #3]
+ 8002732:	4611      	mov	r1, r2
+ 8002734:	4618      	mov	r0, r3
+ 8002736:	f003 ff0c 	bl	8006552 <USB_ReadChInterrupts>
+ 800273a:	4603      	mov	r3, r0
+ 800273c:	f003 0302 	and.w	r3, r3, #2
+ 8002740:	2b02      	cmp	r3, #2
+ 8002742:	f040 8305 	bne.w	8002d50 <HCD_HC_IN_IRQHandler+0xaec>
+  {
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_CHH);
+ 8002746:	78fb      	ldrb	r3, [r7, #3]
+ 8002748:	015a      	lsls	r2, r3, #5
+ 800274a:	693b      	ldr	r3, [r7, #16]
+ 800274c:	4413      	add	r3, r2
+ 800274e:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002752:	461a      	mov	r2, r3
+ 8002754:	2302      	movs	r3, #2
+ 8002756:	6093      	str	r3, [r2, #8]
+
+    if (hhcd->hc[chnum].state == HC_XFRC)
+ 8002758:	78fa      	ldrb	r2, [r7, #3]
+ 800275a:	6879      	ldr	r1, [r7, #4]
+ 800275c:	4613      	mov	r3, r2
+ 800275e:	011b      	lsls	r3, r3, #4
+ 8002760:	1a9b      	subs	r3, r3, r2
+ 8002762:	009b      	lsls	r3, r3, #2
+ 8002764:	440b      	add	r3, r1
+ 8002766:	334d      	adds	r3, #77	@ 0x4d
+ 8002768:	781b      	ldrb	r3, [r3, #0]
+ 800276a:	2b01      	cmp	r3, #1
+ 800276c:	d114      	bne.n	8002798 <HCD_HC_IN_IRQHandler+0x534>
+    {
+      hhcd->hc[chnum].state = HC_HALTED;
+ 800276e:	78fa      	ldrb	r2, [r7, #3]
+ 8002770:	6879      	ldr	r1, [r7, #4]
+ 8002772:	4613      	mov	r3, r2
+ 8002774:	011b      	lsls	r3, r3, #4
+ 8002776:	1a9b      	subs	r3, r3, r2
+ 8002778:	009b      	lsls	r3, r3, #2
+ 800277a:	440b      	add	r3, r1
+ 800277c:	334d      	adds	r3, #77	@ 0x4d
+ 800277e:	2202      	movs	r2, #2
+ 8002780:	701a      	strb	r2, [r3, #0]
+      hhcd->hc[chnum].urb_state = URB_DONE;
+ 8002782:	78fa      	ldrb	r2, [r7, #3]
+ 8002784:	6879      	ldr	r1, [r7, #4]
+ 8002786:	4613      	mov	r3, r2
+ 8002788:	011b      	lsls	r3, r3, #4
+ 800278a:	1a9b      	subs	r3, r3, r2
+ 800278c:	009b      	lsls	r3, r3, #2
+ 800278e:	440b      	add	r3, r1
+ 8002790:	334c      	adds	r3, #76	@ 0x4c
+ 8002792:	2201      	movs	r2, #1
+ 8002794:	701a      	strb	r2, [r3, #0]
+ 8002796:	e2cc      	b.n	8002d32 <HCD_HC_IN_IRQHandler+0xace>
+    }
+    else if (hhcd->hc[chnum].state == HC_STALL)
+ 8002798:	78fa      	ldrb	r2, [r7, #3]
+ 800279a:	6879      	ldr	r1, [r7, #4]
+ 800279c:	4613      	mov	r3, r2
+ 800279e:	011b      	lsls	r3, r3, #4
+ 80027a0:	1a9b      	subs	r3, r3, r2
+ 80027a2:	009b      	lsls	r3, r3, #2
+ 80027a4:	440b      	add	r3, r1
+ 80027a6:	334d      	adds	r3, #77	@ 0x4d
+ 80027a8:	781b      	ldrb	r3, [r3, #0]
+ 80027aa:	2b06      	cmp	r3, #6
+ 80027ac:	d114      	bne.n	80027d8 <HCD_HC_IN_IRQHandler+0x574>
+    {
+      hhcd->hc[chnum].state = HC_HALTED;
+ 80027ae:	78fa      	ldrb	r2, [r7, #3]
+ 80027b0:	6879      	ldr	r1, [r7, #4]
+ 80027b2:	4613      	mov	r3, r2
+ 80027b4:	011b      	lsls	r3, r3, #4
+ 80027b6:	1a9b      	subs	r3, r3, r2
+ 80027b8:	009b      	lsls	r3, r3, #2
+ 80027ba:	440b      	add	r3, r1
+ 80027bc:	334d      	adds	r3, #77	@ 0x4d
+ 80027be:	2202      	movs	r2, #2
+ 80027c0:	701a      	strb	r2, [r3, #0]
+      hhcd->hc[chnum].urb_state = URB_STALL;
+ 80027c2:	78fa      	ldrb	r2, [r7, #3]
+ 80027c4:	6879      	ldr	r1, [r7, #4]
+ 80027c6:	4613      	mov	r3, r2
+ 80027c8:	011b      	lsls	r3, r3, #4
+ 80027ca:	1a9b      	subs	r3, r3, r2
+ 80027cc:	009b      	lsls	r3, r3, #2
+ 80027ce:	440b      	add	r3, r1
+ 80027d0:	334c      	adds	r3, #76	@ 0x4c
+ 80027d2:	2205      	movs	r2, #5
+ 80027d4:	701a      	strb	r2, [r3, #0]
+ 80027d6:	e2ac      	b.n	8002d32 <HCD_HC_IN_IRQHandler+0xace>
+    }
+    else if ((hhcd->hc[chnum].state == HC_XACTERR) ||
+ 80027d8:	78fa      	ldrb	r2, [r7, #3]
+ 80027da:	6879      	ldr	r1, [r7, #4]
+ 80027dc:	4613      	mov	r3, r2
+ 80027de:	011b      	lsls	r3, r3, #4
+ 80027e0:	1a9b      	subs	r3, r3, r2
+ 80027e2:	009b      	lsls	r3, r3, #2
+ 80027e4:	440b      	add	r3, r1
+ 80027e6:	334d      	adds	r3, #77	@ 0x4d
+ 80027e8:	781b      	ldrb	r3, [r3, #0]
+ 80027ea:	2b07      	cmp	r3, #7
+ 80027ec:	d00b      	beq.n	8002806 <HCD_HC_IN_IRQHandler+0x5a2>
+             (hhcd->hc[chnum].state == HC_DATATGLERR))
+ 80027ee:	78fa      	ldrb	r2, [r7, #3]
+ 80027f0:	6879      	ldr	r1, [r7, #4]
+ 80027f2:	4613      	mov	r3, r2
+ 80027f4:	011b      	lsls	r3, r3, #4
+ 80027f6:	1a9b      	subs	r3, r3, r2
+ 80027f8:	009b      	lsls	r3, r3, #2
+ 80027fa:	440b      	add	r3, r1
+ 80027fc:	334d      	adds	r3, #77	@ 0x4d
+ 80027fe:	781b      	ldrb	r3, [r3, #0]
+    else if ((hhcd->hc[chnum].state == HC_XACTERR) ||
+ 8002800:	2b09      	cmp	r3, #9
+ 8002802:	f040 80a6 	bne.w	8002952 <HCD_HC_IN_IRQHandler+0x6ee>
+    {
+      hhcd->hc[chnum].state = HC_HALTED;
+ 8002806:	78fa      	ldrb	r2, [r7, #3]
+ 8002808:	6879      	ldr	r1, [r7, #4]
+ 800280a:	4613      	mov	r3, r2
+ 800280c:	011b      	lsls	r3, r3, #4
+ 800280e:	1a9b      	subs	r3, r3, r2
+ 8002810:	009b      	lsls	r3, r3, #2
+ 8002812:	440b      	add	r3, r1
+ 8002814:	334d      	adds	r3, #77	@ 0x4d
+ 8002816:	2202      	movs	r2, #2
+ 8002818:	701a      	strb	r2, [r3, #0]
+      hhcd->hc[chnum].ErrCnt++;
+ 800281a:	78fa      	ldrb	r2, [r7, #3]
+ 800281c:	6879      	ldr	r1, [r7, #4]
+ 800281e:	4613      	mov	r3, r2
+ 8002820:	011b      	lsls	r3, r3, #4
+ 8002822:	1a9b      	subs	r3, r3, r2
+ 8002824:	009b      	lsls	r3, r3, #2
+ 8002826:	440b      	add	r3, r1
+ 8002828:	3344      	adds	r3, #68	@ 0x44
+ 800282a:	681b      	ldr	r3, [r3, #0]
+ 800282c:	1c59      	adds	r1, r3, #1
+ 800282e:	6878      	ldr	r0, [r7, #4]
+ 8002830:	4613      	mov	r3, r2
+ 8002832:	011b      	lsls	r3, r3, #4
+ 8002834:	1a9b      	subs	r3, r3, r2
+ 8002836:	009b      	lsls	r3, r3, #2
+ 8002838:	4403      	add	r3, r0
+ 800283a:	3344      	adds	r3, #68	@ 0x44
+ 800283c:	6019      	str	r1, [r3, #0]
+      if (hhcd->hc[chnum].ErrCnt > 2U)
+ 800283e:	78fa      	ldrb	r2, [r7, #3]
+ 8002840:	6879      	ldr	r1, [r7, #4]
+ 8002842:	4613      	mov	r3, r2
+ 8002844:	011b      	lsls	r3, r3, #4
+ 8002846:	1a9b      	subs	r3, r3, r2
+ 8002848:	009b      	lsls	r3, r3, #2
+ 800284a:	440b      	add	r3, r1
+ 800284c:	3344      	adds	r3, #68	@ 0x44
+ 800284e:	681b      	ldr	r3, [r3, #0]
+ 8002850:	2b02      	cmp	r3, #2
+ 8002852:	d943      	bls.n	80028dc <HCD_HC_IN_IRQHandler+0x678>
+      {
+        hhcd->hc[chnum].ErrCnt = 0U;
+ 8002854:	78fa      	ldrb	r2, [r7, #3]
+ 8002856:	6879      	ldr	r1, [r7, #4]
+ 8002858:	4613      	mov	r3, r2
+ 800285a:	011b      	lsls	r3, r3, #4
+ 800285c:	1a9b      	subs	r3, r3, r2
+ 800285e:	009b      	lsls	r3, r3, #2
+ 8002860:	440b      	add	r3, r1
+ 8002862:	3344      	adds	r3, #68	@ 0x44
+ 8002864:	2200      	movs	r2, #0
+ 8002866:	601a      	str	r2, [r3, #0]
+
+        if (hhcd->hc[chnum].do_ssplit == 1U)
+ 8002868:	78fa      	ldrb	r2, [r7, #3]
+ 800286a:	6879      	ldr	r1, [r7, #4]
+ 800286c:	4613      	mov	r3, r2
+ 800286e:	011b      	lsls	r3, r3, #4
+ 8002870:	1a9b      	subs	r3, r3, r2
+ 8002872:	009b      	lsls	r3, r3, #2
+ 8002874:	440b      	add	r3, r1
+ 8002876:	331a      	adds	r3, #26
+ 8002878:	781b      	ldrb	r3, [r3, #0]
+ 800287a:	2b01      	cmp	r3, #1
+ 800287c:	d123      	bne.n	80028c6 <HCD_HC_IN_IRQHandler+0x662>
+        {
+          hhcd->hc[chnum].do_csplit = 0U;
+ 800287e:	78fa      	ldrb	r2, [r7, #3]
+ 8002880:	6879      	ldr	r1, [r7, #4]
+ 8002882:	4613      	mov	r3, r2
+ 8002884:	011b      	lsls	r3, r3, #4
+ 8002886:	1a9b      	subs	r3, r3, r2
+ 8002888:	009b      	lsls	r3, r3, #2
+ 800288a:	440b      	add	r3, r1
+ 800288c:	331b      	adds	r3, #27
+ 800288e:	2200      	movs	r2, #0
+ 8002890:	701a      	strb	r2, [r3, #0]
+          hhcd->hc[chnum].ep_ss_schedule = 0U;
+ 8002892:	78fa      	ldrb	r2, [r7, #3]
+ 8002894:	6879      	ldr	r1, [r7, #4]
+ 8002896:	4613      	mov	r3, r2
+ 8002898:	011b      	lsls	r3, r3, #4
+ 800289a:	1a9b      	subs	r3, r3, r2
+ 800289c:	009b      	lsls	r3, r3, #2
+ 800289e:	440b      	add	r3, r1
+ 80028a0:	331c      	adds	r3, #28
+ 80028a2:	2200      	movs	r2, #0
+ 80028a4:	701a      	strb	r2, [r3, #0]
+          __HAL_HCD_CLEAR_HC_CSPLT(chnum);
+ 80028a6:	78fb      	ldrb	r3, [r7, #3]
+ 80028a8:	015a      	lsls	r2, r3, #5
+ 80028aa:	693b      	ldr	r3, [r7, #16]
+ 80028ac:	4413      	add	r3, r2
+ 80028ae:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80028b2:	685b      	ldr	r3, [r3, #4]
+ 80028b4:	78fa      	ldrb	r2, [r7, #3]
+ 80028b6:	0151      	lsls	r1, r2, #5
+ 80028b8:	693a      	ldr	r2, [r7, #16]
+ 80028ba:	440a      	add	r2, r1
+ 80028bc:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 80028c0:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
+ 80028c4:	6053      	str	r3, [r2, #4]
+        }
+
+        hhcd->hc[chnum].urb_state = URB_ERROR;
+ 80028c6:	78fa      	ldrb	r2, [r7, #3]
+ 80028c8:	6879      	ldr	r1, [r7, #4]
+ 80028ca:	4613      	mov	r3, r2
+ 80028cc:	011b      	lsls	r3, r3, #4
+ 80028ce:	1a9b      	subs	r3, r3, r2
+ 80028d0:	009b      	lsls	r3, r3, #2
+ 80028d2:	440b      	add	r3, r1
+ 80028d4:	334c      	adds	r3, #76	@ 0x4c
+ 80028d6:	2204      	movs	r2, #4
+ 80028d8:	701a      	strb	r2, [r3, #0]
+      if (hhcd->hc[chnum].ErrCnt > 2U)
+ 80028da:	e229      	b.n	8002d30 <HCD_HC_IN_IRQHandler+0xacc>
+      }
+      else
+      {
+        hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ 80028dc:	78fa      	ldrb	r2, [r7, #3]
+ 80028de:	6879      	ldr	r1, [r7, #4]
+ 80028e0:	4613      	mov	r3, r2
+ 80028e2:	011b      	lsls	r3, r3, #4
+ 80028e4:	1a9b      	subs	r3, r3, r2
+ 80028e6:	009b      	lsls	r3, r3, #2
+ 80028e8:	440b      	add	r3, r1
+ 80028ea:	334c      	adds	r3, #76	@ 0x4c
+ 80028ec:	2202      	movs	r2, #2
+ 80028ee:	701a      	strb	r2, [r3, #0]
+
+        if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ 80028f0:	78fa      	ldrb	r2, [r7, #3]
+ 80028f2:	6879      	ldr	r1, [r7, #4]
+ 80028f4:	4613      	mov	r3, r2
+ 80028f6:	011b      	lsls	r3, r3, #4
+ 80028f8:	1a9b      	subs	r3, r3, r2
+ 80028fa:	009b      	lsls	r3, r3, #2
+ 80028fc:	440b      	add	r3, r1
+ 80028fe:	3326      	adds	r3, #38	@ 0x26
+ 8002900:	781b      	ldrb	r3, [r3, #0]
+ 8002902:	2b00      	cmp	r3, #0
+ 8002904:	d00b      	beq.n	800291e <HCD_HC_IN_IRQHandler+0x6ba>
+            (hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
+ 8002906:	78fa      	ldrb	r2, [r7, #3]
+ 8002908:	6879      	ldr	r1, [r7, #4]
+ 800290a:	4613      	mov	r3, r2
+ 800290c:	011b      	lsls	r3, r3, #4
+ 800290e:	1a9b      	subs	r3, r3, r2
+ 8002910:	009b      	lsls	r3, r3, #2
+ 8002912:	440b      	add	r3, r1
+ 8002914:	3326      	adds	r3, #38	@ 0x26
+ 8002916:	781b      	ldrb	r3, [r3, #0]
+        if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ 8002918:	2b02      	cmp	r3, #2
+ 800291a:	f040 8209 	bne.w	8002d30 <HCD_HC_IN_IRQHandler+0xacc>
+        {
+          /* re-activate the channel */
+          tmpreg = USBx_HC(chnum)->HCCHAR;
+ 800291e:	78fb      	ldrb	r3, [r7, #3]
+ 8002920:	015a      	lsls	r2, r3, #5
+ 8002922:	693b      	ldr	r3, [r7, #16]
+ 8002924:	4413      	add	r3, r2
+ 8002926:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800292a:	681b      	ldr	r3, [r3, #0]
+ 800292c:	60fb      	str	r3, [r7, #12]
+          tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
+ 800292e:	68fb      	ldr	r3, [r7, #12]
+ 8002930:	f023 4380 	bic.w	r3, r3, #1073741824	@ 0x40000000
+ 8002934:	60fb      	str	r3, [r7, #12]
+          tmpreg |= USB_OTG_HCCHAR_CHENA;
+ 8002936:	68fb      	ldr	r3, [r7, #12]
+ 8002938:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
+ 800293c:	60fb      	str	r3, [r7, #12]
+          USBx_HC(chnum)->HCCHAR = tmpreg;
+ 800293e:	78fb      	ldrb	r3, [r7, #3]
+ 8002940:	015a      	lsls	r2, r3, #5
+ 8002942:	693b      	ldr	r3, [r7, #16]
+ 8002944:	4413      	add	r3, r2
+ 8002946:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800294a:	461a      	mov	r2, r3
+ 800294c:	68fb      	ldr	r3, [r7, #12]
+ 800294e:	6013      	str	r3, [r2, #0]
+      if (hhcd->hc[chnum].ErrCnt > 2U)
+ 8002950:	e1ee      	b.n	8002d30 <HCD_HC_IN_IRQHandler+0xacc>
+        }
+      }
+    }
+    else if (hhcd->hc[chnum].state == HC_NYET)
+ 8002952:	78fa      	ldrb	r2, [r7, #3]
+ 8002954:	6879      	ldr	r1, [r7, #4]
+ 8002956:	4613      	mov	r3, r2
+ 8002958:	011b      	lsls	r3, r3, #4
+ 800295a:	1a9b      	subs	r3, r3, r2
+ 800295c:	009b      	lsls	r3, r3, #2
+ 800295e:	440b      	add	r3, r1
+ 8002960:	334d      	adds	r3, #77	@ 0x4d
+ 8002962:	781b      	ldrb	r3, [r3, #0]
+ 8002964:	2b05      	cmp	r3, #5
+ 8002966:	f040 80c8 	bne.w	8002afa <HCD_HC_IN_IRQHandler+0x896>
+    {
+      hhcd->hc[chnum].state = HC_HALTED;
+ 800296a:	78fa      	ldrb	r2, [r7, #3]
+ 800296c:	6879      	ldr	r1, [r7, #4]
+ 800296e:	4613      	mov	r3, r2
+ 8002970:	011b      	lsls	r3, r3, #4
+ 8002972:	1a9b      	subs	r3, r3, r2
+ 8002974:	009b      	lsls	r3, r3, #2
+ 8002976:	440b      	add	r3, r1
+ 8002978:	334d      	adds	r3, #77	@ 0x4d
+ 800297a:	2202      	movs	r2, #2
+ 800297c:	701a      	strb	r2, [r3, #0]
+
+      if (hhcd->hc[chnum].do_csplit == 1U)
+ 800297e:	78fa      	ldrb	r2, [r7, #3]
+ 8002980:	6879      	ldr	r1, [r7, #4]
+ 8002982:	4613      	mov	r3, r2
+ 8002984:	011b      	lsls	r3, r3, #4
+ 8002986:	1a9b      	subs	r3, r3, r2
+ 8002988:	009b      	lsls	r3, r3, #2
+ 800298a:	440b      	add	r3, r1
+ 800298c:	331b      	adds	r3, #27
+ 800298e:	781b      	ldrb	r3, [r3, #0]
+ 8002990:	2b01      	cmp	r3, #1
+ 8002992:	f040 81ce 	bne.w	8002d32 <HCD_HC_IN_IRQHandler+0xace>
+      {
+        if (hhcd->hc[chnum].ep_type == EP_TYPE_INTR)
+ 8002996:	78fa      	ldrb	r2, [r7, #3]
+ 8002998:	6879      	ldr	r1, [r7, #4]
+ 800299a:	4613      	mov	r3, r2
+ 800299c:	011b      	lsls	r3, r3, #4
+ 800299e:	1a9b      	subs	r3, r3, r2
+ 80029a0:	009b      	lsls	r3, r3, #2
+ 80029a2:	440b      	add	r3, r1
+ 80029a4:	3326      	adds	r3, #38	@ 0x26
+ 80029a6:	781b      	ldrb	r3, [r3, #0]
+ 80029a8:	2b03      	cmp	r3, #3
+ 80029aa:	d16b      	bne.n	8002a84 <HCD_HC_IN_IRQHandler+0x820>
+        {
+          hhcd->hc[chnum].NyetErrCnt++;
+ 80029ac:	78fa      	ldrb	r2, [r7, #3]
+ 80029ae:	6879      	ldr	r1, [r7, #4]
+ 80029b0:	4613      	mov	r3, r2
+ 80029b2:	011b      	lsls	r3, r3, #4
+ 80029b4:	1a9b      	subs	r3, r3, r2
+ 80029b6:	009b      	lsls	r3, r3, #2
+ 80029b8:	440b      	add	r3, r1
+ 80029ba:	3348      	adds	r3, #72	@ 0x48
+ 80029bc:	681b      	ldr	r3, [r3, #0]
+ 80029be:	1c59      	adds	r1, r3, #1
+ 80029c0:	6878      	ldr	r0, [r7, #4]
+ 80029c2:	4613      	mov	r3, r2
+ 80029c4:	011b      	lsls	r3, r3, #4
+ 80029c6:	1a9b      	subs	r3, r3, r2
+ 80029c8:	009b      	lsls	r3, r3, #2
+ 80029ca:	4403      	add	r3, r0
+ 80029cc:	3348      	adds	r3, #72	@ 0x48
+ 80029ce:	6019      	str	r1, [r3, #0]
+          if (hhcd->hc[chnum].NyetErrCnt > 2U)
+ 80029d0:	78fa      	ldrb	r2, [r7, #3]
+ 80029d2:	6879      	ldr	r1, [r7, #4]
+ 80029d4:	4613      	mov	r3, r2
+ 80029d6:	011b      	lsls	r3, r3, #4
+ 80029d8:	1a9b      	subs	r3, r3, r2
+ 80029da:	009b      	lsls	r3, r3, #2
+ 80029dc:	440b      	add	r3, r1
+ 80029de:	3348      	adds	r3, #72	@ 0x48
+ 80029e0:	681b      	ldr	r3, [r3, #0]
+ 80029e2:	2b02      	cmp	r3, #2
+ 80029e4:	d943      	bls.n	8002a6e <HCD_HC_IN_IRQHandler+0x80a>
+          {
+            hhcd->hc[chnum].NyetErrCnt = 0U;
+ 80029e6:	78fa      	ldrb	r2, [r7, #3]
+ 80029e8:	6879      	ldr	r1, [r7, #4]
+ 80029ea:	4613      	mov	r3, r2
+ 80029ec:	011b      	lsls	r3, r3, #4
+ 80029ee:	1a9b      	subs	r3, r3, r2
+ 80029f0:	009b      	lsls	r3, r3, #2
+ 80029f2:	440b      	add	r3, r1
+ 80029f4:	3348      	adds	r3, #72	@ 0x48
+ 80029f6:	2200      	movs	r2, #0
+ 80029f8:	601a      	str	r2, [r3, #0]
+            hhcd->hc[chnum].do_csplit = 0U;
+ 80029fa:	78fa      	ldrb	r2, [r7, #3]
+ 80029fc:	6879      	ldr	r1, [r7, #4]
+ 80029fe:	4613      	mov	r3, r2
+ 8002a00:	011b      	lsls	r3, r3, #4
+ 8002a02:	1a9b      	subs	r3, r3, r2
+ 8002a04:	009b      	lsls	r3, r3, #2
+ 8002a06:	440b      	add	r3, r1
+ 8002a08:	331b      	adds	r3, #27
+ 8002a0a:	2200      	movs	r2, #0
+ 8002a0c:	701a      	strb	r2, [r3, #0]
+
+            if (hhcd->hc[chnum].ErrCnt < 3U)
+ 8002a0e:	78fa      	ldrb	r2, [r7, #3]
+ 8002a10:	6879      	ldr	r1, [r7, #4]
+ 8002a12:	4613      	mov	r3, r2
+ 8002a14:	011b      	lsls	r3, r3, #4
+ 8002a16:	1a9b      	subs	r3, r3, r2
+ 8002a18:	009b      	lsls	r3, r3, #2
+ 8002a1a:	440b      	add	r3, r1
+ 8002a1c:	3344      	adds	r3, #68	@ 0x44
+ 8002a1e:	681b      	ldr	r3, [r3, #0]
+ 8002a20:	2b02      	cmp	r3, #2
+ 8002a22:	d809      	bhi.n	8002a38 <HCD_HC_IN_IRQHandler+0x7d4>
+            {
+              hhcd->hc[chnum].ep_ss_schedule = 1U;
+ 8002a24:	78fa      	ldrb	r2, [r7, #3]
+ 8002a26:	6879      	ldr	r1, [r7, #4]
+ 8002a28:	4613      	mov	r3, r2
+ 8002a2a:	011b      	lsls	r3, r3, #4
+ 8002a2c:	1a9b      	subs	r3, r3, r2
+ 8002a2e:	009b      	lsls	r3, r3, #2
+ 8002a30:	440b      	add	r3, r1
+ 8002a32:	331c      	adds	r3, #28
+ 8002a34:	2201      	movs	r2, #1
+ 8002a36:	701a      	strb	r2, [r3, #0]
+            }
+            __HAL_HCD_CLEAR_HC_CSPLT(chnum);
+ 8002a38:	78fb      	ldrb	r3, [r7, #3]
+ 8002a3a:	015a      	lsls	r2, r3, #5
+ 8002a3c:	693b      	ldr	r3, [r7, #16]
+ 8002a3e:	4413      	add	r3, r2
+ 8002a40:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002a44:	685b      	ldr	r3, [r3, #4]
+ 8002a46:	78fa      	ldrb	r2, [r7, #3]
+ 8002a48:	0151      	lsls	r1, r2, #5
+ 8002a4a:	693a      	ldr	r2, [r7, #16]
+ 8002a4c:	440a      	add	r2, r1
+ 8002a4e:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 8002a52:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
+ 8002a56:	6053      	str	r3, [r2, #4]
+            hhcd->hc[chnum].urb_state = URB_ERROR;
+ 8002a58:	78fa      	ldrb	r2, [r7, #3]
+ 8002a5a:	6879      	ldr	r1, [r7, #4]
+ 8002a5c:	4613      	mov	r3, r2
+ 8002a5e:	011b      	lsls	r3, r3, #4
+ 8002a60:	1a9b      	subs	r3, r3, r2
+ 8002a62:	009b      	lsls	r3, r3, #2
+ 8002a64:	440b      	add	r3, r1
+ 8002a66:	334c      	adds	r3, #76	@ 0x4c
+ 8002a68:	2204      	movs	r2, #4
+ 8002a6a:	701a      	strb	r2, [r3, #0]
+ 8002a6c:	e014      	b.n	8002a98 <HCD_HC_IN_IRQHandler+0x834>
+          }
+          else
+          {
+            hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ 8002a6e:	78fa      	ldrb	r2, [r7, #3]
+ 8002a70:	6879      	ldr	r1, [r7, #4]
+ 8002a72:	4613      	mov	r3, r2
+ 8002a74:	011b      	lsls	r3, r3, #4
+ 8002a76:	1a9b      	subs	r3, r3, r2
+ 8002a78:	009b      	lsls	r3, r3, #2
+ 8002a7a:	440b      	add	r3, r1
+ 8002a7c:	334c      	adds	r3, #76	@ 0x4c
+ 8002a7e:	2202      	movs	r2, #2
+ 8002a80:	701a      	strb	r2, [r3, #0]
+ 8002a82:	e009      	b.n	8002a98 <HCD_HC_IN_IRQHandler+0x834>
+          }
+        }
+        else
+        {
+          hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ 8002a84:	78fa      	ldrb	r2, [r7, #3]
+ 8002a86:	6879      	ldr	r1, [r7, #4]
+ 8002a88:	4613      	mov	r3, r2
+ 8002a8a:	011b      	lsls	r3, r3, #4
+ 8002a8c:	1a9b      	subs	r3, r3, r2
+ 8002a8e:	009b      	lsls	r3, r3, #2
+ 8002a90:	440b      	add	r3, r1
+ 8002a92:	334c      	adds	r3, #76	@ 0x4c
+ 8002a94:	2202      	movs	r2, #2
+ 8002a96:	701a      	strb	r2, [r3, #0]
+        }
+
+        if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ 8002a98:	78fa      	ldrb	r2, [r7, #3]
+ 8002a9a:	6879      	ldr	r1, [r7, #4]
+ 8002a9c:	4613      	mov	r3, r2
+ 8002a9e:	011b      	lsls	r3, r3, #4
+ 8002aa0:	1a9b      	subs	r3, r3, r2
+ 8002aa2:	009b      	lsls	r3, r3, #2
+ 8002aa4:	440b      	add	r3, r1
+ 8002aa6:	3326      	adds	r3, #38	@ 0x26
+ 8002aa8:	781b      	ldrb	r3, [r3, #0]
+ 8002aaa:	2b00      	cmp	r3, #0
+ 8002aac:	d00b      	beq.n	8002ac6 <HCD_HC_IN_IRQHandler+0x862>
+            (hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
+ 8002aae:	78fa      	ldrb	r2, [r7, #3]
+ 8002ab0:	6879      	ldr	r1, [r7, #4]
+ 8002ab2:	4613      	mov	r3, r2
+ 8002ab4:	011b      	lsls	r3, r3, #4
+ 8002ab6:	1a9b      	subs	r3, r3, r2
+ 8002ab8:	009b      	lsls	r3, r3, #2
+ 8002aba:	440b      	add	r3, r1
+ 8002abc:	3326      	adds	r3, #38	@ 0x26
+ 8002abe:	781b      	ldrb	r3, [r3, #0]
+        if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ 8002ac0:	2b02      	cmp	r3, #2
+ 8002ac2:	f040 8136 	bne.w	8002d32 <HCD_HC_IN_IRQHandler+0xace>
+        {
+          /* re-activate the channel */
+          tmpreg = USBx_HC(chnum)->HCCHAR;
+ 8002ac6:	78fb      	ldrb	r3, [r7, #3]
+ 8002ac8:	015a      	lsls	r2, r3, #5
+ 8002aca:	693b      	ldr	r3, [r7, #16]
+ 8002acc:	4413      	add	r3, r2
+ 8002ace:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002ad2:	681b      	ldr	r3, [r3, #0]
+ 8002ad4:	60fb      	str	r3, [r7, #12]
+          tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
+ 8002ad6:	68fb      	ldr	r3, [r7, #12]
+ 8002ad8:	f023 4380 	bic.w	r3, r3, #1073741824	@ 0x40000000
+ 8002adc:	60fb      	str	r3, [r7, #12]
+          tmpreg |= USB_OTG_HCCHAR_CHENA;
+ 8002ade:	68fb      	ldr	r3, [r7, #12]
+ 8002ae0:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
+ 8002ae4:	60fb      	str	r3, [r7, #12]
+          USBx_HC(chnum)->HCCHAR = tmpreg;
+ 8002ae6:	78fb      	ldrb	r3, [r7, #3]
+ 8002ae8:	015a      	lsls	r2, r3, #5
+ 8002aea:	693b      	ldr	r3, [r7, #16]
+ 8002aec:	4413      	add	r3, r2
+ 8002aee:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002af2:	461a      	mov	r2, r3
+ 8002af4:	68fb      	ldr	r3, [r7, #12]
+ 8002af6:	6013      	str	r3, [r2, #0]
+ 8002af8:	e11b      	b.n	8002d32 <HCD_HC_IN_IRQHandler+0xace>
+        }
+      }
+    }
+    else if (hhcd->hc[chnum].state == HC_ACK)
+ 8002afa:	78fa      	ldrb	r2, [r7, #3]
+ 8002afc:	6879      	ldr	r1, [r7, #4]
+ 8002afe:	4613      	mov	r3, r2
+ 8002b00:	011b      	lsls	r3, r3, #4
+ 8002b02:	1a9b      	subs	r3, r3, r2
+ 8002b04:	009b      	lsls	r3, r3, #2
+ 8002b06:	440b      	add	r3, r1
+ 8002b08:	334d      	adds	r3, #77	@ 0x4d
+ 8002b0a:	781b      	ldrb	r3, [r3, #0]
+ 8002b0c:	2b03      	cmp	r3, #3
+ 8002b0e:	f040 8081 	bne.w	8002c14 <HCD_HC_IN_IRQHandler+0x9b0>
+    {
+      hhcd->hc[chnum].state = HC_HALTED;
+ 8002b12:	78fa      	ldrb	r2, [r7, #3]
+ 8002b14:	6879      	ldr	r1, [r7, #4]
+ 8002b16:	4613      	mov	r3, r2
+ 8002b18:	011b      	lsls	r3, r3, #4
+ 8002b1a:	1a9b      	subs	r3, r3, r2
+ 8002b1c:	009b      	lsls	r3, r3, #2
+ 8002b1e:	440b      	add	r3, r1
+ 8002b20:	334d      	adds	r3, #77	@ 0x4d
+ 8002b22:	2202      	movs	r2, #2
+ 8002b24:	701a      	strb	r2, [r3, #0]
+
+      if (hhcd->hc[chnum].do_csplit == 1U)
+ 8002b26:	78fa      	ldrb	r2, [r7, #3]
+ 8002b28:	6879      	ldr	r1, [r7, #4]
+ 8002b2a:	4613      	mov	r3, r2
+ 8002b2c:	011b      	lsls	r3, r3, #4
+ 8002b2e:	1a9b      	subs	r3, r3, r2
+ 8002b30:	009b      	lsls	r3, r3, #2
+ 8002b32:	440b      	add	r3, r1
+ 8002b34:	331b      	adds	r3, #27
+ 8002b36:	781b      	ldrb	r3, [r3, #0]
+ 8002b38:	2b01      	cmp	r3, #1
+ 8002b3a:	f040 80fa 	bne.w	8002d32 <HCD_HC_IN_IRQHandler+0xace>
+      {
+        hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ 8002b3e:	78fa      	ldrb	r2, [r7, #3]
+ 8002b40:	6879      	ldr	r1, [r7, #4]
+ 8002b42:	4613      	mov	r3, r2
+ 8002b44:	011b      	lsls	r3, r3, #4
+ 8002b46:	1a9b      	subs	r3, r3, r2
+ 8002b48:	009b      	lsls	r3, r3, #2
+ 8002b4a:	440b      	add	r3, r1
+ 8002b4c:	334c      	adds	r3, #76	@ 0x4c
+ 8002b4e:	2202      	movs	r2, #2
+ 8002b50:	701a      	strb	r2, [r3, #0]
+
+        /* Set Complete split and re-activate the channel */
+        USBx_HC(chnum)->HCSPLT |= USB_OTG_HCSPLT_COMPLSPLT;
+ 8002b52:	78fb      	ldrb	r3, [r7, #3]
+ 8002b54:	015a      	lsls	r2, r3, #5
+ 8002b56:	693b      	ldr	r3, [r7, #16]
+ 8002b58:	4413      	add	r3, r2
+ 8002b5a:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002b5e:	685b      	ldr	r3, [r3, #4]
+ 8002b60:	78fa      	ldrb	r2, [r7, #3]
+ 8002b62:	0151      	lsls	r1, r2, #5
+ 8002b64:	693a      	ldr	r2, [r7, #16]
+ 8002b66:	440a      	add	r2, r1
+ 8002b68:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 8002b6c:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
+ 8002b70:	6053      	str	r3, [r2, #4]
+        USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_NYET;
+ 8002b72:	78fb      	ldrb	r3, [r7, #3]
+ 8002b74:	015a      	lsls	r2, r3, #5
+ 8002b76:	693b      	ldr	r3, [r7, #16]
+ 8002b78:	4413      	add	r3, r2
+ 8002b7a:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002b7e:	68db      	ldr	r3, [r3, #12]
+ 8002b80:	78fa      	ldrb	r2, [r7, #3]
+ 8002b82:	0151      	lsls	r1, r2, #5
+ 8002b84:	693a      	ldr	r2, [r7, #16]
+ 8002b86:	440a      	add	r2, r1
+ 8002b88:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 8002b8c:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
+ 8002b90:	60d3      	str	r3, [r2, #12]
+        USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINT_ACK;
+ 8002b92:	78fb      	ldrb	r3, [r7, #3]
+ 8002b94:	015a      	lsls	r2, r3, #5
+ 8002b96:	693b      	ldr	r3, [r7, #16]
+ 8002b98:	4413      	add	r3, r2
+ 8002b9a:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002b9e:	68db      	ldr	r3, [r3, #12]
+ 8002ba0:	78fa      	ldrb	r2, [r7, #3]
+ 8002ba2:	0151      	lsls	r1, r2, #5
+ 8002ba4:	693a      	ldr	r2, [r7, #16]
+ 8002ba6:	440a      	add	r2, r1
+ 8002ba8:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 8002bac:	f023 0320 	bic.w	r3, r3, #32
+ 8002bb0:	60d3      	str	r3, [r2, #12]
+
+        if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ 8002bb2:	78fa      	ldrb	r2, [r7, #3]
+ 8002bb4:	6879      	ldr	r1, [r7, #4]
+ 8002bb6:	4613      	mov	r3, r2
+ 8002bb8:	011b      	lsls	r3, r3, #4
+ 8002bba:	1a9b      	subs	r3, r3, r2
+ 8002bbc:	009b      	lsls	r3, r3, #2
+ 8002bbe:	440b      	add	r3, r1
+ 8002bc0:	3326      	adds	r3, #38	@ 0x26
+ 8002bc2:	781b      	ldrb	r3, [r3, #0]
+ 8002bc4:	2b00      	cmp	r3, #0
+ 8002bc6:	d00b      	beq.n	8002be0 <HCD_HC_IN_IRQHandler+0x97c>
+            (hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
+ 8002bc8:	78fa      	ldrb	r2, [r7, #3]
+ 8002bca:	6879      	ldr	r1, [r7, #4]
+ 8002bcc:	4613      	mov	r3, r2
+ 8002bce:	011b      	lsls	r3, r3, #4
+ 8002bd0:	1a9b      	subs	r3, r3, r2
+ 8002bd2:	009b      	lsls	r3, r3, #2
+ 8002bd4:	440b      	add	r3, r1
+ 8002bd6:	3326      	adds	r3, #38	@ 0x26
+ 8002bd8:	781b      	ldrb	r3, [r3, #0]
+        if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ 8002bda:	2b02      	cmp	r3, #2
+ 8002bdc:	f040 80a9 	bne.w	8002d32 <HCD_HC_IN_IRQHandler+0xace>
+        {
+          /* re-activate the channel */
+          tmpreg = USBx_HC(chnum)->HCCHAR;
+ 8002be0:	78fb      	ldrb	r3, [r7, #3]
+ 8002be2:	015a      	lsls	r2, r3, #5
+ 8002be4:	693b      	ldr	r3, [r7, #16]
+ 8002be6:	4413      	add	r3, r2
+ 8002be8:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002bec:	681b      	ldr	r3, [r3, #0]
+ 8002bee:	60fb      	str	r3, [r7, #12]
+          tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
+ 8002bf0:	68fb      	ldr	r3, [r7, #12]
+ 8002bf2:	f023 4380 	bic.w	r3, r3, #1073741824	@ 0x40000000
+ 8002bf6:	60fb      	str	r3, [r7, #12]
+          tmpreg |= USB_OTG_HCCHAR_CHENA;
+ 8002bf8:	68fb      	ldr	r3, [r7, #12]
+ 8002bfa:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
+ 8002bfe:	60fb      	str	r3, [r7, #12]
+          USBx_HC(chnum)->HCCHAR = tmpreg;
+ 8002c00:	78fb      	ldrb	r3, [r7, #3]
+ 8002c02:	015a      	lsls	r2, r3, #5
+ 8002c04:	693b      	ldr	r3, [r7, #16]
+ 8002c06:	4413      	add	r3, r2
+ 8002c08:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002c0c:	461a      	mov	r2, r3
+ 8002c0e:	68fb      	ldr	r3, [r7, #12]
+ 8002c10:	6013      	str	r3, [r2, #0]
+ 8002c12:	e08e      	b.n	8002d32 <HCD_HC_IN_IRQHandler+0xace>
+        }
+      }
+    }
+    else if (hhcd->hc[chnum].state == HC_NAK)
+ 8002c14:	78fa      	ldrb	r2, [r7, #3]
+ 8002c16:	6879      	ldr	r1, [r7, #4]
+ 8002c18:	4613      	mov	r3, r2
+ 8002c1a:	011b      	lsls	r3, r3, #4
+ 8002c1c:	1a9b      	subs	r3, r3, r2
+ 8002c1e:	009b      	lsls	r3, r3, #2
+ 8002c20:	440b      	add	r3, r1
+ 8002c22:	334d      	adds	r3, #77	@ 0x4d
+ 8002c24:	781b      	ldrb	r3, [r3, #0]
+ 8002c26:	2b04      	cmp	r3, #4
+ 8002c28:	d143      	bne.n	8002cb2 <HCD_HC_IN_IRQHandler+0xa4e>
+    {
+      hhcd->hc[chnum].state = HC_HALTED;
+ 8002c2a:	78fa      	ldrb	r2, [r7, #3]
+ 8002c2c:	6879      	ldr	r1, [r7, #4]
+ 8002c2e:	4613      	mov	r3, r2
+ 8002c30:	011b      	lsls	r3, r3, #4
+ 8002c32:	1a9b      	subs	r3, r3, r2
+ 8002c34:	009b      	lsls	r3, r3, #2
+ 8002c36:	440b      	add	r3, r1
+ 8002c38:	334d      	adds	r3, #77	@ 0x4d
+ 8002c3a:	2202      	movs	r2, #2
+ 8002c3c:	701a      	strb	r2, [r3, #0]
+      hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ 8002c3e:	78fa      	ldrb	r2, [r7, #3]
+ 8002c40:	6879      	ldr	r1, [r7, #4]
+ 8002c42:	4613      	mov	r3, r2
+ 8002c44:	011b      	lsls	r3, r3, #4
+ 8002c46:	1a9b      	subs	r3, r3, r2
+ 8002c48:	009b      	lsls	r3, r3, #2
+ 8002c4a:	440b      	add	r3, r1
+ 8002c4c:	334c      	adds	r3, #76	@ 0x4c
+ 8002c4e:	2202      	movs	r2, #2
+ 8002c50:	701a      	strb	r2, [r3, #0]
+
+      if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ 8002c52:	78fa      	ldrb	r2, [r7, #3]
+ 8002c54:	6879      	ldr	r1, [r7, #4]
+ 8002c56:	4613      	mov	r3, r2
+ 8002c58:	011b      	lsls	r3, r3, #4
+ 8002c5a:	1a9b      	subs	r3, r3, r2
+ 8002c5c:	009b      	lsls	r3, r3, #2
+ 8002c5e:	440b      	add	r3, r1
+ 8002c60:	3326      	adds	r3, #38	@ 0x26
+ 8002c62:	781b      	ldrb	r3, [r3, #0]
+ 8002c64:	2b00      	cmp	r3, #0
+ 8002c66:	d00a      	beq.n	8002c7e <HCD_HC_IN_IRQHandler+0xa1a>
+          (hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
+ 8002c68:	78fa      	ldrb	r2, [r7, #3]
+ 8002c6a:	6879      	ldr	r1, [r7, #4]
+ 8002c6c:	4613      	mov	r3, r2
+ 8002c6e:	011b      	lsls	r3, r3, #4
+ 8002c70:	1a9b      	subs	r3, r3, r2
+ 8002c72:	009b      	lsls	r3, r3, #2
+ 8002c74:	440b      	add	r3, r1
+ 8002c76:	3326      	adds	r3, #38	@ 0x26
+ 8002c78:	781b      	ldrb	r3, [r3, #0]
+      if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ 8002c7a:	2b02      	cmp	r3, #2
+ 8002c7c:	d159      	bne.n	8002d32 <HCD_HC_IN_IRQHandler+0xace>
+      {
+        /* re-activate the channel */
+        tmpreg = USBx_HC(chnum)->HCCHAR;
+ 8002c7e:	78fb      	ldrb	r3, [r7, #3]
+ 8002c80:	015a      	lsls	r2, r3, #5
+ 8002c82:	693b      	ldr	r3, [r7, #16]
+ 8002c84:	4413      	add	r3, r2
+ 8002c86:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002c8a:	681b      	ldr	r3, [r3, #0]
+ 8002c8c:	60fb      	str	r3, [r7, #12]
+        tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
+ 8002c8e:	68fb      	ldr	r3, [r7, #12]
+ 8002c90:	f023 4380 	bic.w	r3, r3, #1073741824	@ 0x40000000
+ 8002c94:	60fb      	str	r3, [r7, #12]
+        tmpreg |= USB_OTG_HCCHAR_CHENA;
+ 8002c96:	68fb      	ldr	r3, [r7, #12]
+ 8002c98:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
+ 8002c9c:	60fb      	str	r3, [r7, #12]
+        USBx_HC(chnum)->HCCHAR = tmpreg;
+ 8002c9e:	78fb      	ldrb	r3, [r7, #3]
+ 8002ca0:	015a      	lsls	r2, r3, #5
+ 8002ca2:	693b      	ldr	r3, [r7, #16]
+ 8002ca4:	4413      	add	r3, r2
+ 8002ca6:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002caa:	461a      	mov	r2, r3
+ 8002cac:	68fb      	ldr	r3, [r7, #12]
+ 8002cae:	6013      	str	r3, [r2, #0]
+ 8002cb0:	e03f      	b.n	8002d32 <HCD_HC_IN_IRQHandler+0xace>
+      }
+    }
+    else if (hhcd->hc[chnum].state == HC_BBLERR)
+ 8002cb2:	78fa      	ldrb	r2, [r7, #3]
+ 8002cb4:	6879      	ldr	r1, [r7, #4]
+ 8002cb6:	4613      	mov	r3, r2
+ 8002cb8:	011b      	lsls	r3, r3, #4
+ 8002cba:	1a9b      	subs	r3, r3, r2
+ 8002cbc:	009b      	lsls	r3, r3, #2
+ 8002cbe:	440b      	add	r3, r1
+ 8002cc0:	334d      	adds	r3, #77	@ 0x4d
+ 8002cc2:	781b      	ldrb	r3, [r3, #0]
+ 8002cc4:	2b08      	cmp	r3, #8
+ 8002cc6:	d126      	bne.n	8002d16 <HCD_HC_IN_IRQHandler+0xab2>
+    {
+      hhcd->hc[chnum].state = HC_HALTED;
+ 8002cc8:	78fa      	ldrb	r2, [r7, #3]
+ 8002cca:	6879      	ldr	r1, [r7, #4]
+ 8002ccc:	4613      	mov	r3, r2
+ 8002cce:	011b      	lsls	r3, r3, #4
+ 8002cd0:	1a9b      	subs	r3, r3, r2
+ 8002cd2:	009b      	lsls	r3, r3, #2
+ 8002cd4:	440b      	add	r3, r1
+ 8002cd6:	334d      	adds	r3, #77	@ 0x4d
+ 8002cd8:	2202      	movs	r2, #2
+ 8002cda:	701a      	strb	r2, [r3, #0]
+      hhcd->hc[chnum].ErrCnt++;
+ 8002cdc:	78fa      	ldrb	r2, [r7, #3]
+ 8002cde:	6879      	ldr	r1, [r7, #4]
+ 8002ce0:	4613      	mov	r3, r2
+ 8002ce2:	011b      	lsls	r3, r3, #4
+ 8002ce4:	1a9b      	subs	r3, r3, r2
+ 8002ce6:	009b      	lsls	r3, r3, #2
+ 8002ce8:	440b      	add	r3, r1
+ 8002cea:	3344      	adds	r3, #68	@ 0x44
+ 8002cec:	681b      	ldr	r3, [r3, #0]
+ 8002cee:	1c59      	adds	r1, r3, #1
+ 8002cf0:	6878      	ldr	r0, [r7, #4]
+ 8002cf2:	4613      	mov	r3, r2
+ 8002cf4:	011b      	lsls	r3, r3, #4
+ 8002cf6:	1a9b      	subs	r3, r3, r2
+ 8002cf8:	009b      	lsls	r3, r3, #2
+ 8002cfa:	4403      	add	r3, r0
+ 8002cfc:	3344      	adds	r3, #68	@ 0x44
+ 8002cfe:	6019      	str	r1, [r3, #0]
+      hhcd->hc[chnum].urb_state = URB_ERROR;
+ 8002d00:	78fa      	ldrb	r2, [r7, #3]
+ 8002d02:	6879      	ldr	r1, [r7, #4]
+ 8002d04:	4613      	mov	r3, r2
+ 8002d06:	011b      	lsls	r3, r3, #4
+ 8002d08:	1a9b      	subs	r3, r3, r2
+ 8002d0a:	009b      	lsls	r3, r3, #2
+ 8002d0c:	440b      	add	r3, r1
+ 8002d0e:	334c      	adds	r3, #76	@ 0x4c
+ 8002d10:	2204      	movs	r2, #4
+ 8002d12:	701a      	strb	r2, [r3, #0]
+ 8002d14:	e00d      	b.n	8002d32 <HCD_HC_IN_IRQHandler+0xace>
+    }
+    else
+    {
+      if (hhcd->hc[chnum].state == HC_HALTED)
+ 8002d16:	78fa      	ldrb	r2, [r7, #3]
+ 8002d18:	6879      	ldr	r1, [r7, #4]
+ 8002d1a:	4613      	mov	r3, r2
+ 8002d1c:	011b      	lsls	r3, r3, #4
+ 8002d1e:	1a9b      	subs	r3, r3, r2
+ 8002d20:	009b      	lsls	r3, r3, #2
+ 8002d22:	440b      	add	r3, r1
+ 8002d24:	334d      	adds	r3, #77	@ 0x4d
+ 8002d26:	781b      	ldrb	r3, [r3, #0]
+ 8002d28:	2b02      	cmp	r3, #2
+ 8002d2a:	f000 8100 	beq.w	8002f2e <HCD_HC_IN_IRQHandler+0xcca>
+ 8002d2e:	e000      	b.n	8002d32 <HCD_HC_IN_IRQHandler+0xace>
+      if (hhcd->hc[chnum].ErrCnt > 2U)
+ 8002d30:	bf00      	nop
+    }
+
+#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
+    hhcd->HC_NotifyURBChangeCallback(hhcd, chnum, hhcd->hc[chnum].urb_state);
+#else
+    HAL_HCD_HC_NotifyURBChange_Callback(hhcd, chnum, hhcd->hc[chnum].urb_state);
+ 8002d32:	78fa      	ldrb	r2, [r7, #3]
+ 8002d34:	6879      	ldr	r1, [r7, #4]
+ 8002d36:	4613      	mov	r3, r2
+ 8002d38:	011b      	lsls	r3, r3, #4
+ 8002d3a:	1a9b      	subs	r3, r3, r2
+ 8002d3c:	009b      	lsls	r3, r3, #2
+ 8002d3e:	440b      	add	r3, r1
+ 8002d40:	334c      	adds	r3, #76	@ 0x4c
+ 8002d42:	781a      	ldrb	r2, [r3, #0]
+ 8002d44:	78fb      	ldrb	r3, [r7, #3]
+ 8002d46:	4619      	mov	r1, r3
+ 8002d48:	6878      	ldr	r0, [r7, #4]
+ 8002d4a:	f005 f813 	bl	8007d74 <HAL_HCD_HC_NotifyURBChange_Callback>
+ 8002d4e:	e0ef      	b.n	8002f30 <HCD_HC_IN_IRQHandler+0xccc>
+#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_NYET))
+ 8002d50:	687b      	ldr	r3, [r7, #4]
+ 8002d52:	681b      	ldr	r3, [r3, #0]
+ 8002d54:	78fa      	ldrb	r2, [r7, #3]
+ 8002d56:	4611      	mov	r1, r2
+ 8002d58:	4618      	mov	r0, r3
+ 8002d5a:	f003 fbfa 	bl	8006552 <USB_ReadChInterrupts>
+ 8002d5e:	4603      	mov	r3, r0
+ 8002d60:	f003 0340 	and.w	r3, r3, #64	@ 0x40
+ 8002d64:	2b40      	cmp	r3, #64	@ 0x40
+ 8002d66:	d12f      	bne.n	8002dc8 <HCD_HC_IN_IRQHandler+0xb64>
+  {
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NYET);
+ 8002d68:	78fb      	ldrb	r3, [r7, #3]
+ 8002d6a:	015a      	lsls	r2, r3, #5
+ 8002d6c:	693b      	ldr	r3, [r7, #16]
+ 8002d6e:	4413      	add	r3, r2
+ 8002d70:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002d74:	461a      	mov	r2, r3
+ 8002d76:	2340      	movs	r3, #64	@ 0x40
+ 8002d78:	6093      	str	r3, [r2, #8]
+    hhcd->hc[chnum].state = HC_NYET;
+ 8002d7a:	78fa      	ldrb	r2, [r7, #3]
+ 8002d7c:	6879      	ldr	r1, [r7, #4]
+ 8002d7e:	4613      	mov	r3, r2
+ 8002d80:	011b      	lsls	r3, r3, #4
+ 8002d82:	1a9b      	subs	r3, r3, r2
+ 8002d84:	009b      	lsls	r3, r3, #2
+ 8002d86:	440b      	add	r3, r1
+ 8002d88:	334d      	adds	r3, #77	@ 0x4d
+ 8002d8a:	2205      	movs	r2, #5
+ 8002d8c:	701a      	strb	r2, [r3, #0]
+
+    if (hhcd->hc[chnum].do_ssplit == 0U)
+ 8002d8e:	78fa      	ldrb	r2, [r7, #3]
+ 8002d90:	6879      	ldr	r1, [r7, #4]
+ 8002d92:	4613      	mov	r3, r2
+ 8002d94:	011b      	lsls	r3, r3, #4
+ 8002d96:	1a9b      	subs	r3, r3, r2
+ 8002d98:	009b      	lsls	r3, r3, #2
+ 8002d9a:	440b      	add	r3, r1
+ 8002d9c:	331a      	adds	r3, #26
+ 8002d9e:	781b      	ldrb	r3, [r3, #0]
+ 8002da0:	2b00      	cmp	r3, #0
+ 8002da2:	d109      	bne.n	8002db8 <HCD_HC_IN_IRQHandler+0xb54>
+    {
+      hhcd->hc[chnum].ErrCnt = 0U;
+ 8002da4:	78fa      	ldrb	r2, [r7, #3]
+ 8002da6:	6879      	ldr	r1, [r7, #4]
+ 8002da8:	4613      	mov	r3, r2
+ 8002daa:	011b      	lsls	r3, r3, #4
+ 8002dac:	1a9b      	subs	r3, r3, r2
+ 8002dae:	009b      	lsls	r3, r3, #2
+ 8002db0:	440b      	add	r3, r1
+ 8002db2:	3344      	adds	r3, #68	@ 0x44
+ 8002db4:	2200      	movs	r2, #0
+ 8002db6:	601a      	str	r2, [r3, #0]
+    }
+
+    (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 8002db8:	687b      	ldr	r3, [r7, #4]
+ 8002dba:	681b      	ldr	r3, [r3, #0]
+ 8002dbc:	78fa      	ldrb	r2, [r7, #3]
+ 8002dbe:	4611      	mov	r1, r2
+ 8002dc0:	4618      	mov	r0, r3
+ 8002dc2:	f003 fc43 	bl	800664c <USB_HC_Halt>
+ 8002dc6:	e0b3      	b.n	8002f30 <HCD_HC_IN_IRQHandler+0xccc>
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_NAK))
+ 8002dc8:	687b      	ldr	r3, [r7, #4]
+ 8002dca:	681b      	ldr	r3, [r3, #0]
+ 8002dcc:	78fa      	ldrb	r2, [r7, #3]
+ 8002dce:	4611      	mov	r1, r2
+ 8002dd0:	4618      	mov	r0, r3
+ 8002dd2:	f003 fbbe 	bl	8006552 <USB_ReadChInterrupts>
+ 8002dd6:	4603      	mov	r3, r0
+ 8002dd8:	f003 0310 	and.w	r3, r3, #16
+ 8002ddc:	2b10      	cmp	r3, #16
+ 8002dde:	f040 80a7 	bne.w	8002f30 <HCD_HC_IN_IRQHandler+0xccc>
+  {
+    if (hhcd->hc[chnum].ep_type == EP_TYPE_INTR)
+ 8002de2:	78fa      	ldrb	r2, [r7, #3]
+ 8002de4:	6879      	ldr	r1, [r7, #4]
+ 8002de6:	4613      	mov	r3, r2
+ 8002de8:	011b      	lsls	r3, r3, #4
+ 8002dea:	1a9b      	subs	r3, r3, r2
+ 8002dec:	009b      	lsls	r3, r3, #2
+ 8002dee:	440b      	add	r3, r1
+ 8002df0:	3326      	adds	r3, #38	@ 0x26
+ 8002df2:	781b      	ldrb	r3, [r3, #0]
+ 8002df4:	2b03      	cmp	r3, #3
+ 8002df6:	d11b      	bne.n	8002e30 <HCD_HC_IN_IRQHandler+0xbcc>
+    {
+      hhcd->hc[chnum].ErrCnt = 0U;
+ 8002df8:	78fa      	ldrb	r2, [r7, #3]
+ 8002dfa:	6879      	ldr	r1, [r7, #4]
+ 8002dfc:	4613      	mov	r3, r2
+ 8002dfe:	011b      	lsls	r3, r3, #4
+ 8002e00:	1a9b      	subs	r3, r3, r2
+ 8002e02:	009b      	lsls	r3, r3, #2
+ 8002e04:	440b      	add	r3, r1
+ 8002e06:	3344      	adds	r3, #68	@ 0x44
+ 8002e08:	2200      	movs	r2, #0
+ 8002e0a:	601a      	str	r2, [r3, #0]
+      hhcd->hc[chnum].state = HC_NAK;
+ 8002e0c:	78fa      	ldrb	r2, [r7, #3]
+ 8002e0e:	6879      	ldr	r1, [r7, #4]
+ 8002e10:	4613      	mov	r3, r2
+ 8002e12:	011b      	lsls	r3, r3, #4
+ 8002e14:	1a9b      	subs	r3, r3, r2
+ 8002e16:	009b      	lsls	r3, r3, #2
+ 8002e18:	440b      	add	r3, r1
+ 8002e1a:	334d      	adds	r3, #77	@ 0x4d
+ 8002e1c:	2204      	movs	r2, #4
+ 8002e1e:	701a      	strb	r2, [r3, #0]
+      (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 8002e20:	687b      	ldr	r3, [r7, #4]
+ 8002e22:	681b      	ldr	r3, [r3, #0]
+ 8002e24:	78fa      	ldrb	r2, [r7, #3]
+ 8002e26:	4611      	mov	r1, r2
+ 8002e28:	4618      	mov	r0, r3
+ 8002e2a:	f003 fc0f 	bl	800664c <USB_HC_Halt>
+ 8002e2e:	e03f      	b.n	8002eb0 <HCD_HC_IN_IRQHandler+0xc4c>
+    }
+    else if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ 8002e30:	78fa      	ldrb	r2, [r7, #3]
+ 8002e32:	6879      	ldr	r1, [r7, #4]
+ 8002e34:	4613      	mov	r3, r2
+ 8002e36:	011b      	lsls	r3, r3, #4
+ 8002e38:	1a9b      	subs	r3, r3, r2
+ 8002e3a:	009b      	lsls	r3, r3, #2
+ 8002e3c:	440b      	add	r3, r1
+ 8002e3e:	3326      	adds	r3, #38	@ 0x26
+ 8002e40:	781b      	ldrb	r3, [r3, #0]
+ 8002e42:	2b00      	cmp	r3, #0
+ 8002e44:	d00a      	beq.n	8002e5c <HCD_HC_IN_IRQHandler+0xbf8>
+             (hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
+ 8002e46:	78fa      	ldrb	r2, [r7, #3]
+ 8002e48:	6879      	ldr	r1, [r7, #4]
+ 8002e4a:	4613      	mov	r3, r2
+ 8002e4c:	011b      	lsls	r3, r3, #4
+ 8002e4e:	1a9b      	subs	r3, r3, r2
+ 8002e50:	009b      	lsls	r3, r3, #2
+ 8002e52:	440b      	add	r3, r1
+ 8002e54:	3326      	adds	r3, #38	@ 0x26
+ 8002e56:	781b      	ldrb	r3, [r3, #0]
+    else if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL) ||
+ 8002e58:	2b02      	cmp	r3, #2
+ 8002e5a:	d129      	bne.n	8002eb0 <HCD_HC_IN_IRQHandler+0xc4c>
+    {
+      hhcd->hc[chnum].ErrCnt = 0U;
+ 8002e5c:	78fa      	ldrb	r2, [r7, #3]
+ 8002e5e:	6879      	ldr	r1, [r7, #4]
+ 8002e60:	4613      	mov	r3, r2
+ 8002e62:	011b      	lsls	r3, r3, #4
+ 8002e64:	1a9b      	subs	r3, r3, r2
+ 8002e66:	009b      	lsls	r3, r3, #2
+ 8002e68:	440b      	add	r3, r1
+ 8002e6a:	3344      	adds	r3, #68	@ 0x44
+ 8002e6c:	2200      	movs	r2, #0
+ 8002e6e:	601a      	str	r2, [r3, #0]
+
+      if ((hhcd->Init.dma_enable == 0U) || (hhcd->hc[chnum].do_csplit == 1U))
+ 8002e70:	687b      	ldr	r3, [r7, #4]
+ 8002e72:	799b      	ldrb	r3, [r3, #6]
+ 8002e74:	2b00      	cmp	r3, #0
+ 8002e76:	d00a      	beq.n	8002e8e <HCD_HC_IN_IRQHandler+0xc2a>
+ 8002e78:	78fa      	ldrb	r2, [r7, #3]
+ 8002e7a:	6879      	ldr	r1, [r7, #4]
+ 8002e7c:	4613      	mov	r3, r2
+ 8002e7e:	011b      	lsls	r3, r3, #4
+ 8002e80:	1a9b      	subs	r3, r3, r2
+ 8002e82:	009b      	lsls	r3, r3, #2
+ 8002e84:	440b      	add	r3, r1
+ 8002e86:	331b      	adds	r3, #27
+ 8002e88:	781b      	ldrb	r3, [r3, #0]
+ 8002e8a:	2b01      	cmp	r3, #1
+ 8002e8c:	d110      	bne.n	8002eb0 <HCD_HC_IN_IRQHandler+0xc4c>
+      {
+        hhcd->hc[chnum].state = HC_NAK;
+ 8002e8e:	78fa      	ldrb	r2, [r7, #3]
+ 8002e90:	6879      	ldr	r1, [r7, #4]
+ 8002e92:	4613      	mov	r3, r2
+ 8002e94:	011b      	lsls	r3, r3, #4
+ 8002e96:	1a9b      	subs	r3, r3, r2
+ 8002e98:	009b      	lsls	r3, r3, #2
+ 8002e9a:	440b      	add	r3, r1
+ 8002e9c:	334d      	adds	r3, #77	@ 0x4d
+ 8002e9e:	2204      	movs	r2, #4
+ 8002ea0:	701a      	strb	r2, [r3, #0]
+        (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 8002ea2:	687b      	ldr	r3, [r7, #4]
+ 8002ea4:	681b      	ldr	r3, [r3, #0]
+ 8002ea6:	78fa      	ldrb	r2, [r7, #3]
+ 8002ea8:	4611      	mov	r1, r2
+ 8002eaa:	4618      	mov	r0, r3
+ 8002eac:	f003 fbce 	bl	800664c <USB_HC_Halt>
+    else
+    {
+      /* ... */
+    }
+
+    if (hhcd->hc[chnum].do_csplit == 1U)
+ 8002eb0:	78fa      	ldrb	r2, [r7, #3]
+ 8002eb2:	6879      	ldr	r1, [r7, #4]
+ 8002eb4:	4613      	mov	r3, r2
+ 8002eb6:	011b      	lsls	r3, r3, #4
+ 8002eb8:	1a9b      	subs	r3, r3, r2
+ 8002eba:	009b      	lsls	r3, r3, #2
+ 8002ebc:	440b      	add	r3, r1
+ 8002ebe:	331b      	adds	r3, #27
+ 8002ec0:	781b      	ldrb	r3, [r3, #0]
+ 8002ec2:	2b01      	cmp	r3, #1
+ 8002ec4:	d129      	bne.n	8002f1a <HCD_HC_IN_IRQHandler+0xcb6>
+    {
+      hhcd->hc[chnum].do_csplit = 0U;
+ 8002ec6:	78fa      	ldrb	r2, [r7, #3]
+ 8002ec8:	6879      	ldr	r1, [r7, #4]
+ 8002eca:	4613      	mov	r3, r2
+ 8002ecc:	011b      	lsls	r3, r3, #4
+ 8002ece:	1a9b      	subs	r3, r3, r2
+ 8002ed0:	009b      	lsls	r3, r3, #2
+ 8002ed2:	440b      	add	r3, r1
+ 8002ed4:	331b      	adds	r3, #27
+ 8002ed6:	2200      	movs	r2, #0
+ 8002ed8:	701a      	strb	r2, [r3, #0]
+      __HAL_HCD_CLEAR_HC_CSPLT(chnum);
+ 8002eda:	78fb      	ldrb	r3, [r7, #3]
+ 8002edc:	015a      	lsls	r2, r3, #5
+ 8002ede:	693b      	ldr	r3, [r7, #16]
+ 8002ee0:	4413      	add	r3, r2
+ 8002ee2:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002ee6:	685b      	ldr	r3, [r3, #4]
+ 8002ee8:	78fa      	ldrb	r2, [r7, #3]
+ 8002eea:	0151      	lsls	r1, r2, #5
+ 8002eec:	693a      	ldr	r2, [r7, #16]
+ 8002eee:	440a      	add	r2, r1
+ 8002ef0:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 8002ef4:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
+ 8002ef8:	6053      	str	r3, [r2, #4]
+      __HAL_HCD_UNMASK_ACK_HC_INT(chnum);
+ 8002efa:	78fb      	ldrb	r3, [r7, #3]
+ 8002efc:	015a      	lsls	r2, r3, #5
+ 8002efe:	693b      	ldr	r3, [r7, #16]
+ 8002f00:	4413      	add	r3, r2
+ 8002f02:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002f06:	68db      	ldr	r3, [r3, #12]
+ 8002f08:	78fa      	ldrb	r2, [r7, #3]
+ 8002f0a:	0151      	lsls	r1, r2, #5
+ 8002f0c:	693a      	ldr	r2, [r7, #16]
+ 8002f0e:	440a      	add	r2, r1
+ 8002f10:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 8002f14:	f043 0320 	orr.w	r3, r3, #32
+ 8002f18:	60d3      	str	r3, [r2, #12]
+    }
+
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK);
+ 8002f1a:	78fb      	ldrb	r3, [r7, #3]
+ 8002f1c:	015a      	lsls	r2, r3, #5
+ 8002f1e:	693b      	ldr	r3, [r7, #16]
+ 8002f20:	4413      	add	r3, r2
+ 8002f22:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002f26:	461a      	mov	r2, r3
+ 8002f28:	2310      	movs	r3, #16
+ 8002f2a:	6093      	str	r3, [r2, #8]
+ 8002f2c:	e000      	b.n	8002f30 <HCD_HC_IN_IRQHandler+0xccc>
+        return;
+ 8002f2e:	bf00      	nop
+  }
+  else
+  {
+    /* ... */
+  }
+}
+ 8002f30:	3718      	adds	r7, #24
+ 8002f32:	46bd      	mov	sp, r7
+ 8002f34:	bd80      	pop	{r7, pc}
+
+08002f36 <HCD_HC_OUT_IRQHandler>:
+  * @param  chnum Channel number.
+  *         This parameter can be a value from 1 to 15
+  * @retval none
+  */
+static void HCD_HC_OUT_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
+{
+ 8002f36:	b580      	push	{r7, lr}
+ 8002f38:	b086      	sub	sp, #24
+ 8002f3a:	af00      	add	r7, sp, #0
+ 8002f3c:	6078      	str	r0, [r7, #4]
+ 8002f3e:	460b      	mov	r3, r1
+ 8002f40:	70fb      	strb	r3, [r7, #3]
+  const USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
+ 8002f42:	687b      	ldr	r3, [r7, #4]
+ 8002f44:	681b      	ldr	r3, [r3, #0]
+ 8002f46:	617b      	str	r3, [r7, #20]
+  uint32_t USBx_BASE = (uint32_t)USBx;
+ 8002f48:	697b      	ldr	r3, [r7, #20]
+ 8002f4a:	613b      	str	r3, [r7, #16]
+  uint32_t tmpreg;
+  uint32_t num_packets;
+
+  if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_AHBERR))
+ 8002f4c:	687b      	ldr	r3, [r7, #4]
+ 8002f4e:	681b      	ldr	r3, [r3, #0]
+ 8002f50:	78fa      	ldrb	r2, [r7, #3]
+ 8002f52:	4611      	mov	r1, r2
+ 8002f54:	4618      	mov	r0, r3
+ 8002f56:	f003 fafc 	bl	8006552 <USB_ReadChInterrupts>
+ 8002f5a:	4603      	mov	r3, r0
+ 8002f5c:	f003 0304 	and.w	r3, r3, #4
+ 8002f60:	2b04      	cmp	r3, #4
+ 8002f62:	d11b      	bne.n	8002f9c <HCD_HC_OUT_IRQHandler+0x66>
+  {
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_AHBERR);
+ 8002f64:	78fb      	ldrb	r3, [r7, #3]
+ 8002f66:	015a      	lsls	r2, r3, #5
+ 8002f68:	693b      	ldr	r3, [r7, #16]
+ 8002f6a:	4413      	add	r3, r2
+ 8002f6c:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002f70:	461a      	mov	r2, r3
+ 8002f72:	2304      	movs	r3, #4
+ 8002f74:	6093      	str	r3, [r2, #8]
+    hhcd->hc[chnum].state = HC_XACTERR;
+ 8002f76:	78fa      	ldrb	r2, [r7, #3]
+ 8002f78:	6879      	ldr	r1, [r7, #4]
+ 8002f7a:	4613      	mov	r3, r2
+ 8002f7c:	011b      	lsls	r3, r3, #4
+ 8002f7e:	1a9b      	subs	r3, r3, r2
+ 8002f80:	009b      	lsls	r3, r3, #2
+ 8002f82:	440b      	add	r3, r1
+ 8002f84:	334d      	adds	r3, #77	@ 0x4d
+ 8002f86:	2207      	movs	r2, #7
+ 8002f88:	701a      	strb	r2, [r3, #0]
+    (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 8002f8a:	687b      	ldr	r3, [r7, #4]
+ 8002f8c:	681b      	ldr	r3, [r3, #0]
+ 8002f8e:	78fa      	ldrb	r2, [r7, #3]
+ 8002f90:	4611      	mov	r1, r2
+ 8002f92:	4618      	mov	r0, r3
+ 8002f94:	f003 fb5a 	bl	800664c <USB_HC_Halt>
+ 8002f98:	f000 bc89 	b.w	80038ae <HCD_HC_OUT_IRQHandler+0x978>
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_ACK))
+ 8002f9c:	687b      	ldr	r3, [r7, #4]
+ 8002f9e:	681b      	ldr	r3, [r3, #0]
+ 8002fa0:	78fa      	ldrb	r2, [r7, #3]
+ 8002fa2:	4611      	mov	r1, r2
+ 8002fa4:	4618      	mov	r0, r3
+ 8002fa6:	f003 fad4 	bl	8006552 <USB_ReadChInterrupts>
+ 8002faa:	4603      	mov	r3, r0
+ 8002fac:	f003 0320 	and.w	r3, r3, #32
+ 8002fb0:	2b20      	cmp	r3, #32
+ 8002fb2:	f040 8082 	bne.w	80030ba <HCD_HC_OUT_IRQHandler+0x184>
+  {
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_ACK);
+ 8002fb6:	78fb      	ldrb	r3, [r7, #3]
+ 8002fb8:	015a      	lsls	r2, r3, #5
+ 8002fba:	693b      	ldr	r3, [r7, #16]
+ 8002fbc:	4413      	add	r3, r2
+ 8002fbe:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8002fc2:	461a      	mov	r2, r3
+ 8002fc4:	2320      	movs	r3, #32
+ 8002fc6:	6093      	str	r3, [r2, #8]
+
+    if (hhcd->hc[chnum].do_ping == 1U)
+ 8002fc8:	78fa      	ldrb	r2, [r7, #3]
+ 8002fca:	6879      	ldr	r1, [r7, #4]
+ 8002fcc:	4613      	mov	r3, r2
+ 8002fce:	011b      	lsls	r3, r3, #4
+ 8002fd0:	1a9b      	subs	r3, r3, r2
+ 8002fd2:	009b      	lsls	r3, r3, #2
+ 8002fd4:	440b      	add	r3, r1
+ 8002fd6:	3319      	adds	r3, #25
+ 8002fd8:	781b      	ldrb	r3, [r3, #0]
+ 8002fda:	2b01      	cmp	r3, #1
+ 8002fdc:	d124      	bne.n	8003028 <HCD_HC_OUT_IRQHandler+0xf2>
+    {
+      hhcd->hc[chnum].do_ping = 0U;
+ 8002fde:	78fa      	ldrb	r2, [r7, #3]
+ 8002fe0:	6879      	ldr	r1, [r7, #4]
+ 8002fe2:	4613      	mov	r3, r2
+ 8002fe4:	011b      	lsls	r3, r3, #4
+ 8002fe6:	1a9b      	subs	r3, r3, r2
+ 8002fe8:	009b      	lsls	r3, r3, #2
+ 8002fea:	440b      	add	r3, r1
+ 8002fec:	3319      	adds	r3, #25
+ 8002fee:	2200      	movs	r2, #0
+ 8002ff0:	701a      	strb	r2, [r3, #0]
+      hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ 8002ff2:	78fa      	ldrb	r2, [r7, #3]
+ 8002ff4:	6879      	ldr	r1, [r7, #4]
+ 8002ff6:	4613      	mov	r3, r2
+ 8002ff8:	011b      	lsls	r3, r3, #4
+ 8002ffa:	1a9b      	subs	r3, r3, r2
+ 8002ffc:	009b      	lsls	r3, r3, #2
+ 8002ffe:	440b      	add	r3, r1
+ 8003000:	334c      	adds	r3, #76	@ 0x4c
+ 8003002:	2202      	movs	r2, #2
+ 8003004:	701a      	strb	r2, [r3, #0]
+      hhcd->hc[chnum].state = HC_ACK;
+ 8003006:	78fa      	ldrb	r2, [r7, #3]
+ 8003008:	6879      	ldr	r1, [r7, #4]
+ 800300a:	4613      	mov	r3, r2
+ 800300c:	011b      	lsls	r3, r3, #4
+ 800300e:	1a9b      	subs	r3, r3, r2
+ 8003010:	009b      	lsls	r3, r3, #2
+ 8003012:	440b      	add	r3, r1
+ 8003014:	334d      	adds	r3, #77	@ 0x4d
+ 8003016:	2203      	movs	r2, #3
+ 8003018:	701a      	strb	r2, [r3, #0]
+      (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 800301a:	687b      	ldr	r3, [r7, #4]
+ 800301c:	681b      	ldr	r3, [r3, #0]
+ 800301e:	78fa      	ldrb	r2, [r7, #3]
+ 8003020:	4611      	mov	r1, r2
+ 8003022:	4618      	mov	r0, r3
+ 8003024:	f003 fb12 	bl	800664c <USB_HC_Halt>
+    }
+
+    if ((hhcd->hc[chnum].do_ssplit == 1U) && (hhcd->hc[chnum].do_csplit == 0U))
+ 8003028:	78fa      	ldrb	r2, [r7, #3]
+ 800302a:	6879      	ldr	r1, [r7, #4]
+ 800302c:	4613      	mov	r3, r2
+ 800302e:	011b      	lsls	r3, r3, #4
+ 8003030:	1a9b      	subs	r3, r3, r2
+ 8003032:	009b      	lsls	r3, r3, #2
+ 8003034:	440b      	add	r3, r1
+ 8003036:	331a      	adds	r3, #26
+ 8003038:	781b      	ldrb	r3, [r3, #0]
+ 800303a:	2b01      	cmp	r3, #1
+ 800303c:	f040 8437 	bne.w	80038ae <HCD_HC_OUT_IRQHandler+0x978>
+ 8003040:	78fa      	ldrb	r2, [r7, #3]
+ 8003042:	6879      	ldr	r1, [r7, #4]
+ 8003044:	4613      	mov	r3, r2
+ 8003046:	011b      	lsls	r3, r3, #4
+ 8003048:	1a9b      	subs	r3, r3, r2
+ 800304a:	009b      	lsls	r3, r3, #2
+ 800304c:	440b      	add	r3, r1
+ 800304e:	331b      	adds	r3, #27
+ 8003050:	781b      	ldrb	r3, [r3, #0]
+ 8003052:	2b00      	cmp	r3, #0
+ 8003054:	f040 842b 	bne.w	80038ae <HCD_HC_OUT_IRQHandler+0x978>
+    {
+      if (hhcd->hc[chnum].ep_type != EP_TYPE_ISOC)
+ 8003058:	78fa      	ldrb	r2, [r7, #3]
+ 800305a:	6879      	ldr	r1, [r7, #4]
+ 800305c:	4613      	mov	r3, r2
+ 800305e:	011b      	lsls	r3, r3, #4
+ 8003060:	1a9b      	subs	r3, r3, r2
+ 8003062:	009b      	lsls	r3, r3, #2
+ 8003064:	440b      	add	r3, r1
+ 8003066:	3326      	adds	r3, #38	@ 0x26
+ 8003068:	781b      	ldrb	r3, [r3, #0]
+ 800306a:	2b01      	cmp	r3, #1
+ 800306c:	d009      	beq.n	8003082 <HCD_HC_OUT_IRQHandler+0x14c>
+      {
+        hhcd->hc[chnum].do_csplit = 1U;
+ 800306e:	78fa      	ldrb	r2, [r7, #3]
+ 8003070:	6879      	ldr	r1, [r7, #4]
+ 8003072:	4613      	mov	r3, r2
+ 8003074:	011b      	lsls	r3, r3, #4
+ 8003076:	1a9b      	subs	r3, r3, r2
+ 8003078:	009b      	lsls	r3, r3, #2
+ 800307a:	440b      	add	r3, r1
+ 800307c:	331b      	adds	r3, #27
+ 800307e:	2201      	movs	r2, #1
+ 8003080:	701a      	strb	r2, [r3, #0]
+      }
+
+      hhcd->hc[chnum].state = HC_ACK;
+ 8003082:	78fa      	ldrb	r2, [r7, #3]
+ 8003084:	6879      	ldr	r1, [r7, #4]
+ 8003086:	4613      	mov	r3, r2
+ 8003088:	011b      	lsls	r3, r3, #4
+ 800308a:	1a9b      	subs	r3, r3, r2
+ 800308c:	009b      	lsls	r3, r3, #2
+ 800308e:	440b      	add	r3, r1
+ 8003090:	334d      	adds	r3, #77	@ 0x4d
+ 8003092:	2203      	movs	r2, #3
+ 8003094:	701a      	strb	r2, [r3, #0]
+      (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 8003096:	687b      	ldr	r3, [r7, #4]
+ 8003098:	681b      	ldr	r3, [r3, #0]
+ 800309a:	78fa      	ldrb	r2, [r7, #3]
+ 800309c:	4611      	mov	r1, r2
+ 800309e:	4618      	mov	r0, r3
+ 80030a0:	f003 fad4 	bl	800664c <USB_HC_Halt>
+
+      /* reset error_count */
+      hhcd->hc[chnum].ErrCnt = 0U;
+ 80030a4:	78fa      	ldrb	r2, [r7, #3]
+ 80030a6:	6879      	ldr	r1, [r7, #4]
+ 80030a8:	4613      	mov	r3, r2
+ 80030aa:	011b      	lsls	r3, r3, #4
+ 80030ac:	1a9b      	subs	r3, r3, r2
+ 80030ae:	009b      	lsls	r3, r3, #2
+ 80030b0:	440b      	add	r3, r1
+ 80030b2:	3344      	adds	r3, #68	@ 0x44
+ 80030b4:	2200      	movs	r2, #0
+ 80030b6:	601a      	str	r2, [r3, #0]
+ 80030b8:	e3f9      	b.n	80038ae <HCD_HC_OUT_IRQHandler+0x978>
+    }
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_FRMOR))
+ 80030ba:	687b      	ldr	r3, [r7, #4]
+ 80030bc:	681b      	ldr	r3, [r3, #0]
+ 80030be:	78fa      	ldrb	r2, [r7, #3]
+ 80030c0:	4611      	mov	r1, r2
+ 80030c2:	4618      	mov	r0, r3
+ 80030c4:	f003 fa45 	bl	8006552 <USB_ReadChInterrupts>
+ 80030c8:	4603      	mov	r3, r0
+ 80030ca:	f403 7300 	and.w	r3, r3, #512	@ 0x200
+ 80030ce:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
+ 80030d2:	d111      	bne.n	80030f8 <HCD_HC_OUT_IRQHandler+0x1c2>
+  {
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_FRMOR);
+ 80030d4:	78fb      	ldrb	r3, [r7, #3]
+ 80030d6:	015a      	lsls	r2, r3, #5
+ 80030d8:	693b      	ldr	r3, [r7, #16]
+ 80030da:	4413      	add	r3, r2
+ 80030dc:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80030e0:	461a      	mov	r2, r3
+ 80030e2:	f44f 7300 	mov.w	r3, #512	@ 0x200
+ 80030e6:	6093      	str	r3, [r2, #8]
+    (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 80030e8:	687b      	ldr	r3, [r7, #4]
+ 80030ea:	681b      	ldr	r3, [r3, #0]
+ 80030ec:	78fa      	ldrb	r2, [r7, #3]
+ 80030ee:	4611      	mov	r1, r2
+ 80030f0:	4618      	mov	r0, r3
+ 80030f2:	f003 faab 	bl	800664c <USB_HC_Halt>
+ 80030f6:	e3da      	b.n	80038ae <HCD_HC_OUT_IRQHandler+0x978>
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_XFRC))
+ 80030f8:	687b      	ldr	r3, [r7, #4]
+ 80030fa:	681b      	ldr	r3, [r3, #0]
+ 80030fc:	78fa      	ldrb	r2, [r7, #3]
+ 80030fe:	4611      	mov	r1, r2
+ 8003100:	4618      	mov	r0, r3
+ 8003102:	f003 fa26 	bl	8006552 <USB_ReadChInterrupts>
+ 8003106:	4603      	mov	r3, r0
+ 8003108:	f003 0301 	and.w	r3, r3, #1
+ 800310c:	2b01      	cmp	r3, #1
+ 800310e:	d168      	bne.n	80031e2 <HCD_HC_OUT_IRQHandler+0x2ac>
+  {
+    hhcd->hc[chnum].ErrCnt = 0U;
+ 8003110:	78fa      	ldrb	r2, [r7, #3]
+ 8003112:	6879      	ldr	r1, [r7, #4]
+ 8003114:	4613      	mov	r3, r2
+ 8003116:	011b      	lsls	r3, r3, #4
+ 8003118:	1a9b      	subs	r3, r3, r2
+ 800311a:	009b      	lsls	r3, r3, #2
+ 800311c:	440b      	add	r3, r1
+ 800311e:	3344      	adds	r3, #68	@ 0x44
+ 8003120:	2200      	movs	r2, #0
+ 8003122:	601a      	str	r2, [r3, #0]
+
+    /* transaction completed with NYET state, update do ping state */
+    if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_NYET))
+ 8003124:	687b      	ldr	r3, [r7, #4]
+ 8003126:	681b      	ldr	r3, [r3, #0]
+ 8003128:	78fa      	ldrb	r2, [r7, #3]
+ 800312a:	4611      	mov	r1, r2
+ 800312c:	4618      	mov	r0, r3
+ 800312e:	f003 fa10 	bl	8006552 <USB_ReadChInterrupts>
+ 8003132:	4603      	mov	r3, r0
+ 8003134:	f003 0340 	and.w	r3, r3, #64	@ 0x40
+ 8003138:	2b40      	cmp	r3, #64	@ 0x40
+ 800313a:	d112      	bne.n	8003162 <HCD_HC_OUT_IRQHandler+0x22c>
+    {
+      hhcd->hc[chnum].do_ping = 1U;
+ 800313c:	78fa      	ldrb	r2, [r7, #3]
+ 800313e:	6879      	ldr	r1, [r7, #4]
+ 8003140:	4613      	mov	r3, r2
+ 8003142:	011b      	lsls	r3, r3, #4
+ 8003144:	1a9b      	subs	r3, r3, r2
+ 8003146:	009b      	lsls	r3, r3, #2
+ 8003148:	440b      	add	r3, r1
+ 800314a:	3319      	adds	r3, #25
+ 800314c:	2201      	movs	r2, #1
+ 800314e:	701a      	strb	r2, [r3, #0]
+      __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NYET);
+ 8003150:	78fb      	ldrb	r3, [r7, #3]
+ 8003152:	015a      	lsls	r2, r3, #5
+ 8003154:	693b      	ldr	r3, [r7, #16]
+ 8003156:	4413      	add	r3, r2
+ 8003158:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800315c:	461a      	mov	r2, r3
+ 800315e:	2340      	movs	r3, #64	@ 0x40
+ 8003160:	6093      	str	r3, [r2, #8]
+    }
+
+    if (hhcd->hc[chnum].do_csplit != 0U)
+ 8003162:	78fa      	ldrb	r2, [r7, #3]
+ 8003164:	6879      	ldr	r1, [r7, #4]
+ 8003166:	4613      	mov	r3, r2
+ 8003168:	011b      	lsls	r3, r3, #4
+ 800316a:	1a9b      	subs	r3, r3, r2
+ 800316c:	009b      	lsls	r3, r3, #2
+ 800316e:	440b      	add	r3, r1
+ 8003170:	331b      	adds	r3, #27
+ 8003172:	781b      	ldrb	r3, [r3, #0]
+ 8003174:	2b00      	cmp	r3, #0
+ 8003176:	d019      	beq.n	80031ac <HCD_HC_OUT_IRQHandler+0x276>
+    {
+      hhcd->hc[chnum].do_csplit = 0U;
+ 8003178:	78fa      	ldrb	r2, [r7, #3]
+ 800317a:	6879      	ldr	r1, [r7, #4]
+ 800317c:	4613      	mov	r3, r2
+ 800317e:	011b      	lsls	r3, r3, #4
+ 8003180:	1a9b      	subs	r3, r3, r2
+ 8003182:	009b      	lsls	r3, r3, #2
+ 8003184:	440b      	add	r3, r1
+ 8003186:	331b      	adds	r3, #27
+ 8003188:	2200      	movs	r2, #0
+ 800318a:	701a      	strb	r2, [r3, #0]
+      __HAL_HCD_CLEAR_HC_CSPLT(chnum);
+ 800318c:	78fb      	ldrb	r3, [r7, #3]
+ 800318e:	015a      	lsls	r2, r3, #5
+ 8003190:	693b      	ldr	r3, [r7, #16]
+ 8003192:	4413      	add	r3, r2
+ 8003194:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8003198:	685b      	ldr	r3, [r3, #4]
+ 800319a:	78fa      	ldrb	r2, [r7, #3]
+ 800319c:	0151      	lsls	r1, r2, #5
+ 800319e:	693a      	ldr	r2, [r7, #16]
+ 80031a0:	440a      	add	r2, r1
+ 80031a2:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 80031a6:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
+ 80031aa:	6053      	str	r3, [r2, #4]
+    }
+
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_XFRC);
+ 80031ac:	78fb      	ldrb	r3, [r7, #3]
+ 80031ae:	015a      	lsls	r2, r3, #5
+ 80031b0:	693b      	ldr	r3, [r7, #16]
+ 80031b2:	4413      	add	r3, r2
+ 80031b4:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80031b8:	461a      	mov	r2, r3
+ 80031ba:	2301      	movs	r3, #1
+ 80031bc:	6093      	str	r3, [r2, #8]
+    hhcd->hc[chnum].state = HC_XFRC;
+ 80031be:	78fa      	ldrb	r2, [r7, #3]
+ 80031c0:	6879      	ldr	r1, [r7, #4]
+ 80031c2:	4613      	mov	r3, r2
+ 80031c4:	011b      	lsls	r3, r3, #4
+ 80031c6:	1a9b      	subs	r3, r3, r2
+ 80031c8:	009b      	lsls	r3, r3, #2
+ 80031ca:	440b      	add	r3, r1
+ 80031cc:	334d      	adds	r3, #77	@ 0x4d
+ 80031ce:	2201      	movs	r2, #1
+ 80031d0:	701a      	strb	r2, [r3, #0]
+    (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 80031d2:	687b      	ldr	r3, [r7, #4]
+ 80031d4:	681b      	ldr	r3, [r3, #0]
+ 80031d6:	78fa      	ldrb	r2, [r7, #3]
+ 80031d8:	4611      	mov	r1, r2
+ 80031da:	4618      	mov	r0, r3
+ 80031dc:	f003 fa36 	bl	800664c <USB_HC_Halt>
+ 80031e0:	e365      	b.n	80038ae <HCD_HC_OUT_IRQHandler+0x978>
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_NYET))
+ 80031e2:	687b      	ldr	r3, [r7, #4]
+ 80031e4:	681b      	ldr	r3, [r3, #0]
+ 80031e6:	78fa      	ldrb	r2, [r7, #3]
+ 80031e8:	4611      	mov	r1, r2
+ 80031ea:	4618      	mov	r0, r3
+ 80031ec:	f003 f9b1 	bl	8006552 <USB_ReadChInterrupts>
+ 80031f0:	4603      	mov	r3, r0
+ 80031f2:	f003 0340 	and.w	r3, r3, #64	@ 0x40
+ 80031f6:	2b40      	cmp	r3, #64	@ 0x40
+ 80031f8:	d139      	bne.n	800326e <HCD_HC_OUT_IRQHandler+0x338>
+  {
+    hhcd->hc[chnum].state = HC_NYET;
+ 80031fa:	78fa      	ldrb	r2, [r7, #3]
+ 80031fc:	6879      	ldr	r1, [r7, #4]
+ 80031fe:	4613      	mov	r3, r2
+ 8003200:	011b      	lsls	r3, r3, #4
+ 8003202:	1a9b      	subs	r3, r3, r2
+ 8003204:	009b      	lsls	r3, r3, #2
+ 8003206:	440b      	add	r3, r1
+ 8003208:	334d      	adds	r3, #77	@ 0x4d
+ 800320a:	2205      	movs	r2, #5
+ 800320c:	701a      	strb	r2, [r3, #0]
+
+    if (hhcd->hc[chnum].do_ssplit == 0U)
+ 800320e:	78fa      	ldrb	r2, [r7, #3]
+ 8003210:	6879      	ldr	r1, [r7, #4]
+ 8003212:	4613      	mov	r3, r2
+ 8003214:	011b      	lsls	r3, r3, #4
+ 8003216:	1a9b      	subs	r3, r3, r2
+ 8003218:	009b      	lsls	r3, r3, #2
+ 800321a:	440b      	add	r3, r1
+ 800321c:	331a      	adds	r3, #26
+ 800321e:	781b      	ldrb	r3, [r3, #0]
+ 8003220:	2b00      	cmp	r3, #0
+ 8003222:	d109      	bne.n	8003238 <HCD_HC_OUT_IRQHandler+0x302>
+    {
+      hhcd->hc[chnum].do_ping = 1U;
+ 8003224:	78fa      	ldrb	r2, [r7, #3]
+ 8003226:	6879      	ldr	r1, [r7, #4]
+ 8003228:	4613      	mov	r3, r2
+ 800322a:	011b      	lsls	r3, r3, #4
+ 800322c:	1a9b      	subs	r3, r3, r2
+ 800322e:	009b      	lsls	r3, r3, #2
+ 8003230:	440b      	add	r3, r1
+ 8003232:	3319      	adds	r3, #25
+ 8003234:	2201      	movs	r2, #1
+ 8003236:	701a      	strb	r2, [r3, #0]
+    }
+
+    hhcd->hc[chnum].ErrCnt = 0U;
+ 8003238:	78fa      	ldrb	r2, [r7, #3]
+ 800323a:	6879      	ldr	r1, [r7, #4]
+ 800323c:	4613      	mov	r3, r2
+ 800323e:	011b      	lsls	r3, r3, #4
+ 8003240:	1a9b      	subs	r3, r3, r2
+ 8003242:	009b      	lsls	r3, r3, #2
+ 8003244:	440b      	add	r3, r1
+ 8003246:	3344      	adds	r3, #68	@ 0x44
+ 8003248:	2200      	movs	r2, #0
+ 800324a:	601a      	str	r2, [r3, #0]
+    (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 800324c:	687b      	ldr	r3, [r7, #4]
+ 800324e:	681b      	ldr	r3, [r3, #0]
+ 8003250:	78fa      	ldrb	r2, [r7, #3]
+ 8003252:	4611      	mov	r1, r2
+ 8003254:	4618      	mov	r0, r3
+ 8003256:	f003 f9f9 	bl	800664c <USB_HC_Halt>
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NYET);
+ 800325a:	78fb      	ldrb	r3, [r7, #3]
+ 800325c:	015a      	lsls	r2, r3, #5
+ 800325e:	693b      	ldr	r3, [r7, #16]
+ 8003260:	4413      	add	r3, r2
+ 8003262:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8003266:	461a      	mov	r2, r3
+ 8003268:	2340      	movs	r3, #64	@ 0x40
+ 800326a:	6093      	str	r3, [r2, #8]
+ 800326c:	e31f      	b.n	80038ae <HCD_HC_OUT_IRQHandler+0x978>
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_STALL))
+ 800326e:	687b      	ldr	r3, [r7, #4]
+ 8003270:	681b      	ldr	r3, [r3, #0]
+ 8003272:	78fa      	ldrb	r2, [r7, #3]
+ 8003274:	4611      	mov	r1, r2
+ 8003276:	4618      	mov	r0, r3
+ 8003278:	f003 f96b 	bl	8006552 <USB_ReadChInterrupts>
+ 800327c:	4603      	mov	r3, r0
+ 800327e:	f003 0308 	and.w	r3, r3, #8
+ 8003282:	2b08      	cmp	r3, #8
+ 8003284:	d11a      	bne.n	80032bc <HCD_HC_OUT_IRQHandler+0x386>
+  {
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_STALL);
+ 8003286:	78fb      	ldrb	r3, [r7, #3]
+ 8003288:	015a      	lsls	r2, r3, #5
+ 800328a:	693b      	ldr	r3, [r7, #16]
+ 800328c:	4413      	add	r3, r2
+ 800328e:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8003292:	461a      	mov	r2, r3
+ 8003294:	2308      	movs	r3, #8
+ 8003296:	6093      	str	r3, [r2, #8]
+    hhcd->hc[chnum].state = HC_STALL;
+ 8003298:	78fa      	ldrb	r2, [r7, #3]
+ 800329a:	6879      	ldr	r1, [r7, #4]
+ 800329c:	4613      	mov	r3, r2
+ 800329e:	011b      	lsls	r3, r3, #4
+ 80032a0:	1a9b      	subs	r3, r3, r2
+ 80032a2:	009b      	lsls	r3, r3, #2
+ 80032a4:	440b      	add	r3, r1
+ 80032a6:	334d      	adds	r3, #77	@ 0x4d
+ 80032a8:	2206      	movs	r2, #6
+ 80032aa:	701a      	strb	r2, [r3, #0]
+    (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 80032ac:	687b      	ldr	r3, [r7, #4]
+ 80032ae:	681b      	ldr	r3, [r3, #0]
+ 80032b0:	78fa      	ldrb	r2, [r7, #3]
+ 80032b2:	4611      	mov	r1, r2
+ 80032b4:	4618      	mov	r0, r3
+ 80032b6:	f003 f9c9 	bl	800664c <USB_HC_Halt>
+ 80032ba:	e2f8      	b.n	80038ae <HCD_HC_OUT_IRQHandler+0x978>
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_NAK))
+ 80032bc:	687b      	ldr	r3, [r7, #4]
+ 80032be:	681b      	ldr	r3, [r3, #0]
+ 80032c0:	78fa      	ldrb	r2, [r7, #3]
+ 80032c2:	4611      	mov	r1, r2
+ 80032c4:	4618      	mov	r0, r3
+ 80032c6:	f003 f944 	bl	8006552 <USB_ReadChInterrupts>
+ 80032ca:	4603      	mov	r3, r0
+ 80032cc:	f003 0310 	and.w	r3, r3, #16
+ 80032d0:	2b10      	cmp	r3, #16
+ 80032d2:	d144      	bne.n	800335e <HCD_HC_OUT_IRQHandler+0x428>
+  {
+    hhcd->hc[chnum].ErrCnt = 0U;
+ 80032d4:	78fa      	ldrb	r2, [r7, #3]
+ 80032d6:	6879      	ldr	r1, [r7, #4]
+ 80032d8:	4613      	mov	r3, r2
+ 80032da:	011b      	lsls	r3, r3, #4
+ 80032dc:	1a9b      	subs	r3, r3, r2
+ 80032de:	009b      	lsls	r3, r3, #2
+ 80032e0:	440b      	add	r3, r1
+ 80032e2:	3344      	adds	r3, #68	@ 0x44
+ 80032e4:	2200      	movs	r2, #0
+ 80032e6:	601a      	str	r2, [r3, #0]
+    hhcd->hc[chnum].state = HC_NAK;
+ 80032e8:	78fa      	ldrb	r2, [r7, #3]
+ 80032ea:	6879      	ldr	r1, [r7, #4]
+ 80032ec:	4613      	mov	r3, r2
+ 80032ee:	011b      	lsls	r3, r3, #4
+ 80032f0:	1a9b      	subs	r3, r3, r2
+ 80032f2:	009b      	lsls	r3, r3, #2
+ 80032f4:	440b      	add	r3, r1
+ 80032f6:	334d      	adds	r3, #77	@ 0x4d
+ 80032f8:	2204      	movs	r2, #4
+ 80032fa:	701a      	strb	r2, [r3, #0]
+
+    if (hhcd->hc[chnum].do_ping == 0U)
+ 80032fc:	78fa      	ldrb	r2, [r7, #3]
+ 80032fe:	6879      	ldr	r1, [r7, #4]
+ 8003300:	4613      	mov	r3, r2
+ 8003302:	011b      	lsls	r3, r3, #4
+ 8003304:	1a9b      	subs	r3, r3, r2
+ 8003306:	009b      	lsls	r3, r3, #2
+ 8003308:	440b      	add	r3, r1
+ 800330a:	3319      	adds	r3, #25
+ 800330c:	781b      	ldrb	r3, [r3, #0]
+ 800330e:	2b00      	cmp	r3, #0
+ 8003310:	d114      	bne.n	800333c <HCD_HC_OUT_IRQHandler+0x406>
+    {
+      if (hhcd->hc[chnum].speed == HCD_DEVICE_SPEED_HIGH)
+ 8003312:	78fa      	ldrb	r2, [r7, #3]
+ 8003314:	6879      	ldr	r1, [r7, #4]
+ 8003316:	4613      	mov	r3, r2
+ 8003318:	011b      	lsls	r3, r3, #4
+ 800331a:	1a9b      	subs	r3, r3, r2
+ 800331c:	009b      	lsls	r3, r3, #2
+ 800331e:	440b      	add	r3, r1
+ 8003320:	3318      	adds	r3, #24
+ 8003322:	781b      	ldrb	r3, [r3, #0]
+ 8003324:	2b00      	cmp	r3, #0
+ 8003326:	d109      	bne.n	800333c <HCD_HC_OUT_IRQHandler+0x406>
+      {
+        hhcd->hc[chnum].do_ping = 1U;
+ 8003328:	78fa      	ldrb	r2, [r7, #3]
+ 800332a:	6879      	ldr	r1, [r7, #4]
+ 800332c:	4613      	mov	r3, r2
+ 800332e:	011b      	lsls	r3, r3, #4
+ 8003330:	1a9b      	subs	r3, r3, r2
+ 8003332:	009b      	lsls	r3, r3, #2
+ 8003334:	440b      	add	r3, r1
+ 8003336:	3319      	adds	r3, #25
+ 8003338:	2201      	movs	r2, #1
+ 800333a:	701a      	strb	r2, [r3, #0]
+      }
+    }
+
+    (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 800333c:	687b      	ldr	r3, [r7, #4]
+ 800333e:	681b      	ldr	r3, [r3, #0]
+ 8003340:	78fa      	ldrb	r2, [r7, #3]
+ 8003342:	4611      	mov	r1, r2
+ 8003344:	4618      	mov	r0, r3
+ 8003346:	f003 f981 	bl	800664c <USB_HC_Halt>
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK);
+ 800334a:	78fb      	ldrb	r3, [r7, #3]
+ 800334c:	015a      	lsls	r2, r3, #5
+ 800334e:	693b      	ldr	r3, [r7, #16]
+ 8003350:	4413      	add	r3, r2
+ 8003352:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8003356:	461a      	mov	r2, r3
+ 8003358:	2310      	movs	r3, #16
+ 800335a:	6093      	str	r3, [r2, #8]
+ 800335c:	e2a7      	b.n	80038ae <HCD_HC_OUT_IRQHandler+0x978>
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_TXERR))
+ 800335e:	687b      	ldr	r3, [r7, #4]
+ 8003360:	681b      	ldr	r3, [r3, #0]
+ 8003362:	78fa      	ldrb	r2, [r7, #3]
+ 8003364:	4611      	mov	r1, r2
+ 8003366:	4618      	mov	r0, r3
+ 8003368:	f003 f8f3 	bl	8006552 <USB_ReadChInterrupts>
+ 800336c:	4603      	mov	r3, r0
+ 800336e:	f003 0380 	and.w	r3, r3, #128	@ 0x80
+ 8003372:	2b80      	cmp	r3, #128	@ 0x80
+ 8003374:	f040 8083 	bne.w	800347e <HCD_HC_OUT_IRQHandler+0x548>
+  {
+    if (hhcd->Init.dma_enable == 0U)
+ 8003378:	687b      	ldr	r3, [r7, #4]
+ 800337a:	799b      	ldrb	r3, [r3, #6]
+ 800337c:	2b00      	cmp	r3, #0
+ 800337e:	d111      	bne.n	80033a4 <HCD_HC_OUT_IRQHandler+0x46e>
+    {
+      hhcd->hc[chnum].state = HC_XACTERR;
+ 8003380:	78fa      	ldrb	r2, [r7, #3]
+ 8003382:	6879      	ldr	r1, [r7, #4]
+ 8003384:	4613      	mov	r3, r2
+ 8003386:	011b      	lsls	r3, r3, #4
+ 8003388:	1a9b      	subs	r3, r3, r2
+ 800338a:	009b      	lsls	r3, r3, #2
+ 800338c:	440b      	add	r3, r1
+ 800338e:	334d      	adds	r3, #77	@ 0x4d
+ 8003390:	2207      	movs	r2, #7
+ 8003392:	701a      	strb	r2, [r3, #0]
+      (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 8003394:	687b      	ldr	r3, [r7, #4]
+ 8003396:	681b      	ldr	r3, [r3, #0]
+ 8003398:	78fa      	ldrb	r2, [r7, #3]
+ 800339a:	4611      	mov	r1, r2
+ 800339c:	4618      	mov	r0, r3
+ 800339e:	f003 f955 	bl	800664c <USB_HC_Halt>
+ 80033a2:	e062      	b.n	800346a <HCD_HC_OUT_IRQHandler+0x534>
+    }
+    else
+    {
+      hhcd->hc[chnum].ErrCnt++;
+ 80033a4:	78fa      	ldrb	r2, [r7, #3]
+ 80033a6:	6879      	ldr	r1, [r7, #4]
+ 80033a8:	4613      	mov	r3, r2
+ 80033aa:	011b      	lsls	r3, r3, #4
+ 80033ac:	1a9b      	subs	r3, r3, r2
+ 80033ae:	009b      	lsls	r3, r3, #2
+ 80033b0:	440b      	add	r3, r1
+ 80033b2:	3344      	adds	r3, #68	@ 0x44
+ 80033b4:	681b      	ldr	r3, [r3, #0]
+ 80033b6:	1c59      	adds	r1, r3, #1
+ 80033b8:	6878      	ldr	r0, [r7, #4]
+ 80033ba:	4613      	mov	r3, r2
+ 80033bc:	011b      	lsls	r3, r3, #4
+ 80033be:	1a9b      	subs	r3, r3, r2
+ 80033c0:	009b      	lsls	r3, r3, #2
+ 80033c2:	4403      	add	r3, r0
+ 80033c4:	3344      	adds	r3, #68	@ 0x44
+ 80033c6:	6019      	str	r1, [r3, #0]
+      if (hhcd->hc[chnum].ErrCnt > 2U)
+ 80033c8:	78fa      	ldrb	r2, [r7, #3]
+ 80033ca:	6879      	ldr	r1, [r7, #4]
+ 80033cc:	4613      	mov	r3, r2
+ 80033ce:	011b      	lsls	r3, r3, #4
+ 80033d0:	1a9b      	subs	r3, r3, r2
+ 80033d2:	009b      	lsls	r3, r3, #2
+ 80033d4:	440b      	add	r3, r1
+ 80033d6:	3344      	adds	r3, #68	@ 0x44
+ 80033d8:	681b      	ldr	r3, [r3, #0]
+ 80033da:	2b02      	cmp	r3, #2
+ 80033dc:	d922      	bls.n	8003424 <HCD_HC_OUT_IRQHandler+0x4ee>
+      {
+        hhcd->hc[chnum].ErrCnt = 0U;
+ 80033de:	78fa      	ldrb	r2, [r7, #3]
+ 80033e0:	6879      	ldr	r1, [r7, #4]
+ 80033e2:	4613      	mov	r3, r2
+ 80033e4:	011b      	lsls	r3, r3, #4
+ 80033e6:	1a9b      	subs	r3, r3, r2
+ 80033e8:	009b      	lsls	r3, r3, #2
+ 80033ea:	440b      	add	r3, r1
+ 80033ec:	3344      	adds	r3, #68	@ 0x44
+ 80033ee:	2200      	movs	r2, #0
+ 80033f0:	601a      	str	r2, [r3, #0]
+        hhcd->hc[chnum].urb_state = URB_ERROR;
+ 80033f2:	78fa      	ldrb	r2, [r7, #3]
+ 80033f4:	6879      	ldr	r1, [r7, #4]
+ 80033f6:	4613      	mov	r3, r2
+ 80033f8:	011b      	lsls	r3, r3, #4
+ 80033fa:	1a9b      	subs	r3, r3, r2
+ 80033fc:	009b      	lsls	r3, r3, #2
+ 80033fe:	440b      	add	r3, r1
+ 8003400:	334c      	adds	r3, #76	@ 0x4c
+ 8003402:	2204      	movs	r2, #4
+ 8003404:	701a      	strb	r2, [r3, #0]
+
+#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
+        hhcd->HC_NotifyURBChangeCallback(hhcd, chnum, hhcd->hc[chnum].urb_state);
+#else
+        HAL_HCD_HC_NotifyURBChange_Callback(hhcd, chnum, hhcd->hc[chnum].urb_state);
+ 8003406:	78fa      	ldrb	r2, [r7, #3]
+ 8003408:	6879      	ldr	r1, [r7, #4]
+ 800340a:	4613      	mov	r3, r2
+ 800340c:	011b      	lsls	r3, r3, #4
+ 800340e:	1a9b      	subs	r3, r3, r2
+ 8003410:	009b      	lsls	r3, r3, #2
+ 8003412:	440b      	add	r3, r1
+ 8003414:	334c      	adds	r3, #76	@ 0x4c
+ 8003416:	781a      	ldrb	r2, [r3, #0]
+ 8003418:	78fb      	ldrb	r3, [r7, #3]
+ 800341a:	4619      	mov	r1, r3
+ 800341c:	6878      	ldr	r0, [r7, #4]
+ 800341e:	f004 fca9 	bl	8007d74 <HAL_HCD_HC_NotifyURBChange_Callback>
+ 8003422:	e022      	b.n	800346a <HCD_HC_OUT_IRQHandler+0x534>
+#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
+      }
+      else
+      {
+        hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ 8003424:	78fa      	ldrb	r2, [r7, #3]
+ 8003426:	6879      	ldr	r1, [r7, #4]
+ 8003428:	4613      	mov	r3, r2
+ 800342a:	011b      	lsls	r3, r3, #4
+ 800342c:	1a9b      	subs	r3, r3, r2
+ 800342e:	009b      	lsls	r3, r3, #2
+ 8003430:	440b      	add	r3, r1
+ 8003432:	334c      	adds	r3, #76	@ 0x4c
+ 8003434:	2202      	movs	r2, #2
+ 8003436:	701a      	strb	r2, [r3, #0]
+
+        /* Re-activate the channel  */
+        tmpreg = USBx_HC(chnum)->HCCHAR;
+ 8003438:	78fb      	ldrb	r3, [r7, #3]
+ 800343a:	015a      	lsls	r2, r3, #5
+ 800343c:	693b      	ldr	r3, [r7, #16]
+ 800343e:	4413      	add	r3, r2
+ 8003440:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8003444:	681b      	ldr	r3, [r3, #0]
+ 8003446:	60fb      	str	r3, [r7, #12]
+        tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
+ 8003448:	68fb      	ldr	r3, [r7, #12]
+ 800344a:	f023 4380 	bic.w	r3, r3, #1073741824	@ 0x40000000
+ 800344e:	60fb      	str	r3, [r7, #12]
+        tmpreg |= USB_OTG_HCCHAR_CHENA;
+ 8003450:	68fb      	ldr	r3, [r7, #12]
+ 8003452:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
+ 8003456:	60fb      	str	r3, [r7, #12]
+        USBx_HC(chnum)->HCCHAR = tmpreg;
+ 8003458:	78fb      	ldrb	r3, [r7, #3]
+ 800345a:	015a      	lsls	r2, r3, #5
+ 800345c:	693b      	ldr	r3, [r7, #16]
+ 800345e:	4413      	add	r3, r2
+ 8003460:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8003464:	461a      	mov	r2, r3
+ 8003466:	68fb      	ldr	r3, [r7, #12]
+ 8003468:	6013      	str	r3, [r2, #0]
+      }
+    }
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_TXERR);
+ 800346a:	78fb      	ldrb	r3, [r7, #3]
+ 800346c:	015a      	lsls	r2, r3, #5
+ 800346e:	693b      	ldr	r3, [r7, #16]
+ 8003470:	4413      	add	r3, r2
+ 8003472:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8003476:	461a      	mov	r2, r3
+ 8003478:	2380      	movs	r3, #128	@ 0x80
+ 800347a:	6093      	str	r3, [r2, #8]
+ 800347c:	e217      	b.n	80038ae <HCD_HC_OUT_IRQHandler+0x978>
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_DTERR))
+ 800347e:	687b      	ldr	r3, [r7, #4]
+ 8003480:	681b      	ldr	r3, [r3, #0]
+ 8003482:	78fa      	ldrb	r2, [r7, #3]
+ 8003484:	4611      	mov	r1, r2
+ 8003486:	4618      	mov	r0, r3
+ 8003488:	f003 f863 	bl	8006552 <USB_ReadChInterrupts>
+ 800348c:	4603      	mov	r3, r0
+ 800348e:	f403 6380 	and.w	r3, r3, #1024	@ 0x400
+ 8003492:	f5b3 6f80 	cmp.w	r3, #1024	@ 0x400
+ 8003496:	d11b      	bne.n	80034d0 <HCD_HC_OUT_IRQHandler+0x59a>
+  {
+    hhcd->hc[chnum].state = HC_DATATGLERR;
+ 8003498:	78fa      	ldrb	r2, [r7, #3]
+ 800349a:	6879      	ldr	r1, [r7, #4]
+ 800349c:	4613      	mov	r3, r2
+ 800349e:	011b      	lsls	r3, r3, #4
+ 80034a0:	1a9b      	subs	r3, r3, r2
+ 80034a2:	009b      	lsls	r3, r3, #2
+ 80034a4:	440b      	add	r3, r1
+ 80034a6:	334d      	adds	r3, #77	@ 0x4d
+ 80034a8:	2209      	movs	r2, #9
+ 80034aa:	701a      	strb	r2, [r3, #0]
+    (void)USB_HC_Halt(hhcd->Instance, chnum);
+ 80034ac:	687b      	ldr	r3, [r7, #4]
+ 80034ae:	681b      	ldr	r3, [r3, #0]
+ 80034b0:	78fa      	ldrb	r2, [r7, #3]
+ 80034b2:	4611      	mov	r1, r2
+ 80034b4:	4618      	mov	r0, r3
+ 80034b6:	f003 f8c9 	bl	800664c <USB_HC_Halt>
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_DTERR);
+ 80034ba:	78fb      	ldrb	r3, [r7, #3]
+ 80034bc:	015a      	lsls	r2, r3, #5
+ 80034be:	693b      	ldr	r3, [r7, #16]
+ 80034c0:	4413      	add	r3, r2
+ 80034c2:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80034c6:	461a      	mov	r2, r3
+ 80034c8:	f44f 6380 	mov.w	r3, #1024	@ 0x400
+ 80034cc:	6093      	str	r3, [r2, #8]
+ 80034ce:	e1ee      	b.n	80038ae <HCD_HC_OUT_IRQHandler+0x978>
+  }
+  else if (__HAL_HCD_GET_CH_FLAG(hhcd, chnum, USB_OTG_HCINT_CHH))
+ 80034d0:	687b      	ldr	r3, [r7, #4]
+ 80034d2:	681b      	ldr	r3, [r3, #0]
+ 80034d4:	78fa      	ldrb	r2, [r7, #3]
+ 80034d6:	4611      	mov	r1, r2
+ 80034d8:	4618      	mov	r0, r3
+ 80034da:	f003 f83a 	bl	8006552 <USB_ReadChInterrupts>
+ 80034de:	4603      	mov	r3, r0
+ 80034e0:	f003 0302 	and.w	r3, r3, #2
+ 80034e4:	2b02      	cmp	r3, #2
+ 80034e6:	f040 81df 	bne.w	80038a8 <HCD_HC_OUT_IRQHandler+0x972>
+  {
+    __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_CHH);
+ 80034ea:	78fb      	ldrb	r3, [r7, #3]
+ 80034ec:	015a      	lsls	r2, r3, #5
+ 80034ee:	693b      	ldr	r3, [r7, #16]
+ 80034f0:	4413      	add	r3, r2
+ 80034f2:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80034f6:	461a      	mov	r2, r3
+ 80034f8:	2302      	movs	r3, #2
+ 80034fa:	6093      	str	r3, [r2, #8]
+
+    if (hhcd->hc[chnum].state == HC_XFRC)
+ 80034fc:	78fa      	ldrb	r2, [r7, #3]
+ 80034fe:	6879      	ldr	r1, [r7, #4]
+ 8003500:	4613      	mov	r3, r2
+ 8003502:	011b      	lsls	r3, r3, #4
+ 8003504:	1a9b      	subs	r3, r3, r2
+ 8003506:	009b      	lsls	r3, r3, #2
+ 8003508:	440b      	add	r3, r1
+ 800350a:	334d      	adds	r3, #77	@ 0x4d
+ 800350c:	781b      	ldrb	r3, [r3, #0]
+ 800350e:	2b01      	cmp	r3, #1
+ 8003510:	f040 8093 	bne.w	800363a <HCD_HC_OUT_IRQHandler+0x704>
+    {
+      hhcd->hc[chnum].state = HC_HALTED;
+ 8003514:	78fa      	ldrb	r2, [r7, #3]
+ 8003516:	6879      	ldr	r1, [r7, #4]
+ 8003518:	4613      	mov	r3, r2
+ 800351a:	011b      	lsls	r3, r3, #4
+ 800351c:	1a9b      	subs	r3, r3, r2
+ 800351e:	009b      	lsls	r3, r3, #2
+ 8003520:	440b      	add	r3, r1
+ 8003522:	334d      	adds	r3, #77	@ 0x4d
+ 8003524:	2202      	movs	r2, #2
+ 8003526:	701a      	strb	r2, [r3, #0]
+      hhcd->hc[chnum].urb_state = URB_DONE;
+ 8003528:	78fa      	ldrb	r2, [r7, #3]
+ 800352a:	6879      	ldr	r1, [r7, #4]
+ 800352c:	4613      	mov	r3, r2
+ 800352e:	011b      	lsls	r3, r3, #4
+ 8003530:	1a9b      	subs	r3, r3, r2
+ 8003532:	009b      	lsls	r3, r3, #2
+ 8003534:	440b      	add	r3, r1
+ 8003536:	334c      	adds	r3, #76	@ 0x4c
+ 8003538:	2201      	movs	r2, #1
+ 800353a:	701a      	strb	r2, [r3, #0]
+
+      if ((hhcd->hc[chnum].ep_type == EP_TYPE_BULK) ||
+ 800353c:	78fa      	ldrb	r2, [r7, #3]
+ 800353e:	6879      	ldr	r1, [r7, #4]
+ 8003540:	4613      	mov	r3, r2
+ 8003542:	011b      	lsls	r3, r3, #4
+ 8003544:	1a9b      	subs	r3, r3, r2
+ 8003546:	009b      	lsls	r3, r3, #2
+ 8003548:	440b      	add	r3, r1
+ 800354a:	3326      	adds	r3, #38	@ 0x26
+ 800354c:	781b      	ldrb	r3, [r3, #0]
+ 800354e:	2b02      	cmp	r3, #2
+ 8003550:	d00b      	beq.n	800356a <HCD_HC_OUT_IRQHandler+0x634>
+          (hhcd->hc[chnum].ep_type == EP_TYPE_INTR))
+ 8003552:	78fa      	ldrb	r2, [r7, #3]
+ 8003554:	6879      	ldr	r1, [r7, #4]
+ 8003556:	4613      	mov	r3, r2
+ 8003558:	011b      	lsls	r3, r3, #4
+ 800355a:	1a9b      	subs	r3, r3, r2
+ 800355c:	009b      	lsls	r3, r3, #2
+ 800355e:	440b      	add	r3, r1
+ 8003560:	3326      	adds	r3, #38	@ 0x26
+ 8003562:	781b      	ldrb	r3, [r3, #0]
+      if ((hhcd->hc[chnum].ep_type == EP_TYPE_BULK) ||
+ 8003564:	2b03      	cmp	r3, #3
+ 8003566:	f040 8190 	bne.w	800388a <HCD_HC_OUT_IRQHandler+0x954>
+      {
+        if (hhcd->Init.dma_enable == 0U)
+ 800356a:	687b      	ldr	r3, [r7, #4]
+ 800356c:	799b      	ldrb	r3, [r3, #6]
+ 800356e:	2b00      	cmp	r3, #0
+ 8003570:	d115      	bne.n	800359e <HCD_HC_OUT_IRQHandler+0x668>
+        {
+          hhcd->hc[chnum].toggle_out ^= 1U;
+ 8003572:	78fa      	ldrb	r2, [r7, #3]
+ 8003574:	6879      	ldr	r1, [r7, #4]
+ 8003576:	4613      	mov	r3, r2
+ 8003578:	011b      	lsls	r3, r3, #4
+ 800357a:	1a9b      	subs	r3, r3, r2
+ 800357c:	009b      	lsls	r3, r3, #2
+ 800357e:	440b      	add	r3, r1
+ 8003580:	333d      	adds	r3, #61	@ 0x3d
+ 8003582:	781b      	ldrb	r3, [r3, #0]
+ 8003584:	78fa      	ldrb	r2, [r7, #3]
+ 8003586:	f083 0301 	eor.w	r3, r3, #1
+ 800358a:	b2d8      	uxtb	r0, r3
+ 800358c:	6879      	ldr	r1, [r7, #4]
+ 800358e:	4613      	mov	r3, r2
+ 8003590:	011b      	lsls	r3, r3, #4
+ 8003592:	1a9b      	subs	r3, r3, r2
+ 8003594:	009b      	lsls	r3, r3, #2
+ 8003596:	440b      	add	r3, r1
+ 8003598:	333d      	adds	r3, #61	@ 0x3d
+ 800359a:	4602      	mov	r2, r0
+ 800359c:	701a      	strb	r2, [r3, #0]
+        }
+
+        if ((hhcd->Init.dma_enable == 1U) && (hhcd->hc[chnum].xfer_len > 0U))
+ 800359e:	687b      	ldr	r3, [r7, #4]
+ 80035a0:	799b      	ldrb	r3, [r3, #6]
+ 80035a2:	2b01      	cmp	r3, #1
+ 80035a4:	f040 8171 	bne.w	800388a <HCD_HC_OUT_IRQHandler+0x954>
+ 80035a8:	78fa      	ldrb	r2, [r7, #3]
+ 80035aa:	6879      	ldr	r1, [r7, #4]
+ 80035ac:	4613      	mov	r3, r2
+ 80035ae:	011b      	lsls	r3, r3, #4
+ 80035b0:	1a9b      	subs	r3, r3, r2
+ 80035b2:	009b      	lsls	r3, r3, #2
+ 80035b4:	440b      	add	r3, r1
+ 80035b6:	3334      	adds	r3, #52	@ 0x34
+ 80035b8:	681b      	ldr	r3, [r3, #0]
+ 80035ba:	2b00      	cmp	r3, #0
+ 80035bc:	f000 8165 	beq.w	800388a <HCD_HC_OUT_IRQHandler+0x954>
+        {
+          num_packets = (hhcd->hc[chnum].xfer_len + hhcd->hc[chnum].max_packet - 1U) / hhcd->hc[chnum].max_packet;
+ 80035c0:	78fa      	ldrb	r2, [r7, #3]
+ 80035c2:	6879      	ldr	r1, [r7, #4]
+ 80035c4:	4613      	mov	r3, r2
+ 80035c6:	011b      	lsls	r3, r3, #4
+ 80035c8:	1a9b      	subs	r3, r3, r2
+ 80035ca:	009b      	lsls	r3, r3, #2
+ 80035cc:	440b      	add	r3, r1
+ 80035ce:	3334      	adds	r3, #52	@ 0x34
+ 80035d0:	6819      	ldr	r1, [r3, #0]
+ 80035d2:	78fa      	ldrb	r2, [r7, #3]
+ 80035d4:	6878      	ldr	r0, [r7, #4]
+ 80035d6:	4613      	mov	r3, r2
+ 80035d8:	011b      	lsls	r3, r3, #4
+ 80035da:	1a9b      	subs	r3, r3, r2
+ 80035dc:	009b      	lsls	r3, r3, #2
+ 80035de:	4403      	add	r3, r0
+ 80035e0:	3328      	adds	r3, #40	@ 0x28
+ 80035e2:	881b      	ldrh	r3, [r3, #0]
+ 80035e4:	440b      	add	r3, r1
+ 80035e6:	1e59      	subs	r1, r3, #1
+ 80035e8:	78fa      	ldrb	r2, [r7, #3]
+ 80035ea:	6878      	ldr	r0, [r7, #4]
+ 80035ec:	4613      	mov	r3, r2
+ 80035ee:	011b      	lsls	r3, r3, #4
+ 80035f0:	1a9b      	subs	r3, r3, r2
+ 80035f2:	009b      	lsls	r3, r3, #2
+ 80035f4:	4403      	add	r3, r0
+ 80035f6:	3328      	adds	r3, #40	@ 0x28
+ 80035f8:	881b      	ldrh	r3, [r3, #0]
+ 80035fa:	fbb1 f3f3 	udiv	r3, r1, r3
+ 80035fe:	60bb      	str	r3, [r7, #8]
+
+          if ((num_packets & 1U) != 0U)
+ 8003600:	68bb      	ldr	r3, [r7, #8]
+ 8003602:	f003 0301 	and.w	r3, r3, #1
+ 8003606:	2b00      	cmp	r3, #0
+ 8003608:	f000 813f 	beq.w	800388a <HCD_HC_OUT_IRQHandler+0x954>
+          {
+            hhcd->hc[chnum].toggle_out ^= 1U;
+ 800360c:	78fa      	ldrb	r2, [r7, #3]
+ 800360e:	6879      	ldr	r1, [r7, #4]
+ 8003610:	4613      	mov	r3, r2
+ 8003612:	011b      	lsls	r3, r3, #4
+ 8003614:	1a9b      	subs	r3, r3, r2
+ 8003616:	009b      	lsls	r3, r3, #2
+ 8003618:	440b      	add	r3, r1
+ 800361a:	333d      	adds	r3, #61	@ 0x3d
+ 800361c:	781b      	ldrb	r3, [r3, #0]
+ 800361e:	78fa      	ldrb	r2, [r7, #3]
+ 8003620:	f083 0301 	eor.w	r3, r3, #1
+ 8003624:	b2d8      	uxtb	r0, r3
+ 8003626:	6879      	ldr	r1, [r7, #4]
+ 8003628:	4613      	mov	r3, r2
+ 800362a:	011b      	lsls	r3, r3, #4
+ 800362c:	1a9b      	subs	r3, r3, r2
+ 800362e:	009b      	lsls	r3, r3, #2
+ 8003630:	440b      	add	r3, r1
+ 8003632:	333d      	adds	r3, #61	@ 0x3d
+ 8003634:	4602      	mov	r2, r0
+ 8003636:	701a      	strb	r2, [r3, #0]
+ 8003638:	e127      	b.n	800388a <HCD_HC_OUT_IRQHandler+0x954>
+          }
+        }
+      }
+    }
+    else if (hhcd->hc[chnum].state == HC_ACK)
+ 800363a:	78fa      	ldrb	r2, [r7, #3]
+ 800363c:	6879      	ldr	r1, [r7, #4]
+ 800363e:	4613      	mov	r3, r2
+ 8003640:	011b      	lsls	r3, r3, #4
+ 8003642:	1a9b      	subs	r3, r3, r2
+ 8003644:	009b      	lsls	r3, r3, #2
+ 8003646:	440b      	add	r3, r1
+ 8003648:	334d      	adds	r3, #77	@ 0x4d
+ 800364a:	781b      	ldrb	r3, [r3, #0]
+ 800364c:	2b03      	cmp	r3, #3
+ 800364e:	d120      	bne.n	8003692 <HCD_HC_OUT_IRQHandler+0x75c>
+    {
+      hhcd->hc[chnum].state = HC_HALTED;
+ 8003650:	78fa      	ldrb	r2, [r7, #3]
+ 8003652:	6879      	ldr	r1, [r7, #4]
+ 8003654:	4613      	mov	r3, r2
+ 8003656:	011b      	lsls	r3, r3, #4
+ 8003658:	1a9b      	subs	r3, r3, r2
+ 800365a:	009b      	lsls	r3, r3, #2
+ 800365c:	440b      	add	r3, r1
+ 800365e:	334d      	adds	r3, #77	@ 0x4d
+ 8003660:	2202      	movs	r2, #2
+ 8003662:	701a      	strb	r2, [r3, #0]
+
+      if (hhcd->hc[chnum].do_csplit == 1U)
+ 8003664:	78fa      	ldrb	r2, [r7, #3]
+ 8003666:	6879      	ldr	r1, [r7, #4]
+ 8003668:	4613      	mov	r3, r2
+ 800366a:	011b      	lsls	r3, r3, #4
+ 800366c:	1a9b      	subs	r3, r3, r2
+ 800366e:	009b      	lsls	r3, r3, #2
+ 8003670:	440b      	add	r3, r1
+ 8003672:	331b      	adds	r3, #27
+ 8003674:	781b      	ldrb	r3, [r3, #0]
+ 8003676:	2b01      	cmp	r3, #1
+ 8003678:	f040 8107 	bne.w	800388a <HCD_HC_OUT_IRQHandler+0x954>
+      {
+        hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ 800367c:	78fa      	ldrb	r2, [r7, #3]
+ 800367e:	6879      	ldr	r1, [r7, #4]
+ 8003680:	4613      	mov	r3, r2
+ 8003682:	011b      	lsls	r3, r3, #4
+ 8003684:	1a9b      	subs	r3, r3, r2
+ 8003686:	009b      	lsls	r3, r3, #2
+ 8003688:	440b      	add	r3, r1
+ 800368a:	334c      	adds	r3, #76	@ 0x4c
+ 800368c:	2202      	movs	r2, #2
+ 800368e:	701a      	strb	r2, [r3, #0]
+ 8003690:	e0fb      	b.n	800388a <HCD_HC_OUT_IRQHandler+0x954>
+      }
+    }
+    else if (hhcd->hc[chnum].state == HC_NAK)
+ 8003692:	78fa      	ldrb	r2, [r7, #3]
+ 8003694:	6879      	ldr	r1, [r7, #4]
+ 8003696:	4613      	mov	r3, r2
+ 8003698:	011b      	lsls	r3, r3, #4
+ 800369a:	1a9b      	subs	r3, r3, r2
+ 800369c:	009b      	lsls	r3, r3, #2
+ 800369e:	440b      	add	r3, r1
+ 80036a0:	334d      	adds	r3, #77	@ 0x4d
+ 80036a2:	781b      	ldrb	r3, [r3, #0]
+ 80036a4:	2b04      	cmp	r3, #4
+ 80036a6:	d13a      	bne.n	800371e <HCD_HC_OUT_IRQHandler+0x7e8>
+    {
+      hhcd->hc[chnum].state = HC_HALTED;
+ 80036a8:	78fa      	ldrb	r2, [r7, #3]
+ 80036aa:	6879      	ldr	r1, [r7, #4]
+ 80036ac:	4613      	mov	r3, r2
+ 80036ae:	011b      	lsls	r3, r3, #4
+ 80036b0:	1a9b      	subs	r3, r3, r2
+ 80036b2:	009b      	lsls	r3, r3, #2
+ 80036b4:	440b      	add	r3, r1
+ 80036b6:	334d      	adds	r3, #77	@ 0x4d
+ 80036b8:	2202      	movs	r2, #2
+ 80036ba:	701a      	strb	r2, [r3, #0]
+      hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ 80036bc:	78fa      	ldrb	r2, [r7, #3]
+ 80036be:	6879      	ldr	r1, [r7, #4]
+ 80036c0:	4613      	mov	r3, r2
+ 80036c2:	011b      	lsls	r3, r3, #4
+ 80036c4:	1a9b      	subs	r3, r3, r2
+ 80036c6:	009b      	lsls	r3, r3, #2
+ 80036c8:	440b      	add	r3, r1
+ 80036ca:	334c      	adds	r3, #76	@ 0x4c
+ 80036cc:	2202      	movs	r2, #2
+ 80036ce:	701a      	strb	r2, [r3, #0]
+
+      if (hhcd->hc[chnum].do_csplit == 1U)
+ 80036d0:	78fa      	ldrb	r2, [r7, #3]
+ 80036d2:	6879      	ldr	r1, [r7, #4]
+ 80036d4:	4613      	mov	r3, r2
+ 80036d6:	011b      	lsls	r3, r3, #4
+ 80036d8:	1a9b      	subs	r3, r3, r2
+ 80036da:	009b      	lsls	r3, r3, #2
+ 80036dc:	440b      	add	r3, r1
+ 80036de:	331b      	adds	r3, #27
+ 80036e0:	781b      	ldrb	r3, [r3, #0]
+ 80036e2:	2b01      	cmp	r3, #1
+ 80036e4:	f040 80d1 	bne.w	800388a <HCD_HC_OUT_IRQHandler+0x954>
+      {
+        hhcd->hc[chnum].do_csplit = 0U;
+ 80036e8:	78fa      	ldrb	r2, [r7, #3]
+ 80036ea:	6879      	ldr	r1, [r7, #4]
+ 80036ec:	4613      	mov	r3, r2
+ 80036ee:	011b      	lsls	r3, r3, #4
+ 80036f0:	1a9b      	subs	r3, r3, r2
+ 80036f2:	009b      	lsls	r3, r3, #2
+ 80036f4:	440b      	add	r3, r1
+ 80036f6:	331b      	adds	r3, #27
+ 80036f8:	2200      	movs	r2, #0
+ 80036fa:	701a      	strb	r2, [r3, #0]
+        __HAL_HCD_CLEAR_HC_CSPLT(chnum);
+ 80036fc:	78fb      	ldrb	r3, [r7, #3]
+ 80036fe:	015a      	lsls	r2, r3, #5
+ 8003700:	693b      	ldr	r3, [r7, #16]
+ 8003702:	4413      	add	r3, r2
+ 8003704:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8003708:	685b      	ldr	r3, [r3, #4]
+ 800370a:	78fa      	ldrb	r2, [r7, #3]
+ 800370c:	0151      	lsls	r1, r2, #5
+ 800370e:	693a      	ldr	r2, [r7, #16]
+ 8003710:	440a      	add	r2, r1
+ 8003712:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 8003716:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
+ 800371a:	6053      	str	r3, [r2, #4]
+ 800371c:	e0b5      	b.n	800388a <HCD_HC_OUT_IRQHandler+0x954>
+      }
+    }
+    else if (hhcd->hc[chnum].state == HC_NYET)
+ 800371e:	78fa      	ldrb	r2, [r7, #3]
+ 8003720:	6879      	ldr	r1, [r7, #4]
+ 8003722:	4613      	mov	r3, r2
+ 8003724:	011b      	lsls	r3, r3, #4
+ 8003726:	1a9b      	subs	r3, r3, r2
+ 8003728:	009b      	lsls	r3, r3, #2
+ 800372a:	440b      	add	r3, r1
+ 800372c:	334d      	adds	r3, #77	@ 0x4d
+ 800372e:	781b      	ldrb	r3, [r3, #0]
+ 8003730:	2b05      	cmp	r3, #5
+ 8003732:	d114      	bne.n	800375e <HCD_HC_OUT_IRQHandler+0x828>
+    {
+      hhcd->hc[chnum].state = HC_HALTED;
+ 8003734:	78fa      	ldrb	r2, [r7, #3]
+ 8003736:	6879      	ldr	r1, [r7, #4]
+ 8003738:	4613      	mov	r3, r2
+ 800373a:	011b      	lsls	r3, r3, #4
+ 800373c:	1a9b      	subs	r3, r3, r2
+ 800373e:	009b      	lsls	r3, r3, #2
+ 8003740:	440b      	add	r3, r1
+ 8003742:	334d      	adds	r3, #77	@ 0x4d
+ 8003744:	2202      	movs	r2, #2
+ 8003746:	701a      	strb	r2, [r3, #0]
+      hhcd->hc[chnum].urb_state  = URB_NOTREADY;
+ 8003748:	78fa      	ldrb	r2, [r7, #3]
+ 800374a:	6879      	ldr	r1, [r7, #4]
+ 800374c:	4613      	mov	r3, r2
+ 800374e:	011b      	lsls	r3, r3, #4
+ 8003750:	1a9b      	subs	r3, r3, r2
+ 8003752:	009b      	lsls	r3, r3, #2
+ 8003754:	440b      	add	r3, r1
+ 8003756:	334c      	adds	r3, #76	@ 0x4c
+ 8003758:	2202      	movs	r2, #2
+ 800375a:	701a      	strb	r2, [r3, #0]
+ 800375c:	e095      	b.n	800388a <HCD_HC_OUT_IRQHandler+0x954>
+    }
+    else if (hhcd->hc[chnum].state == HC_STALL)
+ 800375e:	78fa      	ldrb	r2, [r7, #3]
+ 8003760:	6879      	ldr	r1, [r7, #4]
+ 8003762:	4613      	mov	r3, r2
+ 8003764:	011b      	lsls	r3, r3, #4
+ 8003766:	1a9b      	subs	r3, r3, r2
+ 8003768:	009b      	lsls	r3, r3, #2
+ 800376a:	440b      	add	r3, r1
+ 800376c:	334d      	adds	r3, #77	@ 0x4d
+ 800376e:	781b      	ldrb	r3, [r3, #0]
+ 8003770:	2b06      	cmp	r3, #6
+ 8003772:	d114      	bne.n	800379e <HCD_HC_OUT_IRQHandler+0x868>
+    {
+      hhcd->hc[chnum].state = HC_HALTED;
+ 8003774:	78fa      	ldrb	r2, [r7, #3]
+ 8003776:	6879      	ldr	r1, [r7, #4]
+ 8003778:	4613      	mov	r3, r2
+ 800377a:	011b      	lsls	r3, r3, #4
+ 800377c:	1a9b      	subs	r3, r3, r2
+ 800377e:	009b      	lsls	r3, r3, #2
+ 8003780:	440b      	add	r3, r1
+ 8003782:	334d      	adds	r3, #77	@ 0x4d
+ 8003784:	2202      	movs	r2, #2
+ 8003786:	701a      	strb	r2, [r3, #0]
+      hhcd->hc[chnum].urb_state  = URB_STALL;
+ 8003788:	78fa      	ldrb	r2, [r7, #3]
+ 800378a:	6879      	ldr	r1, [r7, #4]
+ 800378c:	4613      	mov	r3, r2
+ 800378e:	011b      	lsls	r3, r3, #4
+ 8003790:	1a9b      	subs	r3, r3, r2
+ 8003792:	009b      	lsls	r3, r3, #2
+ 8003794:	440b      	add	r3, r1
+ 8003796:	334c      	adds	r3, #76	@ 0x4c
+ 8003798:	2205      	movs	r2, #5
+ 800379a:	701a      	strb	r2, [r3, #0]
+ 800379c:	e075      	b.n	800388a <HCD_HC_OUT_IRQHandler+0x954>
+    }
+    else if ((hhcd->hc[chnum].state == HC_XACTERR) ||
+ 800379e:	78fa      	ldrb	r2, [r7, #3]
+ 80037a0:	6879      	ldr	r1, [r7, #4]
+ 80037a2:	4613      	mov	r3, r2
+ 80037a4:	011b      	lsls	r3, r3, #4
+ 80037a6:	1a9b      	subs	r3, r3, r2
+ 80037a8:	009b      	lsls	r3, r3, #2
+ 80037aa:	440b      	add	r3, r1
+ 80037ac:	334d      	adds	r3, #77	@ 0x4d
+ 80037ae:	781b      	ldrb	r3, [r3, #0]
+ 80037b0:	2b07      	cmp	r3, #7
+ 80037b2:	d00a      	beq.n	80037ca <HCD_HC_OUT_IRQHandler+0x894>
+             (hhcd->hc[chnum].state == HC_DATATGLERR))
+ 80037b4:	78fa      	ldrb	r2, [r7, #3]
+ 80037b6:	6879      	ldr	r1, [r7, #4]
+ 80037b8:	4613      	mov	r3, r2
+ 80037ba:	011b      	lsls	r3, r3, #4
+ 80037bc:	1a9b      	subs	r3, r3, r2
+ 80037be:	009b      	lsls	r3, r3, #2
+ 80037c0:	440b      	add	r3, r1
+ 80037c2:	334d      	adds	r3, #77	@ 0x4d
+ 80037c4:	781b      	ldrb	r3, [r3, #0]
+    else if ((hhcd->hc[chnum].state == HC_XACTERR) ||
+ 80037c6:	2b09      	cmp	r3, #9
+ 80037c8:	d170      	bne.n	80038ac <HCD_HC_OUT_IRQHandler+0x976>
+    {
+      hhcd->hc[chnum].state = HC_HALTED;
+ 80037ca:	78fa      	ldrb	r2, [r7, #3]
+ 80037cc:	6879      	ldr	r1, [r7, #4]
+ 80037ce:	4613      	mov	r3, r2
+ 80037d0:	011b      	lsls	r3, r3, #4
+ 80037d2:	1a9b      	subs	r3, r3, r2
+ 80037d4:	009b      	lsls	r3, r3, #2
+ 80037d6:	440b      	add	r3, r1
+ 80037d8:	334d      	adds	r3, #77	@ 0x4d
+ 80037da:	2202      	movs	r2, #2
+ 80037dc:	701a      	strb	r2, [r3, #0]
+      hhcd->hc[chnum].ErrCnt++;
+ 80037de:	78fa      	ldrb	r2, [r7, #3]
+ 80037e0:	6879      	ldr	r1, [r7, #4]
+ 80037e2:	4613      	mov	r3, r2
+ 80037e4:	011b      	lsls	r3, r3, #4
+ 80037e6:	1a9b      	subs	r3, r3, r2
+ 80037e8:	009b      	lsls	r3, r3, #2
+ 80037ea:	440b      	add	r3, r1
+ 80037ec:	3344      	adds	r3, #68	@ 0x44
+ 80037ee:	681b      	ldr	r3, [r3, #0]
+ 80037f0:	1c59      	adds	r1, r3, #1
+ 80037f2:	6878      	ldr	r0, [r7, #4]
+ 80037f4:	4613      	mov	r3, r2
+ 80037f6:	011b      	lsls	r3, r3, #4
+ 80037f8:	1a9b      	subs	r3, r3, r2
+ 80037fa:	009b      	lsls	r3, r3, #2
+ 80037fc:	4403      	add	r3, r0
+ 80037fe:	3344      	adds	r3, #68	@ 0x44
+ 8003800:	6019      	str	r1, [r3, #0]
+      if (hhcd->hc[chnum].ErrCnt > 2U)
+ 8003802:	78fa      	ldrb	r2, [r7, #3]
+ 8003804:	6879      	ldr	r1, [r7, #4]
+ 8003806:	4613      	mov	r3, r2
+ 8003808:	011b      	lsls	r3, r3, #4
+ 800380a:	1a9b      	subs	r3, r3, r2
+ 800380c:	009b      	lsls	r3, r3, #2
+ 800380e:	440b      	add	r3, r1
+ 8003810:	3344      	adds	r3, #68	@ 0x44
+ 8003812:	681b      	ldr	r3, [r3, #0]
+ 8003814:	2b02      	cmp	r3, #2
+ 8003816:	d914      	bls.n	8003842 <HCD_HC_OUT_IRQHandler+0x90c>
+      {
+        hhcd->hc[chnum].ErrCnt = 0U;
+ 8003818:	78fa      	ldrb	r2, [r7, #3]
+ 800381a:	6879      	ldr	r1, [r7, #4]
+ 800381c:	4613      	mov	r3, r2
+ 800381e:	011b      	lsls	r3, r3, #4
+ 8003820:	1a9b      	subs	r3, r3, r2
+ 8003822:	009b      	lsls	r3, r3, #2
+ 8003824:	440b      	add	r3, r1
+ 8003826:	3344      	adds	r3, #68	@ 0x44
+ 8003828:	2200      	movs	r2, #0
+ 800382a:	601a      	str	r2, [r3, #0]
+        hhcd->hc[chnum].urb_state = URB_ERROR;
+ 800382c:	78fa      	ldrb	r2, [r7, #3]
+ 800382e:	6879      	ldr	r1, [r7, #4]
+ 8003830:	4613      	mov	r3, r2
+ 8003832:	011b      	lsls	r3, r3, #4
+ 8003834:	1a9b      	subs	r3, r3, r2
+ 8003836:	009b      	lsls	r3, r3, #2
+ 8003838:	440b      	add	r3, r1
+ 800383a:	334c      	adds	r3, #76	@ 0x4c
+ 800383c:	2204      	movs	r2, #4
+ 800383e:	701a      	strb	r2, [r3, #0]
+      if (hhcd->hc[chnum].ErrCnt > 2U)
+ 8003840:	e022      	b.n	8003888 <HCD_HC_OUT_IRQHandler+0x952>
+      }
+      else
+      {
+        hhcd->hc[chnum].urb_state = URB_NOTREADY;
+ 8003842:	78fa      	ldrb	r2, [r7, #3]
+ 8003844:	6879      	ldr	r1, [r7, #4]
+ 8003846:	4613      	mov	r3, r2
+ 8003848:	011b      	lsls	r3, r3, #4
+ 800384a:	1a9b      	subs	r3, r3, r2
+ 800384c:	009b      	lsls	r3, r3, #2
+ 800384e:	440b      	add	r3, r1
+ 8003850:	334c      	adds	r3, #76	@ 0x4c
+ 8003852:	2202      	movs	r2, #2
+ 8003854:	701a      	strb	r2, [r3, #0]
+
+        /* re-activate the channel  */
+        tmpreg = USBx_HC(chnum)->HCCHAR;
+ 8003856:	78fb      	ldrb	r3, [r7, #3]
+ 8003858:	015a      	lsls	r2, r3, #5
+ 800385a:	693b      	ldr	r3, [r7, #16]
+ 800385c:	4413      	add	r3, r2
+ 800385e:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8003862:	681b      	ldr	r3, [r3, #0]
+ 8003864:	60fb      	str	r3, [r7, #12]
+        tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
+ 8003866:	68fb      	ldr	r3, [r7, #12]
+ 8003868:	f023 4380 	bic.w	r3, r3, #1073741824	@ 0x40000000
+ 800386c:	60fb      	str	r3, [r7, #12]
+        tmpreg |= USB_OTG_HCCHAR_CHENA;
+ 800386e:	68fb      	ldr	r3, [r7, #12]
+ 8003870:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
+ 8003874:	60fb      	str	r3, [r7, #12]
+        USBx_HC(chnum)->HCCHAR = tmpreg;
+ 8003876:	78fb      	ldrb	r3, [r7, #3]
+ 8003878:	015a      	lsls	r2, r3, #5
+ 800387a:	693b      	ldr	r3, [r7, #16]
+ 800387c:	4413      	add	r3, r2
+ 800387e:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8003882:	461a      	mov	r2, r3
+ 8003884:	68fb      	ldr	r3, [r7, #12]
+ 8003886:	6013      	str	r3, [r2, #0]
+      if (hhcd->hc[chnum].ErrCnt > 2U)
+ 8003888:	bf00      	nop
+    }
+
+#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
+    hhcd->HC_NotifyURBChangeCallback(hhcd, chnum, hhcd->hc[chnum].urb_state);
+#else
+    HAL_HCD_HC_NotifyURBChange_Callback(hhcd, chnum, hhcd->hc[chnum].urb_state);
+ 800388a:	78fa      	ldrb	r2, [r7, #3]
+ 800388c:	6879      	ldr	r1, [r7, #4]
+ 800388e:	4613      	mov	r3, r2
+ 8003890:	011b      	lsls	r3, r3, #4
+ 8003892:	1a9b      	subs	r3, r3, r2
+ 8003894:	009b      	lsls	r3, r3, #2
+ 8003896:	440b      	add	r3, r1
+ 8003898:	334c      	adds	r3, #76	@ 0x4c
+ 800389a:	781a      	ldrb	r2, [r3, #0]
+ 800389c:	78fb      	ldrb	r3, [r7, #3]
+ 800389e:	4619      	mov	r1, r3
+ 80038a0:	6878      	ldr	r0, [r7, #4]
+ 80038a2:	f004 fa67 	bl	8007d74 <HAL_HCD_HC_NotifyURBChange_Callback>
+ 80038a6:	e002      	b.n	80038ae <HCD_HC_OUT_IRQHandler+0x978>
+#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
+  }
+  else
+  {
+    return;
+ 80038a8:	bf00      	nop
+ 80038aa:	e000      	b.n	80038ae <HCD_HC_OUT_IRQHandler+0x978>
+      return;
+ 80038ac:	bf00      	nop
+  }
+}
+ 80038ae:	3718      	adds	r7, #24
+ 80038b0:	46bd      	mov	sp, r7
+ 80038b2:	bd80      	pop	{r7, pc}
+
+080038b4 <HCD_RXQLVL_IRQHandler>:
+  * @brief  Handle Rx Queue Level interrupt requests.
+  * @param  hhcd HCD handle
+  * @retval none
+  */
+static void HCD_RXQLVL_IRQHandler(HCD_HandleTypeDef *hhcd)
+{
+ 80038b4:	b580      	push	{r7, lr}
+ 80038b6:	b08a      	sub	sp, #40	@ 0x28
+ 80038b8:	af00      	add	r7, sp, #0
+ 80038ba:	6078      	str	r0, [r7, #4]
+  const USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
+ 80038bc:	687b      	ldr	r3, [r7, #4]
+ 80038be:	681b      	ldr	r3, [r3, #0]
+ 80038c0:	627b      	str	r3, [r7, #36]	@ 0x24
+  uint32_t USBx_BASE = (uint32_t)USBx;
+ 80038c2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+ 80038c4:	623b      	str	r3, [r7, #32]
+  uint32_t GrxstspReg;
+  uint32_t xferSizePktCnt;
+  uint32_t tmpreg;
+  uint32_t chnum;
+
+  GrxstspReg = hhcd->Instance->GRXSTSP;
+ 80038c6:	687b      	ldr	r3, [r7, #4]
+ 80038c8:	681b      	ldr	r3, [r3, #0]
+ 80038ca:	6a1b      	ldr	r3, [r3, #32]
+ 80038cc:	61fb      	str	r3, [r7, #28]
+  chnum = GrxstspReg & USB_OTG_GRXSTSP_EPNUM;
+ 80038ce:	69fb      	ldr	r3, [r7, #28]
+ 80038d0:	f003 030f 	and.w	r3, r3, #15
+ 80038d4:	61bb      	str	r3, [r7, #24]
+  pktsts = (GrxstspReg & USB_OTG_GRXSTSP_PKTSTS) >> 17;
+ 80038d6:	69fb      	ldr	r3, [r7, #28]
+ 80038d8:	0c5b      	lsrs	r3, r3, #17
+ 80038da:	f003 030f 	and.w	r3, r3, #15
+ 80038de:	617b      	str	r3, [r7, #20]
+  pktcnt = (GrxstspReg & USB_OTG_GRXSTSP_BCNT) >> 4;
+ 80038e0:	69fb      	ldr	r3, [r7, #28]
+ 80038e2:	091b      	lsrs	r3, r3, #4
+ 80038e4:	f3c3 030a 	ubfx	r3, r3, #0, #11
+ 80038e8:	613b      	str	r3, [r7, #16]
+
+  switch (pktsts)
+ 80038ea:	697b      	ldr	r3, [r7, #20]
+ 80038ec:	2b02      	cmp	r3, #2
+ 80038ee:	d004      	beq.n	80038fa <HCD_RXQLVL_IRQHandler+0x46>
+ 80038f0:	697b      	ldr	r3, [r7, #20]
+ 80038f2:	2b05      	cmp	r3, #5
+ 80038f4:	f000 80b6 	beq.w	8003a64 <HCD_RXQLVL_IRQHandler+0x1b0>
+      break;
+
+    case GRXSTS_PKTSTS_IN_XFER_COMP:
+    case GRXSTS_PKTSTS_CH_HALTED:
+    default:
+      break;
+ 80038f8:	e0b7      	b.n	8003a6a <HCD_RXQLVL_IRQHandler+0x1b6>
+      if ((pktcnt > 0U) && (hhcd->hc[chnum].xfer_buff != (void *)0))
+ 80038fa:	693b      	ldr	r3, [r7, #16]
+ 80038fc:	2b00      	cmp	r3, #0
+ 80038fe:	f000 80b3 	beq.w	8003a68 <HCD_RXQLVL_IRQHandler+0x1b4>
+ 8003902:	6879      	ldr	r1, [r7, #4]
+ 8003904:	69ba      	ldr	r2, [r7, #24]
+ 8003906:	4613      	mov	r3, r2
+ 8003908:	011b      	lsls	r3, r3, #4
+ 800390a:	1a9b      	subs	r3, r3, r2
+ 800390c:	009b      	lsls	r3, r3, #2
+ 800390e:	440b      	add	r3, r1
+ 8003910:	332c      	adds	r3, #44	@ 0x2c
+ 8003912:	681b      	ldr	r3, [r3, #0]
+ 8003914:	2b00      	cmp	r3, #0
+ 8003916:	f000 80a7 	beq.w	8003a68 <HCD_RXQLVL_IRQHandler+0x1b4>
+        if ((hhcd->hc[chnum].xfer_count + pktcnt) <= hhcd->hc[chnum].xfer_len)
+ 800391a:	6879      	ldr	r1, [r7, #4]
+ 800391c:	69ba      	ldr	r2, [r7, #24]
+ 800391e:	4613      	mov	r3, r2
+ 8003920:	011b      	lsls	r3, r3, #4
+ 8003922:	1a9b      	subs	r3, r3, r2
+ 8003924:	009b      	lsls	r3, r3, #2
+ 8003926:	440b      	add	r3, r1
+ 8003928:	3338      	adds	r3, #56	@ 0x38
+ 800392a:	681a      	ldr	r2, [r3, #0]
+ 800392c:	693b      	ldr	r3, [r7, #16]
+ 800392e:	18d1      	adds	r1, r2, r3
+ 8003930:	6878      	ldr	r0, [r7, #4]
+ 8003932:	69ba      	ldr	r2, [r7, #24]
+ 8003934:	4613      	mov	r3, r2
+ 8003936:	011b      	lsls	r3, r3, #4
+ 8003938:	1a9b      	subs	r3, r3, r2
+ 800393a:	009b      	lsls	r3, r3, #2
+ 800393c:	4403      	add	r3, r0
+ 800393e:	3334      	adds	r3, #52	@ 0x34
+ 8003940:	681b      	ldr	r3, [r3, #0]
+ 8003942:	4299      	cmp	r1, r3
+ 8003944:	f200 8083 	bhi.w	8003a4e <HCD_RXQLVL_IRQHandler+0x19a>
+          (void)USB_ReadPacket(hhcd->Instance,
+ 8003948:	687b      	ldr	r3, [r7, #4]
+ 800394a:	6818      	ldr	r0, [r3, #0]
+ 800394c:	6879      	ldr	r1, [r7, #4]
+ 800394e:	69ba      	ldr	r2, [r7, #24]
+ 8003950:	4613      	mov	r3, r2
+ 8003952:	011b      	lsls	r3, r3, #4
+ 8003954:	1a9b      	subs	r3, r3, r2
+ 8003956:	009b      	lsls	r3, r3, #2
+ 8003958:	440b      	add	r3, r1
+ 800395a:	332c      	adds	r3, #44	@ 0x2c
+ 800395c:	681b      	ldr	r3, [r3, #0]
+ 800395e:	693a      	ldr	r2, [r7, #16]
+ 8003960:	b292      	uxth	r2, r2
+ 8003962:	4619      	mov	r1, r3
+ 8003964:	f002 fd8a 	bl	800647c <USB_ReadPacket>
+          hhcd->hc[chnum].xfer_buff += pktcnt;
+ 8003968:	6879      	ldr	r1, [r7, #4]
+ 800396a:	69ba      	ldr	r2, [r7, #24]
+ 800396c:	4613      	mov	r3, r2
+ 800396e:	011b      	lsls	r3, r3, #4
+ 8003970:	1a9b      	subs	r3, r3, r2
+ 8003972:	009b      	lsls	r3, r3, #2
+ 8003974:	440b      	add	r3, r1
+ 8003976:	332c      	adds	r3, #44	@ 0x2c
+ 8003978:	681a      	ldr	r2, [r3, #0]
+ 800397a:	693b      	ldr	r3, [r7, #16]
+ 800397c:	18d1      	adds	r1, r2, r3
+ 800397e:	6878      	ldr	r0, [r7, #4]
+ 8003980:	69ba      	ldr	r2, [r7, #24]
+ 8003982:	4613      	mov	r3, r2
+ 8003984:	011b      	lsls	r3, r3, #4
+ 8003986:	1a9b      	subs	r3, r3, r2
+ 8003988:	009b      	lsls	r3, r3, #2
+ 800398a:	4403      	add	r3, r0
+ 800398c:	332c      	adds	r3, #44	@ 0x2c
+ 800398e:	6019      	str	r1, [r3, #0]
+          hhcd->hc[chnum].xfer_count += pktcnt;
+ 8003990:	6879      	ldr	r1, [r7, #4]
+ 8003992:	69ba      	ldr	r2, [r7, #24]
+ 8003994:	4613      	mov	r3, r2
+ 8003996:	011b      	lsls	r3, r3, #4
+ 8003998:	1a9b      	subs	r3, r3, r2
+ 800399a:	009b      	lsls	r3, r3, #2
+ 800399c:	440b      	add	r3, r1
+ 800399e:	3338      	adds	r3, #56	@ 0x38
+ 80039a0:	681a      	ldr	r2, [r3, #0]
+ 80039a2:	693b      	ldr	r3, [r7, #16]
+ 80039a4:	18d1      	adds	r1, r2, r3
+ 80039a6:	6878      	ldr	r0, [r7, #4]
+ 80039a8:	69ba      	ldr	r2, [r7, #24]
+ 80039aa:	4613      	mov	r3, r2
+ 80039ac:	011b      	lsls	r3, r3, #4
+ 80039ae:	1a9b      	subs	r3, r3, r2
+ 80039b0:	009b      	lsls	r3, r3, #2
+ 80039b2:	4403      	add	r3, r0
+ 80039b4:	3338      	adds	r3, #56	@ 0x38
+ 80039b6:	6019      	str	r1, [r3, #0]
+          xferSizePktCnt = (USBx_HC(chnum)->HCTSIZ & USB_OTG_HCTSIZ_PKTCNT) >> 19;
+ 80039b8:	69bb      	ldr	r3, [r7, #24]
+ 80039ba:	015a      	lsls	r2, r3, #5
+ 80039bc:	6a3b      	ldr	r3, [r7, #32]
+ 80039be:	4413      	add	r3, r2
+ 80039c0:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80039c4:	691b      	ldr	r3, [r3, #16]
+ 80039c6:	0cdb      	lsrs	r3, r3, #19
+ 80039c8:	f3c3 0309 	ubfx	r3, r3, #0, #10
+ 80039cc:	60fb      	str	r3, [r7, #12]
+          if ((hhcd->hc[chnum].max_packet == pktcnt) && (xferSizePktCnt > 0U))
+ 80039ce:	6879      	ldr	r1, [r7, #4]
+ 80039d0:	69ba      	ldr	r2, [r7, #24]
+ 80039d2:	4613      	mov	r3, r2
+ 80039d4:	011b      	lsls	r3, r3, #4
+ 80039d6:	1a9b      	subs	r3, r3, r2
+ 80039d8:	009b      	lsls	r3, r3, #2
+ 80039da:	440b      	add	r3, r1
+ 80039dc:	3328      	adds	r3, #40	@ 0x28
+ 80039de:	881b      	ldrh	r3, [r3, #0]
+ 80039e0:	461a      	mov	r2, r3
+ 80039e2:	693b      	ldr	r3, [r7, #16]
+ 80039e4:	4293      	cmp	r3, r2
+ 80039e6:	d13f      	bne.n	8003a68 <HCD_RXQLVL_IRQHandler+0x1b4>
+ 80039e8:	68fb      	ldr	r3, [r7, #12]
+ 80039ea:	2b00      	cmp	r3, #0
+ 80039ec:	d03c      	beq.n	8003a68 <HCD_RXQLVL_IRQHandler+0x1b4>
+            tmpreg = USBx_HC(chnum)->HCCHAR;
+ 80039ee:	69bb      	ldr	r3, [r7, #24]
+ 80039f0:	015a      	lsls	r2, r3, #5
+ 80039f2:	6a3b      	ldr	r3, [r7, #32]
+ 80039f4:	4413      	add	r3, r2
+ 80039f6:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80039fa:	681b      	ldr	r3, [r3, #0]
+ 80039fc:	60bb      	str	r3, [r7, #8]
+            tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
+ 80039fe:	68bb      	ldr	r3, [r7, #8]
+ 8003a00:	f023 4380 	bic.w	r3, r3, #1073741824	@ 0x40000000
+ 8003a04:	60bb      	str	r3, [r7, #8]
+            tmpreg |= USB_OTG_HCCHAR_CHENA;
+ 8003a06:	68bb      	ldr	r3, [r7, #8]
+ 8003a08:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
+ 8003a0c:	60bb      	str	r3, [r7, #8]
+            USBx_HC(chnum)->HCCHAR = tmpreg;
+ 8003a0e:	69bb      	ldr	r3, [r7, #24]
+ 8003a10:	015a      	lsls	r2, r3, #5
+ 8003a12:	6a3b      	ldr	r3, [r7, #32]
+ 8003a14:	4413      	add	r3, r2
+ 8003a16:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8003a1a:	461a      	mov	r2, r3
+ 8003a1c:	68bb      	ldr	r3, [r7, #8]
+ 8003a1e:	6013      	str	r3, [r2, #0]
+            hhcd->hc[chnum].toggle_in ^= 1U;
+ 8003a20:	6879      	ldr	r1, [r7, #4]
+ 8003a22:	69ba      	ldr	r2, [r7, #24]
+ 8003a24:	4613      	mov	r3, r2
+ 8003a26:	011b      	lsls	r3, r3, #4
+ 8003a28:	1a9b      	subs	r3, r3, r2
+ 8003a2a:	009b      	lsls	r3, r3, #2
+ 8003a2c:	440b      	add	r3, r1
+ 8003a2e:	333c      	adds	r3, #60	@ 0x3c
+ 8003a30:	781b      	ldrb	r3, [r3, #0]
+ 8003a32:	f083 0301 	eor.w	r3, r3, #1
+ 8003a36:	b2d8      	uxtb	r0, r3
+ 8003a38:	6879      	ldr	r1, [r7, #4]
+ 8003a3a:	69ba      	ldr	r2, [r7, #24]
+ 8003a3c:	4613      	mov	r3, r2
+ 8003a3e:	011b      	lsls	r3, r3, #4
+ 8003a40:	1a9b      	subs	r3, r3, r2
+ 8003a42:	009b      	lsls	r3, r3, #2
+ 8003a44:	440b      	add	r3, r1
+ 8003a46:	333c      	adds	r3, #60	@ 0x3c
+ 8003a48:	4602      	mov	r2, r0
+ 8003a4a:	701a      	strb	r2, [r3, #0]
+      break;
+ 8003a4c:	e00c      	b.n	8003a68 <HCD_RXQLVL_IRQHandler+0x1b4>
+          hhcd->hc[chnum].urb_state = URB_ERROR;
+ 8003a4e:	6879      	ldr	r1, [r7, #4]
+ 8003a50:	69ba      	ldr	r2, [r7, #24]
+ 8003a52:	4613      	mov	r3, r2
+ 8003a54:	011b      	lsls	r3, r3, #4
+ 8003a56:	1a9b      	subs	r3, r3, r2
+ 8003a58:	009b      	lsls	r3, r3, #2
+ 8003a5a:	440b      	add	r3, r1
+ 8003a5c:	334c      	adds	r3, #76	@ 0x4c
+ 8003a5e:	2204      	movs	r2, #4
+ 8003a60:	701a      	strb	r2, [r3, #0]
+      break;
+ 8003a62:	e001      	b.n	8003a68 <HCD_RXQLVL_IRQHandler+0x1b4>
+      break;
+ 8003a64:	bf00      	nop
+ 8003a66:	e000      	b.n	8003a6a <HCD_RXQLVL_IRQHandler+0x1b6>
+      break;
+ 8003a68:	bf00      	nop
+  }
+}
+ 8003a6a:	bf00      	nop
+ 8003a6c:	3728      	adds	r7, #40	@ 0x28
+ 8003a6e:	46bd      	mov	sp, r7
+ 8003a70:	bd80      	pop	{r7, pc}
+
+08003a72 <HCD_Port_IRQHandler>:
+  * @brief  Handle Host Port interrupt requests.
+  * @param  hhcd HCD handle
+  * @retval None
+  */
+static void HCD_Port_IRQHandler(HCD_HandleTypeDef *hhcd)
+{
+ 8003a72:	b580      	push	{r7, lr}
+ 8003a74:	b086      	sub	sp, #24
+ 8003a76:	af00      	add	r7, sp, #0
+ 8003a78:	6078      	str	r0, [r7, #4]
+  const USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
+ 8003a7a:	687b      	ldr	r3, [r7, #4]
+ 8003a7c:	681b      	ldr	r3, [r3, #0]
+ 8003a7e:	617b      	str	r3, [r7, #20]
+  uint32_t USBx_BASE = (uint32_t)USBx;
+ 8003a80:	697b      	ldr	r3, [r7, #20]
+ 8003a82:	613b      	str	r3, [r7, #16]
+  __IO uint32_t hprt0;
+  __IO uint32_t hprt0_dup;
+
+  /* Handle Host Port Interrupts */
+  hprt0 = USBx_HPRT0;
+ 8003a84:	693b      	ldr	r3, [r7, #16]
+ 8003a86:	f503 6388 	add.w	r3, r3, #1088	@ 0x440
+ 8003a8a:	681b      	ldr	r3, [r3, #0]
+ 8003a8c:	60fb      	str	r3, [r7, #12]
+  hprt0_dup = USBx_HPRT0;
+ 8003a8e:	693b      	ldr	r3, [r7, #16]
+ 8003a90:	f503 6388 	add.w	r3, r3, #1088	@ 0x440
+ 8003a94:	681b      	ldr	r3, [r3, #0]
+ 8003a96:	60bb      	str	r3, [r7, #8]
+
+  hprt0_dup &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET | \
+ 8003a98:	68bb      	ldr	r3, [r7, #8]
+ 8003a9a:	f023 032e 	bic.w	r3, r3, #46	@ 0x2e
+ 8003a9e:	60bb      	str	r3, [r7, #8]
+                 USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG);
+
+  /* Check whether Port Connect detected */
+  if ((hprt0 & USB_OTG_HPRT_PCDET) == USB_OTG_HPRT_PCDET)
+ 8003aa0:	68fb      	ldr	r3, [r7, #12]
+ 8003aa2:	f003 0302 	and.w	r3, r3, #2
+ 8003aa6:	2b02      	cmp	r3, #2
+ 8003aa8:	d10b      	bne.n	8003ac2 <HCD_Port_IRQHandler+0x50>
+  {
+    if ((hprt0 & USB_OTG_HPRT_PCSTS) == USB_OTG_HPRT_PCSTS)
+ 8003aaa:	68fb      	ldr	r3, [r7, #12]
+ 8003aac:	f003 0301 	and.w	r3, r3, #1
+ 8003ab0:	2b01      	cmp	r3, #1
+ 8003ab2:	d102      	bne.n	8003aba <HCD_Port_IRQHandler+0x48>
+    {
+#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
+      hhcd->ConnectCallback(hhcd);
+#else
+      HAL_HCD_Connect_Callback(hhcd);
+ 8003ab4:	6878      	ldr	r0, [r7, #4]
+ 8003ab6:	f004 f941 	bl	8007d3c <HAL_HCD_Connect_Callback>
+#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
+    }
+    hprt0_dup |= USB_OTG_HPRT_PCDET;
+ 8003aba:	68bb      	ldr	r3, [r7, #8]
+ 8003abc:	f043 0302 	orr.w	r3, r3, #2
+ 8003ac0:	60bb      	str	r3, [r7, #8]
+  }
+
+  /* Check whether Port Enable Changed */
+  if ((hprt0 & USB_OTG_HPRT_PENCHNG) == USB_OTG_HPRT_PENCHNG)
+ 8003ac2:	68fb      	ldr	r3, [r7, #12]
+ 8003ac4:	f003 0308 	and.w	r3, r3, #8
+ 8003ac8:	2b08      	cmp	r3, #8
+ 8003aca:	d132      	bne.n	8003b32 <HCD_Port_IRQHandler+0xc0>
+  {
+    hprt0_dup |= USB_OTG_HPRT_PENCHNG;
+ 8003acc:	68bb      	ldr	r3, [r7, #8]
+ 8003ace:	f043 0308 	orr.w	r3, r3, #8
+ 8003ad2:	60bb      	str	r3, [r7, #8]
+
+    if ((hprt0 & USB_OTG_HPRT_PENA) == USB_OTG_HPRT_PENA)
+ 8003ad4:	68fb      	ldr	r3, [r7, #12]
+ 8003ad6:	f003 0304 	and.w	r3, r3, #4
+ 8003ada:	2b04      	cmp	r3, #4
+ 8003adc:	d126      	bne.n	8003b2c <HCD_Port_IRQHandler+0xba>
+    {
+      if (hhcd->Init.phy_itface == USB_OTG_EMBEDDED_PHY)
+ 8003ade:	687b      	ldr	r3, [r7, #4]
+ 8003ae0:	7a5b      	ldrb	r3, [r3, #9]
+ 8003ae2:	2b02      	cmp	r3, #2
+ 8003ae4:	d113      	bne.n	8003b0e <HCD_Port_IRQHandler+0x9c>
+      {
+        if ((hprt0 & USB_OTG_HPRT_PSPD) == (HPRT0_PRTSPD_LOW_SPEED << 17))
+ 8003ae6:	68fb      	ldr	r3, [r7, #12]
+ 8003ae8:	f403 23c0 	and.w	r3, r3, #393216	@ 0x60000
+ 8003aec:	f5b3 2f80 	cmp.w	r3, #262144	@ 0x40000
+ 8003af0:	d106      	bne.n	8003b00 <HCD_Port_IRQHandler+0x8e>
+        {
+          (void)USB_InitFSLSPClkSel(hhcd->Instance, HCFG_6_MHZ);
+ 8003af2:	687b      	ldr	r3, [r7, #4]
+ 8003af4:	681b      	ldr	r3, [r3, #0]
+ 8003af6:	2102      	movs	r1, #2
+ 8003af8:	4618      	mov	r0, r3
+ 8003afa:	f002 fd59 	bl	80065b0 <USB_InitFSLSPClkSel>
+ 8003afe:	e011      	b.n	8003b24 <HCD_Port_IRQHandler+0xb2>
+        }
+        else
+        {
+          (void)USB_InitFSLSPClkSel(hhcd->Instance, HCFG_48_MHZ);
+ 8003b00:	687b      	ldr	r3, [r7, #4]
+ 8003b02:	681b      	ldr	r3, [r3, #0]
+ 8003b04:	2101      	movs	r1, #1
+ 8003b06:	4618      	mov	r0, r3
+ 8003b08:	f002 fd52 	bl	80065b0 <USB_InitFSLSPClkSel>
+ 8003b0c:	e00a      	b.n	8003b24 <HCD_Port_IRQHandler+0xb2>
+        }
+      }
+      else
+      {
+        if (hhcd->Init.speed == HCD_SPEED_FULL)
+ 8003b0e:	687b      	ldr	r3, [r7, #4]
+ 8003b10:	79db      	ldrb	r3, [r3, #7]
+ 8003b12:	2b01      	cmp	r3, #1
+ 8003b14:	d106      	bne.n	8003b24 <HCD_Port_IRQHandler+0xb2>
+        {
+          USBx_HOST->HFIR = HFIR_60_MHZ;
+ 8003b16:	693b      	ldr	r3, [r7, #16]
+ 8003b18:	f503 6380 	add.w	r3, r3, #1024	@ 0x400
+ 8003b1c:	461a      	mov	r2, r3
+ 8003b1e:	f64e 2360 	movw	r3, #60000	@ 0xea60
+ 8003b22:	6053      	str	r3, [r2, #4]
+        }
+      }
+#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
+      hhcd->PortEnabledCallback(hhcd);
+#else
+      HAL_HCD_PortEnabled_Callback(hhcd);
+ 8003b24:	6878      	ldr	r0, [r7, #4]
+ 8003b26:	f004 f937 	bl	8007d98 <HAL_HCD_PortEnabled_Callback>
+ 8003b2a:	e002      	b.n	8003b32 <HCD_Port_IRQHandler+0xc0>
+    else
+    {
+#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
+      hhcd->PortDisabledCallback(hhcd);
+#else
+      HAL_HCD_PortDisabled_Callback(hhcd);
+ 8003b2c:	6878      	ldr	r0, [r7, #4]
+ 8003b2e:	f004 f941 	bl	8007db4 <HAL_HCD_PortDisabled_Callback>
+#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
+    }
+  }
+
+  /* Check for an overcurrent */
+  if ((hprt0 & USB_OTG_HPRT_POCCHNG) == USB_OTG_HPRT_POCCHNG)
+ 8003b32:	68fb      	ldr	r3, [r7, #12]
+ 8003b34:	f003 0320 	and.w	r3, r3, #32
+ 8003b38:	2b20      	cmp	r3, #32
+ 8003b3a:	d103      	bne.n	8003b44 <HCD_Port_IRQHandler+0xd2>
+  {
+    hprt0_dup |= USB_OTG_HPRT_POCCHNG;
+ 8003b3c:	68bb      	ldr	r3, [r7, #8]
+ 8003b3e:	f043 0320 	orr.w	r3, r3, #32
+ 8003b42:	60bb      	str	r3, [r7, #8]
+  }
+
+  /* Clear Port Interrupts */
+  USBx_HPRT0 = hprt0_dup;
+ 8003b44:	693b      	ldr	r3, [r7, #16]
+ 8003b46:	f503 6388 	add.w	r3, r3, #1088	@ 0x440
+ 8003b4a:	461a      	mov	r2, r3
+ 8003b4c:	68bb      	ldr	r3, [r7, #8]
+ 8003b4e:	6013      	str	r3, [r2, #0]
+}
+ 8003b50:	bf00      	nop
+ 8003b52:	3718      	adds	r7, #24
+ 8003b54:	46bd      	mov	sp, r7
+ 8003b56:	bd80      	pop	{r7, pc}
+
+08003b58 <HAL_I2C_Init>:
+  * @param  hi2c Pointer to a I2C_HandleTypeDef structure that contains
+  *                the configuration information for the specified I2C.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
+{
+ 8003b58:	b580      	push	{r7, lr}
+ 8003b5a:	b084      	sub	sp, #16
+ 8003b5c:	af00      	add	r7, sp, #0
+ 8003b5e:	6078      	str	r0, [r7, #4]
+  uint32_t freqrange;
+  uint32_t pclk1;
+
+  /* Check the I2C handle allocation */
+  if (hi2c == NULL)
+ 8003b60:	687b      	ldr	r3, [r7, #4]
+ 8003b62:	2b00      	cmp	r3, #0
+ 8003b64:	d101      	bne.n	8003b6a <HAL_I2C_Init+0x12>
+  {
+    return HAL_ERROR;
+ 8003b66:	2301      	movs	r3, #1
+ 8003b68:	e12b      	b.n	8003dc2 <HAL_I2C_Init+0x26a>
+  assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
+  assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
+  assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
+  assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
+
+  if (hi2c->State == HAL_I2C_STATE_RESET)
+ 8003b6a:	687b      	ldr	r3, [r7, #4]
+ 8003b6c:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
+ 8003b70:	b2db      	uxtb	r3, r3
+ 8003b72:	2b00      	cmp	r3, #0
+ 8003b74:	d106      	bne.n	8003b84 <HAL_I2C_Init+0x2c>
+  {
+    /* Allocate lock resource and initialize it */
+    hi2c->Lock = HAL_UNLOCKED;
+ 8003b76:	687b      	ldr	r3, [r7, #4]
+ 8003b78:	2200      	movs	r2, #0
+ 8003b7a:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+
+    /* Init the low level hardware : GPIO, CLOCK, NVIC */
+    hi2c->MspInitCallback(hi2c);
+#else
+    /* Init the low level hardware : GPIO, CLOCK, NVIC */
+    HAL_I2C_MspInit(hi2c);
+ 8003b7e:	6878      	ldr	r0, [r7, #4]
+ 8003b80:	f7fd f94a 	bl	8000e18 <HAL_I2C_MspInit>
+#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
+  }
+
+  hi2c->State = HAL_I2C_STATE_BUSY;
+ 8003b84:	687b      	ldr	r3, [r7, #4]
+ 8003b86:	2224      	movs	r2, #36	@ 0x24
+ 8003b88:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+
+  /* Disable the selected I2C peripheral */
+  __HAL_I2C_DISABLE(hi2c);
+ 8003b8c:	687b      	ldr	r3, [r7, #4]
+ 8003b8e:	681b      	ldr	r3, [r3, #0]
+ 8003b90:	681a      	ldr	r2, [r3, #0]
+ 8003b92:	687b      	ldr	r3, [r7, #4]
+ 8003b94:	681b      	ldr	r3, [r3, #0]
+ 8003b96:	f022 0201 	bic.w	r2, r2, #1
+ 8003b9a:	601a      	str	r2, [r3, #0]
+
+  /*Reset I2C*/
+  hi2c->Instance->CR1 |= I2C_CR1_SWRST;
+ 8003b9c:	687b      	ldr	r3, [r7, #4]
+ 8003b9e:	681b      	ldr	r3, [r3, #0]
+ 8003ba0:	681a      	ldr	r2, [r3, #0]
+ 8003ba2:	687b      	ldr	r3, [r7, #4]
+ 8003ba4:	681b      	ldr	r3, [r3, #0]
+ 8003ba6:	f442 4200 	orr.w	r2, r2, #32768	@ 0x8000
+ 8003baa:	601a      	str	r2, [r3, #0]
+  hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
+ 8003bac:	687b      	ldr	r3, [r7, #4]
+ 8003bae:	681b      	ldr	r3, [r3, #0]
+ 8003bb0:	681a      	ldr	r2, [r3, #0]
+ 8003bb2:	687b      	ldr	r3, [r7, #4]
+ 8003bb4:	681b      	ldr	r3, [r3, #0]
+ 8003bb6:	f422 4200 	bic.w	r2, r2, #32768	@ 0x8000
+ 8003bba:	601a      	str	r2, [r3, #0]
+
+  /* Get PCLK1 frequency */
+  pclk1 = HAL_RCC_GetPCLK1Freq();
+ 8003bbc:	f001 f90c 	bl	8004dd8 <HAL_RCC_GetPCLK1Freq>
+ 8003bc0:	60f8      	str	r0, [r7, #12]
+
+  /* Check the minimum allowed PCLK1 frequency */
+  if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
+ 8003bc2:	687b      	ldr	r3, [r7, #4]
+ 8003bc4:	685b      	ldr	r3, [r3, #4]
+ 8003bc6:	4a81      	ldr	r2, [pc, #516]	@ (8003dcc <HAL_I2C_Init+0x274>)
+ 8003bc8:	4293      	cmp	r3, r2
+ 8003bca:	d807      	bhi.n	8003bdc <HAL_I2C_Init+0x84>
+ 8003bcc:	68fb      	ldr	r3, [r7, #12]
+ 8003bce:	4a80      	ldr	r2, [pc, #512]	@ (8003dd0 <HAL_I2C_Init+0x278>)
+ 8003bd0:	4293      	cmp	r3, r2
+ 8003bd2:	bf94      	ite	ls
+ 8003bd4:	2301      	movls	r3, #1
+ 8003bd6:	2300      	movhi	r3, #0
+ 8003bd8:	b2db      	uxtb	r3, r3
+ 8003bda:	e006      	b.n	8003bea <HAL_I2C_Init+0x92>
+ 8003bdc:	68fb      	ldr	r3, [r7, #12]
+ 8003bde:	4a7d      	ldr	r2, [pc, #500]	@ (8003dd4 <HAL_I2C_Init+0x27c>)
+ 8003be0:	4293      	cmp	r3, r2
+ 8003be2:	bf94      	ite	ls
+ 8003be4:	2301      	movls	r3, #1
+ 8003be6:	2300      	movhi	r3, #0
+ 8003be8:	b2db      	uxtb	r3, r3
+ 8003bea:	2b00      	cmp	r3, #0
+ 8003bec:	d001      	beq.n	8003bf2 <HAL_I2C_Init+0x9a>
+  {
+    return HAL_ERROR;
+ 8003bee:	2301      	movs	r3, #1
+ 8003bf0:	e0e7      	b.n	8003dc2 <HAL_I2C_Init+0x26a>
+  }
+
+  /* Calculate frequency range */
+  freqrange = I2C_FREQRANGE(pclk1);
+ 8003bf2:	68fb      	ldr	r3, [r7, #12]
+ 8003bf4:	4a78      	ldr	r2, [pc, #480]	@ (8003dd8 <HAL_I2C_Init+0x280>)
+ 8003bf6:	fba2 2303 	umull	r2, r3, r2, r3
+ 8003bfa:	0c9b      	lsrs	r3, r3, #18
+ 8003bfc:	60bb      	str	r3, [r7, #8]
+
+  /*---------------------------- I2Cx CR2 Configuration ----------------------*/
+  /* Configure I2Cx: Frequency range */
+  MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
+ 8003bfe:	687b      	ldr	r3, [r7, #4]
+ 8003c00:	681b      	ldr	r3, [r3, #0]
+ 8003c02:	685b      	ldr	r3, [r3, #4]
+ 8003c04:	f023 013f 	bic.w	r1, r3, #63	@ 0x3f
+ 8003c08:	687b      	ldr	r3, [r7, #4]
+ 8003c0a:	681b      	ldr	r3, [r3, #0]
+ 8003c0c:	68ba      	ldr	r2, [r7, #8]
+ 8003c0e:	430a      	orrs	r2, r1
+ 8003c10:	605a      	str	r2, [r3, #4]
+
+  /*---------------------------- I2Cx TRISE Configuration --------------------*/
+  /* Configure I2Cx: Rise Time */
+  MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
+ 8003c12:	687b      	ldr	r3, [r7, #4]
+ 8003c14:	681b      	ldr	r3, [r3, #0]
+ 8003c16:	6a1b      	ldr	r3, [r3, #32]
+ 8003c18:	f023 013f 	bic.w	r1, r3, #63	@ 0x3f
+ 8003c1c:	687b      	ldr	r3, [r7, #4]
+ 8003c1e:	685b      	ldr	r3, [r3, #4]
+ 8003c20:	4a6a      	ldr	r2, [pc, #424]	@ (8003dcc <HAL_I2C_Init+0x274>)
+ 8003c22:	4293      	cmp	r3, r2
+ 8003c24:	d802      	bhi.n	8003c2c <HAL_I2C_Init+0xd4>
+ 8003c26:	68bb      	ldr	r3, [r7, #8]
+ 8003c28:	3301      	adds	r3, #1
+ 8003c2a:	e009      	b.n	8003c40 <HAL_I2C_Init+0xe8>
+ 8003c2c:	68bb      	ldr	r3, [r7, #8]
+ 8003c2e:	f44f 7296 	mov.w	r2, #300	@ 0x12c
+ 8003c32:	fb02 f303 	mul.w	r3, r2, r3
+ 8003c36:	4a69      	ldr	r2, [pc, #420]	@ (8003ddc <HAL_I2C_Init+0x284>)
+ 8003c38:	fba2 2303 	umull	r2, r3, r2, r3
+ 8003c3c:	099b      	lsrs	r3, r3, #6
+ 8003c3e:	3301      	adds	r3, #1
+ 8003c40:	687a      	ldr	r2, [r7, #4]
+ 8003c42:	6812      	ldr	r2, [r2, #0]
+ 8003c44:	430b      	orrs	r3, r1
+ 8003c46:	6213      	str	r3, [r2, #32]
+
+  /*---------------------------- I2Cx CCR Configuration ----------------------*/
+  /* Configure I2Cx: Speed */
+  MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
+ 8003c48:	687b      	ldr	r3, [r7, #4]
+ 8003c4a:	681b      	ldr	r3, [r3, #0]
+ 8003c4c:	69db      	ldr	r3, [r3, #28]
+ 8003c4e:	f423 424f 	bic.w	r2, r3, #52992	@ 0xcf00
+ 8003c52:	f022 02ff 	bic.w	r2, r2, #255	@ 0xff
+ 8003c56:	687b      	ldr	r3, [r7, #4]
+ 8003c58:	685b      	ldr	r3, [r3, #4]
+ 8003c5a:	495c      	ldr	r1, [pc, #368]	@ (8003dcc <HAL_I2C_Init+0x274>)
+ 8003c5c:	428b      	cmp	r3, r1
+ 8003c5e:	d819      	bhi.n	8003c94 <HAL_I2C_Init+0x13c>
+ 8003c60:	68fb      	ldr	r3, [r7, #12]
+ 8003c62:	1e59      	subs	r1, r3, #1
+ 8003c64:	687b      	ldr	r3, [r7, #4]
+ 8003c66:	685b      	ldr	r3, [r3, #4]
+ 8003c68:	005b      	lsls	r3, r3, #1
+ 8003c6a:	fbb1 f3f3 	udiv	r3, r1, r3
+ 8003c6e:	1c59      	adds	r1, r3, #1
+ 8003c70:	f640 73fc 	movw	r3, #4092	@ 0xffc
+ 8003c74:	400b      	ands	r3, r1
+ 8003c76:	2b00      	cmp	r3, #0
+ 8003c78:	d00a      	beq.n	8003c90 <HAL_I2C_Init+0x138>
+ 8003c7a:	68fb      	ldr	r3, [r7, #12]
+ 8003c7c:	1e59      	subs	r1, r3, #1
+ 8003c7e:	687b      	ldr	r3, [r7, #4]
+ 8003c80:	685b      	ldr	r3, [r3, #4]
+ 8003c82:	005b      	lsls	r3, r3, #1
+ 8003c84:	fbb1 f3f3 	udiv	r3, r1, r3
+ 8003c88:	3301      	adds	r3, #1
+ 8003c8a:	f3c3 030b 	ubfx	r3, r3, #0, #12
+ 8003c8e:	e051      	b.n	8003d34 <HAL_I2C_Init+0x1dc>
+ 8003c90:	2304      	movs	r3, #4
+ 8003c92:	e04f      	b.n	8003d34 <HAL_I2C_Init+0x1dc>
+ 8003c94:	687b      	ldr	r3, [r7, #4]
+ 8003c96:	689b      	ldr	r3, [r3, #8]
+ 8003c98:	2b00      	cmp	r3, #0
+ 8003c9a:	d111      	bne.n	8003cc0 <HAL_I2C_Init+0x168>
+ 8003c9c:	68fb      	ldr	r3, [r7, #12]
+ 8003c9e:	1e58      	subs	r0, r3, #1
+ 8003ca0:	687b      	ldr	r3, [r7, #4]
+ 8003ca2:	6859      	ldr	r1, [r3, #4]
+ 8003ca4:	460b      	mov	r3, r1
+ 8003ca6:	005b      	lsls	r3, r3, #1
+ 8003ca8:	440b      	add	r3, r1
+ 8003caa:	fbb0 f3f3 	udiv	r3, r0, r3
+ 8003cae:	3301      	adds	r3, #1
+ 8003cb0:	f3c3 030b 	ubfx	r3, r3, #0, #12
+ 8003cb4:	2b00      	cmp	r3, #0
+ 8003cb6:	bf0c      	ite	eq
+ 8003cb8:	2301      	moveq	r3, #1
+ 8003cba:	2300      	movne	r3, #0
+ 8003cbc:	b2db      	uxtb	r3, r3
+ 8003cbe:	e012      	b.n	8003ce6 <HAL_I2C_Init+0x18e>
+ 8003cc0:	68fb      	ldr	r3, [r7, #12]
+ 8003cc2:	1e58      	subs	r0, r3, #1
+ 8003cc4:	687b      	ldr	r3, [r7, #4]
+ 8003cc6:	6859      	ldr	r1, [r3, #4]
+ 8003cc8:	460b      	mov	r3, r1
+ 8003cca:	009b      	lsls	r3, r3, #2
+ 8003ccc:	440b      	add	r3, r1
+ 8003cce:	0099      	lsls	r1, r3, #2
+ 8003cd0:	440b      	add	r3, r1
+ 8003cd2:	fbb0 f3f3 	udiv	r3, r0, r3
+ 8003cd6:	3301      	adds	r3, #1
+ 8003cd8:	f3c3 030b 	ubfx	r3, r3, #0, #12
+ 8003cdc:	2b00      	cmp	r3, #0
+ 8003cde:	bf0c      	ite	eq
+ 8003ce0:	2301      	moveq	r3, #1
+ 8003ce2:	2300      	movne	r3, #0
+ 8003ce4:	b2db      	uxtb	r3, r3
+ 8003ce6:	2b00      	cmp	r3, #0
+ 8003ce8:	d001      	beq.n	8003cee <HAL_I2C_Init+0x196>
+ 8003cea:	2301      	movs	r3, #1
+ 8003cec:	e022      	b.n	8003d34 <HAL_I2C_Init+0x1dc>
+ 8003cee:	687b      	ldr	r3, [r7, #4]
+ 8003cf0:	689b      	ldr	r3, [r3, #8]
+ 8003cf2:	2b00      	cmp	r3, #0
+ 8003cf4:	d10e      	bne.n	8003d14 <HAL_I2C_Init+0x1bc>
+ 8003cf6:	68fb      	ldr	r3, [r7, #12]
+ 8003cf8:	1e58      	subs	r0, r3, #1
+ 8003cfa:	687b      	ldr	r3, [r7, #4]
+ 8003cfc:	6859      	ldr	r1, [r3, #4]
+ 8003cfe:	460b      	mov	r3, r1
+ 8003d00:	005b      	lsls	r3, r3, #1
+ 8003d02:	440b      	add	r3, r1
+ 8003d04:	fbb0 f3f3 	udiv	r3, r0, r3
+ 8003d08:	3301      	adds	r3, #1
+ 8003d0a:	f3c3 030b 	ubfx	r3, r3, #0, #12
+ 8003d0e:	f443 4300 	orr.w	r3, r3, #32768	@ 0x8000
+ 8003d12:	e00f      	b.n	8003d34 <HAL_I2C_Init+0x1dc>
+ 8003d14:	68fb      	ldr	r3, [r7, #12]
+ 8003d16:	1e58      	subs	r0, r3, #1
+ 8003d18:	687b      	ldr	r3, [r7, #4]
+ 8003d1a:	6859      	ldr	r1, [r3, #4]
+ 8003d1c:	460b      	mov	r3, r1
+ 8003d1e:	009b      	lsls	r3, r3, #2
+ 8003d20:	440b      	add	r3, r1
+ 8003d22:	0099      	lsls	r1, r3, #2
+ 8003d24:	440b      	add	r3, r1
+ 8003d26:	fbb0 f3f3 	udiv	r3, r0, r3
+ 8003d2a:	3301      	adds	r3, #1
+ 8003d2c:	f3c3 030b 	ubfx	r3, r3, #0, #12
+ 8003d30:	f443 4340 	orr.w	r3, r3, #49152	@ 0xc000
+ 8003d34:	6879      	ldr	r1, [r7, #4]
+ 8003d36:	6809      	ldr	r1, [r1, #0]
+ 8003d38:	4313      	orrs	r3, r2
+ 8003d3a:	61cb      	str	r3, [r1, #28]
+
+  /*---------------------------- I2Cx CR1 Configuration ----------------------*/
+  /* Configure I2Cx: Generalcall and NoStretch mode */
+  MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
+ 8003d3c:	687b      	ldr	r3, [r7, #4]
+ 8003d3e:	681b      	ldr	r3, [r3, #0]
+ 8003d40:	681b      	ldr	r3, [r3, #0]
+ 8003d42:	f023 01c0 	bic.w	r1, r3, #192	@ 0xc0
+ 8003d46:	687b      	ldr	r3, [r7, #4]
+ 8003d48:	69da      	ldr	r2, [r3, #28]
+ 8003d4a:	687b      	ldr	r3, [r7, #4]
+ 8003d4c:	6a1b      	ldr	r3, [r3, #32]
+ 8003d4e:	431a      	orrs	r2, r3
+ 8003d50:	687b      	ldr	r3, [r7, #4]
+ 8003d52:	681b      	ldr	r3, [r3, #0]
+ 8003d54:	430a      	orrs	r2, r1
+ 8003d56:	601a      	str	r2, [r3, #0]
+
+  /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
+  /* Configure I2Cx: Own Address1 and addressing mode */
+  MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
+ 8003d58:	687b      	ldr	r3, [r7, #4]
+ 8003d5a:	681b      	ldr	r3, [r3, #0]
+ 8003d5c:	689b      	ldr	r3, [r3, #8]
+ 8003d5e:	f423 4303 	bic.w	r3, r3, #33536	@ 0x8300
+ 8003d62:	f023 03ff 	bic.w	r3, r3, #255	@ 0xff
+ 8003d66:	687a      	ldr	r2, [r7, #4]
+ 8003d68:	6911      	ldr	r1, [r2, #16]
+ 8003d6a:	687a      	ldr	r2, [r7, #4]
+ 8003d6c:	68d2      	ldr	r2, [r2, #12]
+ 8003d6e:	4311      	orrs	r1, r2
+ 8003d70:	687a      	ldr	r2, [r7, #4]
+ 8003d72:	6812      	ldr	r2, [r2, #0]
+ 8003d74:	430b      	orrs	r3, r1
+ 8003d76:	6093      	str	r3, [r2, #8]
+
+  /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
+  /* Configure I2Cx: Dual mode and Own Address2 */
+  MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
+ 8003d78:	687b      	ldr	r3, [r7, #4]
+ 8003d7a:	681b      	ldr	r3, [r3, #0]
+ 8003d7c:	68db      	ldr	r3, [r3, #12]
+ 8003d7e:	f023 01ff 	bic.w	r1, r3, #255	@ 0xff
+ 8003d82:	687b      	ldr	r3, [r7, #4]
+ 8003d84:	695a      	ldr	r2, [r3, #20]
+ 8003d86:	687b      	ldr	r3, [r7, #4]
+ 8003d88:	699b      	ldr	r3, [r3, #24]
+ 8003d8a:	431a      	orrs	r2, r3
+ 8003d8c:	687b      	ldr	r3, [r7, #4]
+ 8003d8e:	681b      	ldr	r3, [r3, #0]
+ 8003d90:	430a      	orrs	r2, r1
+ 8003d92:	60da      	str	r2, [r3, #12]
+
+  /* Enable the selected I2C peripheral */
+  __HAL_I2C_ENABLE(hi2c);
+ 8003d94:	687b      	ldr	r3, [r7, #4]
+ 8003d96:	681b      	ldr	r3, [r3, #0]
+ 8003d98:	681a      	ldr	r2, [r3, #0]
+ 8003d9a:	687b      	ldr	r3, [r7, #4]
+ 8003d9c:	681b      	ldr	r3, [r3, #0]
+ 8003d9e:	f042 0201 	orr.w	r2, r2, #1
+ 8003da2:	601a      	str	r2, [r3, #0]
+
+  hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
+ 8003da4:	687b      	ldr	r3, [r7, #4]
+ 8003da6:	2200      	movs	r2, #0
+ 8003da8:	641a      	str	r2, [r3, #64]	@ 0x40
+  hi2c->State = HAL_I2C_STATE_READY;
+ 8003daa:	687b      	ldr	r3, [r7, #4]
+ 8003dac:	2220      	movs	r2, #32
+ 8003dae:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+  hi2c->PreviousState = I2C_STATE_NONE;
+ 8003db2:	687b      	ldr	r3, [r7, #4]
+ 8003db4:	2200      	movs	r2, #0
+ 8003db6:	631a      	str	r2, [r3, #48]	@ 0x30
+  hi2c->Mode = HAL_I2C_MODE_NONE;
+ 8003db8:	687b      	ldr	r3, [r7, #4]
+ 8003dba:	2200      	movs	r2, #0
+ 8003dbc:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+
+  return HAL_OK;
+ 8003dc0:	2300      	movs	r3, #0
+}
+ 8003dc2:	4618      	mov	r0, r3
+ 8003dc4:	3710      	adds	r7, #16
+ 8003dc6:	46bd      	mov	sp, r7
+ 8003dc8:	bd80      	pop	{r7, pc}
+ 8003dca:	bf00      	nop
+ 8003dcc:	000186a0 	.word	0x000186a0
+ 8003dd0:	001e847f 	.word	0x001e847f
+ 8003dd4:	003d08ff 	.word	0x003d08ff
+ 8003dd8:	431bde83 	.word	0x431bde83
+ 8003ddc:	10624dd3 	.word	0x10624dd3
+
+08003de0 <HAL_I2CEx_ConfigAnalogFilter>:
+  *                the configuration information for the specified I2Cx peripheral.
+  * @param  AnalogFilter new state of the Analog filter.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
+{
+ 8003de0:	b480      	push	{r7}
+ 8003de2:	b083      	sub	sp, #12
+ 8003de4:	af00      	add	r7, sp, #0
+ 8003de6:	6078      	str	r0, [r7, #4]
+ 8003de8:	6039      	str	r1, [r7, #0]
+  /* Check the parameters */
+  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
+  assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
+
+  if (hi2c->State == HAL_I2C_STATE_READY)
+ 8003dea:	687b      	ldr	r3, [r7, #4]
+ 8003dec:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
+ 8003df0:	b2db      	uxtb	r3, r3
+ 8003df2:	2b20      	cmp	r3, #32
+ 8003df4:	d129      	bne.n	8003e4a <HAL_I2CEx_ConfigAnalogFilter+0x6a>
+  {
+    hi2c->State = HAL_I2C_STATE_BUSY;
+ 8003df6:	687b      	ldr	r3, [r7, #4]
+ 8003df8:	2224      	movs	r2, #36	@ 0x24
+ 8003dfa:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+
+    /* Disable the selected I2C peripheral */
+    __HAL_I2C_DISABLE(hi2c);
+ 8003dfe:	687b      	ldr	r3, [r7, #4]
+ 8003e00:	681b      	ldr	r3, [r3, #0]
+ 8003e02:	681a      	ldr	r2, [r3, #0]
+ 8003e04:	687b      	ldr	r3, [r7, #4]
+ 8003e06:	681b      	ldr	r3, [r3, #0]
+ 8003e08:	f022 0201 	bic.w	r2, r2, #1
+ 8003e0c:	601a      	str	r2, [r3, #0]
+
+    /* Reset I2Cx ANOFF bit */
+    hi2c->Instance->FLTR &= ~(I2C_FLTR_ANOFF);
+ 8003e0e:	687b      	ldr	r3, [r7, #4]
+ 8003e10:	681b      	ldr	r3, [r3, #0]
+ 8003e12:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
+ 8003e14:	687b      	ldr	r3, [r7, #4]
+ 8003e16:	681b      	ldr	r3, [r3, #0]
+ 8003e18:	f022 0210 	bic.w	r2, r2, #16
+ 8003e1c:	625a      	str	r2, [r3, #36]	@ 0x24
+
+    /* Disable the analog filter */
+    hi2c->Instance->FLTR |= AnalogFilter;
+ 8003e1e:	687b      	ldr	r3, [r7, #4]
+ 8003e20:	681b      	ldr	r3, [r3, #0]
+ 8003e22:	6a59      	ldr	r1, [r3, #36]	@ 0x24
+ 8003e24:	687b      	ldr	r3, [r7, #4]
+ 8003e26:	681b      	ldr	r3, [r3, #0]
+ 8003e28:	683a      	ldr	r2, [r7, #0]
+ 8003e2a:	430a      	orrs	r2, r1
+ 8003e2c:	625a      	str	r2, [r3, #36]	@ 0x24
+
+    __HAL_I2C_ENABLE(hi2c);
+ 8003e2e:	687b      	ldr	r3, [r7, #4]
+ 8003e30:	681b      	ldr	r3, [r3, #0]
+ 8003e32:	681a      	ldr	r2, [r3, #0]
+ 8003e34:	687b      	ldr	r3, [r7, #4]
+ 8003e36:	681b      	ldr	r3, [r3, #0]
+ 8003e38:	f042 0201 	orr.w	r2, r2, #1
+ 8003e3c:	601a      	str	r2, [r3, #0]
+
+    hi2c->State = HAL_I2C_STATE_READY;
+ 8003e3e:	687b      	ldr	r3, [r7, #4]
+ 8003e40:	2220      	movs	r2, #32
+ 8003e42:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+
+    return HAL_OK;
+ 8003e46:	2300      	movs	r3, #0
+ 8003e48:	e000      	b.n	8003e4c <HAL_I2CEx_ConfigAnalogFilter+0x6c>
+  }
+  else
+  {
+    return HAL_BUSY;
+ 8003e4a:	2302      	movs	r3, #2
+  }
+}
+ 8003e4c:	4618      	mov	r0, r3
+ 8003e4e:	370c      	adds	r7, #12
+ 8003e50:	46bd      	mov	sp, r7
+ 8003e52:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8003e56:	4770      	bx	lr
+
+08003e58 <HAL_I2CEx_ConfigDigitalFilter>:
+  *                the configuration information for the specified I2Cx peripheral.
+  * @param  DigitalFilter Coefficient of digital noise filter between 0x00 and 0x0F.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
+{
+ 8003e58:	b480      	push	{r7}
+ 8003e5a:	b085      	sub	sp, #20
+ 8003e5c:	af00      	add	r7, sp, #0
+ 8003e5e:	6078      	str	r0, [r7, #4]
+ 8003e60:	6039      	str	r1, [r7, #0]
+  uint16_t tmpreg = 0;
+ 8003e62:	2300      	movs	r3, #0
+ 8003e64:	81fb      	strh	r3, [r7, #14]
+
+  /* Check the parameters */
+  assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
+  assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
+
+  if (hi2c->State == HAL_I2C_STATE_READY)
+ 8003e66:	687b      	ldr	r3, [r7, #4]
+ 8003e68:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
+ 8003e6c:	b2db      	uxtb	r3, r3
+ 8003e6e:	2b20      	cmp	r3, #32
+ 8003e70:	d12a      	bne.n	8003ec8 <HAL_I2CEx_ConfigDigitalFilter+0x70>
+  {
+    hi2c->State = HAL_I2C_STATE_BUSY;
+ 8003e72:	687b      	ldr	r3, [r7, #4]
+ 8003e74:	2224      	movs	r2, #36	@ 0x24
+ 8003e76:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+
+    /* Disable the selected I2C peripheral */
+    __HAL_I2C_DISABLE(hi2c);
+ 8003e7a:	687b      	ldr	r3, [r7, #4]
+ 8003e7c:	681b      	ldr	r3, [r3, #0]
+ 8003e7e:	681a      	ldr	r2, [r3, #0]
+ 8003e80:	687b      	ldr	r3, [r7, #4]
+ 8003e82:	681b      	ldr	r3, [r3, #0]
+ 8003e84:	f022 0201 	bic.w	r2, r2, #1
+ 8003e88:	601a      	str	r2, [r3, #0]
+
+    /* Get the old register value */
+    tmpreg = hi2c->Instance->FLTR;
+ 8003e8a:	687b      	ldr	r3, [r7, #4]
+ 8003e8c:	681b      	ldr	r3, [r3, #0]
+ 8003e8e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8003e90:	81fb      	strh	r3, [r7, #14]
+
+    /* Reset I2Cx DNF bit [3:0] */
+    tmpreg &= ~(I2C_FLTR_DNF);
+ 8003e92:	89fb      	ldrh	r3, [r7, #14]
+ 8003e94:	f023 030f 	bic.w	r3, r3, #15
+ 8003e98:	81fb      	strh	r3, [r7, #14]
+
+    /* Set I2Cx DNF coefficient */
+    tmpreg |= DigitalFilter;
+ 8003e9a:	683b      	ldr	r3, [r7, #0]
+ 8003e9c:	b29a      	uxth	r2, r3
+ 8003e9e:	89fb      	ldrh	r3, [r7, #14]
+ 8003ea0:	4313      	orrs	r3, r2
+ 8003ea2:	81fb      	strh	r3, [r7, #14]
+
+    /* Store the new register value */
+    hi2c->Instance->FLTR = tmpreg;
+ 8003ea4:	687b      	ldr	r3, [r7, #4]
+ 8003ea6:	681b      	ldr	r3, [r3, #0]
+ 8003ea8:	89fa      	ldrh	r2, [r7, #14]
+ 8003eaa:	625a      	str	r2, [r3, #36]	@ 0x24
+
+    __HAL_I2C_ENABLE(hi2c);
+ 8003eac:	687b      	ldr	r3, [r7, #4]
+ 8003eae:	681b      	ldr	r3, [r3, #0]
+ 8003eb0:	681a      	ldr	r2, [r3, #0]
+ 8003eb2:	687b      	ldr	r3, [r7, #4]
+ 8003eb4:	681b      	ldr	r3, [r3, #0]
+ 8003eb6:	f042 0201 	orr.w	r2, r2, #1
+ 8003eba:	601a      	str	r2, [r3, #0]
+
+    hi2c->State = HAL_I2C_STATE_READY;
+ 8003ebc:	687b      	ldr	r3, [r7, #4]
+ 8003ebe:	2220      	movs	r2, #32
+ 8003ec0:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+
+    return HAL_OK;
+ 8003ec4:	2300      	movs	r3, #0
+ 8003ec6:	e000      	b.n	8003eca <HAL_I2CEx_ConfigDigitalFilter+0x72>
+  }
+  else
+  {
+    return HAL_BUSY;
+ 8003ec8:	2302      	movs	r3, #2
+  }
+}
+ 8003eca:	4618      	mov	r0, r3
+ 8003ecc:	3714      	adds	r7, #20
+ 8003ece:	46bd      	mov	sp, r7
+ 8003ed0:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8003ed4:	4770      	bx	lr
+
+08003ed6 <HAL_LTDC_Init>:
+  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
+  *                the configuration information for the LTDC.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_LTDC_Init(LTDC_HandleTypeDef *hltdc)
+{
+ 8003ed6:	b580      	push	{r7, lr}
+ 8003ed8:	b084      	sub	sp, #16
+ 8003eda:	af00      	add	r7, sp, #0
+ 8003edc:	6078      	str	r0, [r7, #4]
+  uint32_t tmp;
+  uint32_t tmp1;
+
+  /* Check the LTDC peripheral state */
+  if (hltdc == NULL)
+ 8003ede:	687b      	ldr	r3, [r7, #4]
+ 8003ee0:	2b00      	cmp	r3, #0
+ 8003ee2:	d101      	bne.n	8003ee8 <HAL_LTDC_Init+0x12>
+  {
+    return HAL_ERROR;
+ 8003ee4:	2301      	movs	r3, #1
+ 8003ee6:	e08f      	b.n	8004008 <HAL_LTDC_Init+0x132>
+    }
+    /* Init the low level hardware */
+    hltdc->MspInitCallback(hltdc);
+  }
+#else
+  if (hltdc->State == HAL_LTDC_STATE_RESET)
+ 8003ee8:	687b      	ldr	r3, [r7, #4]
+ 8003eea:	f893 30a1 	ldrb.w	r3, [r3, #161]	@ 0xa1
+ 8003eee:	b2db      	uxtb	r3, r3
+ 8003ef0:	2b00      	cmp	r3, #0
+ 8003ef2:	d106      	bne.n	8003f02 <HAL_LTDC_Init+0x2c>
+  {
+    /* Allocate lock resource and initialize it */
+    hltdc->Lock = HAL_UNLOCKED;
+ 8003ef4:	687b      	ldr	r3, [r7, #4]
+ 8003ef6:	2200      	movs	r2, #0
+ 8003ef8:	f883 20a0 	strb.w	r2, [r3, #160]	@ 0xa0
+    /* Init the low level hardware */
+    HAL_LTDC_MspInit(hltdc);
+ 8003efc:	6878      	ldr	r0, [r7, #4]
+ 8003efe:	f7fc fff5 	bl	8000eec <HAL_LTDC_MspInit>
+  }
+#endif /* USE_HAL_LTDC_REGISTER_CALLBACKS */
+
+  /* Change LTDC peripheral state */
+  hltdc->State = HAL_LTDC_STATE_BUSY;
+ 8003f02:	687b      	ldr	r3, [r7, #4]
+ 8003f04:	2202      	movs	r2, #2
+ 8003f06:	f883 20a1 	strb.w	r2, [r3, #161]	@ 0xa1
+
+  /* Configure the HS, VS, DE and PC polarity */
+  hltdc->Instance->GCR &= ~(LTDC_GCR_HSPOL | LTDC_GCR_VSPOL | LTDC_GCR_DEPOL | LTDC_GCR_PCPOL);
+ 8003f0a:	687b      	ldr	r3, [r7, #4]
+ 8003f0c:	681b      	ldr	r3, [r3, #0]
+ 8003f0e:	699a      	ldr	r2, [r3, #24]
+ 8003f10:	687b      	ldr	r3, [r7, #4]
+ 8003f12:	681b      	ldr	r3, [r3, #0]
+ 8003f14:	f022 4270 	bic.w	r2, r2, #4026531840	@ 0xf0000000
+ 8003f18:	619a      	str	r2, [r3, #24]
+  hltdc->Instance->GCR |= (uint32_t)(hltdc->Init.HSPolarity | hltdc->Init.VSPolarity | \
+ 8003f1a:	687b      	ldr	r3, [r7, #4]
+ 8003f1c:	681b      	ldr	r3, [r3, #0]
+ 8003f1e:	6999      	ldr	r1, [r3, #24]
+ 8003f20:	687b      	ldr	r3, [r7, #4]
+ 8003f22:	685a      	ldr	r2, [r3, #4]
+ 8003f24:	687b      	ldr	r3, [r7, #4]
+ 8003f26:	689b      	ldr	r3, [r3, #8]
+ 8003f28:	431a      	orrs	r2, r3
+                                     hltdc->Init.DEPolarity | hltdc->Init.PCPolarity);
+ 8003f2a:	687b      	ldr	r3, [r7, #4]
+ 8003f2c:	68db      	ldr	r3, [r3, #12]
+  hltdc->Instance->GCR |= (uint32_t)(hltdc->Init.HSPolarity | hltdc->Init.VSPolarity | \
+ 8003f2e:	431a      	orrs	r2, r3
+                                     hltdc->Init.DEPolarity | hltdc->Init.PCPolarity);
+ 8003f30:	687b      	ldr	r3, [r7, #4]
+ 8003f32:	691b      	ldr	r3, [r3, #16]
+ 8003f34:	431a      	orrs	r2, r3
+  hltdc->Instance->GCR |= (uint32_t)(hltdc->Init.HSPolarity | hltdc->Init.VSPolarity | \
+ 8003f36:	687b      	ldr	r3, [r7, #4]
+ 8003f38:	681b      	ldr	r3, [r3, #0]
+ 8003f3a:	430a      	orrs	r2, r1
+ 8003f3c:	619a      	str	r2, [r3, #24]
+
+  /* Set Synchronization size */
+  tmp = (hltdc->Init.HorizontalSync << 16U);
+ 8003f3e:	687b      	ldr	r3, [r7, #4]
+ 8003f40:	695b      	ldr	r3, [r3, #20]
+ 8003f42:	041b      	lsls	r3, r3, #16
+ 8003f44:	60fb      	str	r3, [r7, #12]
+  WRITE_REG(hltdc->Instance->SSCR, (tmp | hltdc->Init.VerticalSync));
+ 8003f46:	687b      	ldr	r3, [r7, #4]
+ 8003f48:	6999      	ldr	r1, [r3, #24]
+ 8003f4a:	687b      	ldr	r3, [r7, #4]
+ 8003f4c:	681b      	ldr	r3, [r3, #0]
+ 8003f4e:	68fa      	ldr	r2, [r7, #12]
+ 8003f50:	430a      	orrs	r2, r1
+ 8003f52:	609a      	str	r2, [r3, #8]
+
+  /* Set Accumulated Back porch */
+  tmp = (hltdc->Init.AccumulatedHBP << 16U);
+ 8003f54:	687b      	ldr	r3, [r7, #4]
+ 8003f56:	69db      	ldr	r3, [r3, #28]
+ 8003f58:	041b      	lsls	r3, r3, #16
+ 8003f5a:	60fb      	str	r3, [r7, #12]
+  WRITE_REG(hltdc->Instance->BPCR, (tmp | hltdc->Init.AccumulatedVBP));
+ 8003f5c:	687b      	ldr	r3, [r7, #4]
+ 8003f5e:	6a19      	ldr	r1, [r3, #32]
+ 8003f60:	687b      	ldr	r3, [r7, #4]
+ 8003f62:	681b      	ldr	r3, [r3, #0]
+ 8003f64:	68fa      	ldr	r2, [r7, #12]
+ 8003f66:	430a      	orrs	r2, r1
+ 8003f68:	60da      	str	r2, [r3, #12]
+
+  /* Set Accumulated Active Width */
+  tmp = (hltdc->Init.AccumulatedActiveW << 16U);
+ 8003f6a:	687b      	ldr	r3, [r7, #4]
+ 8003f6c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8003f6e:	041b      	lsls	r3, r3, #16
+ 8003f70:	60fb      	str	r3, [r7, #12]
+  WRITE_REG(hltdc->Instance->AWCR, (tmp | hltdc->Init.AccumulatedActiveH));
+ 8003f72:	687b      	ldr	r3, [r7, #4]
+ 8003f74:	6a99      	ldr	r1, [r3, #40]	@ 0x28
+ 8003f76:	687b      	ldr	r3, [r7, #4]
+ 8003f78:	681b      	ldr	r3, [r3, #0]
+ 8003f7a:	68fa      	ldr	r2, [r7, #12]
+ 8003f7c:	430a      	orrs	r2, r1
+ 8003f7e:	611a      	str	r2, [r3, #16]
+
+  /* Set Total Width */
+  tmp = (hltdc->Init.TotalWidth << 16U);
+ 8003f80:	687b      	ldr	r3, [r7, #4]
+ 8003f82:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 8003f84:	041b      	lsls	r3, r3, #16
+ 8003f86:	60fb      	str	r3, [r7, #12]
+  WRITE_REG(hltdc->Instance->TWCR, (tmp | hltdc->Init.TotalHeigh));
+ 8003f88:	687b      	ldr	r3, [r7, #4]
+ 8003f8a:	6b19      	ldr	r1, [r3, #48]	@ 0x30
+ 8003f8c:	687b      	ldr	r3, [r7, #4]
+ 8003f8e:	681b      	ldr	r3, [r3, #0]
+ 8003f90:	68fa      	ldr	r2, [r7, #12]
+ 8003f92:	430a      	orrs	r2, r1
+ 8003f94:	615a      	str	r2, [r3, #20]
+
+  /* Set the background color value */
+  tmp = ((uint32_t)(hltdc->Init.Backcolor.Green) << 8U);
+ 8003f96:	687b      	ldr	r3, [r7, #4]
+ 8003f98:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
+ 8003f9c:	021b      	lsls	r3, r3, #8
+ 8003f9e:	60fb      	str	r3, [r7, #12]
+  tmp1 = ((uint32_t)(hltdc->Init.Backcolor.Red) << 16U);
+ 8003fa0:	687b      	ldr	r3, [r7, #4]
+ 8003fa2:	f893 3036 	ldrb.w	r3, [r3, #54]	@ 0x36
+ 8003fa6:	041b      	lsls	r3, r3, #16
+ 8003fa8:	60bb      	str	r3, [r7, #8]
+  hltdc->Instance->BCCR &= ~(LTDC_BCCR_BCBLUE | LTDC_BCCR_BCGREEN | LTDC_BCCR_BCRED);
+ 8003faa:	687b      	ldr	r3, [r7, #4]
+ 8003fac:	681b      	ldr	r3, [r3, #0]
+ 8003fae:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
+ 8003fb0:	687b      	ldr	r3, [r7, #4]
+ 8003fb2:	681b      	ldr	r3, [r3, #0]
+ 8003fb4:	f002 427f 	and.w	r2, r2, #4278190080	@ 0xff000000
+ 8003fb8:	62da      	str	r2, [r3, #44]	@ 0x2c
+  hltdc->Instance->BCCR |= (tmp1 | tmp | hltdc->Init.Backcolor.Blue);
+ 8003fba:	687b      	ldr	r3, [r7, #4]
+ 8003fbc:	681b      	ldr	r3, [r3, #0]
+ 8003fbe:	6ad9      	ldr	r1, [r3, #44]	@ 0x2c
+ 8003fc0:	68ba      	ldr	r2, [r7, #8]
+ 8003fc2:	68fb      	ldr	r3, [r7, #12]
+ 8003fc4:	4313      	orrs	r3, r2
+ 8003fc6:	687a      	ldr	r2, [r7, #4]
+ 8003fc8:	f892 2034 	ldrb.w	r2, [r2, #52]	@ 0x34
+ 8003fcc:	431a      	orrs	r2, r3
+ 8003fce:	687b      	ldr	r3, [r7, #4]
+ 8003fd0:	681b      	ldr	r3, [r3, #0]
+ 8003fd2:	430a      	orrs	r2, r1
+ 8003fd4:	62da      	str	r2, [r3, #44]	@ 0x2c
+
+  /* Enable the Transfer Error and FIFO underrun interrupts */
+  __HAL_LTDC_ENABLE_IT(hltdc, LTDC_IT_TE | LTDC_IT_FU);
+ 8003fd6:	687b      	ldr	r3, [r7, #4]
+ 8003fd8:	681b      	ldr	r3, [r3, #0]
+ 8003fda:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
+ 8003fdc:	687b      	ldr	r3, [r7, #4]
+ 8003fde:	681b      	ldr	r3, [r3, #0]
+ 8003fe0:	f042 0206 	orr.w	r2, r2, #6
+ 8003fe4:	635a      	str	r2, [r3, #52]	@ 0x34
+
+  /* Enable LTDC by setting LTDCEN bit */
+  __HAL_LTDC_ENABLE(hltdc);
+ 8003fe6:	687b      	ldr	r3, [r7, #4]
+ 8003fe8:	681b      	ldr	r3, [r3, #0]
+ 8003fea:	699a      	ldr	r2, [r3, #24]
+ 8003fec:	687b      	ldr	r3, [r7, #4]
+ 8003fee:	681b      	ldr	r3, [r3, #0]
+ 8003ff0:	f042 0201 	orr.w	r2, r2, #1
+ 8003ff4:	619a      	str	r2, [r3, #24]
+
+  /* Initialize the error code */
+  hltdc->ErrorCode = HAL_LTDC_ERROR_NONE;
+ 8003ff6:	687b      	ldr	r3, [r7, #4]
+ 8003ff8:	2200      	movs	r2, #0
+ 8003ffa:	f8c3 20a4 	str.w	r2, [r3, #164]	@ 0xa4
+
+  /* Initialize the LTDC state*/
+  hltdc->State = HAL_LTDC_STATE_READY;
+ 8003ffe:	687b      	ldr	r3, [r7, #4]
+ 8004000:	2201      	movs	r2, #1
+ 8004002:	f883 20a1 	strb.w	r2, [r3, #161]	@ 0xa1
+
+  return HAL_OK;
+ 8004006:	2300      	movs	r3, #0
+}
+ 8004008:	4618      	mov	r0, r3
+ 800400a:	3710      	adds	r7, #16
+ 800400c:	46bd      	mov	sp, r7
+ 800400e:	bd80      	pop	{r7, pc}
+
+08004010 <HAL_LTDC_IRQHandler>:
+  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
+  *                the configuration information for the LTDC.
+  * @retval HAL status
+  */
+void HAL_LTDC_IRQHandler(LTDC_HandleTypeDef *hltdc)
+{
+ 8004010:	b580      	push	{r7, lr}
+ 8004012:	b084      	sub	sp, #16
+ 8004014:	af00      	add	r7, sp, #0
+ 8004016:	6078      	str	r0, [r7, #4]
+  uint32_t isrflags  = READ_REG(hltdc->Instance->ISR);
+ 8004018:	687b      	ldr	r3, [r7, #4]
+ 800401a:	681b      	ldr	r3, [r3, #0]
+ 800401c:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
+ 800401e:	60fb      	str	r3, [r7, #12]
+  uint32_t itsources = READ_REG(hltdc->Instance->IER);
+ 8004020:	687b      	ldr	r3, [r7, #4]
+ 8004022:	681b      	ldr	r3, [r3, #0]
+ 8004024:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
+ 8004026:	60bb      	str	r3, [r7, #8]
+
+  /* Transfer Error Interrupt management ***************************************/
+  if (((isrflags & LTDC_ISR_TERRIF) != 0U) && ((itsources & LTDC_IER_TERRIE) != 0U))
+ 8004028:	68fb      	ldr	r3, [r7, #12]
+ 800402a:	f003 0304 	and.w	r3, r3, #4
+ 800402e:	2b00      	cmp	r3, #0
+ 8004030:	d023      	beq.n	800407a <HAL_LTDC_IRQHandler+0x6a>
+ 8004032:	68bb      	ldr	r3, [r7, #8]
+ 8004034:	f003 0304 	and.w	r3, r3, #4
+ 8004038:	2b00      	cmp	r3, #0
+ 800403a:	d01e      	beq.n	800407a <HAL_LTDC_IRQHandler+0x6a>
+  {
+    /* Disable the transfer Error interrupt */
+    __HAL_LTDC_DISABLE_IT(hltdc, LTDC_IT_TE);
+ 800403c:	687b      	ldr	r3, [r7, #4]
+ 800403e:	681b      	ldr	r3, [r3, #0]
+ 8004040:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
+ 8004042:	687b      	ldr	r3, [r7, #4]
+ 8004044:	681b      	ldr	r3, [r3, #0]
+ 8004046:	f022 0204 	bic.w	r2, r2, #4
+ 800404a:	635a      	str	r2, [r3, #52]	@ 0x34
+
+    /* Clear the transfer error flag */
+    __HAL_LTDC_CLEAR_FLAG(hltdc, LTDC_FLAG_TE);
+ 800404c:	687b      	ldr	r3, [r7, #4]
+ 800404e:	681b      	ldr	r3, [r3, #0]
+ 8004050:	2204      	movs	r2, #4
+ 8004052:	63da      	str	r2, [r3, #60]	@ 0x3c
+
+    /* Update error code */
+    hltdc->ErrorCode |= HAL_LTDC_ERROR_TE;
+ 8004054:	687b      	ldr	r3, [r7, #4]
+ 8004056:	f8d3 30a4 	ldr.w	r3, [r3, #164]	@ 0xa4
+ 800405a:	f043 0201 	orr.w	r2, r3, #1
+ 800405e:	687b      	ldr	r3, [r7, #4]
+ 8004060:	f8c3 20a4 	str.w	r2, [r3, #164]	@ 0xa4
+
+    /* Change LTDC state */
+    hltdc->State = HAL_LTDC_STATE_ERROR;
+ 8004064:	687b      	ldr	r3, [r7, #4]
+ 8004066:	2204      	movs	r2, #4
+ 8004068:	f883 20a1 	strb.w	r2, [r3, #161]	@ 0xa1
+
+    /* Process unlocked */
+    __HAL_UNLOCK(hltdc);
+ 800406c:	687b      	ldr	r3, [r7, #4]
+ 800406e:	2200      	movs	r2, #0
+ 8004070:	f883 20a0 	strb.w	r2, [r3, #160]	@ 0xa0
+#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
+    /*Call registered error callback*/
+    hltdc->ErrorCallback(hltdc);
+#else
+    /* Call legacy error callback*/
+    HAL_LTDC_ErrorCallback(hltdc);
+ 8004074:	6878      	ldr	r0, [r7, #4]
+ 8004076:	f000 f86f 	bl	8004158 <HAL_LTDC_ErrorCallback>
+#endif /* USE_HAL_LTDC_REGISTER_CALLBACKS */
+  }
+
+  /* FIFO underrun Interrupt management ***************************************/
+  if (((isrflags & LTDC_ISR_FUIF) != 0U) && ((itsources & LTDC_IER_FUIE) != 0U))
+ 800407a:	68fb      	ldr	r3, [r7, #12]
+ 800407c:	f003 0302 	and.w	r3, r3, #2
+ 8004080:	2b00      	cmp	r3, #0
+ 8004082:	d023      	beq.n	80040cc <HAL_LTDC_IRQHandler+0xbc>
+ 8004084:	68bb      	ldr	r3, [r7, #8]
+ 8004086:	f003 0302 	and.w	r3, r3, #2
+ 800408a:	2b00      	cmp	r3, #0
+ 800408c:	d01e      	beq.n	80040cc <HAL_LTDC_IRQHandler+0xbc>
+  {
+    /* Disable the FIFO underrun interrupt */
+    __HAL_LTDC_DISABLE_IT(hltdc, LTDC_IT_FU);
+ 800408e:	687b      	ldr	r3, [r7, #4]
+ 8004090:	681b      	ldr	r3, [r3, #0]
+ 8004092:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
+ 8004094:	687b      	ldr	r3, [r7, #4]
+ 8004096:	681b      	ldr	r3, [r3, #0]
+ 8004098:	f022 0202 	bic.w	r2, r2, #2
+ 800409c:	635a      	str	r2, [r3, #52]	@ 0x34
+
+    /* Clear the FIFO underrun flag */
+    __HAL_LTDC_CLEAR_FLAG(hltdc, LTDC_FLAG_FU);
+ 800409e:	687b      	ldr	r3, [r7, #4]
+ 80040a0:	681b      	ldr	r3, [r3, #0]
+ 80040a2:	2202      	movs	r2, #2
+ 80040a4:	63da      	str	r2, [r3, #60]	@ 0x3c
+
+    /* Update error code */
+    hltdc->ErrorCode |= HAL_LTDC_ERROR_FU;
+ 80040a6:	687b      	ldr	r3, [r7, #4]
+ 80040a8:	f8d3 30a4 	ldr.w	r3, [r3, #164]	@ 0xa4
+ 80040ac:	f043 0202 	orr.w	r2, r3, #2
+ 80040b0:	687b      	ldr	r3, [r7, #4]
+ 80040b2:	f8c3 20a4 	str.w	r2, [r3, #164]	@ 0xa4
+
+    /* Change LTDC state */
+    hltdc->State = HAL_LTDC_STATE_ERROR;
+ 80040b6:	687b      	ldr	r3, [r7, #4]
+ 80040b8:	2204      	movs	r2, #4
+ 80040ba:	f883 20a1 	strb.w	r2, [r3, #161]	@ 0xa1
+
+    /* Process unlocked */
+    __HAL_UNLOCK(hltdc);
+ 80040be:	687b      	ldr	r3, [r7, #4]
+ 80040c0:	2200      	movs	r2, #0
+ 80040c2:	f883 20a0 	strb.w	r2, [r3, #160]	@ 0xa0
+#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
+    /*Call registered error callback*/
+    hltdc->ErrorCallback(hltdc);
+#else
+    /* Call legacy error callback*/
+    HAL_LTDC_ErrorCallback(hltdc);
+ 80040c6:	6878      	ldr	r0, [r7, #4]
+ 80040c8:	f000 f846 	bl	8004158 <HAL_LTDC_ErrorCallback>
+#endif /* USE_HAL_LTDC_REGISTER_CALLBACKS */
+  }
+
+  /* Line Interrupt management ************************************************/
+  if (((isrflags & LTDC_ISR_LIF) != 0U) && ((itsources & LTDC_IER_LIE) != 0U))
+ 80040cc:	68fb      	ldr	r3, [r7, #12]
+ 80040ce:	f003 0301 	and.w	r3, r3, #1
+ 80040d2:	2b00      	cmp	r3, #0
+ 80040d4:	d01b      	beq.n	800410e <HAL_LTDC_IRQHandler+0xfe>
+ 80040d6:	68bb      	ldr	r3, [r7, #8]
+ 80040d8:	f003 0301 	and.w	r3, r3, #1
+ 80040dc:	2b00      	cmp	r3, #0
+ 80040de:	d016      	beq.n	800410e <HAL_LTDC_IRQHandler+0xfe>
+  {
+    /* Disable the Line interrupt */
+    __HAL_LTDC_DISABLE_IT(hltdc, LTDC_IT_LI);
+ 80040e0:	687b      	ldr	r3, [r7, #4]
+ 80040e2:	681b      	ldr	r3, [r3, #0]
+ 80040e4:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
+ 80040e6:	687b      	ldr	r3, [r7, #4]
+ 80040e8:	681b      	ldr	r3, [r3, #0]
+ 80040ea:	f022 0201 	bic.w	r2, r2, #1
+ 80040ee:	635a      	str	r2, [r3, #52]	@ 0x34
+
+    /* Clear the Line interrupt flag */
+    __HAL_LTDC_CLEAR_FLAG(hltdc, LTDC_FLAG_LI);
+ 80040f0:	687b      	ldr	r3, [r7, #4]
+ 80040f2:	681b      	ldr	r3, [r3, #0]
+ 80040f4:	2201      	movs	r2, #1
+ 80040f6:	63da      	str	r2, [r3, #60]	@ 0x3c
+
+    /* Change LTDC state */
+    hltdc->State = HAL_LTDC_STATE_READY;
+ 80040f8:	687b      	ldr	r3, [r7, #4]
+ 80040fa:	2201      	movs	r2, #1
+ 80040fc:	f883 20a1 	strb.w	r2, [r3, #161]	@ 0xa1
+
+    /* Process unlocked */
+    __HAL_UNLOCK(hltdc);
+ 8004100:	687b      	ldr	r3, [r7, #4]
+ 8004102:	2200      	movs	r2, #0
+ 8004104:	f883 20a0 	strb.w	r2, [r3, #160]	@ 0xa0
+#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
+    /*Call registered Line Event callback */
+    hltdc->LineEventCallback(hltdc);
+#else
+    /*Call Legacy Line Event callback */
+    HAL_LTDC_LineEventCallback(hltdc);
+ 8004108:	6878      	ldr	r0, [r7, #4]
+ 800410a:	f000 f82f 	bl	800416c <HAL_LTDC_LineEventCallback>
+#endif /* USE_HAL_LTDC_REGISTER_CALLBACKS */
+  }
+
+  /* Register reload Interrupt management ***************************************/
+  if (((isrflags & LTDC_ISR_RRIF) != 0U) && ((itsources & LTDC_IER_RRIE) != 0U))
+ 800410e:	68fb      	ldr	r3, [r7, #12]
+ 8004110:	f003 0308 	and.w	r3, r3, #8
+ 8004114:	2b00      	cmp	r3, #0
+ 8004116:	d01b      	beq.n	8004150 <HAL_LTDC_IRQHandler+0x140>
+ 8004118:	68bb      	ldr	r3, [r7, #8]
+ 800411a:	f003 0308 	and.w	r3, r3, #8
+ 800411e:	2b00      	cmp	r3, #0
+ 8004120:	d016      	beq.n	8004150 <HAL_LTDC_IRQHandler+0x140>
+  {
+    /* Disable the register reload interrupt */
+    __HAL_LTDC_DISABLE_IT(hltdc, LTDC_IT_RR);
+ 8004122:	687b      	ldr	r3, [r7, #4]
+ 8004124:	681b      	ldr	r3, [r3, #0]
+ 8004126:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
+ 8004128:	687b      	ldr	r3, [r7, #4]
+ 800412a:	681b      	ldr	r3, [r3, #0]
+ 800412c:	f022 0208 	bic.w	r2, r2, #8
+ 8004130:	635a      	str	r2, [r3, #52]	@ 0x34
+
+    /* Clear the register reload flag */
+    __HAL_LTDC_CLEAR_FLAG(hltdc, LTDC_FLAG_RR);
+ 8004132:	687b      	ldr	r3, [r7, #4]
+ 8004134:	681b      	ldr	r3, [r3, #0]
+ 8004136:	2208      	movs	r2, #8
+ 8004138:	63da      	str	r2, [r3, #60]	@ 0x3c
+
+    /* Change LTDC state */
+    hltdc->State = HAL_LTDC_STATE_READY;
+ 800413a:	687b      	ldr	r3, [r7, #4]
+ 800413c:	2201      	movs	r2, #1
+ 800413e:	f883 20a1 	strb.w	r2, [r3, #161]	@ 0xa1
+
+    /* Process unlocked */
+    __HAL_UNLOCK(hltdc);
+ 8004142:	687b      	ldr	r3, [r7, #4]
+ 8004144:	2200      	movs	r2, #0
+ 8004146:	f883 20a0 	strb.w	r2, [r3, #160]	@ 0xa0
+#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
+    /*Call registered reload Event callback */
+    hltdc->ReloadEventCallback(hltdc);
+#else
+    /*Call Legacy Reload Event callback */
+    HAL_LTDC_ReloadEventCallback(hltdc);
+ 800414a:	6878      	ldr	r0, [r7, #4]
+ 800414c:	f000 f818 	bl	8004180 <HAL_LTDC_ReloadEventCallback>
+#endif /* USE_HAL_LTDC_REGISTER_CALLBACKS */
+  }
+}
+ 8004150:	bf00      	nop
+ 8004152:	3710      	adds	r7, #16
+ 8004154:	46bd      	mov	sp, r7
+ 8004156:	bd80      	pop	{r7, pc}
+
+08004158 <HAL_LTDC_ErrorCallback>:
+  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
+  *                the configuration information for the LTDC.
+  * @retval None
+  */
+__weak void HAL_LTDC_ErrorCallback(LTDC_HandleTypeDef *hltdc)
+{
+ 8004158:	b480      	push	{r7}
+ 800415a:	b083      	sub	sp, #12
+ 800415c:	af00      	add	r7, sp, #0
+ 800415e:	6078      	str	r0, [r7, #4]
+  UNUSED(hltdc);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_LTDC_ErrorCallback could be implemented in the user file
+   */
+}
+ 8004160:	bf00      	nop
+ 8004162:	370c      	adds	r7, #12
+ 8004164:	46bd      	mov	sp, r7
+ 8004166:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800416a:	4770      	bx	lr
+
+0800416c <HAL_LTDC_LineEventCallback>:
+  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
+  *                the configuration information for the LTDC.
+  * @retval None
+  */
+__weak void HAL_LTDC_LineEventCallback(LTDC_HandleTypeDef *hltdc)
+{
+ 800416c:	b480      	push	{r7}
+ 800416e:	b083      	sub	sp, #12
+ 8004170:	af00      	add	r7, sp, #0
+ 8004172:	6078      	str	r0, [r7, #4]
+  UNUSED(hltdc);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_LTDC_LineEventCallback could be implemented in the user file
+   */
+}
+ 8004174:	bf00      	nop
+ 8004176:	370c      	adds	r7, #12
+ 8004178:	46bd      	mov	sp, r7
+ 800417a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800417e:	4770      	bx	lr
+
+08004180 <HAL_LTDC_ReloadEventCallback>:
+  * @param  hltdc  pointer to a LTDC_HandleTypeDef structure that contains
+  *                the configuration information for the LTDC.
+  * @retval None
+  */
+__weak void HAL_LTDC_ReloadEventCallback(LTDC_HandleTypeDef *hltdc)
+{
+ 8004180:	b480      	push	{r7}
+ 8004182:	b083      	sub	sp, #12
+ 8004184:	af00      	add	r7, sp, #0
+ 8004186:	6078      	str	r0, [r7, #4]
+  UNUSED(hltdc);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_LTDC_ReloadEvenCallback could be implemented in the user file
+   */
+}
+ 8004188:	bf00      	nop
+ 800418a:	370c      	adds	r7, #12
+ 800418c:	46bd      	mov	sp, r7
+ 800418e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8004192:	4770      	bx	lr
+
+08004194 <HAL_LTDC_ConfigLayer>:
+  *                    This parameter can be one of the following values:
+  *                    LTDC_LAYER_1 (0) or LTDC_LAYER_2 (1)
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_LTDC_ConfigLayer(LTDC_HandleTypeDef *hltdc, LTDC_LayerCfgTypeDef *pLayerCfg, uint32_t LayerIdx)
+{
+ 8004194:	b5b0      	push	{r4, r5, r7, lr}
+ 8004196:	b084      	sub	sp, #16
+ 8004198:	af00      	add	r7, sp, #0
+ 800419a:	60f8      	str	r0, [r7, #12]
+ 800419c:	60b9      	str	r1, [r7, #8]
+ 800419e:	607a      	str	r2, [r7, #4]
+  assert_param(IS_LTDC_BLENDING_FACTOR2(pLayerCfg->BlendingFactor2));
+  assert_param(IS_LTDC_CFBLL(pLayerCfg->ImageWidth));
+  assert_param(IS_LTDC_CFBLNBR(pLayerCfg->ImageHeight));
+
+  /* Process locked */
+  __HAL_LOCK(hltdc);
+ 80041a0:	68fb      	ldr	r3, [r7, #12]
+ 80041a2:	f893 30a0 	ldrb.w	r3, [r3, #160]	@ 0xa0
+ 80041a6:	2b01      	cmp	r3, #1
+ 80041a8:	d101      	bne.n	80041ae <HAL_LTDC_ConfigLayer+0x1a>
+ 80041aa:	2302      	movs	r3, #2
+ 80041ac:	e02c      	b.n	8004208 <HAL_LTDC_ConfigLayer+0x74>
+ 80041ae:	68fb      	ldr	r3, [r7, #12]
+ 80041b0:	2201      	movs	r2, #1
+ 80041b2:	f883 20a0 	strb.w	r2, [r3, #160]	@ 0xa0
+
+  /* Change LTDC peripheral state */
+  hltdc->State = HAL_LTDC_STATE_BUSY;
+ 80041b6:	68fb      	ldr	r3, [r7, #12]
+ 80041b8:	2202      	movs	r2, #2
+ 80041ba:	f883 20a1 	strb.w	r2, [r3, #161]	@ 0xa1
+
+  /* Copy new layer configuration into handle structure */
+  hltdc->LayerCfg[LayerIdx] = *pLayerCfg;
+ 80041be:	68fa      	ldr	r2, [r7, #12]
+ 80041c0:	687b      	ldr	r3, [r7, #4]
+ 80041c2:	2134      	movs	r1, #52	@ 0x34
+ 80041c4:	fb01 f303 	mul.w	r3, r1, r3
+ 80041c8:	4413      	add	r3, r2
+ 80041ca:	f103 0238 	add.w	r2, r3, #56	@ 0x38
+ 80041ce:	68bb      	ldr	r3, [r7, #8]
+ 80041d0:	4614      	mov	r4, r2
+ 80041d2:	461d      	mov	r5, r3
+ 80041d4:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
+ 80041d6:	c40f      	stmia	r4!, {r0, r1, r2, r3}
+ 80041d8:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
+ 80041da:	c40f      	stmia	r4!, {r0, r1, r2, r3}
+ 80041dc:	cd0f      	ldmia	r5!, {r0, r1, r2, r3}
+ 80041de:	c40f      	stmia	r4!, {r0, r1, r2, r3}
+ 80041e0:	682b      	ldr	r3, [r5, #0]
+ 80041e2:	6023      	str	r3, [r4, #0]
+
+  /* Configure the LTDC Layer */
+  LTDC_SetConfig(hltdc, pLayerCfg, LayerIdx);
+ 80041e4:	687a      	ldr	r2, [r7, #4]
+ 80041e6:	68b9      	ldr	r1, [r7, #8]
+ 80041e8:	68f8      	ldr	r0, [r7, #12]
+ 80041ea:	f000 f811 	bl	8004210 <LTDC_SetConfig>
+
+  /* Set the Immediate Reload type */
+  hltdc->Instance->SRCR = LTDC_SRCR_IMR;
+ 80041ee:	68fb      	ldr	r3, [r7, #12]
+ 80041f0:	681b      	ldr	r3, [r3, #0]
+ 80041f2:	2201      	movs	r2, #1
+ 80041f4:	625a      	str	r2, [r3, #36]	@ 0x24
+
+  /* Initialize the LTDC state*/
+  hltdc->State  = HAL_LTDC_STATE_READY;
+ 80041f6:	68fb      	ldr	r3, [r7, #12]
+ 80041f8:	2201      	movs	r2, #1
+ 80041fa:	f883 20a1 	strb.w	r2, [r3, #161]	@ 0xa1
+
+  /* Process unlocked */
+  __HAL_UNLOCK(hltdc);
+ 80041fe:	68fb      	ldr	r3, [r7, #12]
+ 8004200:	2200      	movs	r2, #0
+ 8004202:	f883 20a0 	strb.w	r2, [r3, #160]	@ 0xa0
+
+  return HAL_OK;
+ 8004206:	2300      	movs	r3, #0
+}
+ 8004208:	4618      	mov	r0, r3
+ 800420a:	3710      	adds	r7, #16
+ 800420c:	46bd      	mov	sp, r7
+ 800420e:	bdb0      	pop	{r4, r5, r7, pc}
+
+08004210 <LTDC_SetConfig>:
+  * @param  LayerIdx  LTDC Layer index.
+  *                   This parameter can be one of the following values: LTDC_LAYER_1 (0) or LTDC_LAYER_2 (1)
+  * @retval None
+  */
+static void LTDC_SetConfig(LTDC_HandleTypeDef *hltdc, LTDC_LayerCfgTypeDef *pLayerCfg, uint32_t LayerIdx)
+{
+ 8004210:	b480      	push	{r7}
+ 8004212:	b089      	sub	sp, #36	@ 0x24
+ 8004214:	af00      	add	r7, sp, #0
+ 8004216:	60f8      	str	r0, [r7, #12]
+ 8004218:	60b9      	str	r1, [r7, #8]
+ 800421a:	607a      	str	r2, [r7, #4]
+  uint32_t tmp;
+  uint32_t tmp1;
+  uint32_t tmp2;
+
+  /* Configure the horizontal start and stop position */
+  tmp = ((pLayerCfg->WindowX1 + ((hltdc->Instance->BPCR & LTDC_BPCR_AHBP) >> 16U)) << 16U);
+ 800421c:	68bb      	ldr	r3, [r7, #8]
+ 800421e:	685a      	ldr	r2, [r3, #4]
+ 8004220:	68fb      	ldr	r3, [r7, #12]
+ 8004222:	681b      	ldr	r3, [r3, #0]
+ 8004224:	68db      	ldr	r3, [r3, #12]
+ 8004226:	0c1b      	lsrs	r3, r3, #16
+ 8004228:	f3c3 030b 	ubfx	r3, r3, #0, #12
+ 800422c:	4413      	add	r3, r2
+ 800422e:	041b      	lsls	r3, r3, #16
+ 8004230:	61fb      	str	r3, [r7, #28]
+  LTDC_LAYER(hltdc, LayerIdx)->WHPCR &= ~(LTDC_LxWHPCR_WHSTPOS | LTDC_LxWHPCR_WHSPPOS);
+ 8004232:	68fb      	ldr	r3, [r7, #12]
+ 8004234:	681b      	ldr	r3, [r3, #0]
+ 8004236:	461a      	mov	r2, r3
+ 8004238:	687b      	ldr	r3, [r7, #4]
+ 800423a:	01db      	lsls	r3, r3, #7
+ 800423c:	4413      	add	r3, r2
+ 800423e:	3384      	adds	r3, #132	@ 0x84
+ 8004240:	685b      	ldr	r3, [r3, #4]
+ 8004242:	68fa      	ldr	r2, [r7, #12]
+ 8004244:	6812      	ldr	r2, [r2, #0]
+ 8004246:	4611      	mov	r1, r2
+ 8004248:	687a      	ldr	r2, [r7, #4]
+ 800424a:	01d2      	lsls	r2, r2, #7
+ 800424c:	440a      	add	r2, r1
+ 800424e:	3284      	adds	r2, #132	@ 0x84
+ 8004250:	f403 4370 	and.w	r3, r3, #61440	@ 0xf000
+ 8004254:	6053      	str	r3, [r2, #4]
+  LTDC_LAYER(hltdc, LayerIdx)->WHPCR = ((pLayerCfg->WindowX0 + \
+ 8004256:	68bb      	ldr	r3, [r7, #8]
+ 8004258:	681a      	ldr	r2, [r3, #0]
+                                         ((hltdc->Instance->BPCR & LTDC_BPCR_AHBP) >> 16U) + 1U) | tmp);
+ 800425a:	68fb      	ldr	r3, [r7, #12]
+ 800425c:	681b      	ldr	r3, [r3, #0]
+ 800425e:	68db      	ldr	r3, [r3, #12]
+ 8004260:	0c1b      	lsrs	r3, r3, #16
+ 8004262:	f3c3 030b 	ubfx	r3, r3, #0, #12
+  LTDC_LAYER(hltdc, LayerIdx)->WHPCR = ((pLayerCfg->WindowX0 + \
+ 8004266:	4413      	add	r3, r2
+                                         ((hltdc->Instance->BPCR & LTDC_BPCR_AHBP) >> 16U) + 1U) | tmp);
+ 8004268:	1c5a      	adds	r2, r3, #1
+  LTDC_LAYER(hltdc, LayerIdx)->WHPCR = ((pLayerCfg->WindowX0 + \
+ 800426a:	68fb      	ldr	r3, [r7, #12]
+ 800426c:	681b      	ldr	r3, [r3, #0]
+ 800426e:	4619      	mov	r1, r3
+ 8004270:	687b      	ldr	r3, [r7, #4]
+ 8004272:	01db      	lsls	r3, r3, #7
+ 8004274:	440b      	add	r3, r1
+ 8004276:	3384      	adds	r3, #132	@ 0x84
+ 8004278:	4619      	mov	r1, r3
+                                         ((hltdc->Instance->BPCR & LTDC_BPCR_AHBP) >> 16U) + 1U) | tmp);
+ 800427a:	69fb      	ldr	r3, [r7, #28]
+ 800427c:	4313      	orrs	r3, r2
+  LTDC_LAYER(hltdc, LayerIdx)->WHPCR = ((pLayerCfg->WindowX0 + \
+ 800427e:	604b      	str	r3, [r1, #4]
+
+  /* Configure the vertical start and stop position */
+  tmp = ((pLayerCfg->WindowY1 + (hltdc->Instance->BPCR & LTDC_BPCR_AVBP)) << 16U);
+ 8004280:	68bb      	ldr	r3, [r7, #8]
+ 8004282:	68da      	ldr	r2, [r3, #12]
+ 8004284:	68fb      	ldr	r3, [r7, #12]
+ 8004286:	681b      	ldr	r3, [r3, #0]
+ 8004288:	68db      	ldr	r3, [r3, #12]
+ 800428a:	f3c3 030a 	ubfx	r3, r3, #0, #11
+ 800428e:	4413      	add	r3, r2
+ 8004290:	041b      	lsls	r3, r3, #16
+ 8004292:	61fb      	str	r3, [r7, #28]
+  LTDC_LAYER(hltdc, LayerIdx)->WVPCR &= ~(LTDC_LxWVPCR_WVSTPOS | LTDC_LxWVPCR_WVSPPOS);
+ 8004294:	68fb      	ldr	r3, [r7, #12]
+ 8004296:	681b      	ldr	r3, [r3, #0]
+ 8004298:	461a      	mov	r2, r3
+ 800429a:	687b      	ldr	r3, [r7, #4]
+ 800429c:	01db      	lsls	r3, r3, #7
+ 800429e:	4413      	add	r3, r2
+ 80042a0:	3384      	adds	r3, #132	@ 0x84
+ 80042a2:	689b      	ldr	r3, [r3, #8]
+ 80042a4:	68fa      	ldr	r2, [r7, #12]
+ 80042a6:	6812      	ldr	r2, [r2, #0]
+ 80042a8:	4611      	mov	r1, r2
+ 80042aa:	687a      	ldr	r2, [r7, #4]
+ 80042ac:	01d2      	lsls	r2, r2, #7
+ 80042ae:	440a      	add	r2, r1
+ 80042b0:	3284      	adds	r2, #132	@ 0x84
+ 80042b2:	f403 4370 	and.w	r3, r3, #61440	@ 0xf000
+ 80042b6:	6093      	str	r3, [r2, #8]
+  LTDC_LAYER(hltdc, LayerIdx)->WVPCR  = ((pLayerCfg->WindowY0 + (hltdc->Instance->BPCR & LTDC_BPCR_AVBP) + 1U) | tmp);
+ 80042b8:	68bb      	ldr	r3, [r7, #8]
+ 80042ba:	689a      	ldr	r2, [r3, #8]
+ 80042bc:	68fb      	ldr	r3, [r7, #12]
+ 80042be:	681b      	ldr	r3, [r3, #0]
+ 80042c0:	68db      	ldr	r3, [r3, #12]
+ 80042c2:	f3c3 030a 	ubfx	r3, r3, #0, #11
+ 80042c6:	4413      	add	r3, r2
+ 80042c8:	1c5a      	adds	r2, r3, #1
+ 80042ca:	68fb      	ldr	r3, [r7, #12]
+ 80042cc:	681b      	ldr	r3, [r3, #0]
+ 80042ce:	4619      	mov	r1, r3
+ 80042d0:	687b      	ldr	r3, [r7, #4]
+ 80042d2:	01db      	lsls	r3, r3, #7
+ 80042d4:	440b      	add	r3, r1
+ 80042d6:	3384      	adds	r3, #132	@ 0x84
+ 80042d8:	4619      	mov	r1, r3
+ 80042da:	69fb      	ldr	r3, [r7, #28]
+ 80042dc:	4313      	orrs	r3, r2
+ 80042de:	608b      	str	r3, [r1, #8]
+
+  /* Specifies the pixel format */
+  LTDC_LAYER(hltdc, LayerIdx)->PFCR &= ~(LTDC_LxPFCR_PF);
+ 80042e0:	68fb      	ldr	r3, [r7, #12]
+ 80042e2:	681b      	ldr	r3, [r3, #0]
+ 80042e4:	461a      	mov	r2, r3
+ 80042e6:	687b      	ldr	r3, [r7, #4]
+ 80042e8:	01db      	lsls	r3, r3, #7
+ 80042ea:	4413      	add	r3, r2
+ 80042ec:	3384      	adds	r3, #132	@ 0x84
+ 80042ee:	691b      	ldr	r3, [r3, #16]
+ 80042f0:	68fa      	ldr	r2, [r7, #12]
+ 80042f2:	6812      	ldr	r2, [r2, #0]
+ 80042f4:	4611      	mov	r1, r2
+ 80042f6:	687a      	ldr	r2, [r7, #4]
+ 80042f8:	01d2      	lsls	r2, r2, #7
+ 80042fa:	440a      	add	r2, r1
+ 80042fc:	3284      	adds	r2, #132	@ 0x84
+ 80042fe:	f023 0307 	bic.w	r3, r3, #7
+ 8004302:	6113      	str	r3, [r2, #16]
+  LTDC_LAYER(hltdc, LayerIdx)->PFCR = (pLayerCfg->PixelFormat);
+ 8004304:	68fb      	ldr	r3, [r7, #12]
+ 8004306:	681b      	ldr	r3, [r3, #0]
+ 8004308:	461a      	mov	r2, r3
+ 800430a:	687b      	ldr	r3, [r7, #4]
+ 800430c:	01db      	lsls	r3, r3, #7
+ 800430e:	4413      	add	r3, r2
+ 8004310:	3384      	adds	r3, #132	@ 0x84
+ 8004312:	461a      	mov	r2, r3
+ 8004314:	68bb      	ldr	r3, [r7, #8]
+ 8004316:	691b      	ldr	r3, [r3, #16]
+ 8004318:	6113      	str	r3, [r2, #16]
+
+  /* Configure the default color values */
+  tmp = ((uint32_t)(pLayerCfg->Backcolor.Green) << 8U);
+ 800431a:	68bb      	ldr	r3, [r7, #8]
+ 800431c:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
+ 8004320:	021b      	lsls	r3, r3, #8
+ 8004322:	61fb      	str	r3, [r7, #28]
+  tmp1 = ((uint32_t)(pLayerCfg->Backcolor.Red) << 16U);
+ 8004324:	68bb      	ldr	r3, [r7, #8]
+ 8004326:	f893 3032 	ldrb.w	r3, [r3, #50]	@ 0x32
+ 800432a:	041b      	lsls	r3, r3, #16
+ 800432c:	61bb      	str	r3, [r7, #24]
+  tmp2 = (pLayerCfg->Alpha0 << 24U);
+ 800432e:	68bb      	ldr	r3, [r7, #8]
+ 8004330:	699b      	ldr	r3, [r3, #24]
+ 8004332:	061b      	lsls	r3, r3, #24
+ 8004334:	617b      	str	r3, [r7, #20]
+  WRITE_REG(LTDC_LAYER(hltdc, LayerIdx)->DCCR, (pLayerCfg->Backcolor.Blue | tmp | tmp1 | tmp2));
+ 8004336:	68bb      	ldr	r3, [r7, #8]
+ 8004338:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
+ 800433c:	461a      	mov	r2, r3
+ 800433e:	69fb      	ldr	r3, [r7, #28]
+ 8004340:	431a      	orrs	r2, r3
+ 8004342:	69bb      	ldr	r3, [r7, #24]
+ 8004344:	431a      	orrs	r2, r3
+ 8004346:	68fb      	ldr	r3, [r7, #12]
+ 8004348:	681b      	ldr	r3, [r3, #0]
+ 800434a:	4619      	mov	r1, r3
+ 800434c:	687b      	ldr	r3, [r7, #4]
+ 800434e:	01db      	lsls	r3, r3, #7
+ 8004350:	440b      	add	r3, r1
+ 8004352:	3384      	adds	r3, #132	@ 0x84
+ 8004354:	4619      	mov	r1, r3
+ 8004356:	697b      	ldr	r3, [r7, #20]
+ 8004358:	4313      	orrs	r3, r2
+ 800435a:	618b      	str	r3, [r1, #24]
+
+  /* Specifies the constant alpha value */
+  LTDC_LAYER(hltdc, LayerIdx)->CACR &= ~(LTDC_LxCACR_CONSTA);
+ 800435c:	68fb      	ldr	r3, [r7, #12]
+ 800435e:	681b      	ldr	r3, [r3, #0]
+ 8004360:	461a      	mov	r2, r3
+ 8004362:	687b      	ldr	r3, [r7, #4]
+ 8004364:	01db      	lsls	r3, r3, #7
+ 8004366:	4413      	add	r3, r2
+ 8004368:	3384      	adds	r3, #132	@ 0x84
+ 800436a:	695b      	ldr	r3, [r3, #20]
+ 800436c:	68fa      	ldr	r2, [r7, #12]
+ 800436e:	6812      	ldr	r2, [r2, #0]
+ 8004370:	4611      	mov	r1, r2
+ 8004372:	687a      	ldr	r2, [r7, #4]
+ 8004374:	01d2      	lsls	r2, r2, #7
+ 8004376:	440a      	add	r2, r1
+ 8004378:	3284      	adds	r2, #132	@ 0x84
+ 800437a:	f023 03ff 	bic.w	r3, r3, #255	@ 0xff
+ 800437e:	6153      	str	r3, [r2, #20]
+  LTDC_LAYER(hltdc, LayerIdx)->CACR = (pLayerCfg->Alpha);
+ 8004380:	68fb      	ldr	r3, [r7, #12]
+ 8004382:	681b      	ldr	r3, [r3, #0]
+ 8004384:	461a      	mov	r2, r3
+ 8004386:	687b      	ldr	r3, [r7, #4]
+ 8004388:	01db      	lsls	r3, r3, #7
+ 800438a:	4413      	add	r3, r2
+ 800438c:	3384      	adds	r3, #132	@ 0x84
+ 800438e:	461a      	mov	r2, r3
+ 8004390:	68bb      	ldr	r3, [r7, #8]
+ 8004392:	695b      	ldr	r3, [r3, #20]
+ 8004394:	6153      	str	r3, [r2, #20]
+
+  /* Specifies the blending factors */
+  LTDC_LAYER(hltdc, LayerIdx)->BFCR &= ~(LTDC_LxBFCR_BF2 | LTDC_LxBFCR_BF1);
+ 8004396:	68fb      	ldr	r3, [r7, #12]
+ 8004398:	681b      	ldr	r3, [r3, #0]
+ 800439a:	461a      	mov	r2, r3
+ 800439c:	687b      	ldr	r3, [r7, #4]
+ 800439e:	01db      	lsls	r3, r3, #7
+ 80043a0:	4413      	add	r3, r2
+ 80043a2:	3384      	adds	r3, #132	@ 0x84
+ 80043a4:	69db      	ldr	r3, [r3, #28]
+ 80043a6:	68fa      	ldr	r2, [r7, #12]
+ 80043a8:	6812      	ldr	r2, [r2, #0]
+ 80043aa:	4611      	mov	r1, r2
+ 80043ac:	687a      	ldr	r2, [r7, #4]
+ 80043ae:	01d2      	lsls	r2, r2, #7
+ 80043b0:	440a      	add	r2, r1
+ 80043b2:	3284      	adds	r2, #132	@ 0x84
+ 80043b4:	f423 63e0 	bic.w	r3, r3, #1792	@ 0x700
+ 80043b8:	f023 0307 	bic.w	r3, r3, #7
+ 80043bc:	61d3      	str	r3, [r2, #28]
+  LTDC_LAYER(hltdc, LayerIdx)->BFCR = (pLayerCfg->BlendingFactor1 | pLayerCfg->BlendingFactor2);
+ 80043be:	68bb      	ldr	r3, [r7, #8]
+ 80043c0:	69da      	ldr	r2, [r3, #28]
+ 80043c2:	68bb      	ldr	r3, [r7, #8]
+ 80043c4:	6a1b      	ldr	r3, [r3, #32]
+ 80043c6:	68f9      	ldr	r1, [r7, #12]
+ 80043c8:	6809      	ldr	r1, [r1, #0]
+ 80043ca:	4608      	mov	r0, r1
+ 80043cc:	6879      	ldr	r1, [r7, #4]
+ 80043ce:	01c9      	lsls	r1, r1, #7
+ 80043d0:	4401      	add	r1, r0
+ 80043d2:	3184      	adds	r1, #132	@ 0x84
+ 80043d4:	4313      	orrs	r3, r2
+ 80043d6:	61cb      	str	r3, [r1, #28]
+
+  /* Configure the color frame buffer start address */
+  WRITE_REG(LTDC_LAYER(hltdc, LayerIdx)->CFBAR, pLayerCfg->FBStartAdress);
+ 80043d8:	68fb      	ldr	r3, [r7, #12]
+ 80043da:	681b      	ldr	r3, [r3, #0]
+ 80043dc:	461a      	mov	r2, r3
+ 80043de:	687b      	ldr	r3, [r7, #4]
+ 80043e0:	01db      	lsls	r3, r3, #7
+ 80043e2:	4413      	add	r3, r2
+ 80043e4:	3384      	adds	r3, #132	@ 0x84
+ 80043e6:	461a      	mov	r2, r3
+ 80043e8:	68bb      	ldr	r3, [r7, #8]
+ 80043ea:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80043ec:	6293      	str	r3, [r2, #40]	@ 0x28
+
+  if (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB8888)
+ 80043ee:	68bb      	ldr	r3, [r7, #8]
+ 80043f0:	691b      	ldr	r3, [r3, #16]
+ 80043f2:	2b00      	cmp	r3, #0
+ 80043f4:	d102      	bne.n	80043fc <LTDC_SetConfig+0x1ec>
+  {
+    tmp = 4U;
+ 80043f6:	2304      	movs	r3, #4
+ 80043f8:	61fb      	str	r3, [r7, #28]
+ 80043fa:	e01b      	b.n	8004434 <LTDC_SetConfig+0x224>
+  }
+  else if (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_RGB888)
+ 80043fc:	68bb      	ldr	r3, [r7, #8]
+ 80043fe:	691b      	ldr	r3, [r3, #16]
+ 8004400:	2b01      	cmp	r3, #1
+ 8004402:	d102      	bne.n	800440a <LTDC_SetConfig+0x1fa>
+  {
+    tmp = 3U;
+ 8004404:	2303      	movs	r3, #3
+ 8004406:	61fb      	str	r3, [r7, #28]
+ 8004408:	e014      	b.n	8004434 <LTDC_SetConfig+0x224>
+  }
+  else if ((pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB4444) || \
+ 800440a:	68bb      	ldr	r3, [r7, #8]
+ 800440c:	691b      	ldr	r3, [r3, #16]
+ 800440e:	2b04      	cmp	r3, #4
+ 8004410:	d00b      	beq.n	800442a <LTDC_SetConfig+0x21a>
+           (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_RGB565)   || \
+ 8004412:	68bb      	ldr	r3, [r7, #8]
+ 8004414:	691b      	ldr	r3, [r3, #16]
+  else if ((pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB4444) || \
+ 8004416:	2b02      	cmp	r3, #2
+ 8004418:	d007      	beq.n	800442a <LTDC_SetConfig+0x21a>
+           (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB1555) || \
+ 800441a:	68bb      	ldr	r3, [r7, #8]
+ 800441c:	691b      	ldr	r3, [r3, #16]
+           (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_RGB565)   || \
+ 800441e:	2b03      	cmp	r3, #3
+ 8004420:	d003      	beq.n	800442a <LTDC_SetConfig+0x21a>
+           (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_AL88))
+ 8004422:	68bb      	ldr	r3, [r7, #8]
+ 8004424:	691b      	ldr	r3, [r3, #16]
+           (pLayerCfg->PixelFormat == LTDC_PIXEL_FORMAT_ARGB1555) || \
+ 8004426:	2b07      	cmp	r3, #7
+ 8004428:	d102      	bne.n	8004430 <LTDC_SetConfig+0x220>
+  {
+    tmp = 2U;
+ 800442a:	2302      	movs	r3, #2
+ 800442c:	61fb      	str	r3, [r7, #28]
+ 800442e:	e001      	b.n	8004434 <LTDC_SetConfig+0x224>
+  }
+  else
+  {
+    tmp = 1U;
+ 8004430:	2301      	movs	r3, #1
+ 8004432:	61fb      	str	r3, [r7, #28]
+  }
+
+  /* Configure the color frame buffer pitch in byte */
+  LTDC_LAYER(hltdc, LayerIdx)->CFBLR  &= ~(LTDC_LxCFBLR_CFBLL | LTDC_LxCFBLR_CFBP);
+ 8004434:	68fb      	ldr	r3, [r7, #12]
+ 8004436:	681b      	ldr	r3, [r3, #0]
+ 8004438:	461a      	mov	r2, r3
+ 800443a:	687b      	ldr	r3, [r7, #4]
+ 800443c:	01db      	lsls	r3, r3, #7
+ 800443e:	4413      	add	r3, r2
+ 8004440:	3384      	adds	r3, #132	@ 0x84
+ 8004442:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 8004444:	68fa      	ldr	r2, [r7, #12]
+ 8004446:	6812      	ldr	r2, [r2, #0]
+ 8004448:	4611      	mov	r1, r2
+ 800444a:	687a      	ldr	r2, [r7, #4]
+ 800444c:	01d2      	lsls	r2, r2, #7
+ 800444e:	440a      	add	r2, r1
+ 8004450:	3284      	adds	r2, #132	@ 0x84
+ 8004452:	f003 23e0 	and.w	r3, r3, #3758153728	@ 0xe000e000
+ 8004456:	62d3      	str	r3, [r2, #44]	@ 0x2c
+  LTDC_LAYER(hltdc, LayerIdx)->CFBLR  = (((pLayerCfg->ImageWidth * tmp) << 16U) | \
+ 8004458:	68bb      	ldr	r3, [r7, #8]
+ 800445a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
+ 800445c:	69fa      	ldr	r2, [r7, #28]
+ 800445e:	fb02 f303 	mul.w	r3, r2, r3
+ 8004462:	041a      	lsls	r2, r3, #16
+                                         (((pLayerCfg->WindowX1 - pLayerCfg->WindowX0) * tmp)  + 3U));
+ 8004464:	68bb      	ldr	r3, [r7, #8]
+ 8004466:	6859      	ldr	r1, [r3, #4]
+ 8004468:	68bb      	ldr	r3, [r7, #8]
+ 800446a:	681b      	ldr	r3, [r3, #0]
+ 800446c:	1acb      	subs	r3, r1, r3
+ 800446e:	69f9      	ldr	r1, [r7, #28]
+ 8004470:	fb01 f303 	mul.w	r3, r1, r3
+ 8004474:	3303      	adds	r3, #3
+  LTDC_LAYER(hltdc, LayerIdx)->CFBLR  = (((pLayerCfg->ImageWidth * tmp) << 16U) | \
+ 8004476:	68f9      	ldr	r1, [r7, #12]
+ 8004478:	6809      	ldr	r1, [r1, #0]
+ 800447a:	4608      	mov	r0, r1
+ 800447c:	6879      	ldr	r1, [r7, #4]
+ 800447e:	01c9      	lsls	r1, r1, #7
+ 8004480:	4401      	add	r1, r0
+ 8004482:	3184      	adds	r1, #132	@ 0x84
+ 8004484:	4313      	orrs	r3, r2
+ 8004486:	62cb      	str	r3, [r1, #44]	@ 0x2c
+  /* Configure the frame buffer line number */
+  LTDC_LAYER(hltdc, LayerIdx)->CFBLNR  &= ~(LTDC_LxCFBLNR_CFBLNBR);
+ 8004488:	68fb      	ldr	r3, [r7, #12]
+ 800448a:	681b      	ldr	r3, [r3, #0]
+ 800448c:	461a      	mov	r2, r3
+ 800448e:	687b      	ldr	r3, [r7, #4]
+ 8004490:	01db      	lsls	r3, r3, #7
+ 8004492:	4413      	add	r3, r2
+ 8004494:	3384      	adds	r3, #132	@ 0x84
+ 8004496:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8004498:	68fa      	ldr	r2, [r7, #12]
+ 800449a:	6812      	ldr	r2, [r2, #0]
+ 800449c:	4611      	mov	r1, r2
+ 800449e:	687a      	ldr	r2, [r7, #4]
+ 80044a0:	01d2      	lsls	r2, r2, #7
+ 80044a2:	440a      	add	r2, r1
+ 80044a4:	3284      	adds	r2, #132	@ 0x84
+ 80044a6:	f423 63ff 	bic.w	r3, r3, #2040	@ 0x7f8
+ 80044aa:	f023 0307 	bic.w	r3, r3, #7
+ 80044ae:	6313      	str	r3, [r2, #48]	@ 0x30
+  LTDC_LAYER(hltdc, LayerIdx)->CFBLNR  = (pLayerCfg->ImageHeight);
+ 80044b0:	68fb      	ldr	r3, [r7, #12]
+ 80044b2:	681b      	ldr	r3, [r3, #0]
+ 80044b4:	461a      	mov	r2, r3
+ 80044b6:	687b      	ldr	r3, [r7, #4]
+ 80044b8:	01db      	lsls	r3, r3, #7
+ 80044ba:	4413      	add	r3, r2
+ 80044bc:	3384      	adds	r3, #132	@ 0x84
+ 80044be:	461a      	mov	r2, r3
+ 80044c0:	68bb      	ldr	r3, [r7, #8]
+ 80044c2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 80044c4:	6313      	str	r3, [r2, #48]	@ 0x30
+
+  /* Enable LTDC_Layer by setting LEN bit */
+  LTDC_LAYER(hltdc, LayerIdx)->CR |= (uint32_t)LTDC_LxCR_LEN;
+ 80044c6:	68fb      	ldr	r3, [r7, #12]
+ 80044c8:	681b      	ldr	r3, [r3, #0]
+ 80044ca:	461a      	mov	r2, r3
+ 80044cc:	687b      	ldr	r3, [r7, #4]
+ 80044ce:	01db      	lsls	r3, r3, #7
+ 80044d0:	4413      	add	r3, r2
+ 80044d2:	3384      	adds	r3, #132	@ 0x84
+ 80044d4:	681b      	ldr	r3, [r3, #0]
+ 80044d6:	68fa      	ldr	r2, [r7, #12]
+ 80044d8:	6812      	ldr	r2, [r2, #0]
+ 80044da:	4611      	mov	r1, r2
+ 80044dc:	687a      	ldr	r2, [r7, #4]
+ 80044de:	01d2      	lsls	r2, r2, #7
+ 80044e0:	440a      	add	r2, r1
+ 80044e2:	3284      	adds	r2, #132	@ 0x84
+ 80044e4:	f043 0301 	orr.w	r3, r3, #1
+ 80044e8:	6013      	str	r3, [r2, #0]
+}
+ 80044ea:	bf00      	nop
+ 80044ec:	3724      	adds	r7, #36	@ 0x24
+ 80044ee:	46bd      	mov	sp, r7
+ 80044f0:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80044f4:	4770      	bx	lr
+	...
+
+080044f8 <HAL_RCC_OscConfig>:
+  *         supported by this API. User should request a transition to HSE Off
+  *         first and then HSE On or HSE Bypass.
+  * @retval HAL status
+  */
+__weak HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef  *RCC_OscInitStruct)
+{
+ 80044f8:	b580      	push	{r7, lr}
+ 80044fa:	b086      	sub	sp, #24
+ 80044fc:	af00      	add	r7, sp, #0
+ 80044fe:	6078      	str	r0, [r7, #4]
+  uint32_t tickstart;
+  uint32_t pll_config;
+  /* Check Null pointer */
+  if (RCC_OscInitStruct == NULL)
+ 8004500:	687b      	ldr	r3, [r7, #4]
+ 8004502:	2b00      	cmp	r3, #0
+ 8004504:	d101      	bne.n	800450a <HAL_RCC_OscConfig+0x12>
+  {
+    return HAL_ERROR;
+ 8004506:	2301      	movs	r3, #1
+ 8004508:	e267      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+  }
+
+  /* Check the parameters */
+  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
+  /*------------------------------- HSE Configuration ------------------------*/
+  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
+ 800450a:	687b      	ldr	r3, [r7, #4]
+ 800450c:	681b      	ldr	r3, [r3, #0]
+ 800450e:	f003 0301 	and.w	r3, r3, #1
+ 8004512:	2b00      	cmp	r3, #0
+ 8004514:	d075      	beq.n	8004602 <HAL_RCC_OscConfig+0x10a>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
+    /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
+    if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || \
+ 8004516:	4b88      	ldr	r3, [pc, #544]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 8004518:	689b      	ldr	r3, [r3, #8]
+ 800451a:	f003 030c 	and.w	r3, r3, #12
+ 800451e:	2b04      	cmp	r3, #4
+ 8004520:	d00c      	beq.n	800453c <HAL_RCC_OscConfig+0x44>
+        ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
+ 8004522:	4b85      	ldr	r3, [pc, #532]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 8004524:	689b      	ldr	r3, [r3, #8]
+ 8004526:	f003 030c 	and.w	r3, r3, #12
+    if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || \
+ 800452a:	2b08      	cmp	r3, #8
+ 800452c:	d112      	bne.n	8004554 <HAL_RCC_OscConfig+0x5c>
+        ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
+ 800452e:	4b82      	ldr	r3, [pc, #520]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 8004530:	685b      	ldr	r3, [r3, #4]
+ 8004532:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
+ 8004536:	f5b3 0f80 	cmp.w	r3, #4194304	@ 0x400000
+ 800453a:	d10b      	bne.n	8004554 <HAL_RCC_OscConfig+0x5c>
+    {
+      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
+ 800453c:	4b7e      	ldr	r3, [pc, #504]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 800453e:	681b      	ldr	r3, [r3, #0]
+ 8004540:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
+ 8004544:	2b00      	cmp	r3, #0
+ 8004546:	d05b      	beq.n	8004600 <HAL_RCC_OscConfig+0x108>
+ 8004548:	687b      	ldr	r3, [r7, #4]
+ 800454a:	685b      	ldr	r3, [r3, #4]
+ 800454c:	2b00      	cmp	r3, #0
+ 800454e:	d157      	bne.n	8004600 <HAL_RCC_OscConfig+0x108>
+      {
+        return HAL_ERROR;
+ 8004550:	2301      	movs	r3, #1
+ 8004552:	e242      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+      }
+    }
+    else
+    {
+      /* Set the new HSE configuration ---------------------------------------*/
+      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
+ 8004554:	687b      	ldr	r3, [r7, #4]
+ 8004556:	685b      	ldr	r3, [r3, #4]
+ 8004558:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
+ 800455c:	d106      	bne.n	800456c <HAL_RCC_OscConfig+0x74>
+ 800455e:	4b76      	ldr	r3, [pc, #472]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 8004560:	681b      	ldr	r3, [r3, #0]
+ 8004562:	4a75      	ldr	r2, [pc, #468]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 8004564:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
+ 8004568:	6013      	str	r3, [r2, #0]
+ 800456a:	e01d      	b.n	80045a8 <HAL_RCC_OscConfig+0xb0>
+ 800456c:	687b      	ldr	r3, [r7, #4]
+ 800456e:	685b      	ldr	r3, [r3, #4]
+ 8004570:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
+ 8004574:	d10c      	bne.n	8004590 <HAL_RCC_OscConfig+0x98>
+ 8004576:	4b70      	ldr	r3, [pc, #448]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 8004578:	681b      	ldr	r3, [r3, #0]
+ 800457a:	4a6f      	ldr	r2, [pc, #444]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 800457c:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
+ 8004580:	6013      	str	r3, [r2, #0]
+ 8004582:	4b6d      	ldr	r3, [pc, #436]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 8004584:	681b      	ldr	r3, [r3, #0]
+ 8004586:	4a6c      	ldr	r2, [pc, #432]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 8004588:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
+ 800458c:	6013      	str	r3, [r2, #0]
+ 800458e:	e00b      	b.n	80045a8 <HAL_RCC_OscConfig+0xb0>
+ 8004590:	4b69      	ldr	r3, [pc, #420]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 8004592:	681b      	ldr	r3, [r3, #0]
+ 8004594:	4a68      	ldr	r2, [pc, #416]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 8004596:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
+ 800459a:	6013      	str	r3, [r2, #0]
+ 800459c:	4b66      	ldr	r3, [pc, #408]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 800459e:	681b      	ldr	r3, [r3, #0]
+ 80045a0:	4a65      	ldr	r2, [pc, #404]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 80045a2:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
+ 80045a6:	6013      	str	r3, [r2, #0]
+
+      /* Check the HSE State */
+      if ((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
+ 80045a8:	687b      	ldr	r3, [r7, #4]
+ 80045aa:	685b      	ldr	r3, [r3, #4]
+ 80045ac:	2b00      	cmp	r3, #0
+ 80045ae:	d013      	beq.n	80045d8 <HAL_RCC_OscConfig+0xe0>
+      {
+        /* Get Start Tick */
+        tickstart = HAL_GetTick();
+ 80045b0:	f7fd f84c 	bl	800164c <HAL_GetTick>
+ 80045b4:	6138      	str	r0, [r7, #16]
+
+        /* Wait till HSE is ready */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+ 80045b6:	e008      	b.n	80045ca <HAL_RCC_OscConfig+0xd2>
+        {
+          if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
+ 80045b8:	f7fd f848 	bl	800164c <HAL_GetTick>
+ 80045bc:	4602      	mov	r2, r0
+ 80045be:	693b      	ldr	r3, [r7, #16]
+ 80045c0:	1ad3      	subs	r3, r2, r3
+ 80045c2:	2b64      	cmp	r3, #100	@ 0x64
+ 80045c4:	d901      	bls.n	80045ca <HAL_RCC_OscConfig+0xd2>
+          {
+            return HAL_TIMEOUT;
+ 80045c6:	2303      	movs	r3, #3
+ 80045c8:	e207      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+ 80045ca:	4b5b      	ldr	r3, [pc, #364]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 80045cc:	681b      	ldr	r3, [r3, #0]
+ 80045ce:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
+ 80045d2:	2b00      	cmp	r3, #0
+ 80045d4:	d0f0      	beq.n	80045b8 <HAL_RCC_OscConfig+0xc0>
+ 80045d6:	e014      	b.n	8004602 <HAL_RCC_OscConfig+0x10a>
+        }
+      }
+      else
+      {
+        /* Get Start Tick */
+        tickstart = HAL_GetTick();
+ 80045d8:	f7fd f838 	bl	800164c <HAL_GetTick>
+ 80045dc:	6138      	str	r0, [r7, #16]
+
+        /* Wait till HSE is bypassed or disabled */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
+ 80045de:	e008      	b.n	80045f2 <HAL_RCC_OscConfig+0xfa>
+        {
+          if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
+ 80045e0:	f7fd f834 	bl	800164c <HAL_GetTick>
+ 80045e4:	4602      	mov	r2, r0
+ 80045e6:	693b      	ldr	r3, [r7, #16]
+ 80045e8:	1ad3      	subs	r3, r2, r3
+ 80045ea:	2b64      	cmp	r3, #100	@ 0x64
+ 80045ec:	d901      	bls.n	80045f2 <HAL_RCC_OscConfig+0xfa>
+          {
+            return HAL_TIMEOUT;
+ 80045ee:	2303      	movs	r3, #3
+ 80045f0:	e1f3      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
+ 80045f2:	4b51      	ldr	r3, [pc, #324]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 80045f4:	681b      	ldr	r3, [r3, #0]
+ 80045f6:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
+ 80045fa:	2b00      	cmp	r3, #0
+ 80045fc:	d1f0      	bne.n	80045e0 <HAL_RCC_OscConfig+0xe8>
+ 80045fe:	e000      	b.n	8004602 <HAL_RCC_OscConfig+0x10a>
+      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
+ 8004600:	bf00      	nop
+        }
+      }
+    }
+  }
+  /*----------------------------- HSI Configuration --------------------------*/
+  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
+ 8004602:	687b      	ldr	r3, [r7, #4]
+ 8004604:	681b      	ldr	r3, [r3, #0]
+ 8004606:	f003 0302 	and.w	r3, r3, #2
+ 800460a:	2b00      	cmp	r3, #0
+ 800460c:	d063      	beq.n	80046d6 <HAL_RCC_OscConfig+0x1de>
+    /* Check the parameters */
+    assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
+    assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
+
+    /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
+    if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || \
+ 800460e:	4b4a      	ldr	r3, [pc, #296]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 8004610:	689b      	ldr	r3, [r3, #8]
+ 8004612:	f003 030c 	and.w	r3, r3, #12
+ 8004616:	2b00      	cmp	r3, #0
+ 8004618:	d00b      	beq.n	8004632 <HAL_RCC_OscConfig+0x13a>
+        ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
+ 800461a:	4b47      	ldr	r3, [pc, #284]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 800461c:	689b      	ldr	r3, [r3, #8]
+ 800461e:	f003 030c 	and.w	r3, r3, #12
+    if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || \
+ 8004622:	2b08      	cmp	r3, #8
+ 8004624:	d11c      	bne.n	8004660 <HAL_RCC_OscConfig+0x168>
+        ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
+ 8004626:	4b44      	ldr	r3, [pc, #272]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 8004628:	685b      	ldr	r3, [r3, #4]
+ 800462a:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
+ 800462e:	2b00      	cmp	r3, #0
+ 8004630:	d116      	bne.n	8004660 <HAL_RCC_OscConfig+0x168>
+    {
+      /* When HSI is used as system clock it will not disabled */
+      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
+ 8004632:	4b41      	ldr	r3, [pc, #260]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 8004634:	681b      	ldr	r3, [r3, #0]
+ 8004636:	f003 0302 	and.w	r3, r3, #2
+ 800463a:	2b00      	cmp	r3, #0
+ 800463c:	d005      	beq.n	800464a <HAL_RCC_OscConfig+0x152>
+ 800463e:	687b      	ldr	r3, [r7, #4]
+ 8004640:	68db      	ldr	r3, [r3, #12]
+ 8004642:	2b01      	cmp	r3, #1
+ 8004644:	d001      	beq.n	800464a <HAL_RCC_OscConfig+0x152>
+      {
+        return HAL_ERROR;
+ 8004646:	2301      	movs	r3, #1
+ 8004648:	e1c7      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+      }
+      /* Otherwise, just the calibration is allowed */
+      else
+      {
+        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
+        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
+ 800464a:	4b3b      	ldr	r3, [pc, #236]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 800464c:	681b      	ldr	r3, [r3, #0]
+ 800464e:	f023 02f8 	bic.w	r2, r3, #248	@ 0xf8
+ 8004652:	687b      	ldr	r3, [r7, #4]
+ 8004654:	691b      	ldr	r3, [r3, #16]
+ 8004656:	00db      	lsls	r3, r3, #3
+ 8004658:	4937      	ldr	r1, [pc, #220]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 800465a:	4313      	orrs	r3, r2
+ 800465c:	600b      	str	r3, [r1, #0]
+      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
+ 800465e:	e03a      	b.n	80046d6 <HAL_RCC_OscConfig+0x1de>
+      }
+    }
+    else
+    {
+      /* Check the HSI State */
+      if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF)
+ 8004660:	687b      	ldr	r3, [r7, #4]
+ 8004662:	68db      	ldr	r3, [r3, #12]
+ 8004664:	2b00      	cmp	r3, #0
+ 8004666:	d020      	beq.n	80046aa <HAL_RCC_OscConfig+0x1b2>
+      {
+        /* Enable the Internal High Speed oscillator (HSI). */
+        __HAL_RCC_HSI_ENABLE();
+ 8004668:	4b34      	ldr	r3, [pc, #208]	@ (800473c <HAL_RCC_OscConfig+0x244>)
+ 800466a:	2201      	movs	r2, #1
+ 800466c:	601a      	str	r2, [r3, #0]
+
+        /* Get Start Tick*/
+        tickstart = HAL_GetTick();
+ 800466e:	f7fc ffed 	bl	800164c <HAL_GetTick>
+ 8004672:	6138      	str	r0, [r7, #16]
+
+        /* Wait till HSI is ready */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+ 8004674:	e008      	b.n	8004688 <HAL_RCC_OscConfig+0x190>
+        {
+          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
+ 8004676:	f7fc ffe9 	bl	800164c <HAL_GetTick>
+ 800467a:	4602      	mov	r2, r0
+ 800467c:	693b      	ldr	r3, [r7, #16]
+ 800467e:	1ad3      	subs	r3, r2, r3
+ 8004680:	2b02      	cmp	r3, #2
+ 8004682:	d901      	bls.n	8004688 <HAL_RCC_OscConfig+0x190>
+          {
+            return HAL_TIMEOUT;
+ 8004684:	2303      	movs	r3, #3
+ 8004686:	e1a8      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+ 8004688:	4b2b      	ldr	r3, [pc, #172]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 800468a:	681b      	ldr	r3, [r3, #0]
+ 800468c:	f003 0302 	and.w	r3, r3, #2
+ 8004690:	2b00      	cmp	r3, #0
+ 8004692:	d0f0      	beq.n	8004676 <HAL_RCC_OscConfig+0x17e>
+          }
+        }
+
+        /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */
+        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
+ 8004694:	4b28      	ldr	r3, [pc, #160]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 8004696:	681b      	ldr	r3, [r3, #0]
+ 8004698:	f023 02f8 	bic.w	r2, r3, #248	@ 0xf8
+ 800469c:	687b      	ldr	r3, [r7, #4]
+ 800469e:	691b      	ldr	r3, [r3, #16]
+ 80046a0:	00db      	lsls	r3, r3, #3
+ 80046a2:	4925      	ldr	r1, [pc, #148]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 80046a4:	4313      	orrs	r3, r2
+ 80046a6:	600b      	str	r3, [r1, #0]
+ 80046a8:	e015      	b.n	80046d6 <HAL_RCC_OscConfig+0x1de>
+      }
+      else
+      {
+        /* Disable the Internal High Speed oscillator (HSI). */
+        __HAL_RCC_HSI_DISABLE();
+ 80046aa:	4b24      	ldr	r3, [pc, #144]	@ (800473c <HAL_RCC_OscConfig+0x244>)
+ 80046ac:	2200      	movs	r2, #0
+ 80046ae:	601a      	str	r2, [r3, #0]
+
+        /* Get Start Tick*/
+        tickstart = HAL_GetTick();
+ 80046b0:	f7fc ffcc 	bl	800164c <HAL_GetTick>
+ 80046b4:	6138      	str	r0, [r7, #16]
+
+        /* Wait till HSI is ready */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
+ 80046b6:	e008      	b.n	80046ca <HAL_RCC_OscConfig+0x1d2>
+        {
+          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
+ 80046b8:	f7fc ffc8 	bl	800164c <HAL_GetTick>
+ 80046bc:	4602      	mov	r2, r0
+ 80046be:	693b      	ldr	r3, [r7, #16]
+ 80046c0:	1ad3      	subs	r3, r2, r3
+ 80046c2:	2b02      	cmp	r3, #2
+ 80046c4:	d901      	bls.n	80046ca <HAL_RCC_OscConfig+0x1d2>
+          {
+            return HAL_TIMEOUT;
+ 80046c6:	2303      	movs	r3, #3
+ 80046c8:	e187      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
+ 80046ca:	4b1b      	ldr	r3, [pc, #108]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 80046cc:	681b      	ldr	r3, [r3, #0]
+ 80046ce:	f003 0302 	and.w	r3, r3, #2
+ 80046d2:	2b00      	cmp	r3, #0
+ 80046d4:	d1f0      	bne.n	80046b8 <HAL_RCC_OscConfig+0x1c0>
+        }
+      }
+    }
+  }
+  /*------------------------------ LSI Configuration -------------------------*/
+  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
+ 80046d6:	687b      	ldr	r3, [r7, #4]
+ 80046d8:	681b      	ldr	r3, [r3, #0]
+ 80046da:	f003 0308 	and.w	r3, r3, #8
+ 80046de:	2b00      	cmp	r3, #0
+ 80046e0:	d036      	beq.n	8004750 <HAL_RCC_OscConfig+0x258>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
+
+    /* Check the LSI State */
+    if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF)
+ 80046e2:	687b      	ldr	r3, [r7, #4]
+ 80046e4:	695b      	ldr	r3, [r3, #20]
+ 80046e6:	2b00      	cmp	r3, #0
+ 80046e8:	d016      	beq.n	8004718 <HAL_RCC_OscConfig+0x220>
+    {
+      /* Enable the Internal Low Speed oscillator (LSI). */
+      __HAL_RCC_LSI_ENABLE();
+ 80046ea:	4b15      	ldr	r3, [pc, #84]	@ (8004740 <HAL_RCC_OscConfig+0x248>)
+ 80046ec:	2201      	movs	r2, #1
+ 80046ee:	601a      	str	r2, [r3, #0]
+
+      /* Get Start Tick*/
+      tickstart = HAL_GetTick();
+ 80046f0:	f7fc ffac 	bl	800164c <HAL_GetTick>
+ 80046f4:	6138      	str	r0, [r7, #16]
+
+      /* Wait till LSI is ready */
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
+ 80046f6:	e008      	b.n	800470a <HAL_RCC_OscConfig+0x212>
+      {
+        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
+ 80046f8:	f7fc ffa8 	bl	800164c <HAL_GetTick>
+ 80046fc:	4602      	mov	r2, r0
+ 80046fe:	693b      	ldr	r3, [r7, #16]
+ 8004700:	1ad3      	subs	r3, r2, r3
+ 8004702:	2b02      	cmp	r3, #2
+ 8004704:	d901      	bls.n	800470a <HAL_RCC_OscConfig+0x212>
+        {
+          return HAL_TIMEOUT;
+ 8004706:	2303      	movs	r3, #3
+ 8004708:	e167      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
+ 800470a:	4b0b      	ldr	r3, [pc, #44]	@ (8004738 <HAL_RCC_OscConfig+0x240>)
+ 800470c:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
+ 800470e:	f003 0302 	and.w	r3, r3, #2
+ 8004712:	2b00      	cmp	r3, #0
+ 8004714:	d0f0      	beq.n	80046f8 <HAL_RCC_OscConfig+0x200>
+ 8004716:	e01b      	b.n	8004750 <HAL_RCC_OscConfig+0x258>
+      }
+    }
+    else
+    {
+      /* Disable the Internal Low Speed oscillator (LSI). */
+      __HAL_RCC_LSI_DISABLE();
+ 8004718:	4b09      	ldr	r3, [pc, #36]	@ (8004740 <HAL_RCC_OscConfig+0x248>)
+ 800471a:	2200      	movs	r2, #0
+ 800471c:	601a      	str	r2, [r3, #0]
+
+      /* Get Start Tick */
+      tickstart = HAL_GetTick();
+ 800471e:	f7fc ff95 	bl	800164c <HAL_GetTick>
+ 8004722:	6138      	str	r0, [r7, #16]
+
+      /* Wait till LSI is ready */
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
+ 8004724:	e00e      	b.n	8004744 <HAL_RCC_OscConfig+0x24c>
+      {
+        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
+ 8004726:	f7fc ff91 	bl	800164c <HAL_GetTick>
+ 800472a:	4602      	mov	r2, r0
+ 800472c:	693b      	ldr	r3, [r7, #16]
+ 800472e:	1ad3      	subs	r3, r2, r3
+ 8004730:	2b02      	cmp	r3, #2
+ 8004732:	d907      	bls.n	8004744 <HAL_RCC_OscConfig+0x24c>
+        {
+          return HAL_TIMEOUT;
+ 8004734:	2303      	movs	r3, #3
+ 8004736:	e150      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+ 8004738:	40023800 	.word	0x40023800
+ 800473c:	42470000 	.word	0x42470000
+ 8004740:	42470e80 	.word	0x42470e80
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
+ 8004744:	4b88      	ldr	r3, [pc, #544]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 8004746:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
+ 8004748:	f003 0302 	and.w	r3, r3, #2
+ 800474c:	2b00      	cmp	r3, #0
+ 800474e:	d1ea      	bne.n	8004726 <HAL_RCC_OscConfig+0x22e>
+        }
+      }
+    }
+  }
+  /*------------------------------ LSE Configuration -------------------------*/
+  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
+ 8004750:	687b      	ldr	r3, [r7, #4]
+ 8004752:	681b      	ldr	r3, [r3, #0]
+ 8004754:	f003 0304 	and.w	r3, r3, #4
+ 8004758:	2b00      	cmp	r3, #0
+ 800475a:	f000 8097 	beq.w	800488c <HAL_RCC_OscConfig+0x394>
+  {
+    FlagStatus       pwrclkchanged = RESET;
+ 800475e:	2300      	movs	r3, #0
+ 8004760:	75fb      	strb	r3, [r7, #23]
+    /* Check the parameters */
+    assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
+
+    /* Update LSE configuration in Backup Domain control register    */
+    /* Requires to enable write access to Backup Domain of necessary */
+    if (__HAL_RCC_PWR_IS_CLK_DISABLED())
+ 8004762:	4b81      	ldr	r3, [pc, #516]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 8004764:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8004766:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
+ 800476a:	2b00      	cmp	r3, #0
+ 800476c:	d10f      	bne.n	800478e <HAL_RCC_OscConfig+0x296>
+    {
+      __HAL_RCC_PWR_CLK_ENABLE();
+ 800476e:	2300      	movs	r3, #0
+ 8004770:	60bb      	str	r3, [r7, #8]
+ 8004772:	4b7d      	ldr	r3, [pc, #500]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 8004774:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8004776:	4a7c      	ldr	r2, [pc, #496]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 8004778:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
+ 800477c:	6413      	str	r3, [r2, #64]	@ 0x40
+ 800477e:	4b7a      	ldr	r3, [pc, #488]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 8004780:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8004782:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
+ 8004786:	60bb      	str	r3, [r7, #8]
+ 8004788:	68bb      	ldr	r3, [r7, #8]
+      pwrclkchanged = SET;
+ 800478a:	2301      	movs	r3, #1
+ 800478c:	75fb      	strb	r3, [r7, #23]
+    }
+
+    if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
+ 800478e:	4b77      	ldr	r3, [pc, #476]	@ (800496c <HAL_RCC_OscConfig+0x474>)
+ 8004790:	681b      	ldr	r3, [r3, #0]
+ 8004792:	f403 7380 	and.w	r3, r3, #256	@ 0x100
+ 8004796:	2b00      	cmp	r3, #0
+ 8004798:	d118      	bne.n	80047cc <HAL_RCC_OscConfig+0x2d4>
+    {
+      /* Enable write access to Backup domain */
+      SET_BIT(PWR->CR, PWR_CR_DBP);
+ 800479a:	4b74      	ldr	r3, [pc, #464]	@ (800496c <HAL_RCC_OscConfig+0x474>)
+ 800479c:	681b      	ldr	r3, [r3, #0]
+ 800479e:	4a73      	ldr	r2, [pc, #460]	@ (800496c <HAL_RCC_OscConfig+0x474>)
+ 80047a0:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
+ 80047a4:	6013      	str	r3, [r2, #0]
+
+      /* Wait for Backup domain Write protection disable */
+      tickstart = HAL_GetTick();
+ 80047a6:	f7fc ff51 	bl	800164c <HAL_GetTick>
+ 80047aa:	6138      	str	r0, [r7, #16]
+
+      while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
+ 80047ac:	e008      	b.n	80047c0 <HAL_RCC_OscConfig+0x2c8>
+      {
+        if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
+ 80047ae:	f7fc ff4d 	bl	800164c <HAL_GetTick>
+ 80047b2:	4602      	mov	r2, r0
+ 80047b4:	693b      	ldr	r3, [r7, #16]
+ 80047b6:	1ad3      	subs	r3, r2, r3
+ 80047b8:	2b02      	cmp	r3, #2
+ 80047ba:	d901      	bls.n	80047c0 <HAL_RCC_OscConfig+0x2c8>
+        {
+          return HAL_TIMEOUT;
+ 80047bc:	2303      	movs	r3, #3
+ 80047be:	e10c      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+      while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
+ 80047c0:	4b6a      	ldr	r3, [pc, #424]	@ (800496c <HAL_RCC_OscConfig+0x474>)
+ 80047c2:	681b      	ldr	r3, [r3, #0]
+ 80047c4:	f403 7380 	and.w	r3, r3, #256	@ 0x100
+ 80047c8:	2b00      	cmp	r3, #0
+ 80047ca:	d0f0      	beq.n	80047ae <HAL_RCC_OscConfig+0x2b6>
+        }
+      }
+    }
+
+    /* Set the new LSE configuration -----------------------------------------*/
+    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
+ 80047cc:	687b      	ldr	r3, [r7, #4]
+ 80047ce:	689b      	ldr	r3, [r3, #8]
+ 80047d0:	2b01      	cmp	r3, #1
+ 80047d2:	d106      	bne.n	80047e2 <HAL_RCC_OscConfig+0x2ea>
+ 80047d4:	4b64      	ldr	r3, [pc, #400]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 80047d6:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 80047d8:	4a63      	ldr	r2, [pc, #396]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 80047da:	f043 0301 	orr.w	r3, r3, #1
+ 80047de:	6713      	str	r3, [r2, #112]	@ 0x70
+ 80047e0:	e01c      	b.n	800481c <HAL_RCC_OscConfig+0x324>
+ 80047e2:	687b      	ldr	r3, [r7, #4]
+ 80047e4:	689b      	ldr	r3, [r3, #8]
+ 80047e6:	2b05      	cmp	r3, #5
+ 80047e8:	d10c      	bne.n	8004804 <HAL_RCC_OscConfig+0x30c>
+ 80047ea:	4b5f      	ldr	r3, [pc, #380]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 80047ec:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 80047ee:	4a5e      	ldr	r2, [pc, #376]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 80047f0:	f043 0304 	orr.w	r3, r3, #4
+ 80047f4:	6713      	str	r3, [r2, #112]	@ 0x70
+ 80047f6:	4b5c      	ldr	r3, [pc, #368]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 80047f8:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 80047fa:	4a5b      	ldr	r2, [pc, #364]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 80047fc:	f043 0301 	orr.w	r3, r3, #1
+ 8004800:	6713      	str	r3, [r2, #112]	@ 0x70
+ 8004802:	e00b      	b.n	800481c <HAL_RCC_OscConfig+0x324>
+ 8004804:	4b58      	ldr	r3, [pc, #352]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 8004806:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 8004808:	4a57      	ldr	r2, [pc, #348]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 800480a:	f023 0301 	bic.w	r3, r3, #1
+ 800480e:	6713      	str	r3, [r2, #112]	@ 0x70
+ 8004810:	4b55      	ldr	r3, [pc, #340]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 8004812:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 8004814:	4a54      	ldr	r2, [pc, #336]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 8004816:	f023 0304 	bic.w	r3, r3, #4
+ 800481a:	6713      	str	r3, [r2, #112]	@ 0x70
+    /* Check the LSE State */
+    if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
+ 800481c:	687b      	ldr	r3, [r7, #4]
+ 800481e:	689b      	ldr	r3, [r3, #8]
+ 8004820:	2b00      	cmp	r3, #0
+ 8004822:	d015      	beq.n	8004850 <HAL_RCC_OscConfig+0x358>
+    {
+      /* Get Start Tick*/
+      tickstart = HAL_GetTick();
+ 8004824:	f7fc ff12 	bl	800164c <HAL_GetTick>
+ 8004828:	6138      	str	r0, [r7, #16]
+
+      /* Wait till LSE is ready */
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+ 800482a:	e00a      	b.n	8004842 <HAL_RCC_OscConfig+0x34a>
+      {
+        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
+ 800482c:	f7fc ff0e 	bl	800164c <HAL_GetTick>
+ 8004830:	4602      	mov	r2, r0
+ 8004832:	693b      	ldr	r3, [r7, #16]
+ 8004834:	1ad3      	subs	r3, r2, r3
+ 8004836:	f241 3288 	movw	r2, #5000	@ 0x1388
+ 800483a:	4293      	cmp	r3, r2
+ 800483c:	d901      	bls.n	8004842 <HAL_RCC_OscConfig+0x34a>
+        {
+          return HAL_TIMEOUT;
+ 800483e:	2303      	movs	r3, #3
+ 8004840:	e0cb      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+ 8004842:	4b49      	ldr	r3, [pc, #292]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 8004844:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 8004846:	f003 0302 	and.w	r3, r3, #2
+ 800484a:	2b00      	cmp	r3, #0
+ 800484c:	d0ee      	beq.n	800482c <HAL_RCC_OscConfig+0x334>
+ 800484e:	e014      	b.n	800487a <HAL_RCC_OscConfig+0x382>
+      }
+    }
+    else
+    {
+      /* Get Start Tick */
+      tickstart = HAL_GetTick();
+ 8004850:	f7fc fefc 	bl	800164c <HAL_GetTick>
+ 8004854:	6138      	str	r0, [r7, #16]
+
+      /* Wait till LSE is ready */
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
+ 8004856:	e00a      	b.n	800486e <HAL_RCC_OscConfig+0x376>
+      {
+        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
+ 8004858:	f7fc fef8 	bl	800164c <HAL_GetTick>
+ 800485c:	4602      	mov	r2, r0
+ 800485e:	693b      	ldr	r3, [r7, #16]
+ 8004860:	1ad3      	subs	r3, r2, r3
+ 8004862:	f241 3288 	movw	r2, #5000	@ 0x1388
+ 8004866:	4293      	cmp	r3, r2
+ 8004868:	d901      	bls.n	800486e <HAL_RCC_OscConfig+0x376>
+        {
+          return HAL_TIMEOUT;
+ 800486a:	2303      	movs	r3, #3
+ 800486c:	e0b5      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
+ 800486e:	4b3e      	ldr	r3, [pc, #248]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 8004870:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 8004872:	f003 0302 	and.w	r3, r3, #2
+ 8004876:	2b00      	cmp	r3, #0
+ 8004878:	d1ee      	bne.n	8004858 <HAL_RCC_OscConfig+0x360>
+        }
+      }
+    }
+
+    /* Restore clock configuration if changed */
+    if (pwrclkchanged == SET)
+ 800487a:	7dfb      	ldrb	r3, [r7, #23]
+ 800487c:	2b01      	cmp	r3, #1
+ 800487e:	d105      	bne.n	800488c <HAL_RCC_OscConfig+0x394>
+    {
+      __HAL_RCC_PWR_CLK_DISABLE();
+ 8004880:	4b39      	ldr	r3, [pc, #228]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 8004882:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8004884:	4a38      	ldr	r2, [pc, #224]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 8004886:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
+ 800488a:	6413      	str	r3, [r2, #64]	@ 0x40
+    }
+  }
+  /*-------------------------------- PLL Configuration -----------------------*/
+  /* Check the parameters */
+  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
+  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
+ 800488c:	687b      	ldr	r3, [r7, #4]
+ 800488e:	699b      	ldr	r3, [r3, #24]
+ 8004890:	2b00      	cmp	r3, #0
+ 8004892:	f000 80a1 	beq.w	80049d8 <HAL_RCC_OscConfig+0x4e0>
+  {
+    /* Check if the PLL is used as system clock or not */
+    if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
+ 8004896:	4b34      	ldr	r3, [pc, #208]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 8004898:	689b      	ldr	r3, [r3, #8]
+ 800489a:	f003 030c 	and.w	r3, r3, #12
+ 800489e:	2b08      	cmp	r3, #8
+ 80048a0:	d05c      	beq.n	800495c <HAL_RCC_OscConfig+0x464>
+    {
+      if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
+ 80048a2:	687b      	ldr	r3, [r7, #4]
+ 80048a4:	699b      	ldr	r3, [r3, #24]
+ 80048a6:	2b02      	cmp	r3, #2
+ 80048a8:	d141      	bne.n	800492e <HAL_RCC_OscConfig+0x436>
+        assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
+        assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
+        assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
+
+        /* Disable the main PLL. */
+        __HAL_RCC_PLL_DISABLE();
+ 80048aa:	4b31      	ldr	r3, [pc, #196]	@ (8004970 <HAL_RCC_OscConfig+0x478>)
+ 80048ac:	2200      	movs	r2, #0
+ 80048ae:	601a      	str	r2, [r3, #0]
+
+        /* Get Start Tick */
+        tickstart = HAL_GetTick();
+ 80048b0:	f7fc fecc 	bl	800164c <HAL_GetTick>
+ 80048b4:	6138      	str	r0, [r7, #16]
+
+        /* Wait till PLL is disabled */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 80048b6:	e008      	b.n	80048ca <HAL_RCC_OscConfig+0x3d2>
+        {
+          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
+ 80048b8:	f7fc fec8 	bl	800164c <HAL_GetTick>
+ 80048bc:	4602      	mov	r2, r0
+ 80048be:	693b      	ldr	r3, [r7, #16]
+ 80048c0:	1ad3      	subs	r3, r2, r3
+ 80048c2:	2b02      	cmp	r3, #2
+ 80048c4:	d901      	bls.n	80048ca <HAL_RCC_OscConfig+0x3d2>
+          {
+            return HAL_TIMEOUT;
+ 80048c6:	2303      	movs	r3, #3
+ 80048c8:	e087      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 80048ca:	4b27      	ldr	r3, [pc, #156]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 80048cc:	681b      	ldr	r3, [r3, #0]
+ 80048ce:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
+ 80048d2:	2b00      	cmp	r3, #0
+ 80048d4:	d1f0      	bne.n	80048b8 <HAL_RCC_OscConfig+0x3c0>
+          }
+        }
+
+        /* Configure the main PLL clock source, multiplication and division factors. */
+        WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource                                            | \
+ 80048d6:	687b      	ldr	r3, [r7, #4]
+ 80048d8:	69da      	ldr	r2, [r3, #28]
+ 80048da:	687b      	ldr	r3, [r7, #4]
+ 80048dc:	6a1b      	ldr	r3, [r3, #32]
+ 80048de:	431a      	orrs	r2, r3
+ 80048e0:	687b      	ldr	r3, [r7, #4]
+ 80048e2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80048e4:	019b      	lsls	r3, r3, #6
+ 80048e6:	431a      	orrs	r2, r3
+ 80048e8:	687b      	ldr	r3, [r7, #4]
+ 80048ea:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
+ 80048ec:	085b      	lsrs	r3, r3, #1
+ 80048ee:	3b01      	subs	r3, #1
+ 80048f0:	041b      	lsls	r3, r3, #16
+ 80048f2:	431a      	orrs	r2, r3
+ 80048f4:	687b      	ldr	r3, [r7, #4]
+ 80048f6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 80048f8:	061b      	lsls	r3, r3, #24
+ 80048fa:	491b      	ldr	r1, [pc, #108]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 80048fc:	4313      	orrs	r3, r2
+ 80048fe:	604b      	str	r3, [r1, #4]
+                                 RCC_OscInitStruct->PLL.PLLM                                                 | \
+                                 (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)             | \
+                                 (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \
+                                 (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)));
+        /* Enable the main PLL. */
+        __HAL_RCC_PLL_ENABLE();
+ 8004900:	4b1b      	ldr	r3, [pc, #108]	@ (8004970 <HAL_RCC_OscConfig+0x478>)
+ 8004902:	2201      	movs	r2, #1
+ 8004904:	601a      	str	r2, [r3, #0]
+
+        /* Get Start Tick */
+        tickstart = HAL_GetTick();
+ 8004906:	f7fc fea1 	bl	800164c <HAL_GetTick>
+ 800490a:	6138      	str	r0, [r7, #16]
+
+        /* Wait till PLL is ready */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
+ 800490c:	e008      	b.n	8004920 <HAL_RCC_OscConfig+0x428>
+        {
+          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
+ 800490e:	f7fc fe9d 	bl	800164c <HAL_GetTick>
+ 8004912:	4602      	mov	r2, r0
+ 8004914:	693b      	ldr	r3, [r7, #16]
+ 8004916:	1ad3      	subs	r3, r2, r3
+ 8004918:	2b02      	cmp	r3, #2
+ 800491a:	d901      	bls.n	8004920 <HAL_RCC_OscConfig+0x428>
+          {
+            return HAL_TIMEOUT;
+ 800491c:	2303      	movs	r3, #3
+ 800491e:	e05c      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
+ 8004920:	4b11      	ldr	r3, [pc, #68]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 8004922:	681b      	ldr	r3, [r3, #0]
+ 8004924:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
+ 8004928:	2b00      	cmp	r3, #0
+ 800492a:	d0f0      	beq.n	800490e <HAL_RCC_OscConfig+0x416>
+ 800492c:	e054      	b.n	80049d8 <HAL_RCC_OscConfig+0x4e0>
+        }
+      }
+      else
+      {
+        /* Disable the main PLL. */
+        __HAL_RCC_PLL_DISABLE();
+ 800492e:	4b10      	ldr	r3, [pc, #64]	@ (8004970 <HAL_RCC_OscConfig+0x478>)
+ 8004930:	2200      	movs	r2, #0
+ 8004932:	601a      	str	r2, [r3, #0]
+
+        /* Get Start Tick */
+        tickstart = HAL_GetTick();
+ 8004934:	f7fc fe8a 	bl	800164c <HAL_GetTick>
+ 8004938:	6138      	str	r0, [r7, #16]
+
+        /* Wait till PLL is disabled */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 800493a:	e008      	b.n	800494e <HAL_RCC_OscConfig+0x456>
+        {
+          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
+ 800493c:	f7fc fe86 	bl	800164c <HAL_GetTick>
+ 8004940:	4602      	mov	r2, r0
+ 8004942:	693b      	ldr	r3, [r7, #16]
+ 8004944:	1ad3      	subs	r3, r2, r3
+ 8004946:	2b02      	cmp	r3, #2
+ 8004948:	d901      	bls.n	800494e <HAL_RCC_OscConfig+0x456>
+          {
+            return HAL_TIMEOUT;
+ 800494a:	2303      	movs	r3, #3
+ 800494c:	e045      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 800494e:	4b06      	ldr	r3, [pc, #24]	@ (8004968 <HAL_RCC_OscConfig+0x470>)
+ 8004950:	681b      	ldr	r3, [r3, #0]
+ 8004952:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
+ 8004956:	2b00      	cmp	r3, #0
+ 8004958:	d1f0      	bne.n	800493c <HAL_RCC_OscConfig+0x444>
+ 800495a:	e03d      	b.n	80049d8 <HAL_RCC_OscConfig+0x4e0>
+      }
+    }
+    else
+    {
+      /* Check if there is a request to disable the PLL used as System clock source */
+      if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
+ 800495c:	687b      	ldr	r3, [r7, #4]
+ 800495e:	699b      	ldr	r3, [r3, #24]
+ 8004960:	2b01      	cmp	r3, #1
+ 8004962:	d107      	bne.n	8004974 <HAL_RCC_OscConfig+0x47c>
+      {
+        return HAL_ERROR;
+ 8004964:	2301      	movs	r3, #1
+ 8004966:	e038      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+ 8004968:	40023800 	.word	0x40023800
+ 800496c:	40007000 	.word	0x40007000
+ 8004970:	42470060 	.word	0x42470060
+      }
+      else
+      {
+        /* Do not return HAL_ERROR if request repeats the current configuration */
+        pll_config = RCC->PLLCFGR;
+ 8004974:	4b1b      	ldr	r3, [pc, #108]	@ (80049e4 <HAL_RCC_OscConfig+0x4ec>)
+ 8004976:	685b      	ldr	r3, [r3, #4]
+ 8004978:	60fb      	str	r3, [r7, #12]
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) ||
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos)))
+#else
+        if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
+ 800497a:	687b      	ldr	r3, [r7, #4]
+ 800497c:	699b      	ldr	r3, [r3, #24]
+ 800497e:	2b01      	cmp	r3, #1
+ 8004980:	d028      	beq.n	80049d4 <HAL_RCC_OscConfig+0x4dc>
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
+ 8004982:	68fb      	ldr	r3, [r7, #12]
+ 8004984:	f403 0280 	and.w	r2, r3, #4194304	@ 0x400000
+ 8004988:	687b      	ldr	r3, [r7, #4]
+ 800498a:	69db      	ldr	r3, [r3, #28]
+        if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
+ 800498c:	429a      	cmp	r2, r3
+ 800498e:	d121      	bne.n	80049d4 <HAL_RCC_OscConfig+0x4dc>
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) ||
+ 8004990:	68fb      	ldr	r3, [r7, #12]
+ 8004992:	f003 023f 	and.w	r2, r3, #63	@ 0x3f
+ 8004996:	687b      	ldr	r3, [r7, #4]
+ 8004998:	6a1b      	ldr	r3, [r3, #32]
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
+ 800499a:	429a      	cmp	r2, r3
+ 800499c:	d11a      	bne.n	80049d4 <HAL_RCC_OscConfig+0x4dc>
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
+ 800499e:	68fa      	ldr	r2, [r7, #12]
+ 80049a0:	f647 73c0 	movw	r3, #32704	@ 0x7fc0
+ 80049a4:	4013      	ands	r3, r2
+ 80049a6:	687a      	ldr	r2, [r7, #4]
+ 80049a8:	6a52      	ldr	r2, [r2, #36]	@ 0x24
+ 80049aa:	0192      	lsls	r2, r2, #6
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) ||
+ 80049ac:	4293      	cmp	r3, r2
+ 80049ae:	d111      	bne.n	80049d4 <HAL_RCC_OscConfig+0x4dc>
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
+ 80049b0:	68fb      	ldr	r3, [r7, #12]
+ 80049b2:	f403 3240 	and.w	r2, r3, #196608	@ 0x30000
+ 80049b6:	687b      	ldr	r3, [r7, #4]
+ 80049b8:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
+ 80049ba:	085b      	lsrs	r3, r3, #1
+ 80049bc:	3b01      	subs	r3, #1
+ 80049be:	041b      	lsls	r3, r3, #16
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
+ 80049c0:	429a      	cmp	r2, r3
+ 80049c2:	d107      	bne.n	80049d4 <HAL_RCC_OscConfig+0x4dc>
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)))
+ 80049c4:	68fb      	ldr	r3, [r7, #12]
+ 80049c6:	f003 6270 	and.w	r2, r3, #251658240	@ 0xf000000
+ 80049ca:	687b      	ldr	r3, [r7, #4]
+ 80049cc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 80049ce:	061b      	lsls	r3, r3, #24
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
+ 80049d0:	429a      	cmp	r2, r3
+ 80049d2:	d001      	beq.n	80049d8 <HAL_RCC_OscConfig+0x4e0>
+#endif /* RCC_PLLCFGR_PLLR */
+        {
+          return HAL_ERROR;
+ 80049d4:	2301      	movs	r3, #1
+ 80049d6:	e000      	b.n	80049da <HAL_RCC_OscConfig+0x4e2>
+        }
+      }
+    }
+  }
+  return HAL_OK;
+ 80049d8:	2300      	movs	r3, #0
+}
+ 80049da:	4618      	mov	r0, r3
+ 80049dc:	3718      	adds	r7, #24
+ 80049de:	46bd      	mov	sp, r7
+ 80049e0:	bd80      	pop	{r7, pc}
+ 80049e2:	bf00      	nop
+ 80049e4:	40023800 	.word	0x40023800
+
+080049e8 <HAL_RCC_ClockConfig>:
+  *         HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
+  *         (for more details refer to section above "Initialization/de-initialization functions")
+  * @retval None
+  */
+HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
+{
+ 80049e8:	b580      	push	{r7, lr}
+ 80049ea:	b084      	sub	sp, #16
+ 80049ec:	af00      	add	r7, sp, #0
+ 80049ee:	6078      	str	r0, [r7, #4]
+ 80049f0:	6039      	str	r1, [r7, #0]
+  uint32_t tickstart;
+
+  /* Check Null pointer */
+  if (RCC_ClkInitStruct == NULL)
+ 80049f2:	687b      	ldr	r3, [r7, #4]
+ 80049f4:	2b00      	cmp	r3, #0
+ 80049f6:	d101      	bne.n	80049fc <HAL_RCC_ClockConfig+0x14>
+  {
+    return HAL_ERROR;
+ 80049f8:	2301      	movs	r3, #1
+ 80049fa:	e0cc      	b.n	8004b96 <HAL_RCC_ClockConfig+0x1ae>
+  /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
+    must be correctly programmed according to the frequency of the CPU clock
+    (HCLK) and the supply voltage of the device. */
+
+  /* Increasing the number of wait states because of higher CPU frequency */
+  if (FLatency > __HAL_FLASH_GET_LATENCY())
+ 80049fc:	4b68      	ldr	r3, [pc, #416]	@ (8004ba0 <HAL_RCC_ClockConfig+0x1b8>)
+ 80049fe:	681b      	ldr	r3, [r3, #0]
+ 8004a00:	f003 030f 	and.w	r3, r3, #15
+ 8004a04:	683a      	ldr	r2, [r7, #0]
+ 8004a06:	429a      	cmp	r2, r3
+ 8004a08:	d90c      	bls.n	8004a24 <HAL_RCC_ClockConfig+0x3c>
+  {
+    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
+    __HAL_FLASH_SET_LATENCY(FLatency);
+ 8004a0a:	4b65      	ldr	r3, [pc, #404]	@ (8004ba0 <HAL_RCC_ClockConfig+0x1b8>)
+ 8004a0c:	683a      	ldr	r2, [r7, #0]
+ 8004a0e:	b2d2      	uxtb	r2, r2
+ 8004a10:	701a      	strb	r2, [r3, #0]
+
+    /* Check that the new number of wait states is taken into account to access the Flash
+    memory by reading the FLASH_ACR register */
+    if (__HAL_FLASH_GET_LATENCY() != FLatency)
+ 8004a12:	4b63      	ldr	r3, [pc, #396]	@ (8004ba0 <HAL_RCC_ClockConfig+0x1b8>)
+ 8004a14:	681b      	ldr	r3, [r3, #0]
+ 8004a16:	f003 030f 	and.w	r3, r3, #15
+ 8004a1a:	683a      	ldr	r2, [r7, #0]
+ 8004a1c:	429a      	cmp	r2, r3
+ 8004a1e:	d001      	beq.n	8004a24 <HAL_RCC_ClockConfig+0x3c>
+    {
+      return HAL_ERROR;
+ 8004a20:	2301      	movs	r3, #1
+ 8004a22:	e0b8      	b.n	8004b96 <HAL_RCC_ClockConfig+0x1ae>
+    }
+  }
+
+  /*-------------------------- HCLK Configuration --------------------------*/
+  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
+ 8004a24:	687b      	ldr	r3, [r7, #4]
+ 8004a26:	681b      	ldr	r3, [r3, #0]
+ 8004a28:	f003 0302 	and.w	r3, r3, #2
+ 8004a2c:	2b00      	cmp	r3, #0
+ 8004a2e:	d020      	beq.n	8004a72 <HAL_RCC_ClockConfig+0x8a>
+  {
+    /* Set the highest APBx dividers in order to ensure that we do not go through
+       a non-spec phase whatever we decrease or increase HCLK. */
+    if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
+ 8004a30:	687b      	ldr	r3, [r7, #4]
+ 8004a32:	681b      	ldr	r3, [r3, #0]
+ 8004a34:	f003 0304 	and.w	r3, r3, #4
+ 8004a38:	2b00      	cmp	r3, #0
+ 8004a3a:	d005      	beq.n	8004a48 <HAL_RCC_ClockConfig+0x60>
+    {
+      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
+ 8004a3c:	4b59      	ldr	r3, [pc, #356]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004a3e:	689b      	ldr	r3, [r3, #8]
+ 8004a40:	4a58      	ldr	r2, [pc, #352]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004a42:	f443 53e0 	orr.w	r3, r3, #7168	@ 0x1c00
+ 8004a46:	6093      	str	r3, [r2, #8]
+    }
+
+    if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
+ 8004a48:	687b      	ldr	r3, [r7, #4]
+ 8004a4a:	681b      	ldr	r3, [r3, #0]
+ 8004a4c:	f003 0308 	and.w	r3, r3, #8
+ 8004a50:	2b00      	cmp	r3, #0
+ 8004a52:	d005      	beq.n	8004a60 <HAL_RCC_ClockConfig+0x78>
+    {
+      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
+ 8004a54:	4b53      	ldr	r3, [pc, #332]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004a56:	689b      	ldr	r3, [r3, #8]
+ 8004a58:	4a52      	ldr	r2, [pc, #328]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004a5a:	f443 4360 	orr.w	r3, r3, #57344	@ 0xe000
+ 8004a5e:	6093      	str	r3, [r2, #8]
+    }
+
+    assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
+    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
+ 8004a60:	4b50      	ldr	r3, [pc, #320]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004a62:	689b      	ldr	r3, [r3, #8]
+ 8004a64:	f023 02f0 	bic.w	r2, r3, #240	@ 0xf0
+ 8004a68:	687b      	ldr	r3, [r7, #4]
+ 8004a6a:	689b      	ldr	r3, [r3, #8]
+ 8004a6c:	494d      	ldr	r1, [pc, #308]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004a6e:	4313      	orrs	r3, r2
+ 8004a70:	608b      	str	r3, [r1, #8]
+  }
+
+  /*------------------------- SYSCLK Configuration ---------------------------*/
+  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
+ 8004a72:	687b      	ldr	r3, [r7, #4]
+ 8004a74:	681b      	ldr	r3, [r3, #0]
+ 8004a76:	f003 0301 	and.w	r3, r3, #1
+ 8004a7a:	2b00      	cmp	r3, #0
+ 8004a7c:	d044      	beq.n	8004b08 <HAL_RCC_ClockConfig+0x120>
+  {
+    assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
+
+    /* HSE is selected as System Clock Source */
+    if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
+ 8004a7e:	687b      	ldr	r3, [r7, #4]
+ 8004a80:	685b      	ldr	r3, [r3, #4]
+ 8004a82:	2b01      	cmp	r3, #1
+ 8004a84:	d107      	bne.n	8004a96 <HAL_RCC_ClockConfig+0xae>
+    {
+      /* Check the HSE ready flag */
+      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+ 8004a86:	4b47      	ldr	r3, [pc, #284]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004a88:	681b      	ldr	r3, [r3, #0]
+ 8004a8a:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
+ 8004a8e:	2b00      	cmp	r3, #0
+ 8004a90:	d119      	bne.n	8004ac6 <HAL_RCC_ClockConfig+0xde>
+      {
+        return HAL_ERROR;
+ 8004a92:	2301      	movs	r3, #1
+ 8004a94:	e07f      	b.n	8004b96 <HAL_RCC_ClockConfig+0x1ae>
+      }
+    }
+    /* PLL is selected as System Clock Source */
+    else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)   ||
+ 8004a96:	687b      	ldr	r3, [r7, #4]
+ 8004a98:	685b      	ldr	r3, [r3, #4]
+ 8004a9a:	2b02      	cmp	r3, #2
+ 8004a9c:	d003      	beq.n	8004aa6 <HAL_RCC_ClockConfig+0xbe>
+             (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
+ 8004a9e:	687b      	ldr	r3, [r7, #4]
+ 8004aa0:	685b      	ldr	r3, [r3, #4]
+    else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)   ||
+ 8004aa2:	2b03      	cmp	r3, #3
+ 8004aa4:	d107      	bne.n	8004ab6 <HAL_RCC_ClockConfig+0xce>
+    {
+      /* Check the PLL ready flag */
+      if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
+ 8004aa6:	4b3f      	ldr	r3, [pc, #252]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004aa8:	681b      	ldr	r3, [r3, #0]
+ 8004aaa:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
+ 8004aae:	2b00      	cmp	r3, #0
+ 8004ab0:	d109      	bne.n	8004ac6 <HAL_RCC_ClockConfig+0xde>
+      {
+        return HAL_ERROR;
+ 8004ab2:	2301      	movs	r3, #1
+ 8004ab4:	e06f      	b.n	8004b96 <HAL_RCC_ClockConfig+0x1ae>
+    }
+    /* HSI is selected as System Clock Source */
+    else
+    {
+      /* Check the HSI ready flag */
+      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+ 8004ab6:	4b3b      	ldr	r3, [pc, #236]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004ab8:	681b      	ldr	r3, [r3, #0]
+ 8004aba:	f003 0302 	and.w	r3, r3, #2
+ 8004abe:	2b00      	cmp	r3, #0
+ 8004ac0:	d101      	bne.n	8004ac6 <HAL_RCC_ClockConfig+0xde>
+      {
+        return HAL_ERROR;
+ 8004ac2:	2301      	movs	r3, #1
+ 8004ac4:	e067      	b.n	8004b96 <HAL_RCC_ClockConfig+0x1ae>
+      }
+    }
+
+    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
+ 8004ac6:	4b37      	ldr	r3, [pc, #220]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004ac8:	689b      	ldr	r3, [r3, #8]
+ 8004aca:	f023 0203 	bic.w	r2, r3, #3
+ 8004ace:	687b      	ldr	r3, [r7, #4]
+ 8004ad0:	685b      	ldr	r3, [r3, #4]
+ 8004ad2:	4934      	ldr	r1, [pc, #208]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004ad4:	4313      	orrs	r3, r2
+ 8004ad6:	608b      	str	r3, [r1, #8]
+
+    /* Get Start Tick */
+    tickstart = HAL_GetTick();
+ 8004ad8:	f7fc fdb8 	bl	800164c <HAL_GetTick>
+ 8004adc:	60f8      	str	r0, [r7, #12]
+
+    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
+ 8004ade:	e00a      	b.n	8004af6 <HAL_RCC_ClockConfig+0x10e>
+    {
+      if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
+ 8004ae0:	f7fc fdb4 	bl	800164c <HAL_GetTick>
+ 8004ae4:	4602      	mov	r2, r0
+ 8004ae6:	68fb      	ldr	r3, [r7, #12]
+ 8004ae8:	1ad3      	subs	r3, r2, r3
+ 8004aea:	f241 3288 	movw	r2, #5000	@ 0x1388
+ 8004aee:	4293      	cmp	r3, r2
+ 8004af0:	d901      	bls.n	8004af6 <HAL_RCC_ClockConfig+0x10e>
+      {
+        return HAL_TIMEOUT;
+ 8004af2:	2303      	movs	r3, #3
+ 8004af4:	e04f      	b.n	8004b96 <HAL_RCC_ClockConfig+0x1ae>
+    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
+ 8004af6:	4b2b      	ldr	r3, [pc, #172]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004af8:	689b      	ldr	r3, [r3, #8]
+ 8004afa:	f003 020c 	and.w	r2, r3, #12
+ 8004afe:	687b      	ldr	r3, [r7, #4]
+ 8004b00:	685b      	ldr	r3, [r3, #4]
+ 8004b02:	009b      	lsls	r3, r3, #2
+ 8004b04:	429a      	cmp	r2, r3
+ 8004b06:	d1eb      	bne.n	8004ae0 <HAL_RCC_ClockConfig+0xf8>
+      }
+    }
+  }
+
+  /* Decreasing the number of wait states because of lower CPU frequency */
+  if (FLatency < __HAL_FLASH_GET_LATENCY())
+ 8004b08:	4b25      	ldr	r3, [pc, #148]	@ (8004ba0 <HAL_RCC_ClockConfig+0x1b8>)
+ 8004b0a:	681b      	ldr	r3, [r3, #0]
+ 8004b0c:	f003 030f 	and.w	r3, r3, #15
+ 8004b10:	683a      	ldr	r2, [r7, #0]
+ 8004b12:	429a      	cmp	r2, r3
+ 8004b14:	d20c      	bcs.n	8004b30 <HAL_RCC_ClockConfig+0x148>
+  {
+    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
+    __HAL_FLASH_SET_LATENCY(FLatency);
+ 8004b16:	4b22      	ldr	r3, [pc, #136]	@ (8004ba0 <HAL_RCC_ClockConfig+0x1b8>)
+ 8004b18:	683a      	ldr	r2, [r7, #0]
+ 8004b1a:	b2d2      	uxtb	r2, r2
+ 8004b1c:	701a      	strb	r2, [r3, #0]
+
+    /* Check that the new number of wait states is taken into account to access the Flash
+    memory by reading the FLASH_ACR register */
+    if (__HAL_FLASH_GET_LATENCY() != FLatency)
+ 8004b1e:	4b20      	ldr	r3, [pc, #128]	@ (8004ba0 <HAL_RCC_ClockConfig+0x1b8>)
+ 8004b20:	681b      	ldr	r3, [r3, #0]
+ 8004b22:	f003 030f 	and.w	r3, r3, #15
+ 8004b26:	683a      	ldr	r2, [r7, #0]
+ 8004b28:	429a      	cmp	r2, r3
+ 8004b2a:	d001      	beq.n	8004b30 <HAL_RCC_ClockConfig+0x148>
+    {
+      return HAL_ERROR;
+ 8004b2c:	2301      	movs	r3, #1
+ 8004b2e:	e032      	b.n	8004b96 <HAL_RCC_ClockConfig+0x1ae>
+    }
+  }
+
+  /*-------------------------- PCLK1 Configuration ---------------------------*/
+  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
+ 8004b30:	687b      	ldr	r3, [r7, #4]
+ 8004b32:	681b      	ldr	r3, [r3, #0]
+ 8004b34:	f003 0304 	and.w	r3, r3, #4
+ 8004b38:	2b00      	cmp	r3, #0
+ 8004b3a:	d008      	beq.n	8004b4e <HAL_RCC_ClockConfig+0x166>
+  {
+    assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
+    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
+ 8004b3c:	4b19      	ldr	r3, [pc, #100]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004b3e:	689b      	ldr	r3, [r3, #8]
+ 8004b40:	f423 52e0 	bic.w	r2, r3, #7168	@ 0x1c00
+ 8004b44:	687b      	ldr	r3, [r7, #4]
+ 8004b46:	68db      	ldr	r3, [r3, #12]
+ 8004b48:	4916      	ldr	r1, [pc, #88]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004b4a:	4313      	orrs	r3, r2
+ 8004b4c:	608b      	str	r3, [r1, #8]
+  }
+
+  /*-------------------------- PCLK2 Configuration ---------------------------*/
+  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
+ 8004b4e:	687b      	ldr	r3, [r7, #4]
+ 8004b50:	681b      	ldr	r3, [r3, #0]
+ 8004b52:	f003 0308 	and.w	r3, r3, #8
+ 8004b56:	2b00      	cmp	r3, #0
+ 8004b58:	d009      	beq.n	8004b6e <HAL_RCC_ClockConfig+0x186>
+  {
+    assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
+    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
+ 8004b5a:	4b12      	ldr	r3, [pc, #72]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004b5c:	689b      	ldr	r3, [r3, #8]
+ 8004b5e:	f423 4260 	bic.w	r2, r3, #57344	@ 0xe000
+ 8004b62:	687b      	ldr	r3, [r7, #4]
+ 8004b64:	691b      	ldr	r3, [r3, #16]
+ 8004b66:	00db      	lsls	r3, r3, #3
+ 8004b68:	490e      	ldr	r1, [pc, #56]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004b6a:	4313      	orrs	r3, r2
+ 8004b6c:	608b      	str	r3, [r1, #8]
+  }
+
+  /* Update the SystemCoreClock global variable */
+  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
+ 8004b6e:	f000 f821 	bl	8004bb4 <HAL_RCC_GetSysClockFreq>
+ 8004b72:	4602      	mov	r2, r0
+ 8004b74:	4b0b      	ldr	r3, [pc, #44]	@ (8004ba4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8004b76:	689b      	ldr	r3, [r3, #8]
+ 8004b78:	091b      	lsrs	r3, r3, #4
+ 8004b7a:	f003 030f 	and.w	r3, r3, #15
+ 8004b7e:	490a      	ldr	r1, [pc, #40]	@ (8004ba8 <HAL_RCC_ClockConfig+0x1c0>)
+ 8004b80:	5ccb      	ldrb	r3, [r1, r3]
+ 8004b82:	fa22 f303 	lsr.w	r3, r2, r3
+ 8004b86:	4a09      	ldr	r2, [pc, #36]	@ (8004bac <HAL_RCC_ClockConfig+0x1c4>)
+ 8004b88:	6013      	str	r3, [r2, #0]
+
+  /* Configure the source of time base considering new system clocks settings */
+  HAL_InitTick(uwTickPrio);
+ 8004b8a:	4b09      	ldr	r3, [pc, #36]	@ (8004bb0 <HAL_RCC_ClockConfig+0x1c8>)
+ 8004b8c:	681b      	ldr	r3, [r3, #0]
+ 8004b8e:	4618      	mov	r0, r3
+ 8004b90:	f7fc fc2a 	bl	80013e8 <HAL_InitTick>
+
+  return HAL_OK;
+ 8004b94:	2300      	movs	r3, #0
+}
+ 8004b96:	4618      	mov	r0, r3
+ 8004b98:	3710      	adds	r7, #16
+ 8004b9a:	46bd      	mov	sp, r7
+ 8004b9c:	bd80      	pop	{r7, pc}
+ 8004b9e:	bf00      	nop
+ 8004ba0:	40023c00 	.word	0x40023c00
+ 8004ba4:	40023800 	.word	0x40023800
+ 8004ba8:	08007eec 	.word	0x08007eec
+ 8004bac:	20000000 	.word	0x20000000
+ 8004bb0:	20000004 	.word	0x20000004
+
+08004bb4 <HAL_RCC_GetSysClockFreq>:
+  *
+  *
+  * @retval SYSCLK frequency
+  */
+__weak uint32_t HAL_RCC_GetSysClockFreq(void)
+{
+ 8004bb4:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
+ 8004bb8:	b094      	sub	sp, #80	@ 0x50
+ 8004bba:	af00      	add	r7, sp, #0
+  uint32_t pllm = 0U;
+ 8004bbc:	2300      	movs	r3, #0
+ 8004bbe:	647b      	str	r3, [r7, #68]	@ 0x44
+  uint32_t pllvco = 0U;
+ 8004bc0:	2300      	movs	r3, #0
+ 8004bc2:	64fb      	str	r3, [r7, #76]	@ 0x4c
+  uint32_t pllp = 0U;
+ 8004bc4:	2300      	movs	r3, #0
+ 8004bc6:	643b      	str	r3, [r7, #64]	@ 0x40
+  uint32_t sysclockfreq = 0U;
+ 8004bc8:	2300      	movs	r3, #0
+ 8004bca:	64bb      	str	r3, [r7, #72]	@ 0x48
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+ 8004bcc:	4b79      	ldr	r3, [pc, #484]	@ (8004db4 <HAL_RCC_GetSysClockFreq+0x200>)
+ 8004bce:	689b      	ldr	r3, [r3, #8]
+ 8004bd0:	f003 030c 	and.w	r3, r3, #12
+ 8004bd4:	2b08      	cmp	r3, #8
+ 8004bd6:	d00d      	beq.n	8004bf4 <HAL_RCC_GetSysClockFreq+0x40>
+ 8004bd8:	2b08      	cmp	r3, #8
+ 8004bda:	f200 80e1 	bhi.w	8004da0 <HAL_RCC_GetSysClockFreq+0x1ec>
+ 8004bde:	2b00      	cmp	r3, #0
+ 8004be0:	d002      	beq.n	8004be8 <HAL_RCC_GetSysClockFreq+0x34>
+ 8004be2:	2b04      	cmp	r3, #4
+ 8004be4:	d003      	beq.n	8004bee <HAL_RCC_GetSysClockFreq+0x3a>
+ 8004be6:	e0db      	b.n	8004da0 <HAL_RCC_GetSysClockFreq+0x1ec>
+  {
+    case RCC_CFGR_SWS_HSI:  /* HSI used as system clock source */
+    {
+      sysclockfreq = HSI_VALUE;
+ 8004be8:	4b73      	ldr	r3, [pc, #460]	@ (8004db8 <HAL_RCC_GetSysClockFreq+0x204>)
+ 8004bea:	64bb      	str	r3, [r7, #72]	@ 0x48
+      break;
+ 8004bec:	e0db      	b.n	8004da6 <HAL_RCC_GetSysClockFreq+0x1f2>
+    }
+    case RCC_CFGR_SWS_HSE:  /* HSE used as system clock  source */
+    {
+      sysclockfreq = HSE_VALUE;
+ 8004bee:	4b73      	ldr	r3, [pc, #460]	@ (8004dbc <HAL_RCC_GetSysClockFreq+0x208>)
+ 8004bf0:	64bb      	str	r3, [r7, #72]	@ 0x48
+      break;
+ 8004bf2:	e0d8      	b.n	8004da6 <HAL_RCC_GetSysClockFreq+0x1f2>
+    }
+    case RCC_CFGR_SWS_PLL:  /* PLL used as system clock  source */
+    {
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+      SYSCLK = PLL_VCO / PLLP */
+      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+ 8004bf4:	4b6f      	ldr	r3, [pc, #444]	@ (8004db4 <HAL_RCC_GetSysClockFreq+0x200>)
+ 8004bf6:	685b      	ldr	r3, [r3, #4]
+ 8004bf8:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
+ 8004bfc:	647b      	str	r3, [r7, #68]	@ 0x44
+      if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
+ 8004bfe:	4b6d      	ldr	r3, [pc, #436]	@ (8004db4 <HAL_RCC_GetSysClockFreq+0x200>)
+ 8004c00:	685b      	ldr	r3, [r3, #4]
+ 8004c02:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
+ 8004c06:	2b00      	cmp	r3, #0
+ 8004c08:	d063      	beq.n	8004cd2 <HAL_RCC_GetSysClockFreq+0x11e>
+      {
+        /* HSE used as PLL clock source */
+        pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
+ 8004c0a:	4b6a      	ldr	r3, [pc, #424]	@ (8004db4 <HAL_RCC_GetSysClockFreq+0x200>)
+ 8004c0c:	685b      	ldr	r3, [r3, #4]
+ 8004c0e:	099b      	lsrs	r3, r3, #6
+ 8004c10:	2200      	movs	r2, #0
+ 8004c12:	63bb      	str	r3, [r7, #56]	@ 0x38
+ 8004c14:	63fa      	str	r2, [r7, #60]	@ 0x3c
+ 8004c16:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
+ 8004c18:	f3c3 0308 	ubfx	r3, r3, #0, #9
+ 8004c1c:	633b      	str	r3, [r7, #48]	@ 0x30
+ 8004c1e:	2300      	movs	r3, #0
+ 8004c20:	637b      	str	r3, [r7, #52]	@ 0x34
+ 8004c22:	e9d7 450c 	ldrd	r4, r5, [r7, #48]	@ 0x30
+ 8004c26:	4622      	mov	r2, r4
+ 8004c28:	462b      	mov	r3, r5
+ 8004c2a:	f04f 0000 	mov.w	r0, #0
+ 8004c2e:	f04f 0100 	mov.w	r1, #0
+ 8004c32:	0159      	lsls	r1, r3, #5
+ 8004c34:	ea41 61d2 	orr.w	r1, r1, r2, lsr #27
+ 8004c38:	0150      	lsls	r0, r2, #5
+ 8004c3a:	4602      	mov	r2, r0
+ 8004c3c:	460b      	mov	r3, r1
+ 8004c3e:	4621      	mov	r1, r4
+ 8004c40:	1a51      	subs	r1, r2, r1
+ 8004c42:	6139      	str	r1, [r7, #16]
+ 8004c44:	4629      	mov	r1, r5
+ 8004c46:	eb63 0301 	sbc.w	r3, r3, r1
+ 8004c4a:	617b      	str	r3, [r7, #20]
+ 8004c4c:	f04f 0200 	mov.w	r2, #0
+ 8004c50:	f04f 0300 	mov.w	r3, #0
+ 8004c54:	e9d7 ab04 	ldrd	sl, fp, [r7, #16]
+ 8004c58:	4659      	mov	r1, fp
+ 8004c5a:	018b      	lsls	r3, r1, #6
+ 8004c5c:	4651      	mov	r1, sl
+ 8004c5e:	ea43 6391 	orr.w	r3, r3, r1, lsr #26
+ 8004c62:	4651      	mov	r1, sl
+ 8004c64:	018a      	lsls	r2, r1, #6
+ 8004c66:	4651      	mov	r1, sl
+ 8004c68:	ebb2 0801 	subs.w	r8, r2, r1
+ 8004c6c:	4659      	mov	r1, fp
+ 8004c6e:	eb63 0901 	sbc.w	r9, r3, r1
+ 8004c72:	f04f 0200 	mov.w	r2, #0
+ 8004c76:	f04f 0300 	mov.w	r3, #0
+ 8004c7a:	ea4f 03c9 	mov.w	r3, r9, lsl #3
+ 8004c7e:	ea43 7358 	orr.w	r3, r3, r8, lsr #29
+ 8004c82:	ea4f 02c8 	mov.w	r2, r8, lsl #3
+ 8004c86:	4690      	mov	r8, r2
+ 8004c88:	4699      	mov	r9, r3
+ 8004c8a:	4623      	mov	r3, r4
+ 8004c8c:	eb18 0303 	adds.w	r3, r8, r3
+ 8004c90:	60bb      	str	r3, [r7, #8]
+ 8004c92:	462b      	mov	r3, r5
+ 8004c94:	eb49 0303 	adc.w	r3, r9, r3
+ 8004c98:	60fb      	str	r3, [r7, #12]
+ 8004c9a:	f04f 0200 	mov.w	r2, #0
+ 8004c9e:	f04f 0300 	mov.w	r3, #0
+ 8004ca2:	e9d7 4502 	ldrd	r4, r5, [r7, #8]
+ 8004ca6:	4629      	mov	r1, r5
+ 8004ca8:	024b      	lsls	r3, r1, #9
+ 8004caa:	4621      	mov	r1, r4
+ 8004cac:	ea43 53d1 	orr.w	r3, r3, r1, lsr #23
+ 8004cb0:	4621      	mov	r1, r4
+ 8004cb2:	024a      	lsls	r2, r1, #9
+ 8004cb4:	4610      	mov	r0, r2
+ 8004cb6:	4619      	mov	r1, r3
+ 8004cb8:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
+ 8004cba:	2200      	movs	r2, #0
+ 8004cbc:	62bb      	str	r3, [r7, #40]	@ 0x28
+ 8004cbe:	62fa      	str	r2, [r7, #44]	@ 0x2c
+ 8004cc0:	e9d7 230a 	ldrd	r2, r3, [r7, #40]	@ 0x28
+ 8004cc4:	f7fb fa94 	bl	80001f0 <__aeabi_uldivmod>
+ 8004cc8:	4602      	mov	r2, r0
+ 8004cca:	460b      	mov	r3, r1
+ 8004ccc:	4613      	mov	r3, r2
+ 8004cce:	64fb      	str	r3, [r7, #76]	@ 0x4c
+ 8004cd0:	e058      	b.n	8004d84 <HAL_RCC_GetSysClockFreq+0x1d0>
+      }
+      else
+      {
+        /* HSI used as PLL clock source */
+        pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
+ 8004cd2:	4b38      	ldr	r3, [pc, #224]	@ (8004db4 <HAL_RCC_GetSysClockFreq+0x200>)
+ 8004cd4:	685b      	ldr	r3, [r3, #4]
+ 8004cd6:	099b      	lsrs	r3, r3, #6
+ 8004cd8:	2200      	movs	r2, #0
+ 8004cda:	4618      	mov	r0, r3
+ 8004cdc:	4611      	mov	r1, r2
+ 8004cde:	f3c0 0308 	ubfx	r3, r0, #0, #9
+ 8004ce2:	623b      	str	r3, [r7, #32]
+ 8004ce4:	2300      	movs	r3, #0
+ 8004ce6:	627b      	str	r3, [r7, #36]	@ 0x24
+ 8004ce8:	e9d7 8908 	ldrd	r8, r9, [r7, #32]
+ 8004cec:	4642      	mov	r2, r8
+ 8004cee:	464b      	mov	r3, r9
+ 8004cf0:	f04f 0000 	mov.w	r0, #0
+ 8004cf4:	f04f 0100 	mov.w	r1, #0
+ 8004cf8:	0159      	lsls	r1, r3, #5
+ 8004cfa:	ea41 61d2 	orr.w	r1, r1, r2, lsr #27
+ 8004cfe:	0150      	lsls	r0, r2, #5
+ 8004d00:	4602      	mov	r2, r0
+ 8004d02:	460b      	mov	r3, r1
+ 8004d04:	4641      	mov	r1, r8
+ 8004d06:	ebb2 0a01 	subs.w	sl, r2, r1
+ 8004d0a:	4649      	mov	r1, r9
+ 8004d0c:	eb63 0b01 	sbc.w	fp, r3, r1
+ 8004d10:	f04f 0200 	mov.w	r2, #0
+ 8004d14:	f04f 0300 	mov.w	r3, #0
+ 8004d18:	ea4f 138b 	mov.w	r3, fp, lsl #6
+ 8004d1c:	ea43 639a 	orr.w	r3, r3, sl, lsr #26
+ 8004d20:	ea4f 128a 	mov.w	r2, sl, lsl #6
+ 8004d24:	ebb2 040a 	subs.w	r4, r2, sl
+ 8004d28:	eb63 050b 	sbc.w	r5, r3, fp
+ 8004d2c:	f04f 0200 	mov.w	r2, #0
+ 8004d30:	f04f 0300 	mov.w	r3, #0
+ 8004d34:	00eb      	lsls	r3, r5, #3
+ 8004d36:	ea43 7354 	orr.w	r3, r3, r4, lsr #29
+ 8004d3a:	00e2      	lsls	r2, r4, #3
+ 8004d3c:	4614      	mov	r4, r2
+ 8004d3e:	461d      	mov	r5, r3
+ 8004d40:	4643      	mov	r3, r8
+ 8004d42:	18e3      	adds	r3, r4, r3
+ 8004d44:	603b      	str	r3, [r7, #0]
+ 8004d46:	464b      	mov	r3, r9
+ 8004d48:	eb45 0303 	adc.w	r3, r5, r3
+ 8004d4c:	607b      	str	r3, [r7, #4]
+ 8004d4e:	f04f 0200 	mov.w	r2, #0
+ 8004d52:	f04f 0300 	mov.w	r3, #0
+ 8004d56:	e9d7 4500 	ldrd	r4, r5, [r7]
+ 8004d5a:	4629      	mov	r1, r5
+ 8004d5c:	028b      	lsls	r3, r1, #10
+ 8004d5e:	4621      	mov	r1, r4
+ 8004d60:	ea43 5391 	orr.w	r3, r3, r1, lsr #22
+ 8004d64:	4621      	mov	r1, r4
+ 8004d66:	028a      	lsls	r2, r1, #10
+ 8004d68:	4610      	mov	r0, r2
+ 8004d6a:	4619      	mov	r1, r3
+ 8004d6c:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
+ 8004d6e:	2200      	movs	r2, #0
+ 8004d70:	61bb      	str	r3, [r7, #24]
+ 8004d72:	61fa      	str	r2, [r7, #28]
+ 8004d74:	e9d7 2306 	ldrd	r2, r3, [r7, #24]
+ 8004d78:	f7fb fa3a 	bl	80001f0 <__aeabi_uldivmod>
+ 8004d7c:	4602      	mov	r2, r0
+ 8004d7e:	460b      	mov	r3, r1
+ 8004d80:	4613      	mov	r3, r2
+ 8004d82:	64fb      	str	r3, [r7, #76]	@ 0x4c
+      }
+      pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) * 2U);
+ 8004d84:	4b0b      	ldr	r3, [pc, #44]	@ (8004db4 <HAL_RCC_GetSysClockFreq+0x200>)
+ 8004d86:	685b      	ldr	r3, [r3, #4]
+ 8004d88:	0c1b      	lsrs	r3, r3, #16
+ 8004d8a:	f003 0303 	and.w	r3, r3, #3
+ 8004d8e:	3301      	adds	r3, #1
+ 8004d90:	005b      	lsls	r3, r3, #1
+ 8004d92:	643b      	str	r3, [r7, #64]	@ 0x40
+
+      sysclockfreq = pllvco / pllp;
+ 8004d94:	6cfa      	ldr	r2, [r7, #76]	@ 0x4c
+ 8004d96:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
+ 8004d98:	fbb2 f3f3 	udiv	r3, r2, r3
+ 8004d9c:	64bb      	str	r3, [r7, #72]	@ 0x48
+      break;
+ 8004d9e:	e002      	b.n	8004da6 <HAL_RCC_GetSysClockFreq+0x1f2>
+    }
+    default:
+    {
+      sysclockfreq = HSI_VALUE;
+ 8004da0:	4b05      	ldr	r3, [pc, #20]	@ (8004db8 <HAL_RCC_GetSysClockFreq+0x204>)
+ 8004da2:	64bb      	str	r3, [r7, #72]	@ 0x48
+      break;
+ 8004da4:	bf00      	nop
+    }
+  }
+  return sysclockfreq;
+ 8004da6:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
+}
+ 8004da8:	4618      	mov	r0, r3
+ 8004daa:	3750      	adds	r7, #80	@ 0x50
+ 8004dac:	46bd      	mov	sp, r7
+ 8004dae:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
+ 8004db2:	bf00      	nop
+ 8004db4:	40023800 	.word	0x40023800
+ 8004db8:	00f42400 	.word	0x00f42400
+ 8004dbc:	007a1200 	.word	0x007a1200
+
+08004dc0 <HAL_RCC_GetHCLKFreq>:
+  * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency
+  *         and updated within this function
+  * @retval HCLK frequency
+  */
+uint32_t HAL_RCC_GetHCLKFreq(void)
+{
+ 8004dc0:	b480      	push	{r7}
+ 8004dc2:	af00      	add	r7, sp, #0
+  return SystemCoreClock;
+ 8004dc4:	4b03      	ldr	r3, [pc, #12]	@ (8004dd4 <HAL_RCC_GetHCLKFreq+0x14>)
+ 8004dc6:	681b      	ldr	r3, [r3, #0]
+}
+ 8004dc8:	4618      	mov	r0, r3
+ 8004dca:	46bd      	mov	sp, r7
+ 8004dcc:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8004dd0:	4770      	bx	lr
+ 8004dd2:	bf00      	nop
+ 8004dd4:	20000000 	.word	0x20000000
+
+08004dd8 <HAL_RCC_GetPCLK1Freq>:
+  * @note   Each time PCLK1 changes, this function must be called to update the
+  *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
+  * @retval PCLK1 frequency
+  */
+uint32_t HAL_RCC_GetPCLK1Freq(void)
+{
+ 8004dd8:	b580      	push	{r7, lr}
+ 8004dda:	af00      	add	r7, sp, #0
+  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
+  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
+ 8004ddc:	f7ff fff0 	bl	8004dc0 <HAL_RCC_GetHCLKFreq>
+ 8004de0:	4602      	mov	r2, r0
+ 8004de2:	4b05      	ldr	r3, [pc, #20]	@ (8004df8 <HAL_RCC_GetPCLK1Freq+0x20>)
+ 8004de4:	689b      	ldr	r3, [r3, #8]
+ 8004de6:	0a9b      	lsrs	r3, r3, #10
+ 8004de8:	f003 0307 	and.w	r3, r3, #7
+ 8004dec:	4903      	ldr	r1, [pc, #12]	@ (8004dfc <HAL_RCC_GetPCLK1Freq+0x24>)
+ 8004dee:	5ccb      	ldrb	r3, [r1, r3]
+ 8004df0:	fa22 f303 	lsr.w	r3, r2, r3
+}
+ 8004df4:	4618      	mov	r0, r3
+ 8004df6:	bd80      	pop	{r7, pc}
+ 8004df8:	40023800 	.word	0x40023800
+ 8004dfc:	08007efc 	.word	0x08007efc
+
+08004e00 <HAL_RCC_GetPCLK2Freq>:
+  * @note   Each time PCLK2 changes, this function must be called to update the
+  *         right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
+  * @retval PCLK2 frequency
+  */
+uint32_t HAL_RCC_GetPCLK2Freq(void)
+{
+ 8004e00:	b580      	push	{r7, lr}
+ 8004e02:	af00      	add	r7, sp, #0
+  /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
+  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
+ 8004e04:	f7ff ffdc 	bl	8004dc0 <HAL_RCC_GetHCLKFreq>
+ 8004e08:	4602      	mov	r2, r0
+ 8004e0a:	4b05      	ldr	r3, [pc, #20]	@ (8004e20 <HAL_RCC_GetPCLK2Freq+0x20>)
+ 8004e0c:	689b      	ldr	r3, [r3, #8]
+ 8004e0e:	0b5b      	lsrs	r3, r3, #13
+ 8004e10:	f003 0307 	and.w	r3, r3, #7
+ 8004e14:	4903      	ldr	r1, [pc, #12]	@ (8004e24 <HAL_RCC_GetPCLK2Freq+0x24>)
+ 8004e16:	5ccb      	ldrb	r3, [r1, r3]
+ 8004e18:	fa22 f303 	lsr.w	r3, r2, r3
+}
+ 8004e1c:	4618      	mov	r0, r3
+ 8004e1e:	bd80      	pop	{r7, pc}
+ 8004e20:	40023800 	.word	0x40023800
+ 8004e24:	08007efc 	.word	0x08007efc
+
+08004e28 <HAL_RCC_GetClockConfig>:
+  * will be configured.
+  * @param  pFLatency Pointer on the Flash Latency.
+  * @retval None
+  */
+void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
+{
+ 8004e28:	b480      	push	{r7}
+ 8004e2a:	b083      	sub	sp, #12
+ 8004e2c:	af00      	add	r7, sp, #0
+ 8004e2e:	6078      	str	r0, [r7, #4]
+ 8004e30:	6039      	str	r1, [r7, #0]
+  /* Set all possible values for the Clock type parameter --------------------*/
+  RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ 8004e32:	687b      	ldr	r3, [r7, #4]
+ 8004e34:	220f      	movs	r2, #15
+ 8004e36:	601a      	str	r2, [r3, #0]
+
+  /* Get the SYSCLK configuration --------------------------------------------*/
+  RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
+ 8004e38:	4b12      	ldr	r3, [pc, #72]	@ (8004e84 <HAL_RCC_GetClockConfig+0x5c>)
+ 8004e3a:	689b      	ldr	r3, [r3, #8]
+ 8004e3c:	f003 0203 	and.w	r2, r3, #3
+ 8004e40:	687b      	ldr	r3, [r7, #4]
+ 8004e42:	605a      	str	r2, [r3, #4]
+
+  /* Get the HCLK configuration ----------------------------------------------*/
+  RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
+ 8004e44:	4b0f      	ldr	r3, [pc, #60]	@ (8004e84 <HAL_RCC_GetClockConfig+0x5c>)
+ 8004e46:	689b      	ldr	r3, [r3, #8]
+ 8004e48:	f003 02f0 	and.w	r2, r3, #240	@ 0xf0
+ 8004e4c:	687b      	ldr	r3, [r7, #4]
+ 8004e4e:	609a      	str	r2, [r3, #8]
+
+  /* Get the APB1 configuration ----------------------------------------------*/
+  RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
+ 8004e50:	4b0c      	ldr	r3, [pc, #48]	@ (8004e84 <HAL_RCC_GetClockConfig+0x5c>)
+ 8004e52:	689b      	ldr	r3, [r3, #8]
+ 8004e54:	f403 52e0 	and.w	r2, r3, #7168	@ 0x1c00
+ 8004e58:	687b      	ldr	r3, [r7, #4]
+ 8004e5a:	60da      	str	r2, [r3, #12]
+
+  /* Get the APB2 configuration ----------------------------------------------*/
+  RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U);
+ 8004e5c:	4b09      	ldr	r3, [pc, #36]	@ (8004e84 <HAL_RCC_GetClockConfig+0x5c>)
+ 8004e5e:	689b      	ldr	r3, [r3, #8]
+ 8004e60:	08db      	lsrs	r3, r3, #3
+ 8004e62:	f403 52e0 	and.w	r2, r3, #7168	@ 0x1c00
+ 8004e66:	687b      	ldr	r3, [r7, #4]
+ 8004e68:	611a      	str	r2, [r3, #16]
+
+  /* Get the Flash Wait State (Latency) configuration ------------------------*/
+  *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
+ 8004e6a:	4b07      	ldr	r3, [pc, #28]	@ (8004e88 <HAL_RCC_GetClockConfig+0x60>)
+ 8004e6c:	681b      	ldr	r3, [r3, #0]
+ 8004e6e:	f003 020f 	and.w	r2, r3, #15
+ 8004e72:	683b      	ldr	r3, [r7, #0]
+ 8004e74:	601a      	str	r2, [r3, #0]
+}
+ 8004e76:	bf00      	nop
+ 8004e78:	370c      	adds	r7, #12
+ 8004e7a:	46bd      	mov	sp, r7
+ 8004e7c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8004e80:	4770      	bx	lr
+ 8004e82:	bf00      	nop
+ 8004e84:	40023800 	.word	0x40023800
+ 8004e88:	40023c00 	.word	0x40023c00
+
+08004e8c <HAL_RCCEx_PeriphCLKConfig>:
+  *         the backup registers) and RCC_BDCR register are set to their reset values.
+  *
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
+{
+ 8004e8c:	b580      	push	{r7, lr}
+ 8004e8e:	b086      	sub	sp, #24
+ 8004e90:	af00      	add	r7, sp, #0
+ 8004e92:	6078      	str	r0, [r7, #4]
+  uint32_t tickstart = 0U;
+ 8004e94:	2300      	movs	r3, #0
+ 8004e96:	617b      	str	r3, [r7, #20]
+  uint32_t tmpreg1 = 0U;
+ 8004e98:	2300      	movs	r3, #0
+ 8004e9a:	613b      	str	r3, [r7, #16]
+
+  /*----------------------- SAI/I2S Configuration (PLLI2S) -------------------*/
+  /*----------------------- Common configuration SAI/I2S ---------------------*/
+  /* In Case of SAI or I2S Clock Configuration through PLLI2S, PLLI2SN division
+     factor is common parameters for both peripherals */
+  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) ||
+ 8004e9c:	687b      	ldr	r3, [r7, #4]
+ 8004e9e:	681b      	ldr	r3, [r3, #0]
+ 8004ea0:	f003 0301 	and.w	r3, r3, #1
+ 8004ea4:	2b00      	cmp	r3, #0
+ 8004ea6:	d10b      	bne.n	8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x34>
+      (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLI2S) == RCC_PERIPHCLK_SAI_PLLI2S) ||
+ 8004ea8:	687b      	ldr	r3, [r7, #4]
+ 8004eaa:	681b      	ldr	r3, [r3, #0]
+ 8004eac:	f003 0302 	and.w	r3, r3, #2
+  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) ||
+ 8004eb0:	2b00      	cmp	r3, #0
+ 8004eb2:	d105      	bne.n	8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x34>
+      (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S))
+ 8004eb4:	687b      	ldr	r3, [r7, #4]
+ 8004eb6:	681b      	ldr	r3, [r3, #0]
+ 8004eb8:	f003 0340 	and.w	r3, r3, #64	@ 0x40
+      (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLI2S) == RCC_PERIPHCLK_SAI_PLLI2S) ||
+ 8004ebc:	2b00      	cmp	r3, #0
+ 8004ebe:	d075      	beq.n	8004fac <HAL_RCCEx_PeriphCLKConfig+0x120>
+  {
+    /* check for Parameters */
+    assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
+
+    /* Disable the PLLI2S */
+    __HAL_RCC_PLLI2S_DISABLE();
+ 8004ec0:	4b91      	ldr	r3, [pc, #580]	@ (8005108 <HAL_RCCEx_PeriphCLKConfig+0x27c>)
+ 8004ec2:	2200      	movs	r2, #0
+ 8004ec4:	601a      	str	r2, [r3, #0]
+    /* Get tick */
+    tickstart = HAL_GetTick();
+ 8004ec6:	f7fc fbc1 	bl	800164c <HAL_GetTick>
+ 8004eca:	6178      	str	r0, [r7, #20]
+    /* Wait till PLLI2S is disabled */
+    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY)  != RESET)
+ 8004ecc:	e008      	b.n	8004ee0 <HAL_RCCEx_PeriphCLKConfig+0x54>
+    {
+      if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
+ 8004ece:	f7fc fbbd 	bl	800164c <HAL_GetTick>
+ 8004ed2:	4602      	mov	r2, r0
+ 8004ed4:	697b      	ldr	r3, [r7, #20]
+ 8004ed6:	1ad3      	subs	r3, r2, r3
+ 8004ed8:	2b02      	cmp	r3, #2
+ 8004eda:	d901      	bls.n	8004ee0 <HAL_RCCEx_PeriphCLKConfig+0x54>
+      {
+        /* return in case of Timeout detected */
+        return HAL_TIMEOUT;
+ 8004edc:	2303      	movs	r3, #3
+ 8004ede:	e189      	b.n	80051f4 <HAL_RCCEx_PeriphCLKConfig+0x368>
+    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY)  != RESET)
+ 8004ee0:	4b8a      	ldr	r3, [pc, #552]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 8004ee2:	681b      	ldr	r3, [r3, #0]
+ 8004ee4:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
+ 8004ee8:	2b00      	cmp	r3, #0
+ 8004eea:	d1f0      	bne.n	8004ece <HAL_RCCEx_PeriphCLKConfig+0x42>
+    }
+
+    /*---------------------------- I2S configuration -------------------------*/
+    /* In Case of I2S Clock Configuration through PLLI2S, PLLI2SR must be added
+      only for I2S configuration */
+    if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == (RCC_PERIPHCLK_I2S))
+ 8004eec:	687b      	ldr	r3, [r7, #4]
+ 8004eee:	681b      	ldr	r3, [r3, #0]
+ 8004ef0:	f003 0301 	and.w	r3, r3, #1
+ 8004ef4:	2b00      	cmp	r3, #0
+ 8004ef6:	d009      	beq.n	8004f0c <HAL_RCCEx_PeriphCLKConfig+0x80>
+      /* check for Parameters */
+      assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
+      /* Configure the PLLI2S division factors */
+      /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLM) */
+      /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
+      __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SR);
+ 8004ef8:	687b      	ldr	r3, [r7, #4]
+ 8004efa:	685b      	ldr	r3, [r3, #4]
+ 8004efc:	019a      	lsls	r2, r3, #6
+ 8004efe:	687b      	ldr	r3, [r7, #4]
+ 8004f00:	689b      	ldr	r3, [r3, #8]
+ 8004f02:	071b      	lsls	r3, r3, #28
+ 8004f04:	4981      	ldr	r1, [pc, #516]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 8004f06:	4313      	orrs	r3, r2
+ 8004f08:	f8c1 3084 	str.w	r3, [r1, #132]	@ 0x84
+    }
+
+    /*---------------------------- SAI configuration -------------------------*/
+    /* In Case of SAI Clock Configuration through PLLI2S, PLLI2SQ and PLLI2S_DIVQ must
+       be added only for SAI configuration */
+    if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLI2S) == (RCC_PERIPHCLK_SAI_PLLI2S))
+ 8004f0c:	687b      	ldr	r3, [r7, #4]
+ 8004f0e:	681b      	ldr	r3, [r3, #0]
+ 8004f10:	f003 0302 	and.w	r3, r3, #2
+ 8004f14:	2b00      	cmp	r3, #0
+ 8004f16:	d01f      	beq.n	8004f58 <HAL_RCCEx_PeriphCLKConfig+0xcc>
+      /* Check the PLLI2S division factors */
+      assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
+      assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ));
+
+      /* Read PLLI2SR value from PLLI2SCFGR register (this value is not need for SAI configuration) */
+      tmpreg1 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
+ 8004f18:	4b7c      	ldr	r3, [pc, #496]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 8004f1a:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
+ 8004f1e:	0f1b      	lsrs	r3, r3, #28
+ 8004f20:	f003 0307 	and.w	r3, r3, #7
+ 8004f24:	613b      	str	r3, [r7, #16]
+      /* Configure the PLLI2S division factors */
+      /* PLLI2S_VCO Input  = PLL_SOURCE/PLLM */
+      /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
+      /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
+      __HAL_RCC_PLLI2S_SAICLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SQ, tmpreg1);
+ 8004f26:	687b      	ldr	r3, [r7, #4]
+ 8004f28:	685b      	ldr	r3, [r3, #4]
+ 8004f2a:	019a      	lsls	r2, r3, #6
+ 8004f2c:	687b      	ldr	r3, [r7, #4]
+ 8004f2e:	68db      	ldr	r3, [r3, #12]
+ 8004f30:	061b      	lsls	r3, r3, #24
+ 8004f32:	431a      	orrs	r2, r3
+ 8004f34:	693b      	ldr	r3, [r7, #16]
+ 8004f36:	071b      	lsls	r3, r3, #28
+ 8004f38:	4974      	ldr	r1, [pc, #464]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 8004f3a:	4313      	orrs	r3, r2
+ 8004f3c:	f8c1 3084 	str.w	r3, [r1, #132]	@ 0x84
+      /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
+      __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ);
+ 8004f40:	4b72      	ldr	r3, [pc, #456]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 8004f42:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
+ 8004f46:	f023 021f 	bic.w	r2, r3, #31
+ 8004f4a:	687b      	ldr	r3, [r7, #4]
+ 8004f4c:	69db      	ldr	r3, [r3, #28]
+ 8004f4e:	3b01      	subs	r3, #1
+ 8004f50:	496e      	ldr	r1, [pc, #440]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 8004f52:	4313      	orrs	r3, r2
+ 8004f54:	f8c1 308c 	str.w	r3, [r1, #140]	@ 0x8c
+    }
+
+    /*----------------- In Case of PLLI2S is just selected  -----------------*/
+    if ((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)
+ 8004f58:	687b      	ldr	r3, [r7, #4]
+ 8004f5a:	681b      	ldr	r3, [r3, #0]
+ 8004f5c:	f003 0340 	and.w	r3, r3, #64	@ 0x40
+ 8004f60:	2b00      	cmp	r3, #0
+ 8004f62:	d00d      	beq.n	8004f80 <HAL_RCCEx_PeriphCLKConfig+0xf4>
+      /* Check for Parameters */
+      assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
+      assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
+
+      /* Configure the PLLI2S multiplication and division factors */
+      __HAL_RCC_PLLI2S_SAICLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SQ,
+ 8004f64:	687b      	ldr	r3, [r7, #4]
+ 8004f66:	685b      	ldr	r3, [r3, #4]
+ 8004f68:	019a      	lsls	r2, r3, #6
+ 8004f6a:	687b      	ldr	r3, [r7, #4]
+ 8004f6c:	68db      	ldr	r3, [r3, #12]
+ 8004f6e:	061b      	lsls	r3, r3, #24
+ 8004f70:	431a      	orrs	r2, r3
+ 8004f72:	687b      	ldr	r3, [r7, #4]
+ 8004f74:	689b      	ldr	r3, [r3, #8]
+ 8004f76:	071b      	lsls	r3, r3, #28
+ 8004f78:	4964      	ldr	r1, [pc, #400]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 8004f7a:	4313      	orrs	r3, r2
+ 8004f7c:	f8c1 3084 	str.w	r3, [r1, #132]	@ 0x84
+                                     PeriphClkInit->PLLI2S.PLLI2SR);
+    }
+
+    /* Enable the PLLI2S */
+    __HAL_RCC_PLLI2S_ENABLE();
+ 8004f80:	4b61      	ldr	r3, [pc, #388]	@ (8005108 <HAL_RCCEx_PeriphCLKConfig+0x27c>)
+ 8004f82:	2201      	movs	r2, #1
+ 8004f84:	601a      	str	r2, [r3, #0]
+    /* Get tick */
+    tickstart = HAL_GetTick();
+ 8004f86:	f7fc fb61 	bl	800164c <HAL_GetTick>
+ 8004f8a:	6178      	str	r0, [r7, #20]
+    /* Wait till PLLI2S is ready */
+    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY)  == RESET)
+ 8004f8c:	e008      	b.n	8004fa0 <HAL_RCCEx_PeriphCLKConfig+0x114>
+    {
+      if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
+ 8004f8e:	f7fc fb5d 	bl	800164c <HAL_GetTick>
+ 8004f92:	4602      	mov	r2, r0
+ 8004f94:	697b      	ldr	r3, [r7, #20]
+ 8004f96:	1ad3      	subs	r3, r2, r3
+ 8004f98:	2b02      	cmp	r3, #2
+ 8004f9a:	d901      	bls.n	8004fa0 <HAL_RCCEx_PeriphCLKConfig+0x114>
+      {
+        /* return in case of Timeout detected */
+        return HAL_TIMEOUT;
+ 8004f9c:	2303      	movs	r3, #3
+ 8004f9e:	e129      	b.n	80051f4 <HAL_RCCEx_PeriphCLKConfig+0x368>
+    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY)  == RESET)
+ 8004fa0:	4b5a      	ldr	r3, [pc, #360]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 8004fa2:	681b      	ldr	r3, [r3, #0]
+ 8004fa4:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
+ 8004fa8:	2b00      	cmp	r3, #0
+ 8004faa:	d0f0      	beq.n	8004f8e <HAL_RCCEx_PeriphCLKConfig+0x102>
+
+  /*----------------------- SAI/LTDC Configuration (PLLSAI) ------------------*/
+  /*----------------------- Common configuration SAI/LTDC --------------------*/
+  /* In Case of SAI or LTDC Clock Configuration through PLLSAI, PLLSAIN division
+     factor is common parameters for both peripherals */
+  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLSAI) == RCC_PERIPHCLK_SAI_PLLSAI) ||
+ 8004fac:	687b      	ldr	r3, [r7, #4]
+ 8004fae:	681b      	ldr	r3, [r3, #0]
+ 8004fb0:	f003 0304 	and.w	r3, r3, #4
+ 8004fb4:	2b00      	cmp	r3, #0
+ 8004fb6:	d105      	bne.n	8004fc4 <HAL_RCCEx_PeriphCLKConfig+0x138>
+      (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC))
+ 8004fb8:	687b      	ldr	r3, [r7, #4]
+ 8004fba:	681b      	ldr	r3, [r3, #0]
+ 8004fbc:	f003 0308 	and.w	r3, r3, #8
+  if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLSAI) == RCC_PERIPHCLK_SAI_PLLSAI) ||
+ 8004fc0:	2b00      	cmp	r3, #0
+ 8004fc2:	d079      	beq.n	80050b8 <HAL_RCCEx_PeriphCLKConfig+0x22c>
+  {
+    /* Check the PLLSAI division factors */
+    assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN));
+
+    /* Disable PLLSAI Clock */
+    __HAL_RCC_PLLSAI_DISABLE();
+ 8004fc4:	4b52      	ldr	r3, [pc, #328]	@ (8005110 <HAL_RCCEx_PeriphCLKConfig+0x284>)
+ 8004fc6:	2200      	movs	r2, #0
+ 8004fc8:	601a      	str	r2, [r3, #0]
+    /* Get tick */
+    tickstart = HAL_GetTick();
+ 8004fca:	f7fc fb3f 	bl	800164c <HAL_GetTick>
+ 8004fce:	6178      	str	r0, [r7, #20]
+    /* Wait till PLLSAI is disabled */
+    while (__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
+ 8004fd0:	e008      	b.n	8004fe4 <HAL_RCCEx_PeriphCLKConfig+0x158>
+    {
+      if ((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
+ 8004fd2:	f7fc fb3b 	bl	800164c <HAL_GetTick>
+ 8004fd6:	4602      	mov	r2, r0
+ 8004fd8:	697b      	ldr	r3, [r7, #20]
+ 8004fda:	1ad3      	subs	r3, r2, r3
+ 8004fdc:	2b02      	cmp	r3, #2
+ 8004fde:	d901      	bls.n	8004fe4 <HAL_RCCEx_PeriphCLKConfig+0x158>
+      {
+        /* return in case of Timeout detected */
+        return HAL_TIMEOUT;
+ 8004fe0:	2303      	movs	r3, #3
+ 8004fe2:	e107      	b.n	80051f4 <HAL_RCCEx_PeriphCLKConfig+0x368>
+    while (__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
+ 8004fe4:	4b49      	ldr	r3, [pc, #292]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 8004fe6:	681b      	ldr	r3, [r3, #0]
+ 8004fe8:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
+ 8004fec:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
+ 8004ff0:	d0ef      	beq.n	8004fd2 <HAL_RCCEx_PeriphCLKConfig+0x146>
+    }
+
+    /*---------------------------- SAI configuration -------------------------*/
+    /* In Case of SAI Clock Configuration through PLLSAI, PLLSAIQ and PLLSAI_DIVQ must
+       be added only for SAI configuration */
+    if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI_PLLSAI) == (RCC_PERIPHCLK_SAI_PLLSAI))
+ 8004ff2:	687b      	ldr	r3, [r7, #4]
+ 8004ff4:	681b      	ldr	r3, [r3, #0]
+ 8004ff6:	f003 0304 	and.w	r3, r3, #4
+ 8004ffa:	2b00      	cmp	r3, #0
+ 8004ffc:	d020      	beq.n	8005040 <HAL_RCCEx_PeriphCLKConfig+0x1b4>
+    {
+      assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ));
+      assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ));
+
+      /* Read PLLSAIR value from PLLSAICFGR register (this value is not need for SAI configuration) */
+      tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIR) >> RCC_PLLSAICFGR_PLLSAIR_Pos);
+ 8004ffe:	4b43      	ldr	r3, [pc, #268]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 8005000:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
+ 8005004:	0f1b      	lsrs	r3, r3, #28
+ 8005006:	f003 0307 	and.w	r3, r3, #7
+ 800500a:	613b      	str	r3, [r7, #16]
+      /* PLLSAI_VCO Input  = PLL_SOURCE/PLLM */
+      /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
+      /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
+      __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN, PeriphClkInit->PLLSAI.PLLSAIQ, tmpreg1);
+ 800500c:	687b      	ldr	r3, [r7, #4]
+ 800500e:	691b      	ldr	r3, [r3, #16]
+ 8005010:	019a      	lsls	r2, r3, #6
+ 8005012:	687b      	ldr	r3, [r7, #4]
+ 8005014:	695b      	ldr	r3, [r3, #20]
+ 8005016:	061b      	lsls	r3, r3, #24
+ 8005018:	431a      	orrs	r2, r3
+ 800501a:	693b      	ldr	r3, [r7, #16]
+ 800501c:	071b      	lsls	r3, r3, #28
+ 800501e:	493b      	ldr	r1, [pc, #236]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 8005020:	4313      	orrs	r3, r2
+ 8005022:	f8c1 3088 	str.w	r3, [r1, #136]	@ 0x88
+      /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
+      __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ);
+ 8005026:	4b39      	ldr	r3, [pc, #228]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 8005028:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
+ 800502c:	f423 52f8 	bic.w	r2, r3, #7936	@ 0x1f00
+ 8005030:	687b      	ldr	r3, [r7, #4]
+ 8005032:	6a1b      	ldr	r3, [r3, #32]
+ 8005034:	3b01      	subs	r3, #1
+ 8005036:	021b      	lsls	r3, r3, #8
+ 8005038:	4934      	ldr	r1, [pc, #208]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 800503a:	4313      	orrs	r3, r2
+ 800503c:	f8c1 308c 	str.w	r3, [r1, #140]	@ 0x8c
+    }
+
+    /*---------------------------- LTDC configuration ------------------------*/
+    if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == (RCC_PERIPHCLK_LTDC))
+ 8005040:	687b      	ldr	r3, [r7, #4]
+ 8005042:	681b      	ldr	r3, [r3, #0]
+ 8005044:	f003 0308 	and.w	r3, r3, #8
+ 8005048:	2b00      	cmp	r3, #0
+ 800504a:	d01e      	beq.n	800508a <HAL_RCCEx_PeriphCLKConfig+0x1fe>
+    {
+      assert_param(IS_RCC_PLLSAIR_VALUE(PeriphClkInit->PLLSAI.PLLSAIR));
+      assert_param(IS_RCC_PLLSAI_DIVR_VALUE(PeriphClkInit->PLLSAIDivR));
+
+      /* Read PLLSAIR value from PLLSAICFGR register (this value is not need for SAI configuration) */
+      tmpreg1 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
+ 800504c:	4b2f      	ldr	r3, [pc, #188]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 800504e:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
+ 8005052:	0e1b      	lsrs	r3, r3, #24
+ 8005054:	f003 030f 	and.w	r3, r3, #15
+ 8005058:	613b      	str	r3, [r7, #16]
+      /* PLLSAI_VCO Input  = PLL_SOURCE/PLLM */
+      /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
+      /* LTDC_CLK(first level) = PLLSAI_VCO Output/PLLSAIR */
+      __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN, tmpreg1, PeriphClkInit->PLLSAI.PLLSAIR);
+ 800505a:	687b      	ldr	r3, [r7, #4]
+ 800505c:	691b      	ldr	r3, [r3, #16]
+ 800505e:	019a      	lsls	r2, r3, #6
+ 8005060:	693b      	ldr	r3, [r7, #16]
+ 8005062:	061b      	lsls	r3, r3, #24
+ 8005064:	431a      	orrs	r2, r3
+ 8005066:	687b      	ldr	r3, [r7, #4]
+ 8005068:	699b      	ldr	r3, [r3, #24]
+ 800506a:	071b      	lsls	r3, r3, #28
+ 800506c:	4927      	ldr	r1, [pc, #156]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 800506e:	4313      	orrs	r3, r2
+ 8005070:	f8c1 3088 	str.w	r3, [r1, #136]	@ 0x88
+      /* LTDC_CLK = LTDC_CLK(first level)/PLLSAIDIVR */
+      __HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLSAIDivR);
+ 8005074:	4b25      	ldr	r3, [pc, #148]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 8005076:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
+ 800507a:	f423 3240 	bic.w	r2, r3, #196608	@ 0x30000
+ 800507e:	687b      	ldr	r3, [r7, #4]
+ 8005080:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8005082:	4922      	ldr	r1, [pc, #136]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 8005084:	4313      	orrs	r3, r2
+ 8005086:	f8c1 308c 	str.w	r3, [r1, #140]	@ 0x8c
+    }
+    /* Enable PLLSAI Clock */
+    __HAL_RCC_PLLSAI_ENABLE();
+ 800508a:	4b21      	ldr	r3, [pc, #132]	@ (8005110 <HAL_RCCEx_PeriphCLKConfig+0x284>)
+ 800508c:	2201      	movs	r2, #1
+ 800508e:	601a      	str	r2, [r3, #0]
+    /* Get tick */
+    tickstart = HAL_GetTick();
+ 8005090:	f7fc fadc 	bl	800164c <HAL_GetTick>
+ 8005094:	6178      	str	r0, [r7, #20]
+    /* Wait till PLLSAI is ready */
+    while (__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
+ 8005096:	e008      	b.n	80050aa <HAL_RCCEx_PeriphCLKConfig+0x21e>
+    {
+      if ((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
+ 8005098:	f7fc fad8 	bl	800164c <HAL_GetTick>
+ 800509c:	4602      	mov	r2, r0
+ 800509e:	697b      	ldr	r3, [r7, #20]
+ 80050a0:	1ad3      	subs	r3, r2, r3
+ 80050a2:	2b02      	cmp	r3, #2
+ 80050a4:	d901      	bls.n	80050aa <HAL_RCCEx_PeriphCLKConfig+0x21e>
+      {
+        /* return in case of Timeout detected */
+        return HAL_TIMEOUT;
+ 80050a6:	2303      	movs	r3, #3
+ 80050a8:	e0a4      	b.n	80051f4 <HAL_RCCEx_PeriphCLKConfig+0x368>
+    while (__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
+ 80050aa:	4b18      	ldr	r3, [pc, #96]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 80050ac:	681b      	ldr	r3, [r3, #0]
+ 80050ae:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
+ 80050b2:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
+ 80050b6:	d1ef      	bne.n	8005098 <HAL_RCCEx_PeriphCLKConfig+0x20c>
+    }
+  }
+  /*--------------------------------------------------------------------------*/
+
+  /*---------------------------- RTC configuration ---------------------------*/
+  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
+ 80050b8:	687b      	ldr	r3, [r7, #4]
+ 80050ba:	681b      	ldr	r3, [r3, #0]
+ 80050bc:	f003 0320 	and.w	r3, r3, #32
+ 80050c0:	2b00      	cmp	r3, #0
+ 80050c2:	f000 808b 	beq.w	80051dc <HAL_RCCEx_PeriphCLKConfig+0x350>
+  {
+    /* Check for RTC Parameters used to output RTCCLK */
+    assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
+
+    /* Enable Power Clock*/
+    __HAL_RCC_PWR_CLK_ENABLE();
+ 80050c6:	2300      	movs	r3, #0
+ 80050c8:	60fb      	str	r3, [r7, #12]
+ 80050ca:	4b10      	ldr	r3, [pc, #64]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 80050cc:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 80050ce:	4a0f      	ldr	r2, [pc, #60]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 80050d0:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
+ 80050d4:	6413      	str	r3, [r2, #64]	@ 0x40
+ 80050d6:	4b0d      	ldr	r3, [pc, #52]	@ (800510c <HAL_RCCEx_PeriphCLKConfig+0x280>)
+ 80050d8:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 80050da:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
+ 80050de:	60fb      	str	r3, [r7, #12]
+ 80050e0:	68fb      	ldr	r3, [r7, #12]
+
+    /* Enable write access to Backup domain */
+    PWR->CR |= PWR_CR_DBP;
+ 80050e2:	4b0c      	ldr	r3, [pc, #48]	@ (8005114 <HAL_RCCEx_PeriphCLKConfig+0x288>)
+ 80050e4:	681b      	ldr	r3, [r3, #0]
+ 80050e6:	4a0b      	ldr	r2, [pc, #44]	@ (8005114 <HAL_RCCEx_PeriphCLKConfig+0x288>)
+ 80050e8:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
+ 80050ec:	6013      	str	r3, [r2, #0]
+
+    /* Get tick */
+    tickstart = HAL_GetTick();
+ 80050ee:	f7fc faad 	bl	800164c <HAL_GetTick>
+ 80050f2:	6178      	str	r0, [r7, #20]
+
+    while ((PWR->CR & PWR_CR_DBP) == RESET)
+ 80050f4:	e010      	b.n	8005118 <HAL_RCCEx_PeriphCLKConfig+0x28c>
+    {
+      if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
+ 80050f6:	f7fc faa9 	bl	800164c <HAL_GetTick>
+ 80050fa:	4602      	mov	r2, r0
+ 80050fc:	697b      	ldr	r3, [r7, #20]
+ 80050fe:	1ad3      	subs	r3, r2, r3
+ 8005100:	2b02      	cmp	r3, #2
+ 8005102:	d909      	bls.n	8005118 <HAL_RCCEx_PeriphCLKConfig+0x28c>
+      {
+        return HAL_TIMEOUT;
+ 8005104:	2303      	movs	r3, #3
+ 8005106:	e075      	b.n	80051f4 <HAL_RCCEx_PeriphCLKConfig+0x368>
+ 8005108:	42470068 	.word	0x42470068
+ 800510c:	40023800 	.word	0x40023800
+ 8005110:	42470070 	.word	0x42470070
+ 8005114:	40007000 	.word	0x40007000
+    while ((PWR->CR & PWR_CR_DBP) == RESET)
+ 8005118:	4b38      	ldr	r3, [pc, #224]	@ (80051fc <HAL_RCCEx_PeriphCLKConfig+0x370>)
+ 800511a:	681b      	ldr	r3, [r3, #0]
+ 800511c:	f403 7380 	and.w	r3, r3, #256	@ 0x100
+ 8005120:	2b00      	cmp	r3, #0
+ 8005122:	d0e8      	beq.n	80050f6 <HAL_RCCEx_PeriphCLKConfig+0x26a>
+      }
+    }
+    /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
+    tmpreg1 = (RCC->BDCR & RCC_BDCR_RTCSEL);
+ 8005124:	4b36      	ldr	r3, [pc, #216]	@ (8005200 <HAL_RCCEx_PeriphCLKConfig+0x374>)
+ 8005126:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 8005128:	f403 7340 	and.w	r3, r3, #768	@ 0x300
+ 800512c:	613b      	str	r3, [r7, #16]
+    if ((tmpreg1 != 0x00000000U) && ((tmpreg1) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
+ 800512e:	693b      	ldr	r3, [r7, #16]
+ 8005130:	2b00      	cmp	r3, #0
+ 8005132:	d02f      	beq.n	8005194 <HAL_RCCEx_PeriphCLKConfig+0x308>
+ 8005134:	687b      	ldr	r3, [r7, #4]
+ 8005136:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
+ 8005138:	f403 7340 	and.w	r3, r3, #768	@ 0x300
+ 800513c:	693a      	ldr	r2, [r7, #16]
+ 800513e:	429a      	cmp	r2, r3
+ 8005140:	d028      	beq.n	8005194 <HAL_RCCEx_PeriphCLKConfig+0x308>
+    {
+      /* Store the content of BDCR register before the reset of Backup Domain */
+      tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
+ 8005142:	4b2f      	ldr	r3, [pc, #188]	@ (8005200 <HAL_RCCEx_PeriphCLKConfig+0x374>)
+ 8005144:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 8005146:	f423 7340 	bic.w	r3, r3, #768	@ 0x300
+ 800514a:	613b      	str	r3, [r7, #16]
+      /* RTC Clock selection can be changed only if the Backup Domain is reset */
+      __HAL_RCC_BACKUPRESET_FORCE();
+ 800514c:	4b2d      	ldr	r3, [pc, #180]	@ (8005204 <HAL_RCCEx_PeriphCLKConfig+0x378>)
+ 800514e:	2201      	movs	r2, #1
+ 8005150:	601a      	str	r2, [r3, #0]
+      __HAL_RCC_BACKUPRESET_RELEASE();
+ 8005152:	4b2c      	ldr	r3, [pc, #176]	@ (8005204 <HAL_RCCEx_PeriphCLKConfig+0x378>)
+ 8005154:	2200      	movs	r2, #0
+ 8005156:	601a      	str	r2, [r3, #0]
+      /* Restore the Content of BDCR register */
+      RCC->BDCR = tmpreg1;
+ 8005158:	4a29      	ldr	r2, [pc, #164]	@ (8005200 <HAL_RCCEx_PeriphCLKConfig+0x374>)
+ 800515a:	693b      	ldr	r3, [r7, #16]
+ 800515c:	6713      	str	r3, [r2, #112]	@ 0x70
+
+      /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
+      if (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
+ 800515e:	4b28      	ldr	r3, [pc, #160]	@ (8005200 <HAL_RCCEx_PeriphCLKConfig+0x374>)
+ 8005160:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 8005162:	f003 0301 	and.w	r3, r3, #1
+ 8005166:	2b01      	cmp	r3, #1
+ 8005168:	d114      	bne.n	8005194 <HAL_RCCEx_PeriphCLKConfig+0x308>
+      {
+        /* Get tick */
+        tickstart = HAL_GetTick();
+ 800516a:	f7fc fa6f 	bl	800164c <HAL_GetTick>
+ 800516e:	6178      	str	r0, [r7, #20]
+
+        /* Wait till LSE is ready */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+ 8005170:	e00a      	b.n	8005188 <HAL_RCCEx_PeriphCLKConfig+0x2fc>
+        {
+          if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
+ 8005172:	f7fc fa6b 	bl	800164c <HAL_GetTick>
+ 8005176:	4602      	mov	r2, r0
+ 8005178:	697b      	ldr	r3, [r7, #20]
+ 800517a:	1ad3      	subs	r3, r2, r3
+ 800517c:	f241 3288 	movw	r2, #5000	@ 0x1388
+ 8005180:	4293      	cmp	r3, r2
+ 8005182:	d901      	bls.n	8005188 <HAL_RCCEx_PeriphCLKConfig+0x2fc>
+          {
+            return HAL_TIMEOUT;
+ 8005184:	2303      	movs	r3, #3
+ 8005186:	e035      	b.n	80051f4 <HAL_RCCEx_PeriphCLKConfig+0x368>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+ 8005188:	4b1d      	ldr	r3, [pc, #116]	@ (8005200 <HAL_RCCEx_PeriphCLKConfig+0x374>)
+ 800518a:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 800518c:	f003 0302 	and.w	r3, r3, #2
+ 8005190:	2b00      	cmp	r3, #0
+ 8005192:	d0ee      	beq.n	8005172 <HAL_RCCEx_PeriphCLKConfig+0x2e6>
+          }
+        }
+      }
+    }
+    __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
+ 8005194:	687b      	ldr	r3, [r7, #4]
+ 8005196:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
+ 8005198:	f403 7340 	and.w	r3, r3, #768	@ 0x300
+ 800519c:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
+ 80051a0:	d10d      	bne.n	80051be <HAL_RCCEx_PeriphCLKConfig+0x332>
+ 80051a2:	4b17      	ldr	r3, [pc, #92]	@ (8005200 <HAL_RCCEx_PeriphCLKConfig+0x374>)
+ 80051a4:	689b      	ldr	r3, [r3, #8]
+ 80051a6:	f423 12f8 	bic.w	r2, r3, #2031616	@ 0x1f0000
+ 80051aa:	687b      	ldr	r3, [r7, #4]
+ 80051ac:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
+ 80051ae:	f023 4370 	bic.w	r3, r3, #4026531840	@ 0xf0000000
+ 80051b2:	f423 7340 	bic.w	r3, r3, #768	@ 0x300
+ 80051b6:	4912      	ldr	r1, [pc, #72]	@ (8005200 <HAL_RCCEx_PeriphCLKConfig+0x374>)
+ 80051b8:	4313      	orrs	r3, r2
+ 80051ba:	608b      	str	r3, [r1, #8]
+ 80051bc:	e005      	b.n	80051ca <HAL_RCCEx_PeriphCLKConfig+0x33e>
+ 80051be:	4b10      	ldr	r3, [pc, #64]	@ (8005200 <HAL_RCCEx_PeriphCLKConfig+0x374>)
+ 80051c0:	689b      	ldr	r3, [r3, #8]
+ 80051c2:	4a0f      	ldr	r2, [pc, #60]	@ (8005200 <HAL_RCCEx_PeriphCLKConfig+0x374>)
+ 80051c4:	f423 13f8 	bic.w	r3, r3, #2031616	@ 0x1f0000
+ 80051c8:	6093      	str	r3, [r2, #8]
+ 80051ca:	4b0d      	ldr	r3, [pc, #52]	@ (8005200 <HAL_RCCEx_PeriphCLKConfig+0x374>)
+ 80051cc:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
+ 80051ce:	687b      	ldr	r3, [r7, #4]
+ 80051d0:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
+ 80051d2:	f3c3 030b 	ubfx	r3, r3, #0, #12
+ 80051d6:	490a      	ldr	r1, [pc, #40]	@ (8005200 <HAL_RCCEx_PeriphCLKConfig+0x374>)
+ 80051d8:	4313      	orrs	r3, r2
+ 80051da:	670b      	str	r3, [r1, #112]	@ 0x70
+  }
+  /*--------------------------------------------------------------------------*/
+
+  /*---------------------------- TIM configuration ---------------------------*/
+  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
+ 80051dc:	687b      	ldr	r3, [r7, #4]
+ 80051de:	681b      	ldr	r3, [r3, #0]
+ 80051e0:	f003 0310 	and.w	r3, r3, #16
+ 80051e4:	2b00      	cmp	r3, #0
+ 80051e6:	d004      	beq.n	80051f2 <HAL_RCCEx_PeriphCLKConfig+0x366>
+  {
+    __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
+ 80051e8:	687b      	ldr	r3, [r7, #4]
+ 80051ea:	f893 202c 	ldrb.w	r2, [r3, #44]	@ 0x2c
+ 80051ee:	4b06      	ldr	r3, [pc, #24]	@ (8005208 <HAL_RCCEx_PeriphCLKConfig+0x37c>)
+ 80051f0:	601a      	str	r2, [r3, #0]
+  }
+  return HAL_OK;
+ 80051f2:	2300      	movs	r3, #0
+}
+ 80051f4:	4618      	mov	r0, r3
+ 80051f6:	3718      	adds	r7, #24
+ 80051f8:	46bd      	mov	sp, r7
+ 80051fa:	bd80      	pop	{r7, pc}
+ 80051fc:	40007000 	.word	0x40007000
+ 8005200:	40023800 	.word	0x40023800
+ 8005204:	42470e40 	.word	0x42470e40
+ 8005208:	424711e0 	.word	0x424711e0
+
+0800520c <HAL_SDRAM_Init>:
+  *                the configuration information for SDRAM module.
+  * @param  Timing Pointer to SDRAM control timing structure
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
+{
+ 800520c:	b580      	push	{r7, lr}
+ 800520e:	b082      	sub	sp, #8
+ 8005210:	af00      	add	r7, sp, #0
+ 8005212:	6078      	str	r0, [r7, #4]
+ 8005214:	6039      	str	r1, [r7, #0]
+  /* Check the SDRAM handle parameter */
+  if (hsdram == NULL)
+ 8005216:	687b      	ldr	r3, [r7, #4]
+ 8005218:	2b00      	cmp	r3, #0
+ 800521a:	d101      	bne.n	8005220 <HAL_SDRAM_Init+0x14>
+  {
+    return HAL_ERROR;
+ 800521c:	2301      	movs	r3, #1
+ 800521e:	e025      	b.n	800526c <HAL_SDRAM_Init+0x60>
+  }
+
+  if (hsdram->State == HAL_SDRAM_STATE_RESET)
+ 8005220:	687b      	ldr	r3, [r7, #4]
+ 8005222:	f893 302c 	ldrb.w	r3, [r3, #44]	@ 0x2c
+ 8005226:	b2db      	uxtb	r3, r3
+ 8005228:	2b00      	cmp	r3, #0
+ 800522a:	d106      	bne.n	800523a <HAL_SDRAM_Init+0x2e>
+  {
+    /* Allocate lock resource and initialize it */
+    hsdram->Lock = HAL_UNLOCKED;
+ 800522c:	687b      	ldr	r3, [r7, #4]
+ 800522e:	2200      	movs	r2, #0
+ 8005230:	f883 202d 	strb.w	r2, [r3, #45]	@ 0x2d
+
+    /* Init the low level hardware */
+    hsdram->MspInitCallback(hsdram);
+#else
+    /* Initialize the low level hardware (MSP) */
+    HAL_SDRAM_MspInit(hsdram);
+ 8005234:	6878      	ldr	r0, [r7, #4]
+ 8005236:	f7fc f8cd 	bl	80013d4 <HAL_SDRAM_MspInit>
+#endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
+  }
+
+  /* Initialize the SDRAM controller state */
+  hsdram->State = HAL_SDRAM_STATE_BUSY;
+ 800523a:	687b      	ldr	r3, [r7, #4]
+ 800523c:	2202      	movs	r2, #2
+ 800523e:	f883 202c 	strb.w	r2, [r3, #44]	@ 0x2c
+
+  /* Initialize SDRAM control Interface */
+  (void)FMC_SDRAM_Init(hsdram->Instance, &(hsdram->Init));
+ 8005242:	687b      	ldr	r3, [r7, #4]
+ 8005244:	681a      	ldr	r2, [r3, #0]
+ 8005246:	687b      	ldr	r3, [r7, #4]
+ 8005248:	3304      	adds	r3, #4
+ 800524a:	4619      	mov	r1, r3
+ 800524c:	4610      	mov	r0, r2
+ 800524e:	f000 ffcd 	bl	80061ec <FMC_SDRAM_Init>
+
+  /* Initialize SDRAM timing Interface */
+  (void)FMC_SDRAM_Timing_Init(hsdram->Instance, Timing, hsdram->Init.SDBank);
+ 8005252:	687b      	ldr	r3, [r7, #4]
+ 8005254:	6818      	ldr	r0, [r3, #0]
+ 8005256:	687b      	ldr	r3, [r7, #4]
+ 8005258:	685b      	ldr	r3, [r3, #4]
+ 800525a:	461a      	mov	r2, r3
+ 800525c:	6839      	ldr	r1, [r7, #0]
+ 800525e:	f001 f822 	bl	80062a6 <FMC_SDRAM_Timing_Init>
+  /* Update the SDRAM controller state */
+  hsdram->State = HAL_SDRAM_STATE_READY;
+ 8005262:	687b      	ldr	r3, [r7, #4]
+ 8005264:	2201      	movs	r2, #1
+ 8005266:	f883 202c 	strb.w	r2, [r3, #44]	@ 0x2c
+
+  return HAL_OK;
+ 800526a:	2300      	movs	r3, #0
+}
+ 800526c:	4618      	mov	r0, r3
+ 800526e:	3708      	adds	r7, #8
+ 8005270:	46bd      	mov	sp, r7
+ 8005272:	bd80      	pop	{r7, pc}
+
+08005274 <HAL_SPI_Init>:
+  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
+  *               the configuration information for SPI module.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
+{
+ 8005274:	b580      	push	{r7, lr}
+ 8005276:	b082      	sub	sp, #8
+ 8005278:	af00      	add	r7, sp, #0
+ 800527a:	6078      	str	r0, [r7, #4]
+  /* Check the SPI handle allocation */
+  if (hspi == NULL)
+ 800527c:	687b      	ldr	r3, [r7, #4]
+ 800527e:	2b00      	cmp	r3, #0
+ 8005280:	d101      	bne.n	8005286 <HAL_SPI_Init+0x12>
+  {
+    return HAL_ERROR;
+ 8005282:	2301      	movs	r3, #1
+ 8005284:	e07b      	b.n	800537e <HAL_SPI_Init+0x10a>
+  assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
+  assert_param(IS_SPI_NSS(hspi->Init.NSS));
+  assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
+  assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
+  assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
+  if (hspi->Init.TIMode == SPI_TIMODE_DISABLE)
+ 8005286:	687b      	ldr	r3, [r7, #4]
+ 8005288:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 800528a:	2b00      	cmp	r3, #0
+ 800528c:	d108      	bne.n	80052a0 <HAL_SPI_Init+0x2c>
+  {
+    assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
+    assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
+
+    if (hspi->Init.Mode == SPI_MODE_MASTER)
+ 800528e:	687b      	ldr	r3, [r7, #4]
+ 8005290:	685b      	ldr	r3, [r3, #4]
+ 8005292:	f5b3 7f82 	cmp.w	r3, #260	@ 0x104
+ 8005296:	d009      	beq.n	80052ac <HAL_SPI_Init+0x38>
+      assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
+    }
+    else
+    {
+      /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */
+      hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
+ 8005298:	687b      	ldr	r3, [r7, #4]
+ 800529a:	2200      	movs	r2, #0
+ 800529c:	61da      	str	r2, [r3, #28]
+ 800529e:	e005      	b.n	80052ac <HAL_SPI_Init+0x38>
+  else
+  {
+    assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
+
+    /* Force polarity and phase to TI protocaol requirements */
+    hspi->Init.CLKPolarity = SPI_POLARITY_LOW;
+ 80052a0:	687b      	ldr	r3, [r7, #4]
+ 80052a2:	2200      	movs	r2, #0
+ 80052a4:	611a      	str	r2, [r3, #16]
+    hspi->Init.CLKPhase    = SPI_PHASE_1EDGE;
+ 80052a6:	687b      	ldr	r3, [r7, #4]
+ 80052a8:	2200      	movs	r2, #0
+ 80052aa:	615a      	str	r2, [r3, #20]
+  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
+  {
+    assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
+  }
+#else
+  hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+ 80052ac:	687b      	ldr	r3, [r7, #4]
+ 80052ae:	2200      	movs	r2, #0
+ 80052b0:	629a      	str	r2, [r3, #40]	@ 0x28
+#endif /* USE_SPI_CRC */
+
+  if (hspi->State == HAL_SPI_STATE_RESET)
+ 80052b2:	687b      	ldr	r3, [r7, #4]
+ 80052b4:	f893 3051 	ldrb.w	r3, [r3, #81]	@ 0x51
+ 80052b8:	b2db      	uxtb	r3, r3
+ 80052ba:	2b00      	cmp	r3, #0
+ 80052bc:	d106      	bne.n	80052cc <HAL_SPI_Init+0x58>
+  {
+    /* Allocate lock resource and initialize it */
+    hspi->Lock = HAL_UNLOCKED;
+ 80052be:	687b      	ldr	r3, [r7, #4]
+ 80052c0:	2200      	movs	r2, #0
+ 80052c2:	f883 2050 	strb.w	r2, [r3, #80]	@ 0x50
+
+    /* Init the low level hardware : GPIO, CLOCK, NVIC... */
+    hspi->MspInitCallback(hspi);
+#else
+    /* Init the low level hardware : GPIO, CLOCK, NVIC... */
+    HAL_SPI_MspInit(hspi);
+ 80052c6:	6878      	ldr	r0, [r7, #4]
+ 80052c8:	f7fb ff40 	bl	800114c <HAL_SPI_MspInit>
+#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
+  }
+
+  hspi->State = HAL_SPI_STATE_BUSY;
+ 80052cc:	687b      	ldr	r3, [r7, #4]
+ 80052ce:	2202      	movs	r2, #2
+ 80052d0:	f883 2051 	strb.w	r2, [r3, #81]	@ 0x51
+
+  /* Disable the selected SPI peripheral */
+  __HAL_SPI_DISABLE(hspi);
+ 80052d4:	687b      	ldr	r3, [r7, #4]
+ 80052d6:	681b      	ldr	r3, [r3, #0]
+ 80052d8:	681a      	ldr	r2, [r3, #0]
+ 80052da:	687b      	ldr	r3, [r7, #4]
+ 80052dc:	681b      	ldr	r3, [r3, #0]
+ 80052de:	f022 0240 	bic.w	r2, r2, #64	@ 0x40
+ 80052e2:	601a      	str	r2, [r3, #0]
+
+  /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
+  /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
+  Communication speed, First bit and CRC calculation state */
+  WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) |
+ 80052e4:	687b      	ldr	r3, [r7, #4]
+ 80052e6:	685b      	ldr	r3, [r3, #4]
+ 80052e8:	f403 7282 	and.w	r2, r3, #260	@ 0x104
+ 80052ec:	687b      	ldr	r3, [r7, #4]
+ 80052ee:	689b      	ldr	r3, [r3, #8]
+ 80052f0:	f403 4304 	and.w	r3, r3, #33792	@ 0x8400
+ 80052f4:	431a      	orrs	r2, r3
+ 80052f6:	687b      	ldr	r3, [r7, #4]
+ 80052f8:	68db      	ldr	r3, [r3, #12]
+ 80052fa:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
+ 80052fe:	431a      	orrs	r2, r3
+ 8005300:	687b      	ldr	r3, [r7, #4]
+ 8005302:	691b      	ldr	r3, [r3, #16]
+ 8005304:	f003 0302 	and.w	r3, r3, #2
+ 8005308:	431a      	orrs	r2, r3
+ 800530a:	687b      	ldr	r3, [r7, #4]
+ 800530c:	695b      	ldr	r3, [r3, #20]
+ 800530e:	f003 0301 	and.w	r3, r3, #1
+ 8005312:	431a      	orrs	r2, r3
+ 8005314:	687b      	ldr	r3, [r7, #4]
+ 8005316:	699b      	ldr	r3, [r3, #24]
+ 8005318:	f403 7300 	and.w	r3, r3, #512	@ 0x200
+ 800531c:	431a      	orrs	r2, r3
+ 800531e:	687b      	ldr	r3, [r7, #4]
+ 8005320:	69db      	ldr	r3, [r3, #28]
+ 8005322:	f003 0338 	and.w	r3, r3, #56	@ 0x38
+ 8005326:	431a      	orrs	r2, r3
+ 8005328:	687b      	ldr	r3, [r7, #4]
+ 800532a:	6a1b      	ldr	r3, [r3, #32]
+ 800532c:	f003 0380 	and.w	r3, r3, #128	@ 0x80
+ 8005330:	ea42 0103 	orr.w	r1, r2, r3
+ 8005334:	687b      	ldr	r3, [r7, #4]
+ 8005336:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
+ 8005338:	f403 5200 	and.w	r2, r3, #8192	@ 0x2000
+ 800533c:	687b      	ldr	r3, [r7, #4]
+ 800533e:	681b      	ldr	r3, [r3, #0]
+ 8005340:	430a      	orrs	r2, r1
+ 8005342:	601a      	str	r2, [r3, #0]
+                                  (hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) |
+                                  (hspi->Init.FirstBit  & SPI_CR1_LSBFIRST) |
+                                  (hspi->Init.CRCCalculation & SPI_CR1_CRCEN)));
+
+  /* Configure : NSS management, TI Mode */
+  WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | (hspi->Init.TIMode & SPI_CR2_FRF)));
+ 8005344:	687b      	ldr	r3, [r7, #4]
+ 8005346:	699b      	ldr	r3, [r3, #24]
+ 8005348:	0c1b      	lsrs	r3, r3, #16
+ 800534a:	f003 0104 	and.w	r1, r3, #4
+ 800534e:	687b      	ldr	r3, [r7, #4]
+ 8005350:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8005352:	f003 0210 	and.w	r2, r3, #16
+ 8005356:	687b      	ldr	r3, [r7, #4]
+ 8005358:	681b      	ldr	r3, [r3, #0]
+ 800535a:	430a      	orrs	r2, r1
+ 800535c:	605a      	str	r2, [r3, #4]
+  }
+#endif /* USE_SPI_CRC */
+
+#if defined(SPI_I2SCFGR_I2SMOD)
+  /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
+  CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
+ 800535e:	687b      	ldr	r3, [r7, #4]
+ 8005360:	681b      	ldr	r3, [r3, #0]
+ 8005362:	69da      	ldr	r2, [r3, #28]
+ 8005364:	687b      	ldr	r3, [r7, #4]
+ 8005366:	681b      	ldr	r3, [r3, #0]
+ 8005368:	f422 6200 	bic.w	r2, r2, #2048	@ 0x800
+ 800536c:	61da      	str	r2, [r3, #28]
+#endif /* SPI_I2SCFGR_I2SMOD */
+
+  hspi->ErrorCode = HAL_SPI_ERROR_NONE;
+ 800536e:	687b      	ldr	r3, [r7, #4]
+ 8005370:	2200      	movs	r2, #0
+ 8005372:	655a      	str	r2, [r3, #84]	@ 0x54
+  hspi->State     = HAL_SPI_STATE_READY;
+ 8005374:	687b      	ldr	r3, [r7, #4]
+ 8005376:	2201      	movs	r2, #1
+ 8005378:	f883 2051 	strb.w	r2, [r3, #81]	@ 0x51
+
+  return HAL_OK;
+ 800537c:	2300      	movs	r3, #0
+}
+ 800537e:	4618      	mov	r0, r3
+ 8005380:	3708      	adds	r7, #8
+ 8005382:	46bd      	mov	sp, r7
+ 8005384:	bd80      	pop	{r7, pc}
+
+08005386 <HAL_TIM_Base_Init>:
+  *         Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
+  * @param  htim TIM Base handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
+{
+ 8005386:	b580      	push	{r7, lr}
+ 8005388:	b082      	sub	sp, #8
+ 800538a:	af00      	add	r7, sp, #0
+ 800538c:	6078      	str	r0, [r7, #4]
+  /* Check the TIM handle allocation */
+  if (htim == NULL)
+ 800538e:	687b      	ldr	r3, [r7, #4]
+ 8005390:	2b00      	cmp	r3, #0
+ 8005392:	d101      	bne.n	8005398 <HAL_TIM_Base_Init+0x12>
+  {
+    return HAL_ERROR;
+ 8005394:	2301      	movs	r3, #1
+ 8005396:	e041      	b.n	800541c <HAL_TIM_Base_Init+0x96>
+  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
+  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
+  assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
+  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
+
+  if (htim->State == HAL_TIM_STATE_RESET)
+ 8005398:	687b      	ldr	r3, [r7, #4]
+ 800539a:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
+ 800539e:	b2db      	uxtb	r3, r3
+ 80053a0:	2b00      	cmp	r3, #0
+ 80053a2:	d106      	bne.n	80053b2 <HAL_TIM_Base_Init+0x2c>
+  {
+    /* Allocate lock resource and initialize it */
+    htim->Lock = HAL_UNLOCKED;
+ 80053a4:	687b      	ldr	r3, [r7, #4]
+ 80053a6:	2200      	movs	r2, #0
+ 80053a8:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+    }
+    /* Init the low level hardware : GPIO, CLOCK, NVIC */
+    htim->Base_MspInitCallback(htim);
+#else
+    /* Init the low level hardware : GPIO, CLOCK, NVIC */
+    HAL_TIM_Base_MspInit(htim);
+ 80053ac:	6878      	ldr	r0, [r7, #4]
+ 80053ae:	f7fb ff15 	bl	80011dc <HAL_TIM_Base_MspInit>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+  }
+
+  /* Set the TIM state */
+  htim->State = HAL_TIM_STATE_BUSY;
+ 80053b2:	687b      	ldr	r3, [r7, #4]
+ 80053b4:	2202      	movs	r2, #2
+ 80053b6:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+
+  /* Set the Time Base configuration */
+  TIM_Base_SetConfig(htim->Instance, &htim->Init);
+ 80053ba:	687b      	ldr	r3, [r7, #4]
+ 80053bc:	681a      	ldr	r2, [r3, #0]
+ 80053be:	687b      	ldr	r3, [r7, #4]
+ 80053c0:	3304      	adds	r3, #4
+ 80053c2:	4619      	mov	r1, r3
+ 80053c4:	4610      	mov	r0, r2
+ 80053c6:	f000 fa7d 	bl	80058c4 <TIM_Base_SetConfig>
+
+  /* Initialize the DMA burst operation state */
+  htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
+ 80053ca:	687b      	ldr	r3, [r7, #4]
+ 80053cc:	2201      	movs	r2, #1
+ 80053ce:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
+
+  /* Initialize the TIM channels state */
+  TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
+ 80053d2:	687b      	ldr	r3, [r7, #4]
+ 80053d4:	2201      	movs	r2, #1
+ 80053d6:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+ 80053da:	687b      	ldr	r3, [r7, #4]
+ 80053dc:	2201      	movs	r2, #1
+ 80053de:	f883 203f 	strb.w	r2, [r3, #63]	@ 0x3f
+ 80053e2:	687b      	ldr	r3, [r7, #4]
+ 80053e4:	2201      	movs	r2, #1
+ 80053e6:	f883 2040 	strb.w	r2, [r3, #64]	@ 0x40
+ 80053ea:	687b      	ldr	r3, [r7, #4]
+ 80053ec:	2201      	movs	r2, #1
+ 80053ee:	f883 2041 	strb.w	r2, [r3, #65]	@ 0x41
+  TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
+ 80053f2:	687b      	ldr	r3, [r7, #4]
+ 80053f4:	2201      	movs	r2, #1
+ 80053f6:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
+ 80053fa:	687b      	ldr	r3, [r7, #4]
+ 80053fc:	2201      	movs	r2, #1
+ 80053fe:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
+ 8005402:	687b      	ldr	r3, [r7, #4]
+ 8005404:	2201      	movs	r2, #1
+ 8005406:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
+ 800540a:	687b      	ldr	r3, [r7, #4]
+ 800540c:	2201      	movs	r2, #1
+ 800540e:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
+
+  /* Initialize the TIM state*/
+  htim->State = HAL_TIM_STATE_READY;
+ 8005412:	687b      	ldr	r3, [r7, #4]
+ 8005414:	2201      	movs	r2, #1
+ 8005416:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+
+  return HAL_OK;
+ 800541a:	2300      	movs	r3, #0
+}
+ 800541c:	4618      	mov	r0, r3
+ 800541e:	3708      	adds	r7, #8
+ 8005420:	46bd      	mov	sp, r7
+ 8005422:	bd80      	pop	{r7, pc}
+
+08005424 <HAL_TIM_Base_Start_IT>:
+  * @brief  Starts the TIM Base generation in interrupt mode.
+  * @param  htim TIM Base handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
+{
+ 8005424:	b480      	push	{r7}
+ 8005426:	b085      	sub	sp, #20
+ 8005428:	af00      	add	r7, sp, #0
+ 800542a:	6078      	str	r0, [r7, #4]
+
+  /* Check the parameters */
+  assert_param(IS_TIM_INSTANCE(htim->Instance));
+
+  /* Check the TIM state */
+  if (htim->State != HAL_TIM_STATE_READY)
+ 800542c:	687b      	ldr	r3, [r7, #4]
+ 800542e:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
+ 8005432:	b2db      	uxtb	r3, r3
+ 8005434:	2b01      	cmp	r3, #1
+ 8005436:	d001      	beq.n	800543c <HAL_TIM_Base_Start_IT+0x18>
+  {
+    return HAL_ERROR;
+ 8005438:	2301      	movs	r3, #1
+ 800543a:	e04e      	b.n	80054da <HAL_TIM_Base_Start_IT+0xb6>
+  }
+
+  /* Set the TIM state */
+  htim->State = HAL_TIM_STATE_BUSY;
+ 800543c:	687b      	ldr	r3, [r7, #4]
+ 800543e:	2202      	movs	r2, #2
+ 8005440:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+
+  /* Enable the TIM Update interrupt */
+  __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
+ 8005444:	687b      	ldr	r3, [r7, #4]
+ 8005446:	681b      	ldr	r3, [r3, #0]
+ 8005448:	68da      	ldr	r2, [r3, #12]
+ 800544a:	687b      	ldr	r3, [r7, #4]
+ 800544c:	681b      	ldr	r3, [r3, #0]
+ 800544e:	f042 0201 	orr.w	r2, r2, #1
+ 8005452:	60da      	str	r2, [r3, #12]
+
+  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
+  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ 8005454:	687b      	ldr	r3, [r7, #4]
+ 8005456:	681b      	ldr	r3, [r3, #0]
+ 8005458:	4a23      	ldr	r2, [pc, #140]	@ (80054e8 <HAL_TIM_Base_Start_IT+0xc4>)
+ 800545a:	4293      	cmp	r3, r2
+ 800545c:	d022      	beq.n	80054a4 <HAL_TIM_Base_Start_IT+0x80>
+ 800545e:	687b      	ldr	r3, [r7, #4]
+ 8005460:	681b      	ldr	r3, [r3, #0]
+ 8005462:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
+ 8005466:	d01d      	beq.n	80054a4 <HAL_TIM_Base_Start_IT+0x80>
+ 8005468:	687b      	ldr	r3, [r7, #4]
+ 800546a:	681b      	ldr	r3, [r3, #0]
+ 800546c:	4a1f      	ldr	r2, [pc, #124]	@ (80054ec <HAL_TIM_Base_Start_IT+0xc8>)
+ 800546e:	4293      	cmp	r3, r2
+ 8005470:	d018      	beq.n	80054a4 <HAL_TIM_Base_Start_IT+0x80>
+ 8005472:	687b      	ldr	r3, [r7, #4]
+ 8005474:	681b      	ldr	r3, [r3, #0]
+ 8005476:	4a1e      	ldr	r2, [pc, #120]	@ (80054f0 <HAL_TIM_Base_Start_IT+0xcc>)
+ 8005478:	4293      	cmp	r3, r2
+ 800547a:	d013      	beq.n	80054a4 <HAL_TIM_Base_Start_IT+0x80>
+ 800547c:	687b      	ldr	r3, [r7, #4]
+ 800547e:	681b      	ldr	r3, [r3, #0]
+ 8005480:	4a1c      	ldr	r2, [pc, #112]	@ (80054f4 <HAL_TIM_Base_Start_IT+0xd0>)
+ 8005482:	4293      	cmp	r3, r2
+ 8005484:	d00e      	beq.n	80054a4 <HAL_TIM_Base_Start_IT+0x80>
+ 8005486:	687b      	ldr	r3, [r7, #4]
+ 8005488:	681b      	ldr	r3, [r3, #0]
+ 800548a:	4a1b      	ldr	r2, [pc, #108]	@ (80054f8 <HAL_TIM_Base_Start_IT+0xd4>)
+ 800548c:	4293      	cmp	r3, r2
+ 800548e:	d009      	beq.n	80054a4 <HAL_TIM_Base_Start_IT+0x80>
+ 8005490:	687b      	ldr	r3, [r7, #4]
+ 8005492:	681b      	ldr	r3, [r3, #0]
+ 8005494:	4a19      	ldr	r2, [pc, #100]	@ (80054fc <HAL_TIM_Base_Start_IT+0xd8>)
+ 8005496:	4293      	cmp	r3, r2
+ 8005498:	d004      	beq.n	80054a4 <HAL_TIM_Base_Start_IT+0x80>
+ 800549a:	687b      	ldr	r3, [r7, #4]
+ 800549c:	681b      	ldr	r3, [r3, #0]
+ 800549e:	4a18      	ldr	r2, [pc, #96]	@ (8005500 <HAL_TIM_Base_Start_IT+0xdc>)
+ 80054a0:	4293      	cmp	r3, r2
+ 80054a2:	d111      	bne.n	80054c8 <HAL_TIM_Base_Start_IT+0xa4>
+  {
+    tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
+ 80054a4:	687b      	ldr	r3, [r7, #4]
+ 80054a6:	681b      	ldr	r3, [r3, #0]
+ 80054a8:	689b      	ldr	r3, [r3, #8]
+ 80054aa:	f003 0307 	and.w	r3, r3, #7
+ 80054ae:	60fb      	str	r3, [r7, #12]
+    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ 80054b0:	68fb      	ldr	r3, [r7, #12]
+ 80054b2:	2b06      	cmp	r3, #6
+ 80054b4:	d010      	beq.n	80054d8 <HAL_TIM_Base_Start_IT+0xb4>
+    {
+      __HAL_TIM_ENABLE(htim);
+ 80054b6:	687b      	ldr	r3, [r7, #4]
+ 80054b8:	681b      	ldr	r3, [r3, #0]
+ 80054ba:	681a      	ldr	r2, [r3, #0]
+ 80054bc:	687b      	ldr	r3, [r7, #4]
+ 80054be:	681b      	ldr	r3, [r3, #0]
+ 80054c0:	f042 0201 	orr.w	r2, r2, #1
+ 80054c4:	601a      	str	r2, [r3, #0]
+    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ 80054c6:	e007      	b.n	80054d8 <HAL_TIM_Base_Start_IT+0xb4>
+    }
+  }
+  else
+  {
+    __HAL_TIM_ENABLE(htim);
+ 80054c8:	687b      	ldr	r3, [r7, #4]
+ 80054ca:	681b      	ldr	r3, [r3, #0]
+ 80054cc:	681a      	ldr	r2, [r3, #0]
+ 80054ce:	687b      	ldr	r3, [r7, #4]
+ 80054d0:	681b      	ldr	r3, [r3, #0]
+ 80054d2:	f042 0201 	orr.w	r2, r2, #1
+ 80054d6:	601a      	str	r2, [r3, #0]
+  }
+
+  /* Return function status */
+  return HAL_OK;
+ 80054d8:	2300      	movs	r3, #0
+}
+ 80054da:	4618      	mov	r0, r3
+ 80054dc:	3714      	adds	r7, #20
+ 80054de:	46bd      	mov	sp, r7
+ 80054e0:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80054e4:	4770      	bx	lr
+ 80054e6:	bf00      	nop
+ 80054e8:	40010000 	.word	0x40010000
+ 80054ec:	40000400 	.word	0x40000400
+ 80054f0:	40000800 	.word	0x40000800
+ 80054f4:	40000c00 	.word	0x40000c00
+ 80054f8:	40010400 	.word	0x40010400
+ 80054fc:	40014000 	.word	0x40014000
+ 8005500:	40001800 	.word	0x40001800
+
+08005504 <HAL_TIM_IRQHandler>:
+  * @brief  This function handles TIM interrupts requests.
+  * @param  htim TIM  handle
+  * @retval None
+  */
+void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
+{
+ 8005504:	b580      	push	{r7, lr}
+ 8005506:	b084      	sub	sp, #16
+ 8005508:	af00      	add	r7, sp, #0
+ 800550a:	6078      	str	r0, [r7, #4]
+  uint32_t itsource = htim->Instance->DIER;
+ 800550c:	687b      	ldr	r3, [r7, #4]
+ 800550e:	681b      	ldr	r3, [r3, #0]
+ 8005510:	68db      	ldr	r3, [r3, #12]
+ 8005512:	60fb      	str	r3, [r7, #12]
+  uint32_t itflag   = htim->Instance->SR;
+ 8005514:	687b      	ldr	r3, [r7, #4]
+ 8005516:	681b      	ldr	r3, [r3, #0]
+ 8005518:	691b      	ldr	r3, [r3, #16]
+ 800551a:	60bb      	str	r3, [r7, #8]
+
+  /* Capture compare 1 event */
+  if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1))
+ 800551c:	68bb      	ldr	r3, [r7, #8]
+ 800551e:	f003 0302 	and.w	r3, r3, #2
+ 8005522:	2b00      	cmp	r3, #0
+ 8005524:	d020      	beq.n	8005568 <HAL_TIM_IRQHandler+0x64>
+  {
+    if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1))
+ 8005526:	68fb      	ldr	r3, [r7, #12]
+ 8005528:	f003 0302 	and.w	r3, r3, #2
+ 800552c:	2b00      	cmp	r3, #0
+ 800552e:	d01b      	beq.n	8005568 <HAL_TIM_IRQHandler+0x64>
+    {
+      {
+        __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1);
+ 8005530:	687b      	ldr	r3, [r7, #4]
+ 8005532:	681b      	ldr	r3, [r3, #0]
+ 8005534:	f06f 0202 	mvn.w	r2, #2
+ 8005538:	611a      	str	r2, [r3, #16]
+        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
+ 800553a:	687b      	ldr	r3, [r7, #4]
+ 800553c:	2201      	movs	r2, #1
+ 800553e:	771a      	strb	r2, [r3, #28]
+
+        /* Input capture event */
+        if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
+ 8005540:	687b      	ldr	r3, [r7, #4]
+ 8005542:	681b      	ldr	r3, [r3, #0]
+ 8005544:	699b      	ldr	r3, [r3, #24]
+ 8005546:	f003 0303 	and.w	r3, r3, #3
+ 800554a:	2b00      	cmp	r3, #0
+ 800554c:	d003      	beq.n	8005556 <HAL_TIM_IRQHandler+0x52>
+        {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+          htim->IC_CaptureCallback(htim);
+#else
+          HAL_TIM_IC_CaptureCallback(htim);
+ 800554e:	6878      	ldr	r0, [r7, #4]
+ 8005550:	f000 f999 	bl	8005886 <HAL_TIM_IC_CaptureCallback>
+ 8005554:	e005      	b.n	8005562 <HAL_TIM_IRQHandler+0x5e>
+        {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+          htim->OC_DelayElapsedCallback(htim);
+          htim->PWM_PulseFinishedCallback(htim);
+#else
+          HAL_TIM_OC_DelayElapsedCallback(htim);
+ 8005556:	6878      	ldr	r0, [r7, #4]
+ 8005558:	f000 f98b 	bl	8005872 <HAL_TIM_OC_DelayElapsedCallback>
+          HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 800555c:	6878      	ldr	r0, [r7, #4]
+ 800555e:	f000 f99c 	bl	800589a <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+        }
+        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 8005562:	687b      	ldr	r3, [r7, #4]
+ 8005564:	2200      	movs	r2, #0
+ 8005566:	771a      	strb	r2, [r3, #28]
+      }
+    }
+  }
+  /* Capture compare 2 event */
+  if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2))
+ 8005568:	68bb      	ldr	r3, [r7, #8]
+ 800556a:	f003 0304 	and.w	r3, r3, #4
+ 800556e:	2b00      	cmp	r3, #0
+ 8005570:	d020      	beq.n	80055b4 <HAL_TIM_IRQHandler+0xb0>
+  {
+    if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2))
+ 8005572:	68fb      	ldr	r3, [r7, #12]
+ 8005574:	f003 0304 	and.w	r3, r3, #4
+ 8005578:	2b00      	cmp	r3, #0
+ 800557a:	d01b      	beq.n	80055b4 <HAL_TIM_IRQHandler+0xb0>
+    {
+      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2);
+ 800557c:	687b      	ldr	r3, [r7, #4]
+ 800557e:	681b      	ldr	r3, [r3, #0]
+ 8005580:	f06f 0204 	mvn.w	r2, #4
+ 8005584:	611a      	str	r2, [r3, #16]
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
+ 8005586:	687b      	ldr	r3, [r7, #4]
+ 8005588:	2202      	movs	r2, #2
+ 800558a:	771a      	strb	r2, [r3, #28]
+      /* Input capture event */
+      if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
+ 800558c:	687b      	ldr	r3, [r7, #4]
+ 800558e:	681b      	ldr	r3, [r3, #0]
+ 8005590:	699b      	ldr	r3, [r3, #24]
+ 8005592:	f403 7340 	and.w	r3, r3, #768	@ 0x300
+ 8005596:	2b00      	cmp	r3, #0
+ 8005598:	d003      	beq.n	80055a2 <HAL_TIM_IRQHandler+0x9e>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->IC_CaptureCallback(htim);
+#else
+        HAL_TIM_IC_CaptureCallback(htim);
+ 800559a:	6878      	ldr	r0, [r7, #4]
+ 800559c:	f000 f973 	bl	8005886 <HAL_TIM_IC_CaptureCallback>
+ 80055a0:	e005      	b.n	80055ae <HAL_TIM_IRQHandler+0xaa>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->OC_DelayElapsedCallback(htim);
+        htim->PWM_PulseFinishedCallback(htim);
+#else
+        HAL_TIM_OC_DelayElapsedCallback(htim);
+ 80055a2:	6878      	ldr	r0, [r7, #4]
+ 80055a4:	f000 f965 	bl	8005872 <HAL_TIM_OC_DelayElapsedCallback>
+        HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 80055a8:	6878      	ldr	r0, [r7, #4]
+ 80055aa:	f000 f976 	bl	800589a <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+      }
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 80055ae:	687b      	ldr	r3, [r7, #4]
+ 80055b0:	2200      	movs	r2, #0
+ 80055b2:	771a      	strb	r2, [r3, #28]
+    }
+  }
+  /* Capture compare 3 event */
+  if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3))
+ 80055b4:	68bb      	ldr	r3, [r7, #8]
+ 80055b6:	f003 0308 	and.w	r3, r3, #8
+ 80055ba:	2b00      	cmp	r3, #0
+ 80055bc:	d020      	beq.n	8005600 <HAL_TIM_IRQHandler+0xfc>
+  {
+    if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3))
+ 80055be:	68fb      	ldr	r3, [r7, #12]
+ 80055c0:	f003 0308 	and.w	r3, r3, #8
+ 80055c4:	2b00      	cmp	r3, #0
+ 80055c6:	d01b      	beq.n	8005600 <HAL_TIM_IRQHandler+0xfc>
+    {
+      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3);
+ 80055c8:	687b      	ldr	r3, [r7, #4]
+ 80055ca:	681b      	ldr	r3, [r3, #0]
+ 80055cc:	f06f 0208 	mvn.w	r2, #8
+ 80055d0:	611a      	str	r2, [r3, #16]
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
+ 80055d2:	687b      	ldr	r3, [r7, #4]
+ 80055d4:	2204      	movs	r2, #4
+ 80055d6:	771a      	strb	r2, [r3, #28]
+      /* Input capture event */
+      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
+ 80055d8:	687b      	ldr	r3, [r7, #4]
+ 80055da:	681b      	ldr	r3, [r3, #0]
+ 80055dc:	69db      	ldr	r3, [r3, #28]
+ 80055de:	f003 0303 	and.w	r3, r3, #3
+ 80055e2:	2b00      	cmp	r3, #0
+ 80055e4:	d003      	beq.n	80055ee <HAL_TIM_IRQHandler+0xea>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->IC_CaptureCallback(htim);
+#else
+        HAL_TIM_IC_CaptureCallback(htim);
+ 80055e6:	6878      	ldr	r0, [r7, #4]
+ 80055e8:	f000 f94d 	bl	8005886 <HAL_TIM_IC_CaptureCallback>
+ 80055ec:	e005      	b.n	80055fa <HAL_TIM_IRQHandler+0xf6>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->OC_DelayElapsedCallback(htim);
+        htim->PWM_PulseFinishedCallback(htim);
+#else
+        HAL_TIM_OC_DelayElapsedCallback(htim);
+ 80055ee:	6878      	ldr	r0, [r7, #4]
+ 80055f0:	f000 f93f 	bl	8005872 <HAL_TIM_OC_DelayElapsedCallback>
+        HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 80055f4:	6878      	ldr	r0, [r7, #4]
+ 80055f6:	f000 f950 	bl	800589a <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+      }
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 80055fa:	687b      	ldr	r3, [r7, #4]
+ 80055fc:	2200      	movs	r2, #0
+ 80055fe:	771a      	strb	r2, [r3, #28]
+    }
+  }
+  /* Capture compare 4 event */
+  if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4))
+ 8005600:	68bb      	ldr	r3, [r7, #8]
+ 8005602:	f003 0310 	and.w	r3, r3, #16
+ 8005606:	2b00      	cmp	r3, #0
+ 8005608:	d020      	beq.n	800564c <HAL_TIM_IRQHandler+0x148>
+  {
+    if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4))
+ 800560a:	68fb      	ldr	r3, [r7, #12]
+ 800560c:	f003 0310 	and.w	r3, r3, #16
+ 8005610:	2b00      	cmp	r3, #0
+ 8005612:	d01b      	beq.n	800564c <HAL_TIM_IRQHandler+0x148>
+    {
+      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4);
+ 8005614:	687b      	ldr	r3, [r7, #4]
+ 8005616:	681b      	ldr	r3, [r3, #0]
+ 8005618:	f06f 0210 	mvn.w	r2, #16
+ 800561c:	611a      	str	r2, [r3, #16]
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
+ 800561e:	687b      	ldr	r3, [r7, #4]
+ 8005620:	2208      	movs	r2, #8
+ 8005622:	771a      	strb	r2, [r3, #28]
+      /* Input capture event */
+      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
+ 8005624:	687b      	ldr	r3, [r7, #4]
+ 8005626:	681b      	ldr	r3, [r3, #0]
+ 8005628:	69db      	ldr	r3, [r3, #28]
+ 800562a:	f403 7340 	and.w	r3, r3, #768	@ 0x300
+ 800562e:	2b00      	cmp	r3, #0
+ 8005630:	d003      	beq.n	800563a <HAL_TIM_IRQHandler+0x136>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->IC_CaptureCallback(htim);
+#else
+        HAL_TIM_IC_CaptureCallback(htim);
+ 8005632:	6878      	ldr	r0, [r7, #4]
+ 8005634:	f000 f927 	bl	8005886 <HAL_TIM_IC_CaptureCallback>
+ 8005638:	e005      	b.n	8005646 <HAL_TIM_IRQHandler+0x142>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->OC_DelayElapsedCallback(htim);
+        htim->PWM_PulseFinishedCallback(htim);
+#else
+        HAL_TIM_OC_DelayElapsedCallback(htim);
+ 800563a:	6878      	ldr	r0, [r7, #4]
+ 800563c:	f000 f919 	bl	8005872 <HAL_TIM_OC_DelayElapsedCallback>
+        HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 8005640:	6878      	ldr	r0, [r7, #4]
+ 8005642:	f000 f92a 	bl	800589a <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+      }
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 8005646:	687b      	ldr	r3, [r7, #4]
+ 8005648:	2200      	movs	r2, #0
+ 800564a:	771a      	strb	r2, [r3, #28]
+    }
+  }
+  /* TIM Update event */
+  if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE))
+ 800564c:	68bb      	ldr	r3, [r7, #8]
+ 800564e:	f003 0301 	and.w	r3, r3, #1
+ 8005652:	2b00      	cmp	r3, #0
+ 8005654:	d00c      	beq.n	8005670 <HAL_TIM_IRQHandler+0x16c>
+  {
+    if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE))
+ 8005656:	68fb      	ldr	r3, [r7, #12]
+ 8005658:	f003 0301 	and.w	r3, r3, #1
+ 800565c:	2b00      	cmp	r3, #0
+ 800565e:	d007      	beq.n	8005670 <HAL_TIM_IRQHandler+0x16c>
+    {
+      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
+ 8005660:	687b      	ldr	r3, [r7, #4]
+ 8005662:	681b      	ldr	r3, [r3, #0]
+ 8005664:	f06f 0201 	mvn.w	r2, #1
+ 8005668:	611a      	str	r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+      htim->PeriodElapsedCallback(htim);
+#else
+      HAL_TIM_PeriodElapsedCallback(htim);
+ 800566a:	6878      	ldr	r0, [r7, #4]
+ 800566c:	f7fb fb46 	bl	8000cfc <HAL_TIM_PeriodElapsedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+    }
+  }
+  /* TIM Break input event */
+  if ((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK))
+ 8005670:	68bb      	ldr	r3, [r7, #8]
+ 8005672:	f003 0380 	and.w	r3, r3, #128	@ 0x80
+ 8005676:	2b00      	cmp	r3, #0
+ 8005678:	d00c      	beq.n	8005694 <HAL_TIM_IRQHandler+0x190>
+  {
+    if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
+ 800567a:	68fb      	ldr	r3, [r7, #12]
+ 800567c:	f003 0380 	and.w	r3, r3, #128	@ 0x80
+ 8005680:	2b00      	cmp	r3, #0
+ 8005682:	d007      	beq.n	8005694 <HAL_TIM_IRQHandler+0x190>
+    {
+      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK);
+ 8005684:	687b      	ldr	r3, [r7, #4]
+ 8005686:	681b      	ldr	r3, [r3, #0]
+ 8005688:	f06f 0280 	mvn.w	r2, #128	@ 0x80
+ 800568c:	611a      	str	r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+      htim->BreakCallback(htim);
+#else
+      HAL_TIMEx_BreakCallback(htim);
+ 800568e:	6878      	ldr	r0, [r7, #4]
+ 8005690:	f000 fade 	bl	8005c50 <HAL_TIMEx_BreakCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+    }
+  }
+  /* TIM Trigger detection event */
+  if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER))
+ 8005694:	68bb      	ldr	r3, [r7, #8]
+ 8005696:	f003 0340 	and.w	r3, r3, #64	@ 0x40
+ 800569a:	2b00      	cmp	r3, #0
+ 800569c:	d00c      	beq.n	80056b8 <HAL_TIM_IRQHandler+0x1b4>
+  {
+    if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER))
+ 800569e:	68fb      	ldr	r3, [r7, #12]
+ 80056a0:	f003 0340 	and.w	r3, r3, #64	@ 0x40
+ 80056a4:	2b00      	cmp	r3, #0
+ 80056a6:	d007      	beq.n	80056b8 <HAL_TIM_IRQHandler+0x1b4>
+    {
+      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER);
+ 80056a8:	687b      	ldr	r3, [r7, #4]
+ 80056aa:	681b      	ldr	r3, [r3, #0]
+ 80056ac:	f06f 0240 	mvn.w	r2, #64	@ 0x40
+ 80056b0:	611a      	str	r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+      htim->TriggerCallback(htim);
+#else
+      HAL_TIM_TriggerCallback(htim);
+ 80056b2:	6878      	ldr	r0, [r7, #4]
+ 80056b4:	f000 f8fb 	bl	80058ae <HAL_TIM_TriggerCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+    }
+  }
+  /* TIM commutation event */
+  if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM))
+ 80056b8:	68bb      	ldr	r3, [r7, #8]
+ 80056ba:	f003 0320 	and.w	r3, r3, #32
+ 80056be:	2b00      	cmp	r3, #0
+ 80056c0:	d00c      	beq.n	80056dc <HAL_TIM_IRQHandler+0x1d8>
+  {
+    if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM))
+ 80056c2:	68fb      	ldr	r3, [r7, #12]
+ 80056c4:	f003 0320 	and.w	r3, r3, #32
+ 80056c8:	2b00      	cmp	r3, #0
+ 80056ca:	d007      	beq.n	80056dc <HAL_TIM_IRQHandler+0x1d8>
+    {
+      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM);
+ 80056cc:	687b      	ldr	r3, [r7, #4]
+ 80056ce:	681b      	ldr	r3, [r3, #0]
+ 80056d0:	f06f 0220 	mvn.w	r2, #32
+ 80056d4:	611a      	str	r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+      htim->CommutationCallback(htim);
+#else
+      HAL_TIMEx_CommutCallback(htim);
+ 80056d6:	6878      	ldr	r0, [r7, #4]
+ 80056d8:	f000 fab0 	bl	8005c3c <HAL_TIMEx_CommutCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+    }
+  }
+}
+ 80056dc:	bf00      	nop
+ 80056de:	3710      	adds	r7, #16
+ 80056e0:	46bd      	mov	sp, r7
+ 80056e2:	bd80      	pop	{r7, pc}
+
+080056e4 <HAL_TIM_ConfigClockSource>:
+  * @param  sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
+  *         contains the clock source information for the TIM peripheral.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
+{
+ 80056e4:	b580      	push	{r7, lr}
+ 80056e6:	b084      	sub	sp, #16
+ 80056e8:	af00      	add	r7, sp, #0
+ 80056ea:	6078      	str	r0, [r7, #4]
+ 80056ec:	6039      	str	r1, [r7, #0]
+  HAL_StatusTypeDef status = HAL_OK;
+ 80056ee:	2300      	movs	r3, #0
+ 80056f0:	73fb      	strb	r3, [r7, #15]
+  uint32_t tmpsmcr;
+
+  /* Process Locked */
+  __HAL_LOCK(htim);
+ 80056f2:	687b      	ldr	r3, [r7, #4]
+ 80056f4:	f893 303c 	ldrb.w	r3, [r3, #60]	@ 0x3c
+ 80056f8:	2b01      	cmp	r3, #1
+ 80056fa:	d101      	bne.n	8005700 <HAL_TIM_ConfigClockSource+0x1c>
+ 80056fc:	2302      	movs	r3, #2
+ 80056fe:	e0b4      	b.n	800586a <HAL_TIM_ConfigClockSource+0x186>
+ 8005700:	687b      	ldr	r3, [r7, #4]
+ 8005702:	2201      	movs	r2, #1
+ 8005704:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+
+  htim->State = HAL_TIM_STATE_BUSY;
+ 8005708:	687b      	ldr	r3, [r7, #4]
+ 800570a:	2202      	movs	r2, #2
+ 800570c:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+
+  /* Check the parameters */
+  assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
+
+  /* Reset the SMS, TS, ECE, ETPS and ETRF bits */
+  tmpsmcr = htim->Instance->SMCR;
+ 8005710:	687b      	ldr	r3, [r7, #4]
+ 8005712:	681b      	ldr	r3, [r3, #0]
+ 8005714:	689b      	ldr	r3, [r3, #8]
+ 8005716:	60bb      	str	r3, [r7, #8]
+  tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
+ 8005718:	68bb      	ldr	r3, [r7, #8]
+ 800571a:	f023 0377 	bic.w	r3, r3, #119	@ 0x77
+ 800571e:	60bb      	str	r3, [r7, #8]
+  tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
+ 8005720:	68bb      	ldr	r3, [r7, #8]
+ 8005722:	f423 437f 	bic.w	r3, r3, #65280	@ 0xff00
+ 8005726:	60bb      	str	r3, [r7, #8]
+  htim->Instance->SMCR = tmpsmcr;
+ 8005728:	687b      	ldr	r3, [r7, #4]
+ 800572a:	681b      	ldr	r3, [r3, #0]
+ 800572c:	68ba      	ldr	r2, [r7, #8]
+ 800572e:	609a      	str	r2, [r3, #8]
+
+  switch (sClockSourceConfig->ClockSource)
+ 8005730:	683b      	ldr	r3, [r7, #0]
+ 8005732:	681b      	ldr	r3, [r3, #0]
+ 8005734:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
+ 8005738:	d03e      	beq.n	80057b8 <HAL_TIM_ConfigClockSource+0xd4>
+ 800573a:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
+ 800573e:	f200 8087 	bhi.w	8005850 <HAL_TIM_ConfigClockSource+0x16c>
+ 8005742:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
+ 8005746:	f000 8086 	beq.w	8005856 <HAL_TIM_ConfigClockSource+0x172>
+ 800574a:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
+ 800574e:	d87f      	bhi.n	8005850 <HAL_TIM_ConfigClockSource+0x16c>
+ 8005750:	2b70      	cmp	r3, #112	@ 0x70
+ 8005752:	d01a      	beq.n	800578a <HAL_TIM_ConfigClockSource+0xa6>
+ 8005754:	2b70      	cmp	r3, #112	@ 0x70
+ 8005756:	d87b      	bhi.n	8005850 <HAL_TIM_ConfigClockSource+0x16c>
+ 8005758:	2b60      	cmp	r3, #96	@ 0x60
+ 800575a:	d050      	beq.n	80057fe <HAL_TIM_ConfigClockSource+0x11a>
+ 800575c:	2b60      	cmp	r3, #96	@ 0x60
+ 800575e:	d877      	bhi.n	8005850 <HAL_TIM_ConfigClockSource+0x16c>
+ 8005760:	2b50      	cmp	r3, #80	@ 0x50
+ 8005762:	d03c      	beq.n	80057de <HAL_TIM_ConfigClockSource+0xfa>
+ 8005764:	2b50      	cmp	r3, #80	@ 0x50
+ 8005766:	d873      	bhi.n	8005850 <HAL_TIM_ConfigClockSource+0x16c>
+ 8005768:	2b40      	cmp	r3, #64	@ 0x40
+ 800576a:	d058      	beq.n	800581e <HAL_TIM_ConfigClockSource+0x13a>
+ 800576c:	2b40      	cmp	r3, #64	@ 0x40
+ 800576e:	d86f      	bhi.n	8005850 <HAL_TIM_ConfigClockSource+0x16c>
+ 8005770:	2b30      	cmp	r3, #48	@ 0x30
+ 8005772:	d064      	beq.n	800583e <HAL_TIM_ConfigClockSource+0x15a>
+ 8005774:	2b30      	cmp	r3, #48	@ 0x30
+ 8005776:	d86b      	bhi.n	8005850 <HAL_TIM_ConfigClockSource+0x16c>
+ 8005778:	2b20      	cmp	r3, #32
+ 800577a:	d060      	beq.n	800583e <HAL_TIM_ConfigClockSource+0x15a>
+ 800577c:	2b20      	cmp	r3, #32
+ 800577e:	d867      	bhi.n	8005850 <HAL_TIM_ConfigClockSource+0x16c>
+ 8005780:	2b00      	cmp	r3, #0
+ 8005782:	d05c      	beq.n	800583e <HAL_TIM_ConfigClockSource+0x15a>
+ 8005784:	2b10      	cmp	r3, #16
+ 8005786:	d05a      	beq.n	800583e <HAL_TIM_ConfigClockSource+0x15a>
+ 8005788:	e062      	b.n	8005850 <HAL_TIM_ConfigClockSource+0x16c>
+      assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
+      assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
+      assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
+
+      /* Configure the ETR Clock source */
+      TIM_ETR_SetConfig(htim->Instance,
+ 800578a:	687b      	ldr	r3, [r7, #4]
+ 800578c:	6818      	ldr	r0, [r3, #0]
+                        sClockSourceConfig->ClockPrescaler,
+ 800578e:	683b      	ldr	r3, [r7, #0]
+ 8005790:	6899      	ldr	r1, [r3, #8]
+                        sClockSourceConfig->ClockPolarity,
+ 8005792:	683b      	ldr	r3, [r7, #0]
+ 8005794:	685a      	ldr	r2, [r3, #4]
+                        sClockSourceConfig->ClockFilter);
+ 8005796:	683b      	ldr	r3, [r7, #0]
+ 8005798:	68db      	ldr	r3, [r3, #12]
+      TIM_ETR_SetConfig(htim->Instance,
+ 800579a:	f000 f9b3 	bl	8005b04 <TIM_ETR_SetConfig>
+
+      /* Select the External clock mode1 and the ETRF trigger */
+      tmpsmcr = htim->Instance->SMCR;
+ 800579e:	687b      	ldr	r3, [r7, #4]
+ 80057a0:	681b      	ldr	r3, [r3, #0]
+ 80057a2:	689b      	ldr	r3, [r3, #8]
+ 80057a4:	60bb      	str	r3, [r7, #8]
+      tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
+ 80057a6:	68bb      	ldr	r3, [r7, #8]
+ 80057a8:	f043 0377 	orr.w	r3, r3, #119	@ 0x77
+ 80057ac:	60bb      	str	r3, [r7, #8]
+      /* Write to TIMx SMCR */
+      htim->Instance->SMCR = tmpsmcr;
+ 80057ae:	687b      	ldr	r3, [r7, #4]
+ 80057b0:	681b      	ldr	r3, [r3, #0]
+ 80057b2:	68ba      	ldr	r2, [r7, #8]
+ 80057b4:	609a      	str	r2, [r3, #8]
+      break;
+ 80057b6:	e04f      	b.n	8005858 <HAL_TIM_ConfigClockSource+0x174>
+      assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
+      assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
+      assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
+
+      /* Configure the ETR Clock source */
+      TIM_ETR_SetConfig(htim->Instance,
+ 80057b8:	687b      	ldr	r3, [r7, #4]
+ 80057ba:	6818      	ldr	r0, [r3, #0]
+                        sClockSourceConfig->ClockPrescaler,
+ 80057bc:	683b      	ldr	r3, [r7, #0]
+ 80057be:	6899      	ldr	r1, [r3, #8]
+                        sClockSourceConfig->ClockPolarity,
+ 80057c0:	683b      	ldr	r3, [r7, #0]
+ 80057c2:	685a      	ldr	r2, [r3, #4]
+                        sClockSourceConfig->ClockFilter);
+ 80057c4:	683b      	ldr	r3, [r7, #0]
+ 80057c6:	68db      	ldr	r3, [r3, #12]
+      TIM_ETR_SetConfig(htim->Instance,
+ 80057c8:	f000 f99c 	bl	8005b04 <TIM_ETR_SetConfig>
+      /* Enable the External clock mode2 */
+      htim->Instance->SMCR |= TIM_SMCR_ECE;
+ 80057cc:	687b      	ldr	r3, [r7, #4]
+ 80057ce:	681b      	ldr	r3, [r3, #0]
+ 80057d0:	689a      	ldr	r2, [r3, #8]
+ 80057d2:	687b      	ldr	r3, [r7, #4]
+ 80057d4:	681b      	ldr	r3, [r3, #0]
+ 80057d6:	f442 4280 	orr.w	r2, r2, #16384	@ 0x4000
+ 80057da:	609a      	str	r2, [r3, #8]
+      break;
+ 80057dc:	e03c      	b.n	8005858 <HAL_TIM_ConfigClockSource+0x174>
+
+      /* Check TI1 input conditioning related parameters */
+      assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
+      assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
+
+      TIM_TI1_ConfigInputStage(htim->Instance,
+ 80057de:	687b      	ldr	r3, [r7, #4]
+ 80057e0:	6818      	ldr	r0, [r3, #0]
+                               sClockSourceConfig->ClockPolarity,
+ 80057e2:	683b      	ldr	r3, [r7, #0]
+ 80057e4:	6859      	ldr	r1, [r3, #4]
+                               sClockSourceConfig->ClockFilter);
+ 80057e6:	683b      	ldr	r3, [r7, #0]
+ 80057e8:	68db      	ldr	r3, [r3, #12]
+      TIM_TI1_ConfigInputStage(htim->Instance,
+ 80057ea:	461a      	mov	r2, r3
+ 80057ec:	f000 f910 	bl	8005a10 <TIM_TI1_ConfigInputStage>
+      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
+ 80057f0:	687b      	ldr	r3, [r7, #4]
+ 80057f2:	681b      	ldr	r3, [r3, #0]
+ 80057f4:	2150      	movs	r1, #80	@ 0x50
+ 80057f6:	4618      	mov	r0, r3
+ 80057f8:	f000 f969 	bl	8005ace <TIM_ITRx_SetConfig>
+      break;
+ 80057fc:	e02c      	b.n	8005858 <HAL_TIM_ConfigClockSource+0x174>
+
+      /* Check TI2 input conditioning related parameters */
+      assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
+      assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
+
+      TIM_TI2_ConfigInputStage(htim->Instance,
+ 80057fe:	687b      	ldr	r3, [r7, #4]
+ 8005800:	6818      	ldr	r0, [r3, #0]
+                               sClockSourceConfig->ClockPolarity,
+ 8005802:	683b      	ldr	r3, [r7, #0]
+ 8005804:	6859      	ldr	r1, [r3, #4]
+                               sClockSourceConfig->ClockFilter);
+ 8005806:	683b      	ldr	r3, [r7, #0]
+ 8005808:	68db      	ldr	r3, [r3, #12]
+      TIM_TI2_ConfigInputStage(htim->Instance,
+ 800580a:	461a      	mov	r2, r3
+ 800580c:	f000 f92f 	bl	8005a6e <TIM_TI2_ConfigInputStage>
+      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
+ 8005810:	687b      	ldr	r3, [r7, #4]
+ 8005812:	681b      	ldr	r3, [r3, #0]
+ 8005814:	2160      	movs	r1, #96	@ 0x60
+ 8005816:	4618      	mov	r0, r3
+ 8005818:	f000 f959 	bl	8005ace <TIM_ITRx_SetConfig>
+      break;
+ 800581c:	e01c      	b.n	8005858 <HAL_TIM_ConfigClockSource+0x174>
+
+      /* Check TI1 input conditioning related parameters */
+      assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
+      assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
+
+      TIM_TI1_ConfigInputStage(htim->Instance,
+ 800581e:	687b      	ldr	r3, [r7, #4]
+ 8005820:	6818      	ldr	r0, [r3, #0]
+                               sClockSourceConfig->ClockPolarity,
+ 8005822:	683b      	ldr	r3, [r7, #0]
+ 8005824:	6859      	ldr	r1, [r3, #4]
+                               sClockSourceConfig->ClockFilter);
+ 8005826:	683b      	ldr	r3, [r7, #0]
+ 8005828:	68db      	ldr	r3, [r3, #12]
+      TIM_TI1_ConfigInputStage(htim->Instance,
+ 800582a:	461a      	mov	r2, r3
+ 800582c:	f000 f8f0 	bl	8005a10 <TIM_TI1_ConfigInputStage>
+      TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
+ 8005830:	687b      	ldr	r3, [r7, #4]
+ 8005832:	681b      	ldr	r3, [r3, #0]
+ 8005834:	2140      	movs	r1, #64	@ 0x40
+ 8005836:	4618      	mov	r0, r3
+ 8005838:	f000 f949 	bl	8005ace <TIM_ITRx_SetConfig>
+      break;
+ 800583c:	e00c      	b.n	8005858 <HAL_TIM_ConfigClockSource+0x174>
+    case TIM_CLOCKSOURCE_ITR3:
+    {
+      /* Check whether or not the timer instance supports internal trigger input */
+      assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
+
+      TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
+ 800583e:	687b      	ldr	r3, [r7, #4]
+ 8005840:	681a      	ldr	r2, [r3, #0]
+ 8005842:	683b      	ldr	r3, [r7, #0]
+ 8005844:	681b      	ldr	r3, [r3, #0]
+ 8005846:	4619      	mov	r1, r3
+ 8005848:	4610      	mov	r0, r2
+ 800584a:	f000 f940 	bl	8005ace <TIM_ITRx_SetConfig>
+      break;
+ 800584e:	e003      	b.n	8005858 <HAL_TIM_ConfigClockSource+0x174>
+    }
+
+    default:
+      status = HAL_ERROR;
+ 8005850:	2301      	movs	r3, #1
+ 8005852:	73fb      	strb	r3, [r7, #15]
+      break;
+ 8005854:	e000      	b.n	8005858 <HAL_TIM_ConfigClockSource+0x174>
+      break;
+ 8005856:	bf00      	nop
+  }
+  htim->State = HAL_TIM_STATE_READY;
+ 8005858:	687b      	ldr	r3, [r7, #4]
+ 800585a:	2201      	movs	r2, #1
+ 800585c:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+
+  __HAL_UNLOCK(htim);
+ 8005860:	687b      	ldr	r3, [r7, #4]
+ 8005862:	2200      	movs	r2, #0
+ 8005864:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+
+  return status;
+ 8005868:	7bfb      	ldrb	r3, [r7, #15]
+}
+ 800586a:	4618      	mov	r0, r3
+ 800586c:	3710      	adds	r7, #16
+ 800586e:	46bd      	mov	sp, r7
+ 8005870:	bd80      	pop	{r7, pc}
+
+08005872 <HAL_TIM_OC_DelayElapsedCallback>:
+  * @brief  Output Compare callback in non-blocking mode
+  * @param  htim TIM OC handle
+  * @retval None
+  */
+__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ 8005872:	b480      	push	{r7}
+ 8005874:	b083      	sub	sp, #12
+ 8005876:	af00      	add	r7, sp, #0
+ 8005878:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
+   */
+}
+ 800587a:	bf00      	nop
+ 800587c:	370c      	adds	r7, #12
+ 800587e:	46bd      	mov	sp, r7
+ 8005880:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005884:	4770      	bx	lr
+
+08005886 <HAL_TIM_IC_CaptureCallback>:
+  * @brief  Input Capture callback in non-blocking mode
+  * @param  htim TIM IC handle
+  * @retval None
+  */
+__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
+{
+ 8005886:	b480      	push	{r7}
+ 8005888:	b083      	sub	sp, #12
+ 800588a:	af00      	add	r7, sp, #0
+ 800588c:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIM_IC_CaptureCallback could be implemented in the user file
+   */
+}
+ 800588e:	bf00      	nop
+ 8005890:	370c      	adds	r7, #12
+ 8005892:	46bd      	mov	sp, r7
+ 8005894:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005898:	4770      	bx	lr
+
+0800589a <HAL_TIM_PWM_PulseFinishedCallback>:
+  * @brief  PWM Pulse finished callback in non-blocking mode
+  * @param  htim TIM handle
+  * @retval None
+  */
+__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
+{
+ 800589a:	b480      	push	{r7}
+ 800589c:	b083      	sub	sp, #12
+ 800589e:	af00      	add	r7, sp, #0
+ 80058a0:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
+   */
+}
+ 80058a2:	bf00      	nop
+ 80058a4:	370c      	adds	r7, #12
+ 80058a6:	46bd      	mov	sp, r7
+ 80058a8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80058ac:	4770      	bx	lr
+
+080058ae <HAL_TIM_TriggerCallback>:
+  * @brief  Hall Trigger detection callback in non-blocking mode
+  * @param  htim TIM handle
+  * @retval None
+  */
+__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
+{
+ 80058ae:	b480      	push	{r7}
+ 80058b0:	b083      	sub	sp, #12
+ 80058b2:	af00      	add	r7, sp, #0
+ 80058b4:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIM_TriggerCallback could be implemented in the user file
+   */
+}
+ 80058b6:	bf00      	nop
+ 80058b8:	370c      	adds	r7, #12
+ 80058ba:	46bd      	mov	sp, r7
+ 80058bc:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80058c0:	4770      	bx	lr
+	...
+
+080058c4 <TIM_Base_SetConfig>:
+  * @param  TIMx TIM peripheral
+  * @param  Structure TIM Base configuration structure
+  * @retval None
+  */
+void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
+{
+ 80058c4:	b480      	push	{r7}
+ 80058c6:	b085      	sub	sp, #20
+ 80058c8:	af00      	add	r7, sp, #0
+ 80058ca:	6078      	str	r0, [r7, #4]
+ 80058cc:	6039      	str	r1, [r7, #0]
+  uint32_t tmpcr1;
+  tmpcr1 = TIMx->CR1;
+ 80058ce:	687b      	ldr	r3, [r7, #4]
+ 80058d0:	681b      	ldr	r3, [r3, #0]
+ 80058d2:	60fb      	str	r3, [r7, #12]
+
+  /* Set TIM Time Base Unit parameters ---------------------------------------*/
+  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
+ 80058d4:	687b      	ldr	r3, [r7, #4]
+ 80058d6:	4a43      	ldr	r2, [pc, #268]	@ (80059e4 <TIM_Base_SetConfig+0x120>)
+ 80058d8:	4293      	cmp	r3, r2
+ 80058da:	d013      	beq.n	8005904 <TIM_Base_SetConfig+0x40>
+ 80058dc:	687b      	ldr	r3, [r7, #4]
+ 80058de:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
+ 80058e2:	d00f      	beq.n	8005904 <TIM_Base_SetConfig+0x40>
+ 80058e4:	687b      	ldr	r3, [r7, #4]
+ 80058e6:	4a40      	ldr	r2, [pc, #256]	@ (80059e8 <TIM_Base_SetConfig+0x124>)
+ 80058e8:	4293      	cmp	r3, r2
+ 80058ea:	d00b      	beq.n	8005904 <TIM_Base_SetConfig+0x40>
+ 80058ec:	687b      	ldr	r3, [r7, #4]
+ 80058ee:	4a3f      	ldr	r2, [pc, #252]	@ (80059ec <TIM_Base_SetConfig+0x128>)
+ 80058f0:	4293      	cmp	r3, r2
+ 80058f2:	d007      	beq.n	8005904 <TIM_Base_SetConfig+0x40>
+ 80058f4:	687b      	ldr	r3, [r7, #4]
+ 80058f6:	4a3e      	ldr	r2, [pc, #248]	@ (80059f0 <TIM_Base_SetConfig+0x12c>)
+ 80058f8:	4293      	cmp	r3, r2
+ 80058fa:	d003      	beq.n	8005904 <TIM_Base_SetConfig+0x40>
+ 80058fc:	687b      	ldr	r3, [r7, #4]
+ 80058fe:	4a3d      	ldr	r2, [pc, #244]	@ (80059f4 <TIM_Base_SetConfig+0x130>)
+ 8005900:	4293      	cmp	r3, r2
+ 8005902:	d108      	bne.n	8005916 <TIM_Base_SetConfig+0x52>
+  {
+    /* Select the Counter Mode */
+    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
+ 8005904:	68fb      	ldr	r3, [r7, #12]
+ 8005906:	f023 0370 	bic.w	r3, r3, #112	@ 0x70
+ 800590a:	60fb      	str	r3, [r7, #12]
+    tmpcr1 |= Structure->CounterMode;
+ 800590c:	683b      	ldr	r3, [r7, #0]
+ 800590e:	685b      	ldr	r3, [r3, #4]
+ 8005910:	68fa      	ldr	r2, [r7, #12]
+ 8005912:	4313      	orrs	r3, r2
+ 8005914:	60fb      	str	r3, [r7, #12]
+  }
+
+  if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
+ 8005916:	687b      	ldr	r3, [r7, #4]
+ 8005918:	4a32      	ldr	r2, [pc, #200]	@ (80059e4 <TIM_Base_SetConfig+0x120>)
+ 800591a:	4293      	cmp	r3, r2
+ 800591c:	d02b      	beq.n	8005976 <TIM_Base_SetConfig+0xb2>
+ 800591e:	687b      	ldr	r3, [r7, #4]
+ 8005920:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
+ 8005924:	d027      	beq.n	8005976 <TIM_Base_SetConfig+0xb2>
+ 8005926:	687b      	ldr	r3, [r7, #4]
+ 8005928:	4a2f      	ldr	r2, [pc, #188]	@ (80059e8 <TIM_Base_SetConfig+0x124>)
+ 800592a:	4293      	cmp	r3, r2
+ 800592c:	d023      	beq.n	8005976 <TIM_Base_SetConfig+0xb2>
+ 800592e:	687b      	ldr	r3, [r7, #4]
+ 8005930:	4a2e      	ldr	r2, [pc, #184]	@ (80059ec <TIM_Base_SetConfig+0x128>)
+ 8005932:	4293      	cmp	r3, r2
+ 8005934:	d01f      	beq.n	8005976 <TIM_Base_SetConfig+0xb2>
+ 8005936:	687b      	ldr	r3, [r7, #4]
+ 8005938:	4a2d      	ldr	r2, [pc, #180]	@ (80059f0 <TIM_Base_SetConfig+0x12c>)
+ 800593a:	4293      	cmp	r3, r2
+ 800593c:	d01b      	beq.n	8005976 <TIM_Base_SetConfig+0xb2>
+ 800593e:	687b      	ldr	r3, [r7, #4]
+ 8005940:	4a2c      	ldr	r2, [pc, #176]	@ (80059f4 <TIM_Base_SetConfig+0x130>)
+ 8005942:	4293      	cmp	r3, r2
+ 8005944:	d017      	beq.n	8005976 <TIM_Base_SetConfig+0xb2>
+ 8005946:	687b      	ldr	r3, [r7, #4]
+ 8005948:	4a2b      	ldr	r2, [pc, #172]	@ (80059f8 <TIM_Base_SetConfig+0x134>)
+ 800594a:	4293      	cmp	r3, r2
+ 800594c:	d013      	beq.n	8005976 <TIM_Base_SetConfig+0xb2>
+ 800594e:	687b      	ldr	r3, [r7, #4]
+ 8005950:	4a2a      	ldr	r2, [pc, #168]	@ (80059fc <TIM_Base_SetConfig+0x138>)
+ 8005952:	4293      	cmp	r3, r2
+ 8005954:	d00f      	beq.n	8005976 <TIM_Base_SetConfig+0xb2>
+ 8005956:	687b      	ldr	r3, [r7, #4]
+ 8005958:	4a29      	ldr	r2, [pc, #164]	@ (8005a00 <TIM_Base_SetConfig+0x13c>)
+ 800595a:	4293      	cmp	r3, r2
+ 800595c:	d00b      	beq.n	8005976 <TIM_Base_SetConfig+0xb2>
+ 800595e:	687b      	ldr	r3, [r7, #4]
+ 8005960:	4a28      	ldr	r2, [pc, #160]	@ (8005a04 <TIM_Base_SetConfig+0x140>)
+ 8005962:	4293      	cmp	r3, r2
+ 8005964:	d007      	beq.n	8005976 <TIM_Base_SetConfig+0xb2>
+ 8005966:	687b      	ldr	r3, [r7, #4]
+ 8005968:	4a27      	ldr	r2, [pc, #156]	@ (8005a08 <TIM_Base_SetConfig+0x144>)
+ 800596a:	4293      	cmp	r3, r2
+ 800596c:	d003      	beq.n	8005976 <TIM_Base_SetConfig+0xb2>
+ 800596e:	687b      	ldr	r3, [r7, #4]
+ 8005970:	4a26      	ldr	r2, [pc, #152]	@ (8005a0c <TIM_Base_SetConfig+0x148>)
+ 8005972:	4293      	cmp	r3, r2
+ 8005974:	d108      	bne.n	8005988 <TIM_Base_SetConfig+0xc4>
+  {
+    /* Set the clock division */
+    tmpcr1 &= ~TIM_CR1_CKD;
+ 8005976:	68fb      	ldr	r3, [r7, #12]
+ 8005978:	f423 7340 	bic.w	r3, r3, #768	@ 0x300
+ 800597c:	60fb      	str	r3, [r7, #12]
+    tmpcr1 |= (uint32_t)Structure->ClockDivision;
+ 800597e:	683b      	ldr	r3, [r7, #0]
+ 8005980:	68db      	ldr	r3, [r3, #12]
+ 8005982:	68fa      	ldr	r2, [r7, #12]
+ 8005984:	4313      	orrs	r3, r2
+ 8005986:	60fb      	str	r3, [r7, #12]
+  }
+
+  /* Set the auto-reload preload */
+  MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
+ 8005988:	68fb      	ldr	r3, [r7, #12]
+ 800598a:	f023 0280 	bic.w	r2, r3, #128	@ 0x80
+ 800598e:	683b      	ldr	r3, [r7, #0]
+ 8005990:	695b      	ldr	r3, [r3, #20]
+ 8005992:	4313      	orrs	r3, r2
+ 8005994:	60fb      	str	r3, [r7, #12]
+
+  /* Set the Autoreload value */
+  TIMx->ARR = (uint32_t)Structure->Period ;
+ 8005996:	683b      	ldr	r3, [r7, #0]
+ 8005998:	689a      	ldr	r2, [r3, #8]
+ 800599a:	687b      	ldr	r3, [r7, #4]
+ 800599c:	62da      	str	r2, [r3, #44]	@ 0x2c
+
+  /* Set the Prescaler value */
+  TIMx->PSC = Structure->Prescaler;
+ 800599e:	683b      	ldr	r3, [r7, #0]
+ 80059a0:	681a      	ldr	r2, [r3, #0]
+ 80059a2:	687b      	ldr	r3, [r7, #4]
+ 80059a4:	629a      	str	r2, [r3, #40]	@ 0x28
+
+  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
+ 80059a6:	687b      	ldr	r3, [r7, #4]
+ 80059a8:	4a0e      	ldr	r2, [pc, #56]	@ (80059e4 <TIM_Base_SetConfig+0x120>)
+ 80059aa:	4293      	cmp	r3, r2
+ 80059ac:	d003      	beq.n	80059b6 <TIM_Base_SetConfig+0xf2>
+ 80059ae:	687b      	ldr	r3, [r7, #4]
+ 80059b0:	4a10      	ldr	r2, [pc, #64]	@ (80059f4 <TIM_Base_SetConfig+0x130>)
+ 80059b2:	4293      	cmp	r3, r2
+ 80059b4:	d103      	bne.n	80059be <TIM_Base_SetConfig+0xfa>
+  {
+    /* Set the Repetition Counter value */
+    TIMx->RCR = Structure->RepetitionCounter;
+ 80059b6:	683b      	ldr	r3, [r7, #0]
+ 80059b8:	691a      	ldr	r2, [r3, #16]
+ 80059ba:	687b      	ldr	r3, [r7, #4]
+ 80059bc:	631a      	str	r2, [r3, #48]	@ 0x30
+  }
+
+  /* Disable Update Event (UEV) with Update Generation (UG)
+     by changing Update Request Source (URS) to avoid Update flag (UIF) */
+  SET_BIT(TIMx->CR1, TIM_CR1_URS);
+ 80059be:	687b      	ldr	r3, [r7, #4]
+ 80059c0:	681b      	ldr	r3, [r3, #0]
+ 80059c2:	f043 0204 	orr.w	r2, r3, #4
+ 80059c6:	687b      	ldr	r3, [r7, #4]
+ 80059c8:	601a      	str	r2, [r3, #0]
+
+  /* Generate an update event to reload the Prescaler
+     and the repetition counter (only for advanced timer) value immediately */
+  TIMx->EGR = TIM_EGR_UG;
+ 80059ca:	687b      	ldr	r3, [r7, #4]
+ 80059cc:	2201      	movs	r2, #1
+ 80059ce:	615a      	str	r2, [r3, #20]
+
+  TIMx->CR1 = tmpcr1;
+ 80059d0:	687b      	ldr	r3, [r7, #4]
+ 80059d2:	68fa      	ldr	r2, [r7, #12]
+ 80059d4:	601a      	str	r2, [r3, #0]
+}
+ 80059d6:	bf00      	nop
+ 80059d8:	3714      	adds	r7, #20
+ 80059da:	46bd      	mov	sp, r7
+ 80059dc:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80059e0:	4770      	bx	lr
+ 80059e2:	bf00      	nop
+ 80059e4:	40010000 	.word	0x40010000
+ 80059e8:	40000400 	.word	0x40000400
+ 80059ec:	40000800 	.word	0x40000800
+ 80059f0:	40000c00 	.word	0x40000c00
+ 80059f4:	40010400 	.word	0x40010400
+ 80059f8:	40014000 	.word	0x40014000
+ 80059fc:	40014400 	.word	0x40014400
+ 8005a00:	40014800 	.word	0x40014800
+ 8005a04:	40001800 	.word	0x40001800
+ 8005a08:	40001c00 	.word	0x40001c00
+ 8005a0c:	40002000 	.word	0x40002000
+
+08005a10 <TIM_TI1_ConfigInputStage>:
+  * @param  TIM_ICFilter Specifies the Input Capture Filter.
+  *          This parameter must be a value between 0x00 and 0x0F.
+  * @retval None
+  */
+static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
+{
+ 8005a10:	b480      	push	{r7}
+ 8005a12:	b087      	sub	sp, #28
+ 8005a14:	af00      	add	r7, sp, #0
+ 8005a16:	60f8      	str	r0, [r7, #12]
+ 8005a18:	60b9      	str	r1, [r7, #8]
+ 8005a1a:	607a      	str	r2, [r7, #4]
+  uint32_t tmpccmr1;
+  uint32_t tmpccer;
+
+  /* Disable the Channel 1: Reset the CC1E Bit */
+  tmpccer = TIMx->CCER;
+ 8005a1c:	68fb      	ldr	r3, [r7, #12]
+ 8005a1e:	6a1b      	ldr	r3, [r3, #32]
+ 8005a20:	617b      	str	r3, [r7, #20]
+  TIMx->CCER &= ~TIM_CCER_CC1E;
+ 8005a22:	68fb      	ldr	r3, [r7, #12]
+ 8005a24:	6a1b      	ldr	r3, [r3, #32]
+ 8005a26:	f023 0201 	bic.w	r2, r3, #1
+ 8005a2a:	68fb      	ldr	r3, [r7, #12]
+ 8005a2c:	621a      	str	r2, [r3, #32]
+  tmpccmr1 = TIMx->CCMR1;
+ 8005a2e:	68fb      	ldr	r3, [r7, #12]
+ 8005a30:	699b      	ldr	r3, [r3, #24]
+ 8005a32:	613b      	str	r3, [r7, #16]
+
+  /* Set the filter */
+  tmpccmr1 &= ~TIM_CCMR1_IC1F;
+ 8005a34:	693b      	ldr	r3, [r7, #16]
+ 8005a36:	f023 03f0 	bic.w	r3, r3, #240	@ 0xf0
+ 8005a3a:	613b      	str	r3, [r7, #16]
+  tmpccmr1 |= (TIM_ICFilter << 4U);
+ 8005a3c:	687b      	ldr	r3, [r7, #4]
+ 8005a3e:	011b      	lsls	r3, r3, #4
+ 8005a40:	693a      	ldr	r2, [r7, #16]
+ 8005a42:	4313      	orrs	r3, r2
+ 8005a44:	613b      	str	r3, [r7, #16]
+
+  /* Select the Polarity and set the CC1E Bit */
+  tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
+ 8005a46:	697b      	ldr	r3, [r7, #20]
+ 8005a48:	f023 030a 	bic.w	r3, r3, #10
+ 8005a4c:	617b      	str	r3, [r7, #20]
+  tmpccer |= TIM_ICPolarity;
+ 8005a4e:	697a      	ldr	r2, [r7, #20]
+ 8005a50:	68bb      	ldr	r3, [r7, #8]
+ 8005a52:	4313      	orrs	r3, r2
+ 8005a54:	617b      	str	r3, [r7, #20]
+
+  /* Write to TIMx CCMR1 and CCER registers */
+  TIMx->CCMR1 = tmpccmr1;
+ 8005a56:	68fb      	ldr	r3, [r7, #12]
+ 8005a58:	693a      	ldr	r2, [r7, #16]
+ 8005a5a:	619a      	str	r2, [r3, #24]
+  TIMx->CCER = tmpccer;
+ 8005a5c:	68fb      	ldr	r3, [r7, #12]
+ 8005a5e:	697a      	ldr	r2, [r7, #20]
+ 8005a60:	621a      	str	r2, [r3, #32]
+}
+ 8005a62:	bf00      	nop
+ 8005a64:	371c      	adds	r7, #28
+ 8005a66:	46bd      	mov	sp, r7
+ 8005a68:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005a6c:	4770      	bx	lr
+
+08005a6e <TIM_TI2_ConfigInputStage>:
+  * @param  TIM_ICFilter Specifies the Input Capture Filter.
+  *          This parameter must be a value between 0x00 and 0x0F.
+  * @retval None
+  */
+static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
+{
+ 8005a6e:	b480      	push	{r7}
+ 8005a70:	b087      	sub	sp, #28
+ 8005a72:	af00      	add	r7, sp, #0
+ 8005a74:	60f8      	str	r0, [r7, #12]
+ 8005a76:	60b9      	str	r1, [r7, #8]
+ 8005a78:	607a      	str	r2, [r7, #4]
+  uint32_t tmpccmr1;
+  uint32_t tmpccer;
+
+  /* Disable the Channel 2: Reset the CC2E Bit */
+  tmpccer = TIMx->CCER;
+ 8005a7a:	68fb      	ldr	r3, [r7, #12]
+ 8005a7c:	6a1b      	ldr	r3, [r3, #32]
+ 8005a7e:	617b      	str	r3, [r7, #20]
+  TIMx->CCER &= ~TIM_CCER_CC2E;
+ 8005a80:	68fb      	ldr	r3, [r7, #12]
+ 8005a82:	6a1b      	ldr	r3, [r3, #32]
+ 8005a84:	f023 0210 	bic.w	r2, r3, #16
+ 8005a88:	68fb      	ldr	r3, [r7, #12]
+ 8005a8a:	621a      	str	r2, [r3, #32]
+  tmpccmr1 = TIMx->CCMR1;
+ 8005a8c:	68fb      	ldr	r3, [r7, #12]
+ 8005a8e:	699b      	ldr	r3, [r3, #24]
+ 8005a90:	613b      	str	r3, [r7, #16]
+
+  /* Set the filter */
+  tmpccmr1 &= ~TIM_CCMR1_IC2F;
+ 8005a92:	693b      	ldr	r3, [r7, #16]
+ 8005a94:	f423 4370 	bic.w	r3, r3, #61440	@ 0xf000
+ 8005a98:	613b      	str	r3, [r7, #16]
+  tmpccmr1 |= (TIM_ICFilter << 12U);
+ 8005a9a:	687b      	ldr	r3, [r7, #4]
+ 8005a9c:	031b      	lsls	r3, r3, #12
+ 8005a9e:	693a      	ldr	r2, [r7, #16]
+ 8005aa0:	4313      	orrs	r3, r2
+ 8005aa2:	613b      	str	r3, [r7, #16]
+
+  /* Select the Polarity and set the CC2E Bit */
+  tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
+ 8005aa4:	697b      	ldr	r3, [r7, #20]
+ 8005aa6:	f023 03a0 	bic.w	r3, r3, #160	@ 0xa0
+ 8005aaa:	617b      	str	r3, [r7, #20]
+  tmpccer |= (TIM_ICPolarity << 4U);
+ 8005aac:	68bb      	ldr	r3, [r7, #8]
+ 8005aae:	011b      	lsls	r3, r3, #4
+ 8005ab0:	697a      	ldr	r2, [r7, #20]
+ 8005ab2:	4313      	orrs	r3, r2
+ 8005ab4:	617b      	str	r3, [r7, #20]
+
+  /* Write to TIMx CCMR1 and CCER registers */
+  TIMx->CCMR1 = tmpccmr1 ;
+ 8005ab6:	68fb      	ldr	r3, [r7, #12]
+ 8005ab8:	693a      	ldr	r2, [r7, #16]
+ 8005aba:	619a      	str	r2, [r3, #24]
+  TIMx->CCER = tmpccer;
+ 8005abc:	68fb      	ldr	r3, [r7, #12]
+ 8005abe:	697a      	ldr	r2, [r7, #20]
+ 8005ac0:	621a      	str	r2, [r3, #32]
+}
+ 8005ac2:	bf00      	nop
+ 8005ac4:	371c      	adds	r7, #28
+ 8005ac6:	46bd      	mov	sp, r7
+ 8005ac8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005acc:	4770      	bx	lr
+
+08005ace <TIM_ITRx_SetConfig>:
+  *            @arg TIM_TS_TI2FP2: Filtered Timer Input 2
+  *            @arg TIM_TS_ETRF: External Trigger input
+  * @retval None
+  */
+static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
+{
+ 8005ace:	b480      	push	{r7}
+ 8005ad0:	b085      	sub	sp, #20
+ 8005ad2:	af00      	add	r7, sp, #0
+ 8005ad4:	6078      	str	r0, [r7, #4]
+ 8005ad6:	6039      	str	r1, [r7, #0]
+  uint32_t tmpsmcr;
+
+  /* Get the TIMx SMCR register value */
+  tmpsmcr = TIMx->SMCR;
+ 8005ad8:	687b      	ldr	r3, [r7, #4]
+ 8005ada:	689b      	ldr	r3, [r3, #8]
+ 8005adc:	60fb      	str	r3, [r7, #12]
+  /* Reset the TS Bits */
+  tmpsmcr &= ~TIM_SMCR_TS;
+ 8005ade:	68fb      	ldr	r3, [r7, #12]
+ 8005ae0:	f023 0370 	bic.w	r3, r3, #112	@ 0x70
+ 8005ae4:	60fb      	str	r3, [r7, #12]
+  /* Set the Input Trigger source and the slave mode*/
+  tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
+ 8005ae6:	683a      	ldr	r2, [r7, #0]
+ 8005ae8:	68fb      	ldr	r3, [r7, #12]
+ 8005aea:	4313      	orrs	r3, r2
+ 8005aec:	f043 0307 	orr.w	r3, r3, #7
+ 8005af0:	60fb      	str	r3, [r7, #12]
+  /* Write to TIMx SMCR */
+  TIMx->SMCR = tmpsmcr;
+ 8005af2:	687b      	ldr	r3, [r7, #4]
+ 8005af4:	68fa      	ldr	r2, [r7, #12]
+ 8005af6:	609a      	str	r2, [r3, #8]
+}
+ 8005af8:	bf00      	nop
+ 8005afa:	3714      	adds	r7, #20
+ 8005afc:	46bd      	mov	sp, r7
+ 8005afe:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005b02:	4770      	bx	lr
+
+08005b04 <TIM_ETR_SetConfig>:
+  *          This parameter must be a value between 0x00 and 0x0F
+  * @retval None
+  */
+void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
+                       uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
+{
+ 8005b04:	b480      	push	{r7}
+ 8005b06:	b087      	sub	sp, #28
+ 8005b08:	af00      	add	r7, sp, #0
+ 8005b0a:	60f8      	str	r0, [r7, #12]
+ 8005b0c:	60b9      	str	r1, [r7, #8]
+ 8005b0e:	607a      	str	r2, [r7, #4]
+ 8005b10:	603b      	str	r3, [r7, #0]
+  uint32_t tmpsmcr;
+
+  tmpsmcr = TIMx->SMCR;
+ 8005b12:	68fb      	ldr	r3, [r7, #12]
+ 8005b14:	689b      	ldr	r3, [r3, #8]
+ 8005b16:	617b      	str	r3, [r7, #20]
+
+  /* Reset the ETR Bits */
+  tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
+ 8005b18:	697b      	ldr	r3, [r7, #20]
+ 8005b1a:	f423 437f 	bic.w	r3, r3, #65280	@ 0xff00
+ 8005b1e:	617b      	str	r3, [r7, #20]
+
+  /* Set the Prescaler, the Filter value and the Polarity */
+  tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
+ 8005b20:	683b      	ldr	r3, [r7, #0]
+ 8005b22:	021a      	lsls	r2, r3, #8
+ 8005b24:	687b      	ldr	r3, [r7, #4]
+ 8005b26:	431a      	orrs	r2, r3
+ 8005b28:	68bb      	ldr	r3, [r7, #8]
+ 8005b2a:	4313      	orrs	r3, r2
+ 8005b2c:	697a      	ldr	r2, [r7, #20]
+ 8005b2e:	4313      	orrs	r3, r2
+ 8005b30:	617b      	str	r3, [r7, #20]
+
+  /* Write to TIMx SMCR */
+  TIMx->SMCR = tmpsmcr;
+ 8005b32:	68fb      	ldr	r3, [r7, #12]
+ 8005b34:	697a      	ldr	r2, [r7, #20]
+ 8005b36:	609a      	str	r2, [r3, #8]
+}
+ 8005b38:	bf00      	nop
+ 8005b3a:	371c      	adds	r7, #28
+ 8005b3c:	46bd      	mov	sp, r7
+ 8005b3e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005b42:	4770      	bx	lr
+
+08005b44 <HAL_TIMEx_MasterConfigSynchronization>:
+  *         mode.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
+                                                        const TIM_MasterConfigTypeDef *sMasterConfig)
+{
+ 8005b44:	b480      	push	{r7}
+ 8005b46:	b085      	sub	sp, #20
+ 8005b48:	af00      	add	r7, sp, #0
+ 8005b4a:	6078      	str	r0, [r7, #4]
+ 8005b4c:	6039      	str	r1, [r7, #0]
+  assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
+  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
+  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
+
+  /* Check input state */
+  __HAL_LOCK(htim);
+ 8005b4e:	687b      	ldr	r3, [r7, #4]
+ 8005b50:	f893 303c 	ldrb.w	r3, [r3, #60]	@ 0x3c
+ 8005b54:	2b01      	cmp	r3, #1
+ 8005b56:	d101      	bne.n	8005b5c <HAL_TIMEx_MasterConfigSynchronization+0x18>
+ 8005b58:	2302      	movs	r3, #2
+ 8005b5a:	e05a      	b.n	8005c12 <HAL_TIMEx_MasterConfigSynchronization+0xce>
+ 8005b5c:	687b      	ldr	r3, [r7, #4]
+ 8005b5e:	2201      	movs	r2, #1
+ 8005b60:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+
+  /* Change the handler state */
+  htim->State = HAL_TIM_STATE_BUSY;
+ 8005b64:	687b      	ldr	r3, [r7, #4]
+ 8005b66:	2202      	movs	r2, #2
+ 8005b68:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+
+  /* Get the TIMx CR2 register value */
+  tmpcr2 = htim->Instance->CR2;
+ 8005b6c:	687b      	ldr	r3, [r7, #4]
+ 8005b6e:	681b      	ldr	r3, [r3, #0]
+ 8005b70:	685b      	ldr	r3, [r3, #4]
+ 8005b72:	60fb      	str	r3, [r7, #12]
+
+  /* Get the TIMx SMCR register value */
+  tmpsmcr = htim->Instance->SMCR;
+ 8005b74:	687b      	ldr	r3, [r7, #4]
+ 8005b76:	681b      	ldr	r3, [r3, #0]
+ 8005b78:	689b      	ldr	r3, [r3, #8]
+ 8005b7a:	60bb      	str	r3, [r7, #8]
+
+  /* Reset the MMS Bits */
+  tmpcr2 &= ~TIM_CR2_MMS;
+ 8005b7c:	68fb      	ldr	r3, [r7, #12]
+ 8005b7e:	f023 0370 	bic.w	r3, r3, #112	@ 0x70
+ 8005b82:	60fb      	str	r3, [r7, #12]
+  /* Select the TRGO source */
+  tmpcr2 |=  sMasterConfig->MasterOutputTrigger;
+ 8005b84:	683b      	ldr	r3, [r7, #0]
+ 8005b86:	681b      	ldr	r3, [r3, #0]
+ 8005b88:	68fa      	ldr	r2, [r7, #12]
+ 8005b8a:	4313      	orrs	r3, r2
+ 8005b8c:	60fb      	str	r3, [r7, #12]
+
+  /* Update TIMx CR2 */
+  htim->Instance->CR2 = tmpcr2;
+ 8005b8e:	687b      	ldr	r3, [r7, #4]
+ 8005b90:	681b      	ldr	r3, [r3, #0]
+ 8005b92:	68fa      	ldr	r2, [r7, #12]
+ 8005b94:	605a      	str	r2, [r3, #4]
+
+  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ 8005b96:	687b      	ldr	r3, [r7, #4]
+ 8005b98:	681b      	ldr	r3, [r3, #0]
+ 8005b9a:	4a21      	ldr	r2, [pc, #132]	@ (8005c20 <HAL_TIMEx_MasterConfigSynchronization+0xdc>)
+ 8005b9c:	4293      	cmp	r3, r2
+ 8005b9e:	d022      	beq.n	8005be6 <HAL_TIMEx_MasterConfigSynchronization+0xa2>
+ 8005ba0:	687b      	ldr	r3, [r7, #4]
+ 8005ba2:	681b      	ldr	r3, [r3, #0]
+ 8005ba4:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
+ 8005ba8:	d01d      	beq.n	8005be6 <HAL_TIMEx_MasterConfigSynchronization+0xa2>
+ 8005baa:	687b      	ldr	r3, [r7, #4]
+ 8005bac:	681b      	ldr	r3, [r3, #0]
+ 8005bae:	4a1d      	ldr	r2, [pc, #116]	@ (8005c24 <HAL_TIMEx_MasterConfigSynchronization+0xe0>)
+ 8005bb0:	4293      	cmp	r3, r2
+ 8005bb2:	d018      	beq.n	8005be6 <HAL_TIMEx_MasterConfigSynchronization+0xa2>
+ 8005bb4:	687b      	ldr	r3, [r7, #4]
+ 8005bb6:	681b      	ldr	r3, [r3, #0]
+ 8005bb8:	4a1b      	ldr	r2, [pc, #108]	@ (8005c28 <HAL_TIMEx_MasterConfigSynchronization+0xe4>)
+ 8005bba:	4293      	cmp	r3, r2
+ 8005bbc:	d013      	beq.n	8005be6 <HAL_TIMEx_MasterConfigSynchronization+0xa2>
+ 8005bbe:	687b      	ldr	r3, [r7, #4]
+ 8005bc0:	681b      	ldr	r3, [r3, #0]
+ 8005bc2:	4a1a      	ldr	r2, [pc, #104]	@ (8005c2c <HAL_TIMEx_MasterConfigSynchronization+0xe8>)
+ 8005bc4:	4293      	cmp	r3, r2
+ 8005bc6:	d00e      	beq.n	8005be6 <HAL_TIMEx_MasterConfigSynchronization+0xa2>
+ 8005bc8:	687b      	ldr	r3, [r7, #4]
+ 8005bca:	681b      	ldr	r3, [r3, #0]
+ 8005bcc:	4a18      	ldr	r2, [pc, #96]	@ (8005c30 <HAL_TIMEx_MasterConfigSynchronization+0xec>)
+ 8005bce:	4293      	cmp	r3, r2
+ 8005bd0:	d009      	beq.n	8005be6 <HAL_TIMEx_MasterConfigSynchronization+0xa2>
+ 8005bd2:	687b      	ldr	r3, [r7, #4]
+ 8005bd4:	681b      	ldr	r3, [r3, #0]
+ 8005bd6:	4a17      	ldr	r2, [pc, #92]	@ (8005c34 <HAL_TIMEx_MasterConfigSynchronization+0xf0>)
+ 8005bd8:	4293      	cmp	r3, r2
+ 8005bda:	d004      	beq.n	8005be6 <HAL_TIMEx_MasterConfigSynchronization+0xa2>
+ 8005bdc:	687b      	ldr	r3, [r7, #4]
+ 8005bde:	681b      	ldr	r3, [r3, #0]
+ 8005be0:	4a15      	ldr	r2, [pc, #84]	@ (8005c38 <HAL_TIMEx_MasterConfigSynchronization+0xf4>)
+ 8005be2:	4293      	cmp	r3, r2
+ 8005be4:	d10c      	bne.n	8005c00 <HAL_TIMEx_MasterConfigSynchronization+0xbc>
+  {
+    /* Reset the MSM Bit */
+    tmpsmcr &= ~TIM_SMCR_MSM;
+ 8005be6:	68bb      	ldr	r3, [r7, #8]
+ 8005be8:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
+ 8005bec:	60bb      	str	r3, [r7, #8]
+    /* Set master mode */
+    tmpsmcr |= sMasterConfig->MasterSlaveMode;
+ 8005bee:	683b      	ldr	r3, [r7, #0]
+ 8005bf0:	685b      	ldr	r3, [r3, #4]
+ 8005bf2:	68ba      	ldr	r2, [r7, #8]
+ 8005bf4:	4313      	orrs	r3, r2
+ 8005bf6:	60bb      	str	r3, [r7, #8]
+
+    /* Update TIMx SMCR */
+    htim->Instance->SMCR = tmpsmcr;
+ 8005bf8:	687b      	ldr	r3, [r7, #4]
+ 8005bfa:	681b      	ldr	r3, [r3, #0]
+ 8005bfc:	68ba      	ldr	r2, [r7, #8]
+ 8005bfe:	609a      	str	r2, [r3, #8]
+  }
+
+  /* Change the htim state */
+  htim->State = HAL_TIM_STATE_READY;
+ 8005c00:	687b      	ldr	r3, [r7, #4]
+ 8005c02:	2201      	movs	r2, #1
+ 8005c04:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+
+  __HAL_UNLOCK(htim);
+ 8005c08:	687b      	ldr	r3, [r7, #4]
+ 8005c0a:	2200      	movs	r2, #0
+ 8005c0c:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+
+  return HAL_OK;
+ 8005c10:	2300      	movs	r3, #0
+}
+ 8005c12:	4618      	mov	r0, r3
+ 8005c14:	3714      	adds	r7, #20
+ 8005c16:	46bd      	mov	sp, r7
+ 8005c18:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005c1c:	4770      	bx	lr
+ 8005c1e:	bf00      	nop
+ 8005c20:	40010000 	.word	0x40010000
+ 8005c24:	40000400 	.word	0x40000400
+ 8005c28:	40000800 	.word	0x40000800
+ 8005c2c:	40000c00 	.word	0x40000c00
+ 8005c30:	40010400 	.word	0x40010400
+ 8005c34:	40014000 	.word	0x40014000
+ 8005c38:	40001800 	.word	0x40001800
+
+08005c3c <HAL_TIMEx_CommutCallback>:
+  * @brief  Commutation callback in non-blocking mode
+  * @param  htim TIM handle
+  * @retval None
+  */
+__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
+{
+ 8005c3c:	b480      	push	{r7}
+ 8005c3e:	b083      	sub	sp, #12
+ 8005c40:	af00      	add	r7, sp, #0
+ 8005c42:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIMEx_CommutCallback could be implemented in the user file
+   */
+}
+ 8005c44:	bf00      	nop
+ 8005c46:	370c      	adds	r7, #12
+ 8005c48:	46bd      	mov	sp, r7
+ 8005c4a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005c4e:	4770      	bx	lr
+
+08005c50 <HAL_TIMEx_BreakCallback>:
+  * @brief  Break detection callback in non-blocking mode
+  * @param  htim TIM handle
+  * @retval None
+  */
+__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
+{
+ 8005c50:	b480      	push	{r7}
+ 8005c52:	b083      	sub	sp, #12
+ 8005c54:	af00      	add	r7, sp, #0
+ 8005c56:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIMEx_BreakCallback could be implemented in the user file
+   */
+}
+ 8005c58:	bf00      	nop
+ 8005c5a:	370c      	adds	r7, #12
+ 8005c5c:	46bd      	mov	sp, r7
+ 8005c5e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8005c62:	4770      	bx	lr
+
+08005c64 <HAL_UART_Init>:
+  * @param  huart  Pointer to a UART_HandleTypeDef structure that contains
+  *                the configuration information for the specified UART module.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
+{
+ 8005c64:	b580      	push	{r7, lr}
+ 8005c66:	b082      	sub	sp, #8
+ 8005c68:	af00      	add	r7, sp, #0
+ 8005c6a:	6078      	str	r0, [r7, #4]
+  /* Check the UART handle allocation */
+  if (huart == NULL)
+ 8005c6c:	687b      	ldr	r3, [r7, #4]
+ 8005c6e:	2b00      	cmp	r3, #0
+ 8005c70:	d101      	bne.n	8005c76 <HAL_UART_Init+0x12>
+  {
+    return HAL_ERROR;
+ 8005c72:	2301      	movs	r3, #1
+ 8005c74:	e042      	b.n	8005cfc <HAL_UART_Init+0x98>
+    assert_param(IS_UART_INSTANCE(huart->Instance));
+  }
+  assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
+  assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
+
+  if (huart->gState == HAL_UART_STATE_RESET)
+ 8005c76:	687b      	ldr	r3, [r7, #4]
+ 8005c78:	f893 3041 	ldrb.w	r3, [r3, #65]	@ 0x41
+ 8005c7c:	b2db      	uxtb	r3, r3
+ 8005c7e:	2b00      	cmp	r3, #0
+ 8005c80:	d106      	bne.n	8005c90 <HAL_UART_Init+0x2c>
+  {
+    /* Allocate lock resource and initialize it */
+    huart->Lock = HAL_UNLOCKED;
+ 8005c82:	687b      	ldr	r3, [r7, #4]
+ 8005c84:	2200      	movs	r2, #0
+ 8005c86:	f883 2040 	strb.w	r2, [r3, #64]	@ 0x40
+
+    /* Init the low level hardware */
+    huart->MspInitCallback(huart);
+#else
+    /* Init the low level hardware : GPIO, CLOCK */
+    HAL_UART_MspInit(huart);
+ 8005c8a:	6878      	ldr	r0, [r7, #4]
+ 8005c8c:	f7fb fac8 	bl	8001220 <HAL_UART_MspInit>
+#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
+  }
+
+  huart->gState = HAL_UART_STATE_BUSY;
+ 8005c90:	687b      	ldr	r3, [r7, #4]
+ 8005c92:	2224      	movs	r2, #36	@ 0x24
+ 8005c94:	f883 2041 	strb.w	r2, [r3, #65]	@ 0x41
+
+  /* Disable the peripheral */
+  __HAL_UART_DISABLE(huart);
+ 8005c98:	687b      	ldr	r3, [r7, #4]
+ 8005c9a:	681b      	ldr	r3, [r3, #0]
+ 8005c9c:	68da      	ldr	r2, [r3, #12]
+ 8005c9e:	687b      	ldr	r3, [r7, #4]
+ 8005ca0:	681b      	ldr	r3, [r3, #0]
+ 8005ca2:	f422 5200 	bic.w	r2, r2, #8192	@ 0x2000
+ 8005ca6:	60da      	str	r2, [r3, #12]
+
+  /* Set the UART Communication parameters */
+  UART_SetConfig(huart);
+ 8005ca8:	6878      	ldr	r0, [r7, #4]
+ 8005caa:	f000 f82b 	bl	8005d04 <UART_SetConfig>
+
+  /* In asynchronous mode, the following bits must be kept cleared:
+     - LINEN and CLKEN bits in the USART_CR2 register,
+     - SCEN, HDSEL and IREN  bits in the USART_CR3 register.*/
+  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
+ 8005cae:	687b      	ldr	r3, [r7, #4]
+ 8005cb0:	681b      	ldr	r3, [r3, #0]
+ 8005cb2:	691a      	ldr	r2, [r3, #16]
+ 8005cb4:	687b      	ldr	r3, [r7, #4]
+ 8005cb6:	681b      	ldr	r3, [r3, #0]
+ 8005cb8:	f422 4290 	bic.w	r2, r2, #18432	@ 0x4800
+ 8005cbc:	611a      	str	r2, [r3, #16]
+  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
+ 8005cbe:	687b      	ldr	r3, [r7, #4]
+ 8005cc0:	681b      	ldr	r3, [r3, #0]
+ 8005cc2:	695a      	ldr	r2, [r3, #20]
+ 8005cc4:	687b      	ldr	r3, [r7, #4]
+ 8005cc6:	681b      	ldr	r3, [r3, #0]
+ 8005cc8:	f022 022a 	bic.w	r2, r2, #42	@ 0x2a
+ 8005ccc:	615a      	str	r2, [r3, #20]
+
+  /* Enable the peripheral */
+  __HAL_UART_ENABLE(huart);
+ 8005cce:	687b      	ldr	r3, [r7, #4]
+ 8005cd0:	681b      	ldr	r3, [r3, #0]
+ 8005cd2:	68da      	ldr	r2, [r3, #12]
+ 8005cd4:	687b      	ldr	r3, [r7, #4]
+ 8005cd6:	681b      	ldr	r3, [r3, #0]
+ 8005cd8:	f442 5200 	orr.w	r2, r2, #8192	@ 0x2000
+ 8005cdc:	60da      	str	r2, [r3, #12]
+
+  /* Initialize the UART state */
+  huart->ErrorCode = HAL_UART_ERROR_NONE;
+ 8005cde:	687b      	ldr	r3, [r7, #4]
+ 8005ce0:	2200      	movs	r2, #0
+ 8005ce2:	645a      	str	r2, [r3, #68]	@ 0x44
+  huart->gState = HAL_UART_STATE_READY;
+ 8005ce4:	687b      	ldr	r3, [r7, #4]
+ 8005ce6:	2220      	movs	r2, #32
+ 8005ce8:	f883 2041 	strb.w	r2, [r3, #65]	@ 0x41
+  huart->RxState = HAL_UART_STATE_READY;
+ 8005cec:	687b      	ldr	r3, [r7, #4]
+ 8005cee:	2220      	movs	r2, #32
+ 8005cf0:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
+  huart->RxEventType = HAL_UART_RXEVENT_TC;
+ 8005cf4:	687b      	ldr	r3, [r7, #4]
+ 8005cf6:	2200      	movs	r2, #0
+ 8005cf8:	635a      	str	r2, [r3, #52]	@ 0x34
+
+  return HAL_OK;
+ 8005cfa:	2300      	movs	r3, #0
+}
+ 8005cfc:	4618      	mov	r0, r3
+ 8005cfe:	3708      	adds	r7, #8
+ 8005d00:	46bd      	mov	sp, r7
+ 8005d02:	bd80      	pop	{r7, pc}
+
+08005d04 <UART_SetConfig>:
+  * @param  huart  Pointer to a UART_HandleTypeDef structure that contains
+  *                the configuration information for the specified UART module.
+  * @retval None
+  */
+static void UART_SetConfig(UART_HandleTypeDef *huart)
+{
+ 8005d04:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
+ 8005d08:	b0c0      	sub	sp, #256	@ 0x100
+ 8005d0a:	af00      	add	r7, sp, #0
+ 8005d0c:	f8c7 00f4 	str.w	r0, [r7, #244]	@ 0xf4
+  assert_param(IS_UART_MODE(huart->Init.Mode));
+
+  /*-------------------------- USART CR2 Configuration -----------------------*/
+  /* Configure the UART Stop Bits: Set STOP[13:12] bits
+     according to huart->Init.StopBits value */
+  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
+ 8005d10:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005d14:	681b      	ldr	r3, [r3, #0]
+ 8005d16:	691b      	ldr	r3, [r3, #16]
+ 8005d18:	f423 5040 	bic.w	r0, r3, #12288	@ 0x3000
+ 8005d1c:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005d20:	68d9      	ldr	r1, [r3, #12]
+ 8005d22:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005d26:	681a      	ldr	r2, [r3, #0]
+ 8005d28:	ea40 0301 	orr.w	r3, r0, r1
+ 8005d2c:	6113      	str	r3, [r2, #16]
+     Set the M bits according to huart->Init.WordLength value
+     Set PCE and PS bits according to huart->Init.Parity value
+     Set TE and RE bits according to huart->Init.Mode value
+     Set OVER8 bit according to huart->Init.OverSampling value */
+
+  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
+ 8005d2e:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005d32:	689a      	ldr	r2, [r3, #8]
+ 8005d34:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005d38:	691b      	ldr	r3, [r3, #16]
+ 8005d3a:	431a      	orrs	r2, r3
+ 8005d3c:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005d40:	695b      	ldr	r3, [r3, #20]
+ 8005d42:	431a      	orrs	r2, r3
+ 8005d44:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005d48:	69db      	ldr	r3, [r3, #28]
+ 8005d4a:	4313      	orrs	r3, r2
+ 8005d4c:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
+  MODIFY_REG(huart->Instance->CR1,
+ 8005d50:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005d54:	681b      	ldr	r3, [r3, #0]
+ 8005d56:	68db      	ldr	r3, [r3, #12]
+ 8005d58:	f423 4116 	bic.w	r1, r3, #38400	@ 0x9600
+ 8005d5c:	f021 010c 	bic.w	r1, r1, #12
+ 8005d60:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005d64:	681a      	ldr	r2, [r3, #0]
+ 8005d66:	f8d7 30f8 	ldr.w	r3, [r7, #248]	@ 0xf8
+ 8005d6a:	430b      	orrs	r3, r1
+ 8005d6c:	60d3      	str	r3, [r2, #12]
+             (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
+             tmpreg);
+
+  /*-------------------------- USART CR3 Configuration -----------------------*/
+  /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
+  MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
+ 8005d6e:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005d72:	681b      	ldr	r3, [r3, #0]
+ 8005d74:	695b      	ldr	r3, [r3, #20]
+ 8005d76:	f423 7040 	bic.w	r0, r3, #768	@ 0x300
+ 8005d7a:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005d7e:	6999      	ldr	r1, [r3, #24]
+ 8005d80:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005d84:	681a      	ldr	r2, [r3, #0]
+ 8005d86:	ea40 0301 	orr.w	r3, r0, r1
+ 8005d8a:	6153      	str	r3, [r2, #20]
+    if ((huart->Instance == USART1) || (huart->Instance == USART6) || (huart->Instance == UART9) || (huart->Instance == UART10))
+    {
+      pclk = HAL_RCC_GetPCLK2Freq();
+    }
+#elif defined(USART6)
+    if ((huart->Instance == USART1) || (huart->Instance == USART6))
+ 8005d8c:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005d90:	681a      	ldr	r2, [r3, #0]
+ 8005d92:	4b8f      	ldr	r3, [pc, #572]	@ (8005fd0 <UART_SetConfig+0x2cc>)
+ 8005d94:	429a      	cmp	r2, r3
+ 8005d96:	d005      	beq.n	8005da4 <UART_SetConfig+0xa0>
+ 8005d98:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005d9c:	681a      	ldr	r2, [r3, #0]
+ 8005d9e:	4b8d      	ldr	r3, [pc, #564]	@ (8005fd4 <UART_SetConfig+0x2d0>)
+ 8005da0:	429a      	cmp	r2, r3
+ 8005da2:	d104      	bne.n	8005dae <UART_SetConfig+0xaa>
+    {
+      pclk = HAL_RCC_GetPCLK2Freq();
+ 8005da4:	f7ff f82c 	bl	8004e00 <HAL_RCC_GetPCLK2Freq>
+ 8005da8:	f8c7 00fc 	str.w	r0, [r7, #252]	@ 0xfc
+ 8005dac:	e003      	b.n	8005db6 <UART_SetConfig+0xb2>
+      pclk = HAL_RCC_GetPCLK2Freq();
+    }
+#endif /* USART6 */
+    else
+    {
+      pclk = HAL_RCC_GetPCLK1Freq();
+ 8005dae:	f7ff f813 	bl	8004dd8 <HAL_RCC_GetPCLK1Freq>
+ 8005db2:	f8c7 00fc 	str.w	r0, [r7, #252]	@ 0xfc
+    }
+  /*-------------------------- USART BRR Configuration ---------------------*/
+  if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
+ 8005db6:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005dba:	69db      	ldr	r3, [r3, #28]
+ 8005dbc:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
+ 8005dc0:	f040 810c 	bne.w	8005fdc <UART_SetConfig+0x2d8>
+  {
+    huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
+ 8005dc4:	f8d7 30fc 	ldr.w	r3, [r7, #252]	@ 0xfc
+ 8005dc8:	2200      	movs	r2, #0
+ 8005dca:	f8c7 30e8 	str.w	r3, [r7, #232]	@ 0xe8
+ 8005dce:	f8c7 20ec 	str.w	r2, [r7, #236]	@ 0xec
+ 8005dd2:	e9d7 453a 	ldrd	r4, r5, [r7, #232]	@ 0xe8
+ 8005dd6:	4622      	mov	r2, r4
+ 8005dd8:	462b      	mov	r3, r5
+ 8005dda:	1891      	adds	r1, r2, r2
+ 8005ddc:	65b9      	str	r1, [r7, #88]	@ 0x58
+ 8005dde:	415b      	adcs	r3, r3
+ 8005de0:	65fb      	str	r3, [r7, #92]	@ 0x5c
+ 8005de2:	e9d7 2316 	ldrd	r2, r3, [r7, #88]	@ 0x58
+ 8005de6:	4621      	mov	r1, r4
+ 8005de8:	eb12 0801 	adds.w	r8, r2, r1
+ 8005dec:	4629      	mov	r1, r5
+ 8005dee:	eb43 0901 	adc.w	r9, r3, r1
+ 8005df2:	f04f 0200 	mov.w	r2, #0
+ 8005df6:	f04f 0300 	mov.w	r3, #0
+ 8005dfa:	ea4f 03c9 	mov.w	r3, r9, lsl #3
+ 8005dfe:	ea43 7358 	orr.w	r3, r3, r8, lsr #29
+ 8005e02:	ea4f 02c8 	mov.w	r2, r8, lsl #3
+ 8005e06:	4690      	mov	r8, r2
+ 8005e08:	4699      	mov	r9, r3
+ 8005e0a:	4623      	mov	r3, r4
+ 8005e0c:	eb18 0303 	adds.w	r3, r8, r3
+ 8005e10:	f8c7 30e0 	str.w	r3, [r7, #224]	@ 0xe0
+ 8005e14:	462b      	mov	r3, r5
+ 8005e16:	eb49 0303 	adc.w	r3, r9, r3
+ 8005e1a:	f8c7 30e4 	str.w	r3, [r7, #228]	@ 0xe4
+ 8005e1e:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005e22:	685b      	ldr	r3, [r3, #4]
+ 8005e24:	2200      	movs	r2, #0
+ 8005e26:	f8c7 30d8 	str.w	r3, [r7, #216]	@ 0xd8
+ 8005e2a:	f8c7 20dc 	str.w	r2, [r7, #220]	@ 0xdc
+ 8005e2e:	e9d7 1236 	ldrd	r1, r2, [r7, #216]	@ 0xd8
+ 8005e32:	460b      	mov	r3, r1
+ 8005e34:	18db      	adds	r3, r3, r3
+ 8005e36:	653b      	str	r3, [r7, #80]	@ 0x50
+ 8005e38:	4613      	mov	r3, r2
+ 8005e3a:	eb42 0303 	adc.w	r3, r2, r3
+ 8005e3e:	657b      	str	r3, [r7, #84]	@ 0x54
+ 8005e40:	e9d7 2314 	ldrd	r2, r3, [r7, #80]	@ 0x50
+ 8005e44:	e9d7 0138 	ldrd	r0, r1, [r7, #224]	@ 0xe0
+ 8005e48:	f7fa f9d2 	bl	80001f0 <__aeabi_uldivmod>
+ 8005e4c:	4602      	mov	r2, r0
+ 8005e4e:	460b      	mov	r3, r1
+ 8005e50:	4b61      	ldr	r3, [pc, #388]	@ (8005fd8 <UART_SetConfig+0x2d4>)
+ 8005e52:	fba3 2302 	umull	r2, r3, r3, r2
+ 8005e56:	095b      	lsrs	r3, r3, #5
+ 8005e58:	011c      	lsls	r4, r3, #4
+ 8005e5a:	f8d7 30fc 	ldr.w	r3, [r7, #252]	@ 0xfc
+ 8005e5e:	2200      	movs	r2, #0
+ 8005e60:	f8c7 30d0 	str.w	r3, [r7, #208]	@ 0xd0
+ 8005e64:	f8c7 20d4 	str.w	r2, [r7, #212]	@ 0xd4
+ 8005e68:	e9d7 8934 	ldrd	r8, r9, [r7, #208]	@ 0xd0
+ 8005e6c:	4642      	mov	r2, r8
+ 8005e6e:	464b      	mov	r3, r9
+ 8005e70:	1891      	adds	r1, r2, r2
+ 8005e72:	64b9      	str	r1, [r7, #72]	@ 0x48
+ 8005e74:	415b      	adcs	r3, r3
+ 8005e76:	64fb      	str	r3, [r7, #76]	@ 0x4c
+ 8005e78:	e9d7 2312 	ldrd	r2, r3, [r7, #72]	@ 0x48
+ 8005e7c:	4641      	mov	r1, r8
+ 8005e7e:	eb12 0a01 	adds.w	sl, r2, r1
+ 8005e82:	4649      	mov	r1, r9
+ 8005e84:	eb43 0b01 	adc.w	fp, r3, r1
+ 8005e88:	f04f 0200 	mov.w	r2, #0
+ 8005e8c:	f04f 0300 	mov.w	r3, #0
+ 8005e90:	ea4f 03cb 	mov.w	r3, fp, lsl #3
+ 8005e94:	ea43 735a 	orr.w	r3, r3, sl, lsr #29
+ 8005e98:	ea4f 02ca 	mov.w	r2, sl, lsl #3
+ 8005e9c:	4692      	mov	sl, r2
+ 8005e9e:	469b      	mov	fp, r3
+ 8005ea0:	4643      	mov	r3, r8
+ 8005ea2:	eb1a 0303 	adds.w	r3, sl, r3
+ 8005ea6:	f8c7 30c8 	str.w	r3, [r7, #200]	@ 0xc8
+ 8005eaa:	464b      	mov	r3, r9
+ 8005eac:	eb4b 0303 	adc.w	r3, fp, r3
+ 8005eb0:	f8c7 30cc 	str.w	r3, [r7, #204]	@ 0xcc
+ 8005eb4:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005eb8:	685b      	ldr	r3, [r3, #4]
+ 8005eba:	2200      	movs	r2, #0
+ 8005ebc:	f8c7 30c0 	str.w	r3, [r7, #192]	@ 0xc0
+ 8005ec0:	f8c7 20c4 	str.w	r2, [r7, #196]	@ 0xc4
+ 8005ec4:	e9d7 1230 	ldrd	r1, r2, [r7, #192]	@ 0xc0
+ 8005ec8:	460b      	mov	r3, r1
+ 8005eca:	18db      	adds	r3, r3, r3
+ 8005ecc:	643b      	str	r3, [r7, #64]	@ 0x40
+ 8005ece:	4613      	mov	r3, r2
+ 8005ed0:	eb42 0303 	adc.w	r3, r2, r3
+ 8005ed4:	647b      	str	r3, [r7, #68]	@ 0x44
+ 8005ed6:	e9d7 2310 	ldrd	r2, r3, [r7, #64]	@ 0x40
+ 8005eda:	e9d7 0132 	ldrd	r0, r1, [r7, #200]	@ 0xc8
+ 8005ede:	f7fa f987 	bl	80001f0 <__aeabi_uldivmod>
+ 8005ee2:	4602      	mov	r2, r0
+ 8005ee4:	460b      	mov	r3, r1
+ 8005ee6:	4611      	mov	r1, r2
+ 8005ee8:	4b3b      	ldr	r3, [pc, #236]	@ (8005fd8 <UART_SetConfig+0x2d4>)
+ 8005eea:	fba3 2301 	umull	r2, r3, r3, r1
+ 8005eee:	095b      	lsrs	r3, r3, #5
+ 8005ef0:	2264      	movs	r2, #100	@ 0x64
+ 8005ef2:	fb02 f303 	mul.w	r3, r2, r3
+ 8005ef6:	1acb      	subs	r3, r1, r3
+ 8005ef8:	00db      	lsls	r3, r3, #3
+ 8005efa:	f103 0232 	add.w	r2, r3, #50	@ 0x32
+ 8005efe:	4b36      	ldr	r3, [pc, #216]	@ (8005fd8 <UART_SetConfig+0x2d4>)
+ 8005f00:	fba3 2302 	umull	r2, r3, r3, r2
+ 8005f04:	095b      	lsrs	r3, r3, #5
+ 8005f06:	005b      	lsls	r3, r3, #1
+ 8005f08:	f403 73f8 	and.w	r3, r3, #496	@ 0x1f0
+ 8005f0c:	441c      	add	r4, r3
+ 8005f0e:	f8d7 30fc 	ldr.w	r3, [r7, #252]	@ 0xfc
+ 8005f12:	2200      	movs	r2, #0
+ 8005f14:	f8c7 30b8 	str.w	r3, [r7, #184]	@ 0xb8
+ 8005f18:	f8c7 20bc 	str.w	r2, [r7, #188]	@ 0xbc
+ 8005f1c:	e9d7 892e 	ldrd	r8, r9, [r7, #184]	@ 0xb8
+ 8005f20:	4642      	mov	r2, r8
+ 8005f22:	464b      	mov	r3, r9
+ 8005f24:	1891      	adds	r1, r2, r2
+ 8005f26:	63b9      	str	r1, [r7, #56]	@ 0x38
+ 8005f28:	415b      	adcs	r3, r3
+ 8005f2a:	63fb      	str	r3, [r7, #60]	@ 0x3c
+ 8005f2c:	e9d7 230e 	ldrd	r2, r3, [r7, #56]	@ 0x38
+ 8005f30:	4641      	mov	r1, r8
+ 8005f32:	1851      	adds	r1, r2, r1
+ 8005f34:	6339      	str	r1, [r7, #48]	@ 0x30
+ 8005f36:	4649      	mov	r1, r9
+ 8005f38:	414b      	adcs	r3, r1
+ 8005f3a:	637b      	str	r3, [r7, #52]	@ 0x34
+ 8005f3c:	f04f 0200 	mov.w	r2, #0
+ 8005f40:	f04f 0300 	mov.w	r3, #0
+ 8005f44:	e9d7 ab0c 	ldrd	sl, fp, [r7, #48]	@ 0x30
+ 8005f48:	4659      	mov	r1, fp
+ 8005f4a:	00cb      	lsls	r3, r1, #3
+ 8005f4c:	4651      	mov	r1, sl
+ 8005f4e:	ea43 7351 	orr.w	r3, r3, r1, lsr #29
+ 8005f52:	4651      	mov	r1, sl
+ 8005f54:	00ca      	lsls	r2, r1, #3
+ 8005f56:	4610      	mov	r0, r2
+ 8005f58:	4619      	mov	r1, r3
+ 8005f5a:	4603      	mov	r3, r0
+ 8005f5c:	4642      	mov	r2, r8
+ 8005f5e:	189b      	adds	r3, r3, r2
+ 8005f60:	f8c7 30b0 	str.w	r3, [r7, #176]	@ 0xb0
+ 8005f64:	464b      	mov	r3, r9
+ 8005f66:	460a      	mov	r2, r1
+ 8005f68:	eb42 0303 	adc.w	r3, r2, r3
+ 8005f6c:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
+ 8005f70:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005f74:	685b      	ldr	r3, [r3, #4]
+ 8005f76:	2200      	movs	r2, #0
+ 8005f78:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
+ 8005f7c:	f8c7 20ac 	str.w	r2, [r7, #172]	@ 0xac
+ 8005f80:	e9d7 122a 	ldrd	r1, r2, [r7, #168]	@ 0xa8
+ 8005f84:	460b      	mov	r3, r1
+ 8005f86:	18db      	adds	r3, r3, r3
+ 8005f88:	62bb      	str	r3, [r7, #40]	@ 0x28
+ 8005f8a:	4613      	mov	r3, r2
+ 8005f8c:	eb42 0303 	adc.w	r3, r2, r3
+ 8005f90:	62fb      	str	r3, [r7, #44]	@ 0x2c
+ 8005f92:	e9d7 230a 	ldrd	r2, r3, [r7, #40]	@ 0x28
+ 8005f96:	e9d7 012c 	ldrd	r0, r1, [r7, #176]	@ 0xb0
+ 8005f9a:	f7fa f929 	bl	80001f0 <__aeabi_uldivmod>
+ 8005f9e:	4602      	mov	r2, r0
+ 8005fa0:	460b      	mov	r3, r1
+ 8005fa2:	4b0d      	ldr	r3, [pc, #52]	@ (8005fd8 <UART_SetConfig+0x2d4>)
+ 8005fa4:	fba3 1302 	umull	r1, r3, r3, r2
+ 8005fa8:	095b      	lsrs	r3, r3, #5
+ 8005faa:	2164      	movs	r1, #100	@ 0x64
+ 8005fac:	fb01 f303 	mul.w	r3, r1, r3
+ 8005fb0:	1ad3      	subs	r3, r2, r3
+ 8005fb2:	00db      	lsls	r3, r3, #3
+ 8005fb4:	3332      	adds	r3, #50	@ 0x32
+ 8005fb6:	4a08      	ldr	r2, [pc, #32]	@ (8005fd8 <UART_SetConfig+0x2d4>)
+ 8005fb8:	fba2 2303 	umull	r2, r3, r2, r3
+ 8005fbc:	095b      	lsrs	r3, r3, #5
+ 8005fbe:	f003 0207 	and.w	r2, r3, #7
+ 8005fc2:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8005fc6:	681b      	ldr	r3, [r3, #0]
+ 8005fc8:	4422      	add	r2, r4
+ 8005fca:	609a      	str	r2, [r3, #8]
+  }
+  else
+  {
+    huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
+  }
+}
+ 8005fcc:	e106      	b.n	80061dc <UART_SetConfig+0x4d8>
+ 8005fce:	bf00      	nop
+ 8005fd0:	40011000 	.word	0x40011000
+ 8005fd4:	40011400 	.word	0x40011400
+ 8005fd8:	51eb851f 	.word	0x51eb851f
+    huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
+ 8005fdc:	f8d7 30fc 	ldr.w	r3, [r7, #252]	@ 0xfc
+ 8005fe0:	2200      	movs	r2, #0
+ 8005fe2:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
+ 8005fe6:	f8c7 20a4 	str.w	r2, [r7, #164]	@ 0xa4
+ 8005fea:	e9d7 8928 	ldrd	r8, r9, [r7, #160]	@ 0xa0
+ 8005fee:	4642      	mov	r2, r8
+ 8005ff0:	464b      	mov	r3, r9
+ 8005ff2:	1891      	adds	r1, r2, r2
+ 8005ff4:	6239      	str	r1, [r7, #32]
+ 8005ff6:	415b      	adcs	r3, r3
+ 8005ff8:	627b      	str	r3, [r7, #36]	@ 0x24
+ 8005ffa:	e9d7 2308 	ldrd	r2, r3, [r7, #32]
+ 8005ffe:	4641      	mov	r1, r8
+ 8006000:	1854      	adds	r4, r2, r1
+ 8006002:	4649      	mov	r1, r9
+ 8006004:	eb43 0501 	adc.w	r5, r3, r1
+ 8006008:	f04f 0200 	mov.w	r2, #0
+ 800600c:	f04f 0300 	mov.w	r3, #0
+ 8006010:	00eb      	lsls	r3, r5, #3
+ 8006012:	ea43 7354 	orr.w	r3, r3, r4, lsr #29
+ 8006016:	00e2      	lsls	r2, r4, #3
+ 8006018:	4614      	mov	r4, r2
+ 800601a:	461d      	mov	r5, r3
+ 800601c:	4643      	mov	r3, r8
+ 800601e:	18e3      	adds	r3, r4, r3
+ 8006020:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
+ 8006024:	464b      	mov	r3, r9
+ 8006026:	eb45 0303 	adc.w	r3, r5, r3
+ 800602a:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
+ 800602e:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8006032:	685b      	ldr	r3, [r3, #4]
+ 8006034:	2200      	movs	r2, #0
+ 8006036:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
+ 800603a:	f8c7 2094 	str.w	r2, [r7, #148]	@ 0x94
+ 800603e:	f04f 0200 	mov.w	r2, #0
+ 8006042:	f04f 0300 	mov.w	r3, #0
+ 8006046:	e9d7 4524 	ldrd	r4, r5, [r7, #144]	@ 0x90
+ 800604a:	4629      	mov	r1, r5
+ 800604c:	008b      	lsls	r3, r1, #2
+ 800604e:	4621      	mov	r1, r4
+ 8006050:	ea43 7391 	orr.w	r3, r3, r1, lsr #30
+ 8006054:	4621      	mov	r1, r4
+ 8006056:	008a      	lsls	r2, r1, #2
+ 8006058:	e9d7 0126 	ldrd	r0, r1, [r7, #152]	@ 0x98
+ 800605c:	f7fa f8c8 	bl	80001f0 <__aeabi_uldivmod>
+ 8006060:	4602      	mov	r2, r0
+ 8006062:	460b      	mov	r3, r1
+ 8006064:	4b60      	ldr	r3, [pc, #384]	@ (80061e8 <UART_SetConfig+0x4e4>)
+ 8006066:	fba3 2302 	umull	r2, r3, r3, r2
+ 800606a:	095b      	lsrs	r3, r3, #5
+ 800606c:	011c      	lsls	r4, r3, #4
+ 800606e:	f8d7 30fc 	ldr.w	r3, [r7, #252]	@ 0xfc
+ 8006072:	2200      	movs	r2, #0
+ 8006074:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
+ 8006078:	f8c7 208c 	str.w	r2, [r7, #140]	@ 0x8c
+ 800607c:	e9d7 8922 	ldrd	r8, r9, [r7, #136]	@ 0x88
+ 8006080:	4642      	mov	r2, r8
+ 8006082:	464b      	mov	r3, r9
+ 8006084:	1891      	adds	r1, r2, r2
+ 8006086:	61b9      	str	r1, [r7, #24]
+ 8006088:	415b      	adcs	r3, r3
+ 800608a:	61fb      	str	r3, [r7, #28]
+ 800608c:	e9d7 2306 	ldrd	r2, r3, [r7, #24]
+ 8006090:	4641      	mov	r1, r8
+ 8006092:	1851      	adds	r1, r2, r1
+ 8006094:	6139      	str	r1, [r7, #16]
+ 8006096:	4649      	mov	r1, r9
+ 8006098:	414b      	adcs	r3, r1
+ 800609a:	617b      	str	r3, [r7, #20]
+ 800609c:	f04f 0200 	mov.w	r2, #0
+ 80060a0:	f04f 0300 	mov.w	r3, #0
+ 80060a4:	e9d7 ab04 	ldrd	sl, fp, [r7, #16]
+ 80060a8:	4659      	mov	r1, fp
+ 80060aa:	00cb      	lsls	r3, r1, #3
+ 80060ac:	4651      	mov	r1, sl
+ 80060ae:	ea43 7351 	orr.w	r3, r3, r1, lsr #29
+ 80060b2:	4651      	mov	r1, sl
+ 80060b4:	00ca      	lsls	r2, r1, #3
+ 80060b6:	4610      	mov	r0, r2
+ 80060b8:	4619      	mov	r1, r3
+ 80060ba:	4603      	mov	r3, r0
+ 80060bc:	4642      	mov	r2, r8
+ 80060be:	189b      	adds	r3, r3, r2
+ 80060c0:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
+ 80060c4:	464b      	mov	r3, r9
+ 80060c6:	460a      	mov	r2, r1
+ 80060c8:	eb42 0303 	adc.w	r3, r2, r3
+ 80060cc:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
+ 80060d0:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 80060d4:	685b      	ldr	r3, [r3, #4]
+ 80060d6:	2200      	movs	r2, #0
+ 80060d8:	67bb      	str	r3, [r7, #120]	@ 0x78
+ 80060da:	67fa      	str	r2, [r7, #124]	@ 0x7c
+ 80060dc:	f04f 0200 	mov.w	r2, #0
+ 80060e0:	f04f 0300 	mov.w	r3, #0
+ 80060e4:	e9d7 891e 	ldrd	r8, r9, [r7, #120]	@ 0x78
+ 80060e8:	4649      	mov	r1, r9
+ 80060ea:	008b      	lsls	r3, r1, #2
+ 80060ec:	4641      	mov	r1, r8
+ 80060ee:	ea43 7391 	orr.w	r3, r3, r1, lsr #30
+ 80060f2:	4641      	mov	r1, r8
+ 80060f4:	008a      	lsls	r2, r1, #2
+ 80060f6:	e9d7 0120 	ldrd	r0, r1, [r7, #128]	@ 0x80
+ 80060fa:	f7fa f879 	bl	80001f0 <__aeabi_uldivmod>
+ 80060fe:	4602      	mov	r2, r0
+ 8006100:	460b      	mov	r3, r1
+ 8006102:	4611      	mov	r1, r2
+ 8006104:	4b38      	ldr	r3, [pc, #224]	@ (80061e8 <UART_SetConfig+0x4e4>)
+ 8006106:	fba3 2301 	umull	r2, r3, r3, r1
+ 800610a:	095b      	lsrs	r3, r3, #5
+ 800610c:	2264      	movs	r2, #100	@ 0x64
+ 800610e:	fb02 f303 	mul.w	r3, r2, r3
+ 8006112:	1acb      	subs	r3, r1, r3
+ 8006114:	011b      	lsls	r3, r3, #4
+ 8006116:	3332      	adds	r3, #50	@ 0x32
+ 8006118:	4a33      	ldr	r2, [pc, #204]	@ (80061e8 <UART_SetConfig+0x4e4>)
+ 800611a:	fba2 2303 	umull	r2, r3, r2, r3
+ 800611e:	095b      	lsrs	r3, r3, #5
+ 8006120:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
+ 8006124:	441c      	add	r4, r3
+ 8006126:	f8d7 30fc 	ldr.w	r3, [r7, #252]	@ 0xfc
+ 800612a:	2200      	movs	r2, #0
+ 800612c:	673b      	str	r3, [r7, #112]	@ 0x70
+ 800612e:	677a      	str	r2, [r7, #116]	@ 0x74
+ 8006130:	e9d7 891c 	ldrd	r8, r9, [r7, #112]	@ 0x70
+ 8006134:	4642      	mov	r2, r8
+ 8006136:	464b      	mov	r3, r9
+ 8006138:	1891      	adds	r1, r2, r2
+ 800613a:	60b9      	str	r1, [r7, #8]
+ 800613c:	415b      	adcs	r3, r3
+ 800613e:	60fb      	str	r3, [r7, #12]
+ 8006140:	e9d7 2302 	ldrd	r2, r3, [r7, #8]
+ 8006144:	4641      	mov	r1, r8
+ 8006146:	1851      	adds	r1, r2, r1
+ 8006148:	6039      	str	r1, [r7, #0]
+ 800614a:	4649      	mov	r1, r9
+ 800614c:	414b      	adcs	r3, r1
+ 800614e:	607b      	str	r3, [r7, #4]
+ 8006150:	f04f 0200 	mov.w	r2, #0
+ 8006154:	f04f 0300 	mov.w	r3, #0
+ 8006158:	e9d7 ab00 	ldrd	sl, fp, [r7]
+ 800615c:	4659      	mov	r1, fp
+ 800615e:	00cb      	lsls	r3, r1, #3
+ 8006160:	4651      	mov	r1, sl
+ 8006162:	ea43 7351 	orr.w	r3, r3, r1, lsr #29
+ 8006166:	4651      	mov	r1, sl
+ 8006168:	00ca      	lsls	r2, r1, #3
+ 800616a:	4610      	mov	r0, r2
+ 800616c:	4619      	mov	r1, r3
+ 800616e:	4603      	mov	r3, r0
+ 8006170:	4642      	mov	r2, r8
+ 8006172:	189b      	adds	r3, r3, r2
+ 8006174:	66bb      	str	r3, [r7, #104]	@ 0x68
+ 8006176:	464b      	mov	r3, r9
+ 8006178:	460a      	mov	r2, r1
+ 800617a:	eb42 0303 	adc.w	r3, r2, r3
+ 800617e:	66fb      	str	r3, [r7, #108]	@ 0x6c
+ 8006180:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 8006184:	685b      	ldr	r3, [r3, #4]
+ 8006186:	2200      	movs	r2, #0
+ 8006188:	663b      	str	r3, [r7, #96]	@ 0x60
+ 800618a:	667a      	str	r2, [r7, #100]	@ 0x64
+ 800618c:	f04f 0200 	mov.w	r2, #0
+ 8006190:	f04f 0300 	mov.w	r3, #0
+ 8006194:	e9d7 8918 	ldrd	r8, r9, [r7, #96]	@ 0x60
+ 8006198:	4649      	mov	r1, r9
+ 800619a:	008b      	lsls	r3, r1, #2
+ 800619c:	4641      	mov	r1, r8
+ 800619e:	ea43 7391 	orr.w	r3, r3, r1, lsr #30
+ 80061a2:	4641      	mov	r1, r8
+ 80061a4:	008a      	lsls	r2, r1, #2
+ 80061a6:	e9d7 011a 	ldrd	r0, r1, [r7, #104]	@ 0x68
+ 80061aa:	f7fa f821 	bl	80001f0 <__aeabi_uldivmod>
+ 80061ae:	4602      	mov	r2, r0
+ 80061b0:	460b      	mov	r3, r1
+ 80061b2:	4b0d      	ldr	r3, [pc, #52]	@ (80061e8 <UART_SetConfig+0x4e4>)
+ 80061b4:	fba3 1302 	umull	r1, r3, r3, r2
+ 80061b8:	095b      	lsrs	r3, r3, #5
+ 80061ba:	2164      	movs	r1, #100	@ 0x64
+ 80061bc:	fb01 f303 	mul.w	r3, r1, r3
+ 80061c0:	1ad3      	subs	r3, r2, r3
+ 80061c2:	011b      	lsls	r3, r3, #4
+ 80061c4:	3332      	adds	r3, #50	@ 0x32
+ 80061c6:	4a08      	ldr	r2, [pc, #32]	@ (80061e8 <UART_SetConfig+0x4e4>)
+ 80061c8:	fba2 2303 	umull	r2, r3, r2, r3
+ 80061cc:	095b      	lsrs	r3, r3, #5
+ 80061ce:	f003 020f 	and.w	r2, r3, #15
+ 80061d2:	f8d7 30f4 	ldr.w	r3, [r7, #244]	@ 0xf4
+ 80061d6:	681b      	ldr	r3, [r3, #0]
+ 80061d8:	4422      	add	r2, r4
+ 80061da:	609a      	str	r2, [r3, #8]
+}
+ 80061dc:	bf00      	nop
+ 80061de:	f507 7780 	add.w	r7, r7, #256	@ 0x100
+ 80061e2:	46bd      	mov	sp, r7
+ 80061e4:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
+ 80061e8:	51eb851f 	.word	0x51eb851f
+
+080061ec <FMC_SDRAM_Init>:
+  * @param  Device Pointer to SDRAM device instance
+  * @param  Init Pointer to SDRAM Initialization structure
+  * @retval HAL status
+  */
+HAL_StatusTypeDef FMC_SDRAM_Init(FMC_SDRAM_TypeDef *Device, const FMC_SDRAM_InitTypeDef *Init)
+{
+ 80061ec:	b480      	push	{r7}
+ 80061ee:	b083      	sub	sp, #12
+ 80061f0:	af00      	add	r7, sp, #0
+ 80061f2:	6078      	str	r0, [r7, #4]
+ 80061f4:	6039      	str	r1, [r7, #0]
+  assert_param(IS_FMC_SDCLOCK_PERIOD(Init->SDClockPeriod));
+  assert_param(IS_FMC_READ_BURST(Init->ReadBurst));
+  assert_param(IS_FMC_READPIPE_DELAY(Init->ReadPipeDelay));
+
+  /* Set SDRAM bank configuration parameters */
+  if (Init->SDBank == FMC_SDRAM_BANK1)
+ 80061f6:	683b      	ldr	r3, [r7, #0]
+ 80061f8:	681b      	ldr	r3, [r3, #0]
+ 80061fa:	2b00      	cmp	r3, #0
+ 80061fc:	d123      	bne.n	8006246 <FMC_SDRAM_Init+0x5a>
+  {
+    MODIFY_REG(Device->SDCR[FMC_SDRAM_BANK1],
+ 80061fe:	687b      	ldr	r3, [r7, #4]
+ 8006200:	681b      	ldr	r3, [r3, #0]
+ 8006202:	f423 43ff 	bic.w	r3, r3, #32640	@ 0x7f80
+ 8006206:	f023 037f 	bic.w	r3, r3, #127	@ 0x7f
+ 800620a:	683a      	ldr	r2, [r7, #0]
+ 800620c:	6851      	ldr	r1, [r2, #4]
+ 800620e:	683a      	ldr	r2, [r7, #0]
+ 8006210:	6892      	ldr	r2, [r2, #8]
+ 8006212:	4311      	orrs	r1, r2
+ 8006214:	683a      	ldr	r2, [r7, #0]
+ 8006216:	68d2      	ldr	r2, [r2, #12]
+ 8006218:	4311      	orrs	r1, r2
+ 800621a:	683a      	ldr	r2, [r7, #0]
+ 800621c:	6912      	ldr	r2, [r2, #16]
+ 800621e:	4311      	orrs	r1, r2
+ 8006220:	683a      	ldr	r2, [r7, #0]
+ 8006222:	6952      	ldr	r2, [r2, #20]
+ 8006224:	4311      	orrs	r1, r2
+ 8006226:	683a      	ldr	r2, [r7, #0]
+ 8006228:	6992      	ldr	r2, [r2, #24]
+ 800622a:	4311      	orrs	r1, r2
+ 800622c:	683a      	ldr	r2, [r7, #0]
+ 800622e:	69d2      	ldr	r2, [r2, #28]
+ 8006230:	4311      	orrs	r1, r2
+ 8006232:	683a      	ldr	r2, [r7, #0]
+ 8006234:	6a12      	ldr	r2, [r2, #32]
+ 8006236:	4311      	orrs	r1, r2
+ 8006238:	683a      	ldr	r2, [r7, #0]
+ 800623a:	6a52      	ldr	r2, [r2, #36]	@ 0x24
+ 800623c:	430a      	orrs	r2, r1
+ 800623e:	431a      	orrs	r2, r3
+ 8006240:	687b      	ldr	r3, [r7, #4]
+ 8006242:	601a      	str	r2, [r3, #0]
+ 8006244:	e028      	b.n	8006298 <FMC_SDRAM_Init+0xac>
+                Init->ReadBurst          |
+                Init->ReadPipeDelay));
+  }
+  else /* FMC_Bank2_SDRAM */
+  {
+    MODIFY_REG(Device->SDCR[FMC_SDRAM_BANK1],
+ 8006246:	687b      	ldr	r3, [r7, #4]
+ 8006248:	681b      	ldr	r3, [r3, #0]
+ 800624a:	f423 42f8 	bic.w	r2, r3, #31744	@ 0x7c00
+ 800624e:	683b      	ldr	r3, [r7, #0]
+ 8006250:	69d9      	ldr	r1, [r3, #28]
+ 8006252:	683b      	ldr	r3, [r7, #0]
+ 8006254:	6a1b      	ldr	r3, [r3, #32]
+ 8006256:	4319      	orrs	r1, r3
+ 8006258:	683b      	ldr	r3, [r7, #0]
+ 800625a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 800625c:	430b      	orrs	r3, r1
+ 800625e:	431a      	orrs	r2, r3
+ 8006260:	687b      	ldr	r3, [r7, #4]
+ 8006262:	601a      	str	r2, [r3, #0]
+               FMC_SDCR1_RPIPE,
+               (Init->SDClockPeriod      |
+                Init->ReadBurst          |
+                Init->ReadPipeDelay));
+
+    MODIFY_REG(Device->SDCR[FMC_SDRAM_BANK2],
+ 8006264:	687b      	ldr	r3, [r7, #4]
+ 8006266:	685b      	ldr	r3, [r3, #4]
+ 8006268:	f423 43ff 	bic.w	r3, r3, #32640	@ 0x7f80
+ 800626c:	f023 037f 	bic.w	r3, r3, #127	@ 0x7f
+ 8006270:	683a      	ldr	r2, [r7, #0]
+ 8006272:	6851      	ldr	r1, [r2, #4]
+ 8006274:	683a      	ldr	r2, [r7, #0]
+ 8006276:	6892      	ldr	r2, [r2, #8]
+ 8006278:	4311      	orrs	r1, r2
+ 800627a:	683a      	ldr	r2, [r7, #0]
+ 800627c:	68d2      	ldr	r2, [r2, #12]
+ 800627e:	4311      	orrs	r1, r2
+ 8006280:	683a      	ldr	r2, [r7, #0]
+ 8006282:	6912      	ldr	r2, [r2, #16]
+ 8006284:	4311      	orrs	r1, r2
+ 8006286:	683a      	ldr	r2, [r7, #0]
+ 8006288:	6952      	ldr	r2, [r2, #20]
+ 800628a:	4311      	orrs	r1, r2
+ 800628c:	683a      	ldr	r2, [r7, #0]
+ 800628e:	6992      	ldr	r2, [r2, #24]
+ 8006290:	430a      	orrs	r2, r1
+ 8006292:	431a      	orrs	r2, r3
+ 8006294:	687b      	ldr	r3, [r7, #4]
+ 8006296:	605a      	str	r2, [r3, #4]
+                Init->InternalBankNumber |
+                Init->CASLatency         |
+                Init->WriteProtection));
+  }
+
+  return HAL_OK;
+ 8006298:	2300      	movs	r3, #0
+}
+ 800629a:	4618      	mov	r0, r3
+ 800629c:	370c      	adds	r7, #12
+ 800629e:	46bd      	mov	sp, r7
+ 80062a0:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80062a4:	4770      	bx	lr
+
+080062a6 <FMC_SDRAM_Timing_Init>:
+  * @param  Bank SDRAM bank number
+  * @retval HAL status
+  */
+HAL_StatusTypeDef FMC_SDRAM_Timing_Init(FMC_SDRAM_TypeDef *Device,
+                                        const FMC_SDRAM_TimingTypeDef *Timing, uint32_t Bank)
+{
+ 80062a6:	b480      	push	{r7}
+ 80062a8:	b085      	sub	sp, #20
+ 80062aa:	af00      	add	r7, sp, #0
+ 80062ac:	60f8      	str	r0, [r7, #12]
+ 80062ae:	60b9      	str	r1, [r7, #8]
+ 80062b0:	607a      	str	r2, [r7, #4]
+  assert_param(IS_FMC_RP_DELAY(Timing->RPDelay));
+  assert_param(IS_FMC_RCD_DELAY(Timing->RCDDelay));
+  assert_param(IS_FMC_SDRAM_BANK(Bank));
+
+  /* Set SDRAM device timing parameters */
+  if (Bank == FMC_SDRAM_BANK1)
+ 80062b2:	687b      	ldr	r3, [r7, #4]
+ 80062b4:	2b00      	cmp	r3, #0
+ 80062b6:	d128      	bne.n	800630a <FMC_SDRAM_Timing_Init+0x64>
+  {
+    MODIFY_REG(Device->SDTR[FMC_SDRAM_BANK1],
+ 80062b8:	68fb      	ldr	r3, [r7, #12]
+ 80062ba:	689b      	ldr	r3, [r3, #8]
+ 80062bc:	f003 4270 	and.w	r2, r3, #4026531840	@ 0xf0000000
+ 80062c0:	68bb      	ldr	r3, [r7, #8]
+ 80062c2:	681b      	ldr	r3, [r3, #0]
+ 80062c4:	1e59      	subs	r1, r3, #1
+ 80062c6:	68bb      	ldr	r3, [r7, #8]
+ 80062c8:	685b      	ldr	r3, [r3, #4]
+ 80062ca:	3b01      	subs	r3, #1
+ 80062cc:	011b      	lsls	r3, r3, #4
+ 80062ce:	4319      	orrs	r1, r3
+ 80062d0:	68bb      	ldr	r3, [r7, #8]
+ 80062d2:	689b      	ldr	r3, [r3, #8]
+ 80062d4:	3b01      	subs	r3, #1
+ 80062d6:	021b      	lsls	r3, r3, #8
+ 80062d8:	4319      	orrs	r1, r3
+ 80062da:	68bb      	ldr	r3, [r7, #8]
+ 80062dc:	68db      	ldr	r3, [r3, #12]
+ 80062de:	3b01      	subs	r3, #1
+ 80062e0:	031b      	lsls	r3, r3, #12
+ 80062e2:	4319      	orrs	r1, r3
+ 80062e4:	68bb      	ldr	r3, [r7, #8]
+ 80062e6:	691b      	ldr	r3, [r3, #16]
+ 80062e8:	3b01      	subs	r3, #1
+ 80062ea:	041b      	lsls	r3, r3, #16
+ 80062ec:	4319      	orrs	r1, r3
+ 80062ee:	68bb      	ldr	r3, [r7, #8]
+ 80062f0:	695b      	ldr	r3, [r3, #20]
+ 80062f2:	3b01      	subs	r3, #1
+ 80062f4:	051b      	lsls	r3, r3, #20
+ 80062f6:	4319      	orrs	r1, r3
+ 80062f8:	68bb      	ldr	r3, [r7, #8]
+ 80062fa:	699b      	ldr	r3, [r3, #24]
+ 80062fc:	3b01      	subs	r3, #1
+ 80062fe:	061b      	lsls	r3, r3, #24
+ 8006300:	430b      	orrs	r3, r1
+ 8006302:	431a      	orrs	r2, r3
+ 8006304:	68fb      	ldr	r3, [r7, #12]
+ 8006306:	609a      	str	r2, [r3, #8]
+ 8006308:	e02f      	b.n	800636a <FMC_SDRAM_Timing_Init+0xc4>
+                (((Timing->RPDelay) - 1U)              << FMC_SDTR1_TRP_Pos)  |
+                (((Timing->RCDDelay) - 1U)             << FMC_SDTR1_TRCD_Pos)));
+  }
+  else /* FMC_Bank2_SDRAM */
+  {
+    MODIFY_REG(Device->SDTR[FMC_SDRAM_BANK1],
+ 800630a:	68fb      	ldr	r3, [r7, #12]
+ 800630c:	689b      	ldr	r3, [r3, #8]
+ 800630e:	f423 0370 	bic.w	r3, r3, #15728640	@ 0xf00000
+ 8006312:	f423 4370 	bic.w	r3, r3, #61440	@ 0xf000
+ 8006316:	68ba      	ldr	r2, [r7, #8]
+ 8006318:	68d2      	ldr	r2, [r2, #12]
+ 800631a:	3a01      	subs	r2, #1
+ 800631c:	0311      	lsls	r1, r2, #12
+ 800631e:	68ba      	ldr	r2, [r7, #8]
+ 8006320:	6952      	ldr	r2, [r2, #20]
+ 8006322:	3a01      	subs	r2, #1
+ 8006324:	0512      	lsls	r2, r2, #20
+ 8006326:	430a      	orrs	r2, r1
+ 8006328:	431a      	orrs	r2, r3
+ 800632a:	68fb      	ldr	r3, [r7, #12]
+ 800632c:	609a      	str	r2, [r3, #8]
+               FMC_SDTR1_TRC |
+               FMC_SDTR1_TRP,
+               (((Timing->RowCycleDelay) - 1U)         << FMC_SDTR1_TRC_Pos)  |
+               (((Timing->RPDelay) - 1U)               << FMC_SDTR1_TRP_Pos));
+
+    MODIFY_REG(Device->SDTR[FMC_SDRAM_BANK2],
+ 800632e:	68fb      	ldr	r3, [r7, #12]
+ 8006330:	68db      	ldr	r3, [r3, #12]
+ 8006332:	f003 4270 	and.w	r2, r3, #4026531840	@ 0xf0000000
+ 8006336:	68bb      	ldr	r3, [r7, #8]
+ 8006338:	681b      	ldr	r3, [r3, #0]
+ 800633a:	1e59      	subs	r1, r3, #1
+ 800633c:	68bb      	ldr	r3, [r7, #8]
+ 800633e:	685b      	ldr	r3, [r3, #4]
+ 8006340:	3b01      	subs	r3, #1
+ 8006342:	011b      	lsls	r3, r3, #4
+ 8006344:	4319      	orrs	r1, r3
+ 8006346:	68bb      	ldr	r3, [r7, #8]
+ 8006348:	689b      	ldr	r3, [r3, #8]
+ 800634a:	3b01      	subs	r3, #1
+ 800634c:	021b      	lsls	r3, r3, #8
+ 800634e:	4319      	orrs	r1, r3
+ 8006350:	68bb      	ldr	r3, [r7, #8]
+ 8006352:	691b      	ldr	r3, [r3, #16]
+ 8006354:	3b01      	subs	r3, #1
+ 8006356:	041b      	lsls	r3, r3, #16
+ 8006358:	4319      	orrs	r1, r3
+ 800635a:	68bb      	ldr	r3, [r7, #8]
+ 800635c:	699b      	ldr	r3, [r3, #24]
+ 800635e:	3b01      	subs	r3, #1
+ 8006360:	061b      	lsls	r3, r3, #24
+ 8006362:	430b      	orrs	r3, r1
+ 8006364:	431a      	orrs	r2, r3
+ 8006366:	68fb      	ldr	r3, [r7, #12]
+ 8006368:	60da      	str	r2, [r3, #12]
+                (((Timing->SelfRefreshTime) - 1U)      << FMC_SDTR1_TRAS_Pos) |
+                (((Timing->WriteRecoveryTime) - 1U)    << FMC_SDTR1_TWR_Pos)  |
+                (((Timing->RCDDelay) - 1U)             << FMC_SDTR1_TRCD_Pos)));
+  }
+
+  return HAL_OK;
+ 800636a:	2300      	movs	r3, #0
+}
+ 800636c:	4618      	mov	r0, r3
+ 800636e:	3714      	adds	r7, #20
+ 8006370:	46bd      	mov	sp, r7
+ 8006372:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8006376:	4770      	bx	lr
+
+08006378 <USB_EnableGlobalInt>:
+  *         Enables the controller's Global Int in the AHB Config reg
+  * @param  USBx  Selected device
+  * @retval HAL status
+  */
+HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
+{
+ 8006378:	b480      	push	{r7}
+ 800637a:	b083      	sub	sp, #12
+ 800637c:	af00      	add	r7, sp, #0
+ 800637e:	6078      	str	r0, [r7, #4]
+  USBx->GAHBCFG |= USB_OTG_GAHBCFG_GINT;
+ 8006380:	687b      	ldr	r3, [r7, #4]
+ 8006382:	689b      	ldr	r3, [r3, #8]
+ 8006384:	f043 0201 	orr.w	r2, r3, #1
+ 8006388:	687b      	ldr	r3, [r7, #4]
+ 800638a:	609a      	str	r2, [r3, #8]
+  return HAL_OK;
+ 800638c:	2300      	movs	r3, #0
+}
+ 800638e:	4618      	mov	r0, r3
+ 8006390:	370c      	adds	r7, #12
+ 8006392:	46bd      	mov	sp, r7
+ 8006394:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8006398:	4770      	bx	lr
+
+0800639a <USB_DisableGlobalInt>:
+  *         Disable the controller's Global Int in the AHB Config reg
+  * @param  USBx  Selected device
+  * @retval HAL status
+  */
+HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
+{
+ 800639a:	b480      	push	{r7}
+ 800639c:	b083      	sub	sp, #12
+ 800639e:	af00      	add	r7, sp, #0
+ 80063a0:	6078      	str	r0, [r7, #4]
+  USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
+ 80063a2:	687b      	ldr	r3, [r7, #4]
+ 80063a4:	689b      	ldr	r3, [r3, #8]
+ 80063a6:	f023 0201 	bic.w	r2, r3, #1
+ 80063aa:	687b      	ldr	r3, [r7, #4]
+ 80063ac:	609a      	str	r2, [r3, #8]
+  return HAL_OK;
+ 80063ae:	2300      	movs	r3, #0
+}
+ 80063b0:	4618      	mov	r0, r3
+ 80063b2:	370c      	adds	r7, #12
+ 80063b4:	46bd      	mov	sp, r7
+ 80063b6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80063ba:	4770      	bx	lr
+
+080063bc <USB_FlushTxFifo>:
+  *         This parameter can be a value from 1 to 15
+            15 means Flush all Tx FIFOs
+  * @retval HAL status
+  */
+HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num)
+{
+ 80063bc:	b480      	push	{r7}
+ 80063be:	b085      	sub	sp, #20
+ 80063c0:	af00      	add	r7, sp, #0
+ 80063c2:	6078      	str	r0, [r7, #4]
+ 80063c4:	6039      	str	r1, [r7, #0]
+  __IO uint32_t count = 0U;
+ 80063c6:	2300      	movs	r3, #0
+ 80063c8:	60fb      	str	r3, [r7, #12]
+
+  /* Wait for AHB master IDLE state. */
+  do
+  {
+    count++;
+ 80063ca:	68fb      	ldr	r3, [r7, #12]
+ 80063cc:	3301      	adds	r3, #1
+ 80063ce:	60fb      	str	r3, [r7, #12]
+
+    if (count > HAL_USB_TIMEOUT)
+ 80063d0:	68fb      	ldr	r3, [r7, #12]
+ 80063d2:	f1b3 6f70 	cmp.w	r3, #251658240	@ 0xf000000
+ 80063d6:	d901      	bls.n	80063dc <USB_FlushTxFifo+0x20>
+    {
+      return HAL_TIMEOUT;
+ 80063d8:	2303      	movs	r3, #3
+ 80063da:	e01b      	b.n	8006414 <USB_FlushTxFifo+0x58>
+    }
+  } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
+ 80063dc:	687b      	ldr	r3, [r7, #4]
+ 80063de:	691b      	ldr	r3, [r3, #16]
+ 80063e0:	2b00      	cmp	r3, #0
+ 80063e2:	daf2      	bge.n	80063ca <USB_FlushTxFifo+0xe>
+
+  /* Flush TX Fifo */
+  count = 0U;
+ 80063e4:	2300      	movs	r3, #0
+ 80063e6:	60fb      	str	r3, [r7, #12]
+  USBx->GRSTCTL = (USB_OTG_GRSTCTL_TXFFLSH | (num << 6));
+ 80063e8:	683b      	ldr	r3, [r7, #0]
+ 80063ea:	019b      	lsls	r3, r3, #6
+ 80063ec:	f043 0220 	orr.w	r2, r3, #32
+ 80063f0:	687b      	ldr	r3, [r7, #4]
+ 80063f2:	611a      	str	r2, [r3, #16]
+
+  do
+  {
+    count++;
+ 80063f4:	68fb      	ldr	r3, [r7, #12]
+ 80063f6:	3301      	adds	r3, #1
+ 80063f8:	60fb      	str	r3, [r7, #12]
+
+    if (count > HAL_USB_TIMEOUT)
+ 80063fa:	68fb      	ldr	r3, [r7, #12]
+ 80063fc:	f1b3 6f70 	cmp.w	r3, #251658240	@ 0xf000000
+ 8006400:	d901      	bls.n	8006406 <USB_FlushTxFifo+0x4a>
+    {
+      return HAL_TIMEOUT;
+ 8006402:	2303      	movs	r3, #3
+ 8006404:	e006      	b.n	8006414 <USB_FlushTxFifo+0x58>
+    }
+  } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
+ 8006406:	687b      	ldr	r3, [r7, #4]
+ 8006408:	691b      	ldr	r3, [r3, #16]
+ 800640a:	f003 0320 	and.w	r3, r3, #32
+ 800640e:	2b20      	cmp	r3, #32
+ 8006410:	d0f0      	beq.n	80063f4 <USB_FlushTxFifo+0x38>
+
+  return HAL_OK;
+ 8006412:	2300      	movs	r3, #0
+}
+ 8006414:	4618      	mov	r0, r3
+ 8006416:	3714      	adds	r7, #20
+ 8006418:	46bd      	mov	sp, r7
+ 800641a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800641e:	4770      	bx	lr
+
+08006420 <USB_FlushRxFifo>:
+  * @brief  USB_FlushRxFifo  Flush Rx FIFO
+  * @param  USBx  Selected device
+  * @retval HAL status
+  */
+HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
+{
+ 8006420:	b480      	push	{r7}
+ 8006422:	b085      	sub	sp, #20
+ 8006424:	af00      	add	r7, sp, #0
+ 8006426:	6078      	str	r0, [r7, #4]
+  __IO uint32_t count = 0U;
+ 8006428:	2300      	movs	r3, #0
+ 800642a:	60fb      	str	r3, [r7, #12]
+
+  /* Wait for AHB master IDLE state. */
+  do
+  {
+    count++;
+ 800642c:	68fb      	ldr	r3, [r7, #12]
+ 800642e:	3301      	adds	r3, #1
+ 8006430:	60fb      	str	r3, [r7, #12]
+
+    if (count > HAL_USB_TIMEOUT)
+ 8006432:	68fb      	ldr	r3, [r7, #12]
+ 8006434:	f1b3 6f70 	cmp.w	r3, #251658240	@ 0xf000000
+ 8006438:	d901      	bls.n	800643e <USB_FlushRxFifo+0x1e>
+    {
+      return HAL_TIMEOUT;
+ 800643a:	2303      	movs	r3, #3
+ 800643c:	e018      	b.n	8006470 <USB_FlushRxFifo+0x50>
+    }
+  } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
+ 800643e:	687b      	ldr	r3, [r7, #4]
+ 8006440:	691b      	ldr	r3, [r3, #16]
+ 8006442:	2b00      	cmp	r3, #0
+ 8006444:	daf2      	bge.n	800642c <USB_FlushRxFifo+0xc>
+
+  /* Flush RX Fifo */
+  count = 0U;
+ 8006446:	2300      	movs	r3, #0
+ 8006448:	60fb      	str	r3, [r7, #12]
+  USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
+ 800644a:	687b      	ldr	r3, [r7, #4]
+ 800644c:	2210      	movs	r2, #16
+ 800644e:	611a      	str	r2, [r3, #16]
+
+  do
+  {
+    count++;
+ 8006450:	68fb      	ldr	r3, [r7, #12]
+ 8006452:	3301      	adds	r3, #1
+ 8006454:	60fb      	str	r3, [r7, #12]
+
+    if (count > HAL_USB_TIMEOUT)
+ 8006456:	68fb      	ldr	r3, [r7, #12]
+ 8006458:	f1b3 6f70 	cmp.w	r3, #251658240	@ 0xf000000
+ 800645c:	d901      	bls.n	8006462 <USB_FlushRxFifo+0x42>
+    {
+      return HAL_TIMEOUT;
+ 800645e:	2303      	movs	r3, #3
+ 8006460:	e006      	b.n	8006470 <USB_FlushRxFifo+0x50>
+    }
+  } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
+ 8006462:	687b      	ldr	r3, [r7, #4]
+ 8006464:	691b      	ldr	r3, [r3, #16]
+ 8006466:	f003 0310 	and.w	r3, r3, #16
+ 800646a:	2b10      	cmp	r3, #16
+ 800646c:	d0f0      	beq.n	8006450 <USB_FlushRxFifo+0x30>
+
+  return HAL_OK;
+ 800646e:	2300      	movs	r3, #0
+}
+ 8006470:	4618      	mov	r0, r3
+ 8006472:	3714      	adds	r7, #20
+ 8006474:	46bd      	mov	sp, r7
+ 8006476:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800647a:	4770      	bx	lr
+
+0800647c <USB_ReadPacket>:
+  * @param  dest  source pointer
+  * @param  len  Number of bytes to read
+  * @retval pointer to destination buffer
+  */
+void *USB_ReadPacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
+{
+ 800647c:	b480      	push	{r7}
+ 800647e:	b08b      	sub	sp, #44	@ 0x2c
+ 8006480:	af00      	add	r7, sp, #0
+ 8006482:	60f8      	str	r0, [r7, #12]
+ 8006484:	60b9      	str	r1, [r7, #8]
+ 8006486:	4613      	mov	r3, r2
+ 8006488:	80fb      	strh	r3, [r7, #6]
+  uint32_t USBx_BASE = (uint32_t)USBx;
+ 800648a:	68fb      	ldr	r3, [r7, #12]
+ 800648c:	61bb      	str	r3, [r7, #24]
+  uint8_t *pDest = dest;
+ 800648e:	68bb      	ldr	r3, [r7, #8]
+ 8006490:	627b      	str	r3, [r7, #36]	@ 0x24
+  uint32_t pData;
+  uint32_t i;
+  uint32_t count32b = (uint32_t)len >> 2U;
+ 8006492:	88fb      	ldrh	r3, [r7, #6]
+ 8006494:	089b      	lsrs	r3, r3, #2
+ 8006496:	b29b      	uxth	r3, r3
+ 8006498:	617b      	str	r3, [r7, #20]
+  uint16_t remaining_bytes = len % 4U;
+ 800649a:	88fb      	ldrh	r3, [r7, #6]
+ 800649c:	f003 0303 	and.w	r3, r3, #3
+ 80064a0:	83fb      	strh	r3, [r7, #30]
+
+  for (i = 0U; i < count32b; i++)
+ 80064a2:	2300      	movs	r3, #0
+ 80064a4:	623b      	str	r3, [r7, #32]
+ 80064a6:	e014      	b.n	80064d2 <USB_ReadPacket+0x56>
+  {
+    __UNALIGNED_UINT32_WRITE(pDest, USBx_DFIFO(0U));
+ 80064a8:	69bb      	ldr	r3, [r7, #24]
+ 80064aa:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
+ 80064ae:	681a      	ldr	r2, [r3, #0]
+ 80064b0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+ 80064b2:	601a      	str	r2, [r3, #0]
+    pDest++;
+ 80064b4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+ 80064b6:	3301      	adds	r3, #1
+ 80064b8:	627b      	str	r3, [r7, #36]	@ 0x24
+    pDest++;
+ 80064ba:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+ 80064bc:	3301      	adds	r3, #1
+ 80064be:	627b      	str	r3, [r7, #36]	@ 0x24
+    pDest++;
+ 80064c0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+ 80064c2:	3301      	adds	r3, #1
+ 80064c4:	627b      	str	r3, [r7, #36]	@ 0x24
+    pDest++;
+ 80064c6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+ 80064c8:	3301      	adds	r3, #1
+ 80064ca:	627b      	str	r3, [r7, #36]	@ 0x24
+  for (i = 0U; i < count32b; i++)
+ 80064cc:	6a3b      	ldr	r3, [r7, #32]
+ 80064ce:	3301      	adds	r3, #1
+ 80064d0:	623b      	str	r3, [r7, #32]
+ 80064d2:	6a3a      	ldr	r2, [r7, #32]
+ 80064d4:	697b      	ldr	r3, [r7, #20]
+ 80064d6:	429a      	cmp	r2, r3
+ 80064d8:	d3e6      	bcc.n	80064a8 <USB_ReadPacket+0x2c>
+  }
+
+  /* When Number of data is not word aligned, read the remaining byte */
+  if (remaining_bytes != 0U)
+ 80064da:	8bfb      	ldrh	r3, [r7, #30]
+ 80064dc:	2b00      	cmp	r3, #0
+ 80064de:	d01e      	beq.n	800651e <USB_ReadPacket+0xa2>
+  {
+    i = 0U;
+ 80064e0:	2300      	movs	r3, #0
+ 80064e2:	623b      	str	r3, [r7, #32]
+    __UNALIGNED_UINT32_WRITE(&pData, USBx_DFIFO(0U));
+ 80064e4:	69bb      	ldr	r3, [r7, #24]
+ 80064e6:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
+ 80064ea:	461a      	mov	r2, r3
+ 80064ec:	f107 0310 	add.w	r3, r7, #16
+ 80064f0:	6812      	ldr	r2, [r2, #0]
+ 80064f2:	601a      	str	r2, [r3, #0]
+
+    do
+    {
+      *(uint8_t *)pDest = (uint8_t)(pData >> (8U * (uint8_t)(i)));
+ 80064f4:	693a      	ldr	r2, [r7, #16]
+ 80064f6:	6a3b      	ldr	r3, [r7, #32]
+ 80064f8:	b2db      	uxtb	r3, r3
+ 80064fa:	00db      	lsls	r3, r3, #3
+ 80064fc:	fa22 f303 	lsr.w	r3, r2, r3
+ 8006500:	b2da      	uxtb	r2, r3
+ 8006502:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+ 8006504:	701a      	strb	r2, [r3, #0]
+      i++;
+ 8006506:	6a3b      	ldr	r3, [r7, #32]
+ 8006508:	3301      	adds	r3, #1
+ 800650a:	623b      	str	r3, [r7, #32]
+      pDest++;
+ 800650c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+ 800650e:	3301      	adds	r3, #1
+ 8006510:	627b      	str	r3, [r7, #36]	@ 0x24
+      remaining_bytes--;
+ 8006512:	8bfb      	ldrh	r3, [r7, #30]
+ 8006514:	3b01      	subs	r3, #1
+ 8006516:	83fb      	strh	r3, [r7, #30]
+    } while (remaining_bytes != 0U);
+ 8006518:	8bfb      	ldrh	r3, [r7, #30]
+ 800651a:	2b00      	cmp	r3, #0
+ 800651c:	d1ea      	bne.n	80064f4 <USB_ReadPacket+0x78>
+  }
+
+  return ((void *)pDest);
+ 800651e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
+}
+ 8006520:	4618      	mov	r0, r3
+ 8006522:	372c      	adds	r7, #44	@ 0x2c
+ 8006524:	46bd      	mov	sp, r7
+ 8006526:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800652a:	4770      	bx	lr
+
+0800652c <USB_ReadInterrupts>:
+  * @brief  USB_ReadInterrupts: return the global USB interrupt status
+  * @param  USBx  Selected device
+  * @retval USB Global Interrupt status
+  */
+uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef const *USBx)
+{
+ 800652c:	b480      	push	{r7}
+ 800652e:	b085      	sub	sp, #20
+ 8006530:	af00      	add	r7, sp, #0
+ 8006532:	6078      	str	r0, [r7, #4]
+  uint32_t tmpreg;
+
+  tmpreg = USBx->GINTSTS;
+ 8006534:	687b      	ldr	r3, [r7, #4]
+ 8006536:	695b      	ldr	r3, [r3, #20]
+ 8006538:	60fb      	str	r3, [r7, #12]
+  tmpreg &= USBx->GINTMSK;
+ 800653a:	687b      	ldr	r3, [r7, #4]
+ 800653c:	699b      	ldr	r3, [r3, #24]
+ 800653e:	68fa      	ldr	r2, [r7, #12]
+ 8006540:	4013      	ands	r3, r2
+ 8006542:	60fb      	str	r3, [r7, #12]
+
+  return tmpreg;
+ 8006544:	68fb      	ldr	r3, [r7, #12]
+}
+ 8006546:	4618      	mov	r0, r3
+ 8006548:	3714      	adds	r7, #20
+ 800654a:	46bd      	mov	sp, r7
+ 800654c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8006550:	4770      	bx	lr
+
+08006552 <USB_ReadChInterrupts>:
+  * @param  USBx  Selected device
+  * @param  chnum Channel number
+  * @retval USB Channel Interrupt status
+  */
+uint32_t USB_ReadChInterrupts(const USB_OTG_GlobalTypeDef *USBx, uint8_t chnum)
+{
+ 8006552:	b480      	push	{r7}
+ 8006554:	b085      	sub	sp, #20
+ 8006556:	af00      	add	r7, sp, #0
+ 8006558:	6078      	str	r0, [r7, #4]
+ 800655a:	460b      	mov	r3, r1
+ 800655c:	70fb      	strb	r3, [r7, #3]
+  uint32_t USBx_BASE = (uint32_t)USBx;
+ 800655e:	687b      	ldr	r3, [r7, #4]
+ 8006560:	60fb      	str	r3, [r7, #12]
+  uint32_t tmpreg;
+
+  tmpreg = USBx_HC(chnum)->HCINT;
+ 8006562:	78fb      	ldrb	r3, [r7, #3]
+ 8006564:	015a      	lsls	r2, r3, #5
+ 8006566:	68fb      	ldr	r3, [r7, #12]
+ 8006568:	4413      	add	r3, r2
+ 800656a:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800656e:	689b      	ldr	r3, [r3, #8]
+ 8006570:	60bb      	str	r3, [r7, #8]
+  tmpreg &= USBx_HC(chnum)->HCINTMSK;
+ 8006572:	78fb      	ldrb	r3, [r7, #3]
+ 8006574:	015a      	lsls	r2, r3, #5
+ 8006576:	68fb      	ldr	r3, [r7, #12]
+ 8006578:	4413      	add	r3, r2
+ 800657a:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800657e:	68db      	ldr	r3, [r3, #12]
+ 8006580:	68ba      	ldr	r2, [r7, #8]
+ 8006582:	4013      	ands	r3, r2
+ 8006584:	60bb      	str	r3, [r7, #8]
+
+  return tmpreg;
+ 8006586:	68bb      	ldr	r3, [r7, #8]
+}
+ 8006588:	4618      	mov	r0, r3
+ 800658a:	3714      	adds	r7, #20
+ 800658c:	46bd      	mov	sp, r7
+ 800658e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8006592:	4770      	bx	lr
+
+08006594 <USB_GetMode>:
+  *          This parameter can be one of these values:
+  *           1 : Host
+  *           0 : Device
+  */
+uint32_t USB_GetMode(const USB_OTG_GlobalTypeDef *USBx)
+{
+ 8006594:	b480      	push	{r7}
+ 8006596:	b083      	sub	sp, #12
+ 8006598:	af00      	add	r7, sp, #0
+ 800659a:	6078      	str	r0, [r7, #4]
+  return ((USBx->GINTSTS) & 0x1U);
+ 800659c:	687b      	ldr	r3, [r7, #4]
+ 800659e:	695b      	ldr	r3, [r3, #20]
+ 80065a0:	f003 0301 	and.w	r3, r3, #1
+}
+ 80065a4:	4618      	mov	r0, r3
+ 80065a6:	370c      	adds	r7, #12
+ 80065a8:	46bd      	mov	sp, r7
+ 80065aa:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80065ae:	4770      	bx	lr
+
+080065b0 <USB_InitFSLSPClkSel>:
+  *           HCFG_48_MHZ : Full Speed 48 MHz Clock
+  *           HCFG_6_MHZ : Low Speed 6 MHz Clock
+  * @retval HAL status
+  */
+HAL_StatusTypeDef USB_InitFSLSPClkSel(const USB_OTG_GlobalTypeDef *USBx, uint8_t freq)
+{
+ 80065b0:	b480      	push	{r7}
+ 80065b2:	b085      	sub	sp, #20
+ 80065b4:	af00      	add	r7, sp, #0
+ 80065b6:	6078      	str	r0, [r7, #4]
+ 80065b8:	460b      	mov	r3, r1
+ 80065ba:	70fb      	strb	r3, [r7, #3]
+  uint32_t USBx_BASE = (uint32_t)USBx;
+ 80065bc:	687b      	ldr	r3, [r7, #4]
+ 80065be:	60fb      	str	r3, [r7, #12]
+
+  USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSPCS);
+ 80065c0:	68fb      	ldr	r3, [r7, #12]
+ 80065c2:	f503 6380 	add.w	r3, r3, #1024	@ 0x400
+ 80065c6:	681b      	ldr	r3, [r3, #0]
+ 80065c8:	68fa      	ldr	r2, [r7, #12]
+ 80065ca:	f502 6280 	add.w	r2, r2, #1024	@ 0x400
+ 80065ce:	f023 0303 	bic.w	r3, r3, #3
+ 80065d2:	6013      	str	r3, [r2, #0]
+  USBx_HOST->HCFG |= (uint32_t)freq & USB_OTG_HCFG_FSLSPCS;
+ 80065d4:	68fb      	ldr	r3, [r7, #12]
+ 80065d6:	f503 6380 	add.w	r3, r3, #1024	@ 0x400
+ 80065da:	681a      	ldr	r2, [r3, #0]
+ 80065dc:	78fb      	ldrb	r3, [r7, #3]
+ 80065de:	f003 0303 	and.w	r3, r3, #3
+ 80065e2:	68f9      	ldr	r1, [r7, #12]
+ 80065e4:	f501 6180 	add.w	r1, r1, #1024	@ 0x400
+ 80065e8:	4313      	orrs	r3, r2
+ 80065ea:	600b      	str	r3, [r1, #0]
+
+  if (freq == HCFG_48_MHZ)
+ 80065ec:	78fb      	ldrb	r3, [r7, #3]
+ 80065ee:	2b01      	cmp	r3, #1
+ 80065f0:	d107      	bne.n	8006602 <USB_InitFSLSPClkSel+0x52>
+  {
+    USBx_HOST->HFIR = HFIR_48_MHZ;
+ 80065f2:	68fb      	ldr	r3, [r7, #12]
+ 80065f4:	f503 6380 	add.w	r3, r3, #1024	@ 0x400
+ 80065f8:	461a      	mov	r2, r3
+ 80065fa:	f64b 3380 	movw	r3, #48000	@ 0xbb80
+ 80065fe:	6053      	str	r3, [r2, #4]
+ 8006600:	e00c      	b.n	800661c <USB_InitFSLSPClkSel+0x6c>
+  }
+  else if (freq == HCFG_6_MHZ)
+ 8006602:	78fb      	ldrb	r3, [r7, #3]
+ 8006604:	2b02      	cmp	r3, #2
+ 8006606:	d107      	bne.n	8006618 <USB_InitFSLSPClkSel+0x68>
+  {
+    USBx_HOST->HFIR = HFIR_6_MHZ;
+ 8006608:	68fb      	ldr	r3, [r7, #12]
+ 800660a:	f503 6380 	add.w	r3, r3, #1024	@ 0x400
+ 800660e:	461a      	mov	r2, r3
+ 8006610:	f241 7370 	movw	r3, #6000	@ 0x1770
+ 8006614:	6053      	str	r3, [r2, #4]
+ 8006616:	e001      	b.n	800661c <USB_InitFSLSPClkSel+0x6c>
+  }
+  else
+  {
+    return HAL_ERROR;
+ 8006618:	2301      	movs	r3, #1
+ 800661a:	e000      	b.n	800661e <USB_InitFSLSPClkSel+0x6e>
+  }
+
+  return HAL_OK;
+ 800661c:	2300      	movs	r3, #0
+}
+ 800661e:	4618      	mov	r0, r3
+ 8006620:	3714      	adds	r7, #20
+ 8006622:	46bd      	mov	sp, r7
+ 8006624:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8006628:	4770      	bx	lr
+
+0800662a <USB_HC_ReadInterrupt>:
+  * @brief Read all host channel interrupts status
+  * @param  USBx  Selected device
+  * @retval HAL state
+  */
+uint32_t USB_HC_ReadInterrupt(const USB_OTG_GlobalTypeDef *USBx)
+{
+ 800662a:	b480      	push	{r7}
+ 800662c:	b085      	sub	sp, #20
+ 800662e:	af00      	add	r7, sp, #0
+ 8006630:	6078      	str	r0, [r7, #4]
+  uint32_t USBx_BASE = (uint32_t)USBx;
+ 8006632:	687b      	ldr	r3, [r7, #4]
+ 8006634:	60fb      	str	r3, [r7, #12]
+
+  return ((USBx_HOST->HAINT) & 0xFFFFU);
+ 8006636:	68fb      	ldr	r3, [r7, #12]
+ 8006638:	f503 6380 	add.w	r3, r3, #1024	@ 0x400
+ 800663c:	695b      	ldr	r3, [r3, #20]
+ 800663e:	b29b      	uxth	r3, r3
+}
+ 8006640:	4618      	mov	r0, r3
+ 8006642:	3714      	adds	r7, #20
+ 8006644:	46bd      	mov	sp, r7
+ 8006646:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800664a:	4770      	bx	lr
+
+0800664c <USB_HC_Halt>:
+  * @param  hc_num  Host Channel number
+  *         This parameter can be a value from 1 to 15
+  * @retval HAL state
+  */
+HAL_StatusTypeDef USB_HC_Halt(const USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num)
+{
+ 800664c:	b480      	push	{r7}
+ 800664e:	b089      	sub	sp, #36	@ 0x24
+ 8006650:	af00      	add	r7, sp, #0
+ 8006652:	6078      	str	r0, [r7, #4]
+ 8006654:	460b      	mov	r3, r1
+ 8006656:	70fb      	strb	r3, [r7, #3]
+  uint32_t USBx_BASE = (uint32_t)USBx;
+ 8006658:	687b      	ldr	r3, [r7, #4]
+ 800665a:	61fb      	str	r3, [r7, #28]
+  uint32_t hcnum = (uint32_t)hc_num;
+ 800665c:	78fb      	ldrb	r3, [r7, #3]
+ 800665e:	61bb      	str	r3, [r7, #24]
+  __IO uint32_t count = 0U;
+ 8006660:	2300      	movs	r3, #0
+ 8006662:	60bb      	str	r3, [r7, #8]
+  uint32_t HcEpType = (USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_EPTYP) >> 18;
+ 8006664:	69bb      	ldr	r3, [r7, #24]
+ 8006666:	015a      	lsls	r2, r3, #5
+ 8006668:	69fb      	ldr	r3, [r7, #28]
+ 800666a:	4413      	add	r3, r2
+ 800666c:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8006670:	681b      	ldr	r3, [r3, #0]
+ 8006672:	0c9b      	lsrs	r3, r3, #18
+ 8006674:	f003 0303 	and.w	r3, r3, #3
+ 8006678:	617b      	str	r3, [r7, #20]
+  uint32_t ChannelEna = (USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) >> 31;
+ 800667a:	69bb      	ldr	r3, [r7, #24]
+ 800667c:	015a      	lsls	r2, r3, #5
+ 800667e:	69fb      	ldr	r3, [r7, #28]
+ 8006680:	4413      	add	r3, r2
+ 8006682:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8006686:	681b      	ldr	r3, [r3, #0]
+ 8006688:	0fdb      	lsrs	r3, r3, #31
+ 800668a:	f003 0301 	and.w	r3, r3, #1
+ 800668e:	613b      	str	r3, [r7, #16]
+  uint32_t SplitEna = (USBx_HC(hcnum)->HCSPLT & USB_OTG_HCSPLT_SPLITEN) >> 31;
+ 8006690:	69bb      	ldr	r3, [r7, #24]
+ 8006692:	015a      	lsls	r2, r3, #5
+ 8006694:	69fb      	ldr	r3, [r7, #28]
+ 8006696:	4413      	add	r3, r2
+ 8006698:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800669c:	685b      	ldr	r3, [r3, #4]
+ 800669e:	0fdb      	lsrs	r3, r3, #31
+ 80066a0:	f003 0301 	and.w	r3, r3, #1
+ 80066a4:	60fb      	str	r3, [r7, #12]
+
+  /* In buffer DMA, Channel disable must not be programmed for non-split periodic channels.
+     At the end of the next uframe/frame (in the worst case), the core generates a channel halted
+     and disables the channel automatically. */
+
+  if ((((USBx->GAHBCFG & USB_OTG_GAHBCFG_DMAEN) == USB_OTG_GAHBCFG_DMAEN) && (SplitEna == 0U)) &&
+ 80066a6:	687b      	ldr	r3, [r7, #4]
+ 80066a8:	689b      	ldr	r3, [r3, #8]
+ 80066aa:	f003 0320 	and.w	r3, r3, #32
+ 80066ae:	2b20      	cmp	r3, #32
+ 80066b0:	d10d      	bne.n	80066ce <USB_HC_Halt+0x82>
+ 80066b2:	68fb      	ldr	r3, [r7, #12]
+ 80066b4:	2b00      	cmp	r3, #0
+ 80066b6:	d10a      	bne.n	80066ce <USB_HC_Halt+0x82>
+ 80066b8:	693b      	ldr	r3, [r7, #16]
+ 80066ba:	2b00      	cmp	r3, #0
+ 80066bc:	d005      	beq.n	80066ca <USB_HC_Halt+0x7e>
+      ((ChannelEna == 0U) || (((HcEpType == HCCHAR_ISOC) || (HcEpType == HCCHAR_INTR)))))
+ 80066be:	697b      	ldr	r3, [r7, #20]
+ 80066c0:	2b01      	cmp	r3, #1
+ 80066c2:	d002      	beq.n	80066ca <USB_HC_Halt+0x7e>
+ 80066c4:	697b      	ldr	r3, [r7, #20]
+ 80066c6:	2b03      	cmp	r3, #3
+ 80066c8:	d101      	bne.n	80066ce <USB_HC_Halt+0x82>
+  {
+    return HAL_OK;
+ 80066ca:	2300      	movs	r3, #0
+ 80066cc:	e0d8      	b.n	8006880 <USB_HC_Halt+0x234>
+  }
+
+  /* Check for space in the request queue to issue the halt. */
+  if ((HcEpType == HCCHAR_CTRL) || (HcEpType == HCCHAR_BULK))
+ 80066ce:	697b      	ldr	r3, [r7, #20]
+ 80066d0:	2b00      	cmp	r3, #0
+ 80066d2:	d002      	beq.n	80066da <USB_HC_Halt+0x8e>
+ 80066d4:	697b      	ldr	r3, [r7, #20]
+ 80066d6:	2b02      	cmp	r3, #2
+ 80066d8:	d173      	bne.n	80067c2 <USB_HC_Halt+0x176>
+  {
+    USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
+ 80066da:	69bb      	ldr	r3, [r7, #24]
+ 80066dc:	015a      	lsls	r2, r3, #5
+ 80066de:	69fb      	ldr	r3, [r7, #28]
+ 80066e0:	4413      	add	r3, r2
+ 80066e2:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80066e6:	681b      	ldr	r3, [r3, #0]
+ 80066e8:	69ba      	ldr	r2, [r7, #24]
+ 80066ea:	0151      	lsls	r1, r2, #5
+ 80066ec:	69fa      	ldr	r2, [r7, #28]
+ 80066ee:	440a      	add	r2, r1
+ 80066f0:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 80066f4:	f043 4380 	orr.w	r3, r3, #1073741824	@ 0x40000000
+ 80066f8:	6013      	str	r3, [r2, #0]
+
+    if ((USBx->GAHBCFG & USB_OTG_GAHBCFG_DMAEN) == 0U)
+ 80066fa:	687b      	ldr	r3, [r7, #4]
+ 80066fc:	689b      	ldr	r3, [r3, #8]
+ 80066fe:	f003 0320 	and.w	r3, r3, #32
+ 8006702:	2b00      	cmp	r3, #0
+ 8006704:	d14a      	bne.n	800679c <USB_HC_Halt+0x150>
+    {
+      if ((USBx->HNPTXSTS & (0xFFU << 16)) == 0U)
+ 8006706:	687b      	ldr	r3, [r7, #4]
+ 8006708:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 800670a:	f403 037f 	and.w	r3, r3, #16711680	@ 0xff0000
+ 800670e:	2b00      	cmp	r3, #0
+ 8006710:	d133      	bne.n	800677a <USB_HC_Halt+0x12e>
+      {
+        USBx_HC(hcnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
+ 8006712:	69bb      	ldr	r3, [r7, #24]
+ 8006714:	015a      	lsls	r2, r3, #5
+ 8006716:	69fb      	ldr	r3, [r7, #28]
+ 8006718:	4413      	add	r3, r2
+ 800671a:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800671e:	681b      	ldr	r3, [r3, #0]
+ 8006720:	69ba      	ldr	r2, [r7, #24]
+ 8006722:	0151      	lsls	r1, r2, #5
+ 8006724:	69fa      	ldr	r2, [r7, #28]
+ 8006726:	440a      	add	r2, r1
+ 8006728:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 800672c:	f023 4300 	bic.w	r3, r3, #2147483648	@ 0x80000000
+ 8006730:	6013      	str	r3, [r2, #0]
+        USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
+ 8006732:	69bb      	ldr	r3, [r7, #24]
+ 8006734:	015a      	lsls	r2, r3, #5
+ 8006736:	69fb      	ldr	r3, [r7, #28]
+ 8006738:	4413      	add	r3, r2
+ 800673a:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800673e:	681b      	ldr	r3, [r3, #0]
+ 8006740:	69ba      	ldr	r2, [r7, #24]
+ 8006742:	0151      	lsls	r1, r2, #5
+ 8006744:	69fa      	ldr	r2, [r7, #28]
+ 8006746:	440a      	add	r2, r1
+ 8006748:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 800674c:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
+ 8006750:	6013      	str	r3, [r2, #0]
+        do
+        {
+          count++;
+ 8006752:	68bb      	ldr	r3, [r7, #8]
+ 8006754:	3301      	adds	r3, #1
+ 8006756:	60bb      	str	r3, [r7, #8]
+
+          if (count > 1000U)
+ 8006758:	68bb      	ldr	r3, [r7, #8]
+ 800675a:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
+ 800675e:	d82e      	bhi.n	80067be <USB_HC_Halt+0x172>
+          {
+            break;
+          }
+        } while ((USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
+ 8006760:	69bb      	ldr	r3, [r7, #24]
+ 8006762:	015a      	lsls	r2, r3, #5
+ 8006764:	69fb      	ldr	r3, [r7, #28]
+ 8006766:	4413      	add	r3, r2
+ 8006768:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800676c:	681b      	ldr	r3, [r3, #0]
+ 800676e:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
+ 8006772:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
+ 8006776:	d0ec      	beq.n	8006752 <USB_HC_Halt+0x106>
+    if ((USBx->GAHBCFG & USB_OTG_GAHBCFG_DMAEN) == 0U)
+ 8006778:	e081      	b.n	800687e <USB_HC_Halt+0x232>
+      }
+      else
+      {
+        USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
+ 800677a:	69bb      	ldr	r3, [r7, #24]
+ 800677c:	015a      	lsls	r2, r3, #5
+ 800677e:	69fb      	ldr	r3, [r7, #28]
+ 8006780:	4413      	add	r3, r2
+ 8006782:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8006786:	681b      	ldr	r3, [r3, #0]
+ 8006788:	69ba      	ldr	r2, [r7, #24]
+ 800678a:	0151      	lsls	r1, r2, #5
+ 800678c:	69fa      	ldr	r2, [r7, #28]
+ 800678e:	440a      	add	r2, r1
+ 8006790:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 8006794:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
+ 8006798:	6013      	str	r3, [r2, #0]
+    if ((USBx->GAHBCFG & USB_OTG_GAHBCFG_DMAEN) == 0U)
+ 800679a:	e070      	b.n	800687e <USB_HC_Halt+0x232>
+      }
+    }
+    else
+    {
+      USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
+ 800679c:	69bb      	ldr	r3, [r7, #24]
+ 800679e:	015a      	lsls	r2, r3, #5
+ 80067a0:	69fb      	ldr	r3, [r7, #28]
+ 80067a2:	4413      	add	r3, r2
+ 80067a4:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80067a8:	681b      	ldr	r3, [r3, #0]
+ 80067aa:	69ba      	ldr	r2, [r7, #24]
+ 80067ac:	0151      	lsls	r1, r2, #5
+ 80067ae:	69fa      	ldr	r2, [r7, #28]
+ 80067b0:	440a      	add	r2, r1
+ 80067b2:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 80067b6:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
+ 80067ba:	6013      	str	r3, [r2, #0]
+    if ((USBx->GAHBCFG & USB_OTG_GAHBCFG_DMAEN) == 0U)
+ 80067bc:	e05f      	b.n	800687e <USB_HC_Halt+0x232>
+            break;
+ 80067be:	bf00      	nop
+    if ((USBx->GAHBCFG & USB_OTG_GAHBCFG_DMAEN) == 0U)
+ 80067c0:	e05d      	b.n	800687e <USB_HC_Halt+0x232>
+    }
+  }
+  else
+  {
+    USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
+ 80067c2:	69bb      	ldr	r3, [r7, #24]
+ 80067c4:	015a      	lsls	r2, r3, #5
+ 80067c6:	69fb      	ldr	r3, [r7, #28]
+ 80067c8:	4413      	add	r3, r2
+ 80067ca:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80067ce:	681b      	ldr	r3, [r3, #0]
+ 80067d0:	69ba      	ldr	r2, [r7, #24]
+ 80067d2:	0151      	lsls	r1, r2, #5
+ 80067d4:	69fa      	ldr	r2, [r7, #28]
+ 80067d6:	440a      	add	r2, r1
+ 80067d8:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 80067dc:	f043 4380 	orr.w	r3, r3, #1073741824	@ 0x40000000
+ 80067e0:	6013      	str	r3, [r2, #0]
+
+    if ((USBx_HOST->HPTXSTS & (0xFFU << 16)) == 0U)
+ 80067e2:	69fb      	ldr	r3, [r7, #28]
+ 80067e4:	f503 6380 	add.w	r3, r3, #1024	@ 0x400
+ 80067e8:	691b      	ldr	r3, [r3, #16]
+ 80067ea:	f403 037f 	and.w	r3, r3, #16711680	@ 0xff0000
+ 80067ee:	2b00      	cmp	r3, #0
+ 80067f0:	d133      	bne.n	800685a <USB_HC_Halt+0x20e>
+    {
+      USBx_HC(hcnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
+ 80067f2:	69bb      	ldr	r3, [r7, #24]
+ 80067f4:	015a      	lsls	r2, r3, #5
+ 80067f6:	69fb      	ldr	r3, [r7, #28]
+ 80067f8:	4413      	add	r3, r2
+ 80067fa:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80067fe:	681b      	ldr	r3, [r3, #0]
+ 8006800:	69ba      	ldr	r2, [r7, #24]
+ 8006802:	0151      	lsls	r1, r2, #5
+ 8006804:	69fa      	ldr	r2, [r7, #28]
+ 8006806:	440a      	add	r2, r1
+ 8006808:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 800680c:	f023 4300 	bic.w	r3, r3, #2147483648	@ 0x80000000
+ 8006810:	6013      	str	r3, [r2, #0]
+      USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
+ 8006812:	69bb      	ldr	r3, [r7, #24]
+ 8006814:	015a      	lsls	r2, r3, #5
+ 8006816:	69fb      	ldr	r3, [r7, #28]
+ 8006818:	4413      	add	r3, r2
+ 800681a:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800681e:	681b      	ldr	r3, [r3, #0]
+ 8006820:	69ba      	ldr	r2, [r7, #24]
+ 8006822:	0151      	lsls	r1, r2, #5
+ 8006824:	69fa      	ldr	r2, [r7, #28]
+ 8006826:	440a      	add	r2, r1
+ 8006828:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 800682c:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
+ 8006830:	6013      	str	r3, [r2, #0]
+      do
+      {
+        count++;
+ 8006832:	68bb      	ldr	r3, [r7, #8]
+ 8006834:	3301      	adds	r3, #1
+ 8006836:	60bb      	str	r3, [r7, #8]
+
+        if (count > 1000U)
+ 8006838:	68bb      	ldr	r3, [r7, #8]
+ 800683a:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
+ 800683e:	d81d      	bhi.n	800687c <USB_HC_Halt+0x230>
+        {
+          break;
+        }
+      } while ((USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
+ 8006840:	69bb      	ldr	r3, [r7, #24]
+ 8006842:	015a      	lsls	r2, r3, #5
+ 8006844:	69fb      	ldr	r3, [r7, #28]
+ 8006846:	4413      	add	r3, r2
+ 8006848:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800684c:	681b      	ldr	r3, [r3, #0]
+ 800684e:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
+ 8006852:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
+ 8006856:	d0ec      	beq.n	8006832 <USB_HC_Halt+0x1e6>
+ 8006858:	e011      	b.n	800687e <USB_HC_Halt+0x232>
+    }
+    else
+    {
+      USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
+ 800685a:	69bb      	ldr	r3, [r7, #24]
+ 800685c:	015a      	lsls	r2, r3, #5
+ 800685e:	69fb      	ldr	r3, [r7, #28]
+ 8006860:	4413      	add	r3, r2
+ 8006862:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8006866:	681b      	ldr	r3, [r3, #0]
+ 8006868:	69ba      	ldr	r2, [r7, #24]
+ 800686a:	0151      	lsls	r1, r2, #5
+ 800686c:	69fa      	ldr	r2, [r7, #28]
+ 800686e:	440a      	add	r2, r1
+ 8006870:	f502 62a0 	add.w	r2, r2, #1280	@ 0x500
+ 8006874:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
+ 8006878:	6013      	str	r3, [r2, #0]
+ 800687a:	e000      	b.n	800687e <USB_HC_Halt+0x232>
+          break;
+ 800687c:	bf00      	nop
+    }
+  }
+
+  return HAL_OK;
+ 800687e:	2300      	movs	r3, #0
+}
+ 8006880:	4618      	mov	r0, r3
+ 8006882:	3724      	adds	r7, #36	@ 0x24
+ 8006884:	46bd      	mov	sp, r7
+ 8006886:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800688a:	4770      	bx	lr
+
+0800688c <USB_StopHost>:
+  * @brief  Stop Host Core
+  * @param  USBx  Selected device
+  * @retval HAL state
+  */
+HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx)
+{
+ 800688c:	b580      	push	{r7, lr}
+ 800688e:	b088      	sub	sp, #32
+ 8006890:	af00      	add	r7, sp, #0
+ 8006892:	6078      	str	r0, [r7, #4]
+  HAL_StatusTypeDef ret = HAL_OK;
+ 8006894:	2300      	movs	r3, #0
+ 8006896:	77fb      	strb	r3, [r7, #31]
+  uint32_t USBx_BASE = (uint32_t)USBx;
+ 8006898:	687b      	ldr	r3, [r7, #4]
+ 800689a:	617b      	str	r3, [r7, #20]
+  __IO uint32_t count = 0U;
+ 800689c:	2300      	movs	r3, #0
+ 800689e:	60fb      	str	r3, [r7, #12]
+  uint32_t value;
+  uint32_t i;
+
+  (void)USB_DisableGlobalInt(USBx);
+ 80068a0:	6878      	ldr	r0, [r7, #4]
+ 80068a2:	f7ff fd7a 	bl	800639a <USB_DisableGlobalInt>
+
+  /* Flush USB FIFO */
+  if (USB_FlushTxFifo(USBx, 0x10U) != HAL_OK) /* all Tx FIFOs */
+ 80068a6:	2110      	movs	r1, #16
+ 80068a8:	6878      	ldr	r0, [r7, #4]
+ 80068aa:	f7ff fd87 	bl	80063bc <USB_FlushTxFifo>
+ 80068ae:	4603      	mov	r3, r0
+ 80068b0:	2b00      	cmp	r3, #0
+ 80068b2:	d001      	beq.n	80068b8 <USB_StopHost+0x2c>
+  {
+    ret = HAL_ERROR;
+ 80068b4:	2301      	movs	r3, #1
+ 80068b6:	77fb      	strb	r3, [r7, #31]
+  }
+
+  if (USB_FlushRxFifo(USBx) != HAL_OK)
+ 80068b8:	6878      	ldr	r0, [r7, #4]
+ 80068ba:	f7ff fdb1 	bl	8006420 <USB_FlushRxFifo>
+ 80068be:	4603      	mov	r3, r0
+ 80068c0:	2b00      	cmp	r3, #0
+ 80068c2:	d001      	beq.n	80068c8 <USB_StopHost+0x3c>
+  {
+    ret = HAL_ERROR;
+ 80068c4:	2301      	movs	r3, #1
+ 80068c6:	77fb      	strb	r3, [r7, #31]
+  }
+
+  /* Flush out any leftover queued requests. */
+  for (i = 0U; i <= 15U; i++)
+ 80068c8:	2300      	movs	r3, #0
+ 80068ca:	61bb      	str	r3, [r7, #24]
+ 80068cc:	e01f      	b.n	800690e <USB_StopHost+0x82>
+  {
+    value = USBx_HC(i)->HCCHAR;
+ 80068ce:	69bb      	ldr	r3, [r7, #24]
+ 80068d0:	015a      	lsls	r2, r3, #5
+ 80068d2:	697b      	ldr	r3, [r7, #20]
+ 80068d4:	4413      	add	r3, r2
+ 80068d6:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 80068da:	681b      	ldr	r3, [r3, #0]
+ 80068dc:	613b      	str	r3, [r7, #16]
+    value |=  USB_OTG_HCCHAR_CHDIS;
+ 80068de:	693b      	ldr	r3, [r7, #16]
+ 80068e0:	f043 4380 	orr.w	r3, r3, #1073741824	@ 0x40000000
+ 80068e4:	613b      	str	r3, [r7, #16]
+    value &= ~USB_OTG_HCCHAR_CHENA;
+ 80068e6:	693b      	ldr	r3, [r7, #16]
+ 80068e8:	f023 4300 	bic.w	r3, r3, #2147483648	@ 0x80000000
+ 80068ec:	613b      	str	r3, [r7, #16]
+    value &= ~USB_OTG_HCCHAR_EPDIR;
+ 80068ee:	693b      	ldr	r3, [r7, #16]
+ 80068f0:	f423 4300 	bic.w	r3, r3, #32768	@ 0x8000
+ 80068f4:	613b      	str	r3, [r7, #16]
+    USBx_HC(i)->HCCHAR = value;
+ 80068f6:	69bb      	ldr	r3, [r7, #24]
+ 80068f8:	015a      	lsls	r2, r3, #5
+ 80068fa:	697b      	ldr	r3, [r7, #20]
+ 80068fc:	4413      	add	r3, r2
+ 80068fe:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8006902:	461a      	mov	r2, r3
+ 8006904:	693b      	ldr	r3, [r7, #16]
+ 8006906:	6013      	str	r3, [r2, #0]
+  for (i = 0U; i <= 15U; i++)
+ 8006908:	69bb      	ldr	r3, [r7, #24]
+ 800690a:	3301      	adds	r3, #1
+ 800690c:	61bb      	str	r3, [r7, #24]
+ 800690e:	69bb      	ldr	r3, [r7, #24]
+ 8006910:	2b0f      	cmp	r3, #15
+ 8006912:	d9dc      	bls.n	80068ce <USB_StopHost+0x42>
+  }
+
+  /* Halt all channels to put them into a known state. */
+  for (i = 0U; i <= 15U; i++)
+ 8006914:	2300      	movs	r3, #0
+ 8006916:	61bb      	str	r3, [r7, #24]
+ 8006918:	e034      	b.n	8006984 <USB_StopHost+0xf8>
+  {
+    value = USBx_HC(i)->HCCHAR;
+ 800691a:	69bb      	ldr	r3, [r7, #24]
+ 800691c:	015a      	lsls	r2, r3, #5
+ 800691e:	697b      	ldr	r3, [r7, #20]
+ 8006920:	4413      	add	r3, r2
+ 8006922:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 8006926:	681b      	ldr	r3, [r3, #0]
+ 8006928:	613b      	str	r3, [r7, #16]
+    value |= USB_OTG_HCCHAR_CHDIS;
+ 800692a:	693b      	ldr	r3, [r7, #16]
+ 800692c:	f043 4380 	orr.w	r3, r3, #1073741824	@ 0x40000000
+ 8006930:	613b      	str	r3, [r7, #16]
+    value |= USB_OTG_HCCHAR_CHENA;
+ 8006932:	693b      	ldr	r3, [r7, #16]
+ 8006934:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
+ 8006938:	613b      	str	r3, [r7, #16]
+    value &= ~USB_OTG_HCCHAR_EPDIR;
+ 800693a:	693b      	ldr	r3, [r7, #16]
+ 800693c:	f423 4300 	bic.w	r3, r3, #32768	@ 0x8000
+ 8006940:	613b      	str	r3, [r7, #16]
+    USBx_HC(i)->HCCHAR = value;
+ 8006942:	69bb      	ldr	r3, [r7, #24]
+ 8006944:	015a      	lsls	r2, r3, #5
+ 8006946:	697b      	ldr	r3, [r7, #20]
+ 8006948:	4413      	add	r3, r2
+ 800694a:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800694e:	461a      	mov	r2, r3
+ 8006950:	693b      	ldr	r3, [r7, #16]
+ 8006952:	6013      	str	r3, [r2, #0]
+
+    do
+    {
+      count++;
+ 8006954:	68fb      	ldr	r3, [r7, #12]
+ 8006956:	3301      	adds	r3, #1
+ 8006958:	60fb      	str	r3, [r7, #12]
+
+      if (count > 1000U)
+ 800695a:	68fb      	ldr	r3, [r7, #12]
+ 800695c:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
+ 8006960:	d80c      	bhi.n	800697c <USB_StopHost+0xf0>
+      {
+        break;
+      }
+    } while ((USBx_HC(i)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
+ 8006962:	69bb      	ldr	r3, [r7, #24]
+ 8006964:	015a      	lsls	r2, r3, #5
+ 8006966:	697b      	ldr	r3, [r7, #20]
+ 8006968:	4413      	add	r3, r2
+ 800696a:	f503 63a0 	add.w	r3, r3, #1280	@ 0x500
+ 800696e:	681b      	ldr	r3, [r3, #0]
+ 8006970:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
+ 8006974:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
+ 8006978:	d0ec      	beq.n	8006954 <USB_StopHost+0xc8>
+ 800697a:	e000      	b.n	800697e <USB_StopHost+0xf2>
+        break;
+ 800697c:	bf00      	nop
+  for (i = 0U; i <= 15U; i++)
+ 800697e:	69bb      	ldr	r3, [r7, #24]
+ 8006980:	3301      	adds	r3, #1
+ 8006982:	61bb      	str	r3, [r7, #24]
+ 8006984:	69bb      	ldr	r3, [r7, #24]
+ 8006986:	2b0f      	cmp	r3, #15
+ 8006988:	d9c7      	bls.n	800691a <USB_StopHost+0x8e>
+  }
+
+  /* Clear any pending Host interrupts */
+  USBx_HOST->HAINT = CLEAR_INTERRUPT_MASK;
+ 800698a:	697b      	ldr	r3, [r7, #20]
+ 800698c:	f503 6380 	add.w	r3, r3, #1024	@ 0x400
+ 8006990:	461a      	mov	r2, r3
+ 8006992:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
+ 8006996:	6153      	str	r3, [r2, #20]
+  USBx->GINTSTS = CLEAR_INTERRUPT_MASK;
+ 8006998:	687b      	ldr	r3, [r7, #4]
+ 800699a:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
+ 800699e:	615a      	str	r2, [r3, #20]
+
+  (void)USB_EnableGlobalInt(USBx);
+ 80069a0:	6878      	ldr	r0, [r7, #4]
+ 80069a2:	f7ff fce9 	bl	8006378 <USB_EnableGlobalInt>
+
+  return ret;
+ 80069a6:	7ffb      	ldrb	r3, [r7, #31]
+}
+ 80069a8:	4618      	mov	r0, r3
+ 80069aa:	3720      	adds	r7, #32
+ 80069ac:	46bd      	mov	sp, r7
+ 80069ae:	bd80      	pop	{r7, pc}
+
+080069b0 <USBH_LL_IncTimer>:
+  *         Increment Host Timer tick
+  * @param  phost: Host Handle
+  * @retval None
+  */
+void USBH_LL_IncTimer(USBH_HandleTypeDef *phost)
+{
+ 80069b0:	b580      	push	{r7, lr}
+ 80069b2:	b082      	sub	sp, #8
+ 80069b4:	af00      	add	r7, sp, #0
+ 80069b6:	6078      	str	r0, [r7, #4]
+  phost->Timer++;
+ 80069b8:	687b      	ldr	r3, [r7, #4]
+ 80069ba:	f8d3 33c4 	ldr.w	r3, [r3, #964]	@ 0x3c4
+ 80069be:	1c5a      	adds	r2, r3, #1
+ 80069c0:	687b      	ldr	r3, [r7, #4]
+ 80069c2:	f8c3 23c4 	str.w	r2, [r3, #964]	@ 0x3c4
+  USBH_HandleSof(phost);
+ 80069c6:	6878      	ldr	r0, [r7, #4]
+ 80069c8:	f000 f804 	bl	80069d4 <USBH_HandleSof>
+}
+ 80069cc:	bf00      	nop
+ 80069ce:	3708      	adds	r7, #8
+ 80069d0:	46bd      	mov	sp, r7
+ 80069d2:	bd80      	pop	{r7, pc}
+
+080069d4 <USBH_HandleSof>:
+  *         Call SOF process
+  * @param  phost: Host Handle
+  * @retval None
+  */
+static void USBH_HandleSof(USBH_HandleTypeDef *phost)
+{
+ 80069d4:	b580      	push	{r7, lr}
+ 80069d6:	b082      	sub	sp, #8
+ 80069d8:	af00      	add	r7, sp, #0
+ 80069da:	6078      	str	r0, [r7, #4]
+  if ((phost->gState == HOST_CLASS) && (phost->pActiveClass != NULL))
+ 80069dc:	687b      	ldr	r3, [r7, #4]
+ 80069de:	781b      	ldrb	r3, [r3, #0]
+ 80069e0:	b2db      	uxtb	r3, r3
+ 80069e2:	2b0b      	cmp	r3, #11
+ 80069e4:	d10a      	bne.n	80069fc <USBH_HandleSof+0x28>
+ 80069e6:	687b      	ldr	r3, [r7, #4]
+ 80069e8:	f8d3 337c 	ldr.w	r3, [r3, #892]	@ 0x37c
+ 80069ec:	2b00      	cmp	r3, #0
+ 80069ee:	d005      	beq.n	80069fc <USBH_HandleSof+0x28>
+  {
+    phost->pActiveClass->SOFProcess(phost);
+ 80069f0:	687b      	ldr	r3, [r7, #4]
+ 80069f2:	f8d3 337c 	ldr.w	r3, [r3, #892]	@ 0x37c
+ 80069f6:	699b      	ldr	r3, [r3, #24]
+ 80069f8:	6878      	ldr	r0, [r7, #4]
+ 80069fa:	4798      	blx	r3
+  }
+}
+ 80069fc:	bf00      	nop
+ 80069fe:	3708      	adds	r7, #8
+ 8006a00:	46bd      	mov	sp, r7
+ 8006a02:	bd80      	pop	{r7, pc}
+
+08006a04 <USBH_LL_PortEnabled>:
+  *         Port Enabled
+  * @param  phost: Host Handle
+  * @retval None
+  */
+void USBH_LL_PortEnabled(USBH_HandleTypeDef *phost)
+{
+ 8006a04:	b580      	push	{r7, lr}
+ 8006a06:	b082      	sub	sp, #8
+ 8006a08:	af00      	add	r7, sp, #0
+ 8006a0a:	6078      	str	r0, [r7, #4]
+  phost->device.PortEnabled = 1U;
+ 8006a0c:	687b      	ldr	r3, [r7, #4]
+ 8006a0e:	2201      	movs	r2, #1
+ 8006a10:	f883 2323 	strb.w	r2, [r3, #803]	@ 0x323
+
+#if (USBH_USE_OS == 1U)
+  USBH_OS_PutMessage(phost, USBH_PORT_EVENT, 0U, 0U);
+ 8006a14:	2300      	movs	r3, #0
+ 8006a16:	2200      	movs	r2, #0
+ 8006a18:	2101      	movs	r1, #1
+ 8006a1a:	6878      	ldr	r0, [r7, #4]
+ 8006a1c:	f000 f85b 	bl	8006ad6 <USBH_OS_PutMessage>
+#endif /* (USBH_USE_OS == 1U) */
+
+  return;
+ 8006a20:	bf00      	nop
+}
+ 8006a22:	3708      	adds	r7, #8
+ 8006a24:	46bd      	mov	sp, r7
+ 8006a26:	bd80      	pop	{r7, pc}
+
+08006a28 <USBH_LL_PortDisabled>:
+  *         Port Disabled
+  * @param  phost: Host Handle
+  * @retval None
+  */
+void USBH_LL_PortDisabled(USBH_HandleTypeDef *phost)
+{
+ 8006a28:	b480      	push	{r7}
+ 8006a2a:	b083      	sub	sp, #12
+ 8006a2c:	af00      	add	r7, sp, #0
+ 8006a2e:	6078      	str	r0, [r7, #4]
+  phost->device.PortEnabled = 0U;
+ 8006a30:	687b      	ldr	r3, [r7, #4]
+ 8006a32:	2200      	movs	r2, #0
+ 8006a34:	f883 2323 	strb.w	r2, [r3, #803]	@ 0x323
+  phost->device.is_disconnected = 1U;
+ 8006a38:	687b      	ldr	r3, [r7, #4]
+ 8006a3a:	2201      	movs	r2, #1
+ 8006a3c:	f883 2321 	strb.w	r2, [r3, #801]	@ 0x321
+
+  return;
+ 8006a40:	bf00      	nop
+}
+ 8006a42:	370c      	adds	r7, #12
+ 8006a44:	46bd      	mov	sp, r7
+ 8006a46:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8006a4a:	4770      	bx	lr
+
+08006a4c <USBH_LL_Connect>:
+  *         Handle USB Host connection event
+  * @param  phost: Host Handle
+  * @retval USBH_Status
+  */
+USBH_StatusTypeDef USBH_LL_Connect(USBH_HandleTypeDef *phost)
+{
+ 8006a4c:	b580      	push	{r7, lr}
+ 8006a4e:	b082      	sub	sp, #8
+ 8006a50:	af00      	add	r7, sp, #0
+ 8006a52:	6078      	str	r0, [r7, #4]
+  phost->device.is_connected = 1U;
+ 8006a54:	687b      	ldr	r3, [r7, #4]
+ 8006a56:	2201      	movs	r2, #1
+ 8006a58:	f883 2320 	strb.w	r2, [r3, #800]	@ 0x320
+  phost->device.is_disconnected = 0U;
+ 8006a5c:	687b      	ldr	r3, [r7, #4]
+ 8006a5e:	2200      	movs	r2, #0
+ 8006a60:	f883 2321 	strb.w	r2, [r3, #801]	@ 0x321
+  phost->device.is_ReEnumerated = 0U;
+ 8006a64:	687b      	ldr	r3, [r7, #4]
+ 8006a66:	2200      	movs	r2, #0
+ 8006a68:	f883 2322 	strb.w	r2, [r3, #802]	@ 0x322
+
+#if (USBH_USE_OS == 1U)
+  USBH_OS_PutMessage(phost, USBH_PORT_EVENT, 0U, 0U);
+ 8006a6c:	2300      	movs	r3, #0
+ 8006a6e:	2200      	movs	r2, #0
+ 8006a70:	2101      	movs	r1, #1
+ 8006a72:	6878      	ldr	r0, [r7, #4]
+ 8006a74:	f000 f82f 	bl	8006ad6 <USBH_OS_PutMessage>
+#endif /* (USBH_USE_OS == 1U) */
+
+  return USBH_OK;
+ 8006a78:	2300      	movs	r3, #0
+}
+ 8006a7a:	4618      	mov	r0, r3
+ 8006a7c:	3708      	adds	r7, #8
+ 8006a7e:	46bd      	mov	sp, r7
+ 8006a80:	bd80      	pop	{r7, pc}
+
+08006a82 <USBH_LL_Disconnect>:
+  *         Handle USB Host disconnection event
+  * @param  phost: Host Handle
+  * @retval USBH_Status
+  */
+USBH_StatusTypeDef USBH_LL_Disconnect(USBH_HandleTypeDef *phost)
+{
+ 8006a82:	b580      	push	{r7, lr}
+ 8006a84:	b082      	sub	sp, #8
+ 8006a86:	af00      	add	r7, sp, #0
+ 8006a88:	6078      	str	r0, [r7, #4]
+  /* update device connection states */
+  phost->device.is_disconnected = 1U;
+ 8006a8a:	687b      	ldr	r3, [r7, #4]
+ 8006a8c:	2201      	movs	r2, #1
+ 8006a8e:	f883 2321 	strb.w	r2, [r3, #801]	@ 0x321
+  phost->device.is_connected = 0U;
+ 8006a92:	687b      	ldr	r3, [r7, #4]
+ 8006a94:	2200      	movs	r2, #0
+ 8006a96:	f883 2320 	strb.w	r2, [r3, #800]	@ 0x320
+  phost->device.PortEnabled = 0U;
+ 8006a9a:	687b      	ldr	r3, [r7, #4]
+ 8006a9c:	2200      	movs	r2, #0
+ 8006a9e:	f883 2323 	strb.w	r2, [r3, #803]	@ 0x323
+
+  /* Stop Host */
+  (void)USBH_LL_Stop(phost);
+ 8006aa2:	6878      	ldr	r0, [r7, #4]
+ 8006aa4:	f001 f994 	bl	8007dd0 <USBH_LL_Stop>
+
+  /* FRee Control Pipes */
+  (void)USBH_FreePipe(phost, phost->Control.pipe_in);
+ 8006aa8:	687b      	ldr	r3, [r7, #4]
+ 8006aaa:	791b      	ldrb	r3, [r3, #4]
+ 8006aac:	4619      	mov	r1, r3
+ 8006aae:	6878      	ldr	r0, [r7, #4]
+ 8006ab0:	f000 f847 	bl	8006b42 <USBH_FreePipe>
+  (void)USBH_FreePipe(phost, phost->Control.pipe_out);
+ 8006ab4:	687b      	ldr	r3, [r7, #4]
+ 8006ab6:	795b      	ldrb	r3, [r3, #5]
+ 8006ab8:	4619      	mov	r1, r3
+ 8006aba:	6878      	ldr	r0, [r7, #4]
+ 8006abc:	f000 f841 	bl	8006b42 <USBH_FreePipe>
+
+#if (USBH_USE_OS == 1U)
+  USBH_OS_PutMessage(phost, USBH_PORT_EVENT, 0U, 0U);
+ 8006ac0:	2300      	movs	r3, #0
+ 8006ac2:	2200      	movs	r2, #0
+ 8006ac4:	2101      	movs	r1, #1
+ 8006ac6:	6878      	ldr	r0, [r7, #4]
+ 8006ac8:	f000 f805 	bl	8006ad6 <USBH_OS_PutMessage>
+#endif /* (USBH_USE_OS == 1U) */
+
+  return USBH_OK;
+ 8006acc:	2300      	movs	r3, #0
+}
+ 8006ace:	4618      	mov	r0, r3
+ 8006ad0:	3708      	adds	r7, #8
+ 8006ad2:	46bd      	mov	sp, r7
+ 8006ad4:	bd80      	pop	{r7, pc}
+
+08006ad6 <USBH_OS_PutMessage>:
+  * @param  timeout message event timeout
+  * @param  priority message event priority
+  * @retval None
+  */
+void USBH_OS_PutMessage(USBH_HandleTypeDef *phost, USBH_OSEventTypeDef message, uint32_t timeout, uint32_t priority)
+{
+ 8006ad6:	b580      	push	{r7, lr}
+ 8006ad8:	b086      	sub	sp, #24
+ 8006ada:	af00      	add	r7, sp, #0
+ 8006adc:	60f8      	str	r0, [r7, #12]
+ 8006ade:	607a      	str	r2, [r7, #4]
+ 8006ae0:	603b      	str	r3, [r7, #0]
+ 8006ae2:	460b      	mov	r3, r1
+ 8006ae4:	72fb      	strb	r3, [r7, #11]
+  phost->os_msg = (uint32_t)message;
+ 8006ae6:	7afa      	ldrb	r2, [r7, #11]
+ 8006ae8:	68fb      	ldr	r3, [r7, #12]
+ 8006aea:	f8c3 23e0 	str.w	r2, [r3, #992]	@ 0x3e0
+
+#if (osCMSIS < 0x20000U)
+  UNUSED(priority);
+
+  /* Calculate the number of available spaces */
+  uint32_t available_spaces = MSGQUEUE_OBJECTS - osMessageWaiting(phost->os_event);
+ 8006aee:	68fb      	ldr	r3, [r7, #12]
+ 8006af0:	f8d3 33d8 	ldr.w	r3, [r3, #984]	@ 0x3d8
+ 8006af4:	4618      	mov	r0, r3
+ 8006af6:	f000 f895 	bl	8006c24 <osMessageWaiting>
+ 8006afa:	4603      	mov	r3, r0
+ 8006afc:	f1c3 0310 	rsb	r3, r3, #16
+ 8006b00:	617b      	str	r3, [r7, #20]
+
+  if (available_spaces != 0U)
+ 8006b02:	697b      	ldr	r3, [r7, #20]
+ 8006b04:	2b00      	cmp	r3, #0
+ 8006b06:	d009      	beq.n	8006b1c <USBH_OS_PutMessage+0x46>
+  {
+    (void)osMessagePut(phost->os_event, phost->os_msg, timeout);
+ 8006b08:	68fb      	ldr	r3, [r7, #12]
+ 8006b0a:	f8d3 03d8 	ldr.w	r0, [r3, #984]	@ 0x3d8
+ 8006b0e:	68fb      	ldr	r3, [r7, #12]
+ 8006b10:	f8d3 33e0 	ldr.w	r3, [r3, #992]	@ 0x3e0
+ 8006b14:	687a      	ldr	r2, [r7, #4]
+ 8006b16:	4619      	mov	r1, r3
+ 8006b18:	f000 f844 	bl	8006ba4 <osMessagePut>
+  if (osMessageQueueGetSpace(phost->os_event) != 0U)
+  {
+    (void)osMessageQueuePut(phost->os_event, &phost->os_msg, priority, timeout);
+  }
+#endif /* (osCMSIS < 0x20000U) */
+}
+ 8006b1c:	bf00      	nop
+ 8006b1e:	3718      	adds	r7, #24
+ 8006b20:	46bd      	mov	sp, r7
+ 8006b22:	bd80      	pop	{r7, pc}
+
+08006b24 <USBH_LL_NotifyURBChange>:
+  *         Notify URB state Change
+  * @param  phost: Host handle
+  * @retval USBH Status
+  */
+USBH_StatusTypeDef USBH_LL_NotifyURBChange(USBH_HandleTypeDef *phost)
+{
+ 8006b24:	b580      	push	{r7, lr}
+ 8006b26:	b082      	sub	sp, #8
+ 8006b28:	af00      	add	r7, sp, #0
+ 8006b2a:	6078      	str	r0, [r7, #4]
+#if (USBH_USE_OS == 1U)
+  USBH_OS_PutMessage(phost, USBH_PORT_EVENT, 0U, 0U);
+ 8006b2c:	2300      	movs	r3, #0
+ 8006b2e:	2200      	movs	r2, #0
+ 8006b30:	2101      	movs	r1, #1
+ 8006b32:	6878      	ldr	r0, [r7, #4]
+ 8006b34:	f7ff ffcf 	bl	8006ad6 <USBH_OS_PutMessage>
+#endif /* (USBH_USE_OS == 1U) */
+
+  return USBH_OK;
+ 8006b38:	2300      	movs	r3, #0
+}
+ 8006b3a:	4618      	mov	r0, r3
+ 8006b3c:	3708      	adds	r7, #8
+ 8006b3e:	46bd      	mov	sp, r7
+ 8006b40:	bd80      	pop	{r7, pc}
+
+08006b42 <USBH_FreePipe>:
+  * @param  phost: Host Handle
+  * @param  idx: Pipe number to be freed
+  * @retval USBH Status
+  */
+USBH_StatusTypeDef USBH_FreePipe(USBH_HandleTypeDef *phost, uint8_t idx)
+{
+ 8006b42:	b480      	push	{r7}
+ 8006b44:	b083      	sub	sp, #12
+ 8006b46:	af00      	add	r7, sp, #0
+ 8006b48:	6078      	str	r0, [r7, #4]
+ 8006b4a:	460b      	mov	r3, r1
+ 8006b4c:	70fb      	strb	r3, [r7, #3]
+  if (idx < USBH_MAX_PIPES_NBR)
+ 8006b4e:	78fb      	ldrb	r3, [r7, #3]
+ 8006b50:	2b0f      	cmp	r3, #15
+ 8006b52:	d80d      	bhi.n	8006b70 <USBH_FreePipe+0x2e>
+  {
+    phost->Pipes[idx] &= 0x7FFFU;
+ 8006b54:	78fb      	ldrb	r3, [r7, #3]
+ 8006b56:	687a      	ldr	r2, [r7, #4]
+ 8006b58:	33e0      	adds	r3, #224	@ 0xe0
+ 8006b5a:	009b      	lsls	r3, r3, #2
+ 8006b5c:	4413      	add	r3, r2
+ 8006b5e:	685a      	ldr	r2, [r3, #4]
+ 8006b60:	78fb      	ldrb	r3, [r7, #3]
+ 8006b62:	f3c2 020e 	ubfx	r2, r2, #0, #15
+ 8006b66:	6879      	ldr	r1, [r7, #4]
+ 8006b68:	33e0      	adds	r3, #224	@ 0xe0
+ 8006b6a:	009b      	lsls	r3, r3, #2
+ 8006b6c:	440b      	add	r3, r1
+ 8006b6e:	605a      	str	r2, [r3, #4]
+  }
+
+  return USBH_OK;
+ 8006b70:	2300      	movs	r3, #0
+}
+ 8006b72:	4618      	mov	r0, r3
+ 8006b74:	370c      	adds	r7, #12
+ 8006b76:	46bd      	mov	sp, r7
+ 8006b78:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8006b7c:	4770      	bx	lr
+
+08006b7e <inHandlerMode>:
+#endif
+
+
+/* Determine whether we are in thread mode or handler mode. */
+static int inHandlerMode (void)
+{
+ 8006b7e:	b480      	push	{r7}
+ 8006b80:	b083      	sub	sp, #12
+ 8006b82:	af00      	add	r7, sp, #0
+ */
+__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+ 8006b84:	f3ef 8305 	mrs	r3, IPSR
+ 8006b88:	607b      	str	r3, [r7, #4]
+  return(result);
+ 8006b8a:	687b      	ldr	r3, [r7, #4]
+  return __get_IPSR() != 0;
+ 8006b8c:	2b00      	cmp	r3, #0
+ 8006b8e:	bf14      	ite	ne
+ 8006b90:	2301      	movne	r3, #1
+ 8006b92:	2300      	moveq	r3, #0
+ 8006b94:	b2db      	uxtb	r3, r3
+}
+ 8006b96:	4618      	mov	r0, r3
+ 8006b98:	370c      	adds	r7, #12
+ 8006b9a:	46bd      	mov	sp, r7
+ 8006b9c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8006ba0:	4770      	bx	lr
+	...
+
+08006ba4 <osMessagePut>:
+* @param  millisec  timeout value or 0 in case of no time-out.
+* @retval status code that indicates the execution status of the function.
+* @note   MUST REMAIN UNCHANGED: \b osMessagePut shall be consistent in every CMSIS-RTOS.
+*/
+osStatus osMessagePut (osMessageQId queue_id, uint32_t info, uint32_t millisec)
+{
+ 8006ba4:	b580      	push	{r7, lr}
+ 8006ba6:	b086      	sub	sp, #24
+ 8006ba8:	af00      	add	r7, sp, #0
+ 8006baa:	60f8      	str	r0, [r7, #12]
+ 8006bac:	60b9      	str	r1, [r7, #8]
+ 8006bae:	607a      	str	r2, [r7, #4]
+  portBASE_TYPE taskWoken = pdFALSE;
+ 8006bb0:	2300      	movs	r3, #0
+ 8006bb2:	613b      	str	r3, [r7, #16]
+  TickType_t ticks;
+  
+  ticks = millisec / portTICK_PERIOD_MS;
+ 8006bb4:	687b      	ldr	r3, [r7, #4]
+ 8006bb6:	617b      	str	r3, [r7, #20]
+  if (ticks == 0) {
+ 8006bb8:	697b      	ldr	r3, [r7, #20]
+ 8006bba:	2b00      	cmp	r3, #0
+ 8006bbc:	d101      	bne.n	8006bc2 <osMessagePut+0x1e>
+    ticks = 1;
+ 8006bbe:	2301      	movs	r3, #1
+ 8006bc0:	617b      	str	r3, [r7, #20]
+  }
+  
+  if (inHandlerMode()) {
+ 8006bc2:	f7ff ffdc 	bl	8006b7e <inHandlerMode>
+ 8006bc6:	4603      	mov	r3, r0
+ 8006bc8:	2b00      	cmp	r3, #0
+ 8006bca:	d018      	beq.n	8006bfe <osMessagePut+0x5a>
+    if (xQueueSendFromISR(queue_id, &info, &taskWoken) != pdTRUE) {
+ 8006bcc:	f107 0210 	add.w	r2, r7, #16
+ 8006bd0:	f107 0108 	add.w	r1, r7, #8
+ 8006bd4:	2300      	movs	r3, #0
+ 8006bd6:	68f8      	ldr	r0, [r7, #12]
+ 8006bd8:	f000 f9c4 	bl	8006f64 <xQueueGenericSendFromISR>
+ 8006bdc:	4603      	mov	r3, r0
+ 8006bde:	2b01      	cmp	r3, #1
+ 8006be0:	d001      	beq.n	8006be6 <osMessagePut+0x42>
+      return osErrorOS;
+ 8006be2:	23ff      	movs	r3, #255	@ 0xff
+ 8006be4:	e018      	b.n	8006c18 <osMessagePut+0x74>
+    }
+    portEND_SWITCHING_ISR(taskWoken);
+ 8006be6:	693b      	ldr	r3, [r7, #16]
+ 8006be8:	2b00      	cmp	r3, #0
+ 8006bea:	d014      	beq.n	8006c16 <osMessagePut+0x72>
+ 8006bec:	4b0c      	ldr	r3, [pc, #48]	@ (8006c20 <osMessagePut+0x7c>)
+ 8006bee:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
+ 8006bf2:	601a      	str	r2, [r3, #0]
+ 8006bf4:	f3bf 8f4f 	dsb	sy
+ 8006bf8:	f3bf 8f6f 	isb	sy
+ 8006bfc:	e00b      	b.n	8006c16 <osMessagePut+0x72>
+  }
+  else {
+    if (xQueueSend(queue_id, &info, ticks) != pdTRUE) {
+ 8006bfe:	f107 0108 	add.w	r1, r7, #8
+ 8006c02:	2300      	movs	r3, #0
+ 8006c04:	697a      	ldr	r2, [r7, #20]
+ 8006c06:	68f8      	ldr	r0, [r7, #12]
+ 8006c08:	f000 f8aa 	bl	8006d60 <xQueueGenericSend>
+ 8006c0c:	4603      	mov	r3, r0
+ 8006c0e:	2b01      	cmp	r3, #1
+ 8006c10:	d001      	beq.n	8006c16 <osMessagePut+0x72>
+      return osErrorOS;
+ 8006c12:	23ff      	movs	r3, #255	@ 0xff
+ 8006c14:	e000      	b.n	8006c18 <osMessagePut+0x74>
+    }
+  }
+  
+  return osOK;
+ 8006c16:	2300      	movs	r3, #0
+}
+ 8006c18:	4618      	mov	r0, r3
+ 8006c1a:	3718      	adds	r7, #24
+ 8006c1c:	46bd      	mov	sp, r7
+ 8006c1e:	bd80      	pop	{r7, pc}
+ 8006c20:	e000ed04 	.word	0xe000ed04
+
+08006c24 <osMessageWaiting>:
+* @brief  Get the number of messaged stored in a queue.
+* @param  queue_id  message queue ID obtained with \ref osMessageCreate.
+* @retval number of messages stored in a queue.
+*/
+uint32_t osMessageWaiting(osMessageQId queue_id)
+{
+ 8006c24:	b580      	push	{r7, lr}
+ 8006c26:	b082      	sub	sp, #8
+ 8006c28:	af00      	add	r7, sp, #0
+ 8006c2a:	6078      	str	r0, [r7, #4]
+  if (inHandlerMode()) {
+ 8006c2c:	f7ff ffa7 	bl	8006b7e <inHandlerMode>
+ 8006c30:	4603      	mov	r3, r0
+ 8006c32:	2b00      	cmp	r3, #0
+ 8006c34:	d004      	beq.n	8006c40 <osMessageWaiting+0x1c>
+    return uxQueueMessagesWaitingFromISR(queue_id);
+ 8006c36:	6878      	ldr	r0, [r7, #4]
+ 8006c38:	f000 fa51 	bl	80070de <uxQueueMessagesWaitingFromISR>
+ 8006c3c:	4603      	mov	r3, r0
+ 8006c3e:	e003      	b.n	8006c48 <osMessageWaiting+0x24>
+  }
+  else
+  {
+    return uxQueueMessagesWaiting(queue_id);
+ 8006c40:	6878      	ldr	r0, [r7, #4]
+ 8006c42:	f000 fa2d 	bl	80070a0 <uxQueueMessagesWaiting>
+ 8006c46:	4603      	mov	r3, r0
+  }
+}
+ 8006c48:	4618      	mov	r0, r3
+ 8006c4a:	3708      	adds	r7, #8
+ 8006c4c:	46bd      	mov	sp, r7
+ 8006c4e:	bd80      	pop	{r7, pc}
+
+08006c50 <vListInsertEnd>:
+	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+}
+/*-----------------------------------------------------------*/
+
+void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
+{
+ 8006c50:	b480      	push	{r7}
+ 8006c52:	b085      	sub	sp, #20
+ 8006c54:	af00      	add	r7, sp, #0
+ 8006c56:	6078      	str	r0, [r7, #4]
+ 8006c58:	6039      	str	r1, [r7, #0]
+ListItem_t * const pxIndex = pxList->pxIndex;
+ 8006c5a:	687b      	ldr	r3, [r7, #4]
+ 8006c5c:	685b      	ldr	r3, [r3, #4]
+ 8006c5e:	60fb      	str	r3, [r7, #12]
+	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
+
+	/* Insert a new list item into pxList, but rather than sort the list,
+	makes the new list item the last item to be removed by a call to
+	listGET_OWNER_OF_NEXT_ENTRY(). */
+	pxNewListItem->pxNext = pxIndex;
+ 8006c60:	683b      	ldr	r3, [r7, #0]
+ 8006c62:	68fa      	ldr	r2, [r7, #12]
+ 8006c64:	605a      	str	r2, [r3, #4]
+	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
+ 8006c66:	68fb      	ldr	r3, [r7, #12]
+ 8006c68:	689a      	ldr	r2, [r3, #8]
+ 8006c6a:	683b      	ldr	r3, [r7, #0]
+ 8006c6c:	609a      	str	r2, [r3, #8]
+
+	/* Only used during decision coverage testing. */
+	mtCOVERAGE_TEST_DELAY();
+
+	pxIndex->pxPrevious->pxNext = pxNewListItem;
+ 8006c6e:	68fb      	ldr	r3, [r7, #12]
+ 8006c70:	689b      	ldr	r3, [r3, #8]
+ 8006c72:	683a      	ldr	r2, [r7, #0]
+ 8006c74:	605a      	str	r2, [r3, #4]
+	pxIndex->pxPrevious = pxNewListItem;
+ 8006c76:	68fb      	ldr	r3, [r7, #12]
+ 8006c78:	683a      	ldr	r2, [r7, #0]
+ 8006c7a:	609a      	str	r2, [r3, #8]
+
+	/* Remember which list the item is in. */
+	pxNewListItem->pxContainer = pxList;
+ 8006c7c:	683b      	ldr	r3, [r7, #0]
+ 8006c7e:	687a      	ldr	r2, [r7, #4]
+ 8006c80:	611a      	str	r2, [r3, #16]
+
+	( pxList->uxNumberOfItems )++;
+ 8006c82:	687b      	ldr	r3, [r7, #4]
+ 8006c84:	681b      	ldr	r3, [r3, #0]
+ 8006c86:	1c5a      	adds	r2, r3, #1
+ 8006c88:	687b      	ldr	r3, [r7, #4]
+ 8006c8a:	601a      	str	r2, [r3, #0]
+}
+ 8006c8c:	bf00      	nop
+ 8006c8e:	3714      	adds	r7, #20
+ 8006c90:	46bd      	mov	sp, r7
+ 8006c92:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8006c96:	4770      	bx	lr
+
+08006c98 <vListInsert>:
+/*-----------------------------------------------------------*/
+
+void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
+{
+ 8006c98:	b480      	push	{r7}
+ 8006c9a:	b085      	sub	sp, #20
+ 8006c9c:	af00      	add	r7, sp, #0
+ 8006c9e:	6078      	str	r0, [r7, #4]
+ 8006ca0:	6039      	str	r1, [r7, #0]
+ListItem_t *pxIterator;
+const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
+ 8006ca2:	683b      	ldr	r3, [r7, #0]
+ 8006ca4:	681b      	ldr	r3, [r3, #0]
+ 8006ca6:	60bb      	str	r3, [r7, #8]
+	new list item should be placed after it.  This ensures that TCBs which are
+	stored in ready lists (all of which have the same xItemValue value) get a
+	share of the CPU.  However, if the xItemValue is the same as the back marker
+	the iteration loop below will not end.  Therefore the value is checked
+	first, and the algorithm slightly modified if necessary. */
+	if( xValueOfInsertion == portMAX_DELAY )
+ 8006ca8:	68bb      	ldr	r3, [r7, #8]
+ 8006caa:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
+ 8006cae:	d103      	bne.n	8006cb8 <vListInsert+0x20>
+	{
+		pxIterator = pxList->xListEnd.pxPrevious;
+ 8006cb0:	687b      	ldr	r3, [r7, #4]
+ 8006cb2:	691b      	ldr	r3, [r3, #16]
+ 8006cb4:	60fb      	str	r3, [r7, #12]
+ 8006cb6:	e00c      	b.n	8006cd2 <vListInsert+0x3a>
+			4) Using a queue or semaphore before it has been initialised or
+			   before the scheduler has been started (are interrupts firing
+			   before vTaskStartScheduler() has been called?).
+		**********************************************************************/
+
+		for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
+ 8006cb8:	687b      	ldr	r3, [r7, #4]
+ 8006cba:	3308      	adds	r3, #8
+ 8006cbc:	60fb      	str	r3, [r7, #12]
+ 8006cbe:	e002      	b.n	8006cc6 <vListInsert+0x2e>
+ 8006cc0:	68fb      	ldr	r3, [r7, #12]
+ 8006cc2:	685b      	ldr	r3, [r3, #4]
+ 8006cc4:	60fb      	str	r3, [r7, #12]
+ 8006cc6:	68fb      	ldr	r3, [r7, #12]
+ 8006cc8:	685b      	ldr	r3, [r3, #4]
+ 8006cca:	681b      	ldr	r3, [r3, #0]
+ 8006ccc:	68ba      	ldr	r2, [r7, #8]
+ 8006cce:	429a      	cmp	r2, r3
+ 8006cd0:	d2f6      	bcs.n	8006cc0 <vListInsert+0x28>
+			/* There is nothing to do here, just iterating to the wanted
+			insertion position. */
+		}
+	}
+
+	pxNewListItem->pxNext = pxIterator->pxNext;
+ 8006cd2:	68fb      	ldr	r3, [r7, #12]
+ 8006cd4:	685a      	ldr	r2, [r3, #4]
+ 8006cd6:	683b      	ldr	r3, [r7, #0]
+ 8006cd8:	605a      	str	r2, [r3, #4]
+	pxNewListItem->pxNext->pxPrevious = pxNewListItem;
+ 8006cda:	683b      	ldr	r3, [r7, #0]
+ 8006cdc:	685b      	ldr	r3, [r3, #4]
+ 8006cde:	683a      	ldr	r2, [r7, #0]
+ 8006ce0:	609a      	str	r2, [r3, #8]
+	pxNewListItem->pxPrevious = pxIterator;
+ 8006ce2:	683b      	ldr	r3, [r7, #0]
+ 8006ce4:	68fa      	ldr	r2, [r7, #12]
+ 8006ce6:	609a      	str	r2, [r3, #8]
+	pxIterator->pxNext = pxNewListItem;
+ 8006ce8:	68fb      	ldr	r3, [r7, #12]
+ 8006cea:	683a      	ldr	r2, [r7, #0]
+ 8006cec:	605a      	str	r2, [r3, #4]
+
+	/* Remember which list the item is in.  This allows fast removal of the
+	item later. */
+	pxNewListItem->pxContainer = pxList;
+ 8006cee:	683b      	ldr	r3, [r7, #0]
+ 8006cf0:	687a      	ldr	r2, [r7, #4]
+ 8006cf2:	611a      	str	r2, [r3, #16]
+
+	( pxList->uxNumberOfItems )++;
+ 8006cf4:	687b      	ldr	r3, [r7, #4]
+ 8006cf6:	681b      	ldr	r3, [r3, #0]
+ 8006cf8:	1c5a      	adds	r2, r3, #1
+ 8006cfa:	687b      	ldr	r3, [r7, #4]
+ 8006cfc:	601a      	str	r2, [r3, #0]
+}
+ 8006cfe:	bf00      	nop
+ 8006d00:	3714      	adds	r7, #20
+ 8006d02:	46bd      	mov	sp, r7
+ 8006d04:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8006d08:	4770      	bx	lr
+
+08006d0a <uxListRemove>:
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
+{
+ 8006d0a:	b480      	push	{r7}
+ 8006d0c:	b085      	sub	sp, #20
+ 8006d0e:	af00      	add	r7, sp, #0
+ 8006d10:	6078      	str	r0, [r7, #4]
+/* The list item knows which list it is in.  Obtain the list from the list
+item. */
+List_t * const pxList = pxItemToRemove->pxContainer;
+ 8006d12:	687b      	ldr	r3, [r7, #4]
+ 8006d14:	691b      	ldr	r3, [r3, #16]
+ 8006d16:	60fb      	str	r3, [r7, #12]
+
+	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
+ 8006d18:	687b      	ldr	r3, [r7, #4]
+ 8006d1a:	685b      	ldr	r3, [r3, #4]
+ 8006d1c:	687a      	ldr	r2, [r7, #4]
+ 8006d1e:	6892      	ldr	r2, [r2, #8]
+ 8006d20:	609a      	str	r2, [r3, #8]
+	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
+ 8006d22:	687b      	ldr	r3, [r7, #4]
+ 8006d24:	689b      	ldr	r3, [r3, #8]
+ 8006d26:	687a      	ldr	r2, [r7, #4]
+ 8006d28:	6852      	ldr	r2, [r2, #4]
+ 8006d2a:	605a      	str	r2, [r3, #4]
+
+	/* Only used during decision coverage testing. */
+	mtCOVERAGE_TEST_DELAY();
+
+	/* Make sure the index is left pointing to a valid item. */
+	if( pxList->pxIndex == pxItemToRemove )
+ 8006d2c:	68fb      	ldr	r3, [r7, #12]
+ 8006d2e:	685b      	ldr	r3, [r3, #4]
+ 8006d30:	687a      	ldr	r2, [r7, #4]
+ 8006d32:	429a      	cmp	r2, r3
+ 8006d34:	d103      	bne.n	8006d3e <uxListRemove+0x34>
+	{
+		pxList->pxIndex = pxItemToRemove->pxPrevious;
+ 8006d36:	687b      	ldr	r3, [r7, #4]
+ 8006d38:	689a      	ldr	r2, [r3, #8]
+ 8006d3a:	68fb      	ldr	r3, [r7, #12]
+ 8006d3c:	605a      	str	r2, [r3, #4]
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	pxItemToRemove->pxContainer = NULL;
+ 8006d3e:	687b      	ldr	r3, [r7, #4]
+ 8006d40:	2200      	movs	r2, #0
+ 8006d42:	611a      	str	r2, [r3, #16]
+	( pxList->uxNumberOfItems )--;
+ 8006d44:	68fb      	ldr	r3, [r7, #12]
+ 8006d46:	681b      	ldr	r3, [r3, #0]
+ 8006d48:	1e5a      	subs	r2, r3, #1
+ 8006d4a:	68fb      	ldr	r3, [r7, #12]
+ 8006d4c:	601a      	str	r2, [r3, #0]
+
+	return pxList->uxNumberOfItems;
+ 8006d4e:	68fb      	ldr	r3, [r7, #12]
+ 8006d50:	681b      	ldr	r3, [r3, #0]
+}
+ 8006d52:	4618      	mov	r0, r3
+ 8006d54:	3714      	adds	r7, #20
+ 8006d56:	46bd      	mov	sp, r7
+ 8006d58:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8006d5c:	4770      	bx	lr
+	...
+
+08006d60 <xQueueGenericSend>:
+
+#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )
+{
+ 8006d60:	b580      	push	{r7, lr}
+ 8006d62:	b08e      	sub	sp, #56	@ 0x38
+ 8006d64:	af00      	add	r7, sp, #0
+ 8006d66:	60f8      	str	r0, [r7, #12]
+ 8006d68:	60b9      	str	r1, [r7, #8]
+ 8006d6a:	607a      	str	r2, [r7, #4]
+ 8006d6c:	603b      	str	r3, [r7, #0]
+BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
+ 8006d6e:	2300      	movs	r3, #0
+ 8006d70:	637b      	str	r3, [r7, #52]	@ 0x34
+TimeOut_t xTimeOut;
+Queue_t * const pxQueue = xQueue;
+ 8006d72:	68fb      	ldr	r3, [r7, #12]
+ 8006d74:	633b      	str	r3, [r7, #48]	@ 0x30
+
+	configASSERT( pxQueue );
+ 8006d76:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 8006d78:	2b00      	cmp	r3, #0
+ 8006d7a:	d10b      	bne.n	8006d94 <xQueueGenericSend+0x34>
+
+portFORCE_INLINE static void vPortRaiseBASEPRI( void )
+{
+uint32_t ulNewBASEPRI;
+
+	__asm volatile
+ 8006d7c:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8006d80:	f383 8811 	msr	BASEPRI, r3
+ 8006d84:	f3bf 8f6f 	isb	sy
+ 8006d88:	f3bf 8f4f 	dsb	sy
+ 8006d8c:	62bb      	str	r3, [r7, #40]	@ 0x28
+		"	msr basepri, %0											\n" \
+		"	isb														\n" \
+		"	dsb														\n" \
+		:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+	);
+}
+ 8006d8e:	bf00      	nop
+ 8006d90:	bf00      	nop
+ 8006d92:	e7fd      	b.n	8006d90 <xQueueGenericSend+0x30>
+	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
+ 8006d94:	68bb      	ldr	r3, [r7, #8]
+ 8006d96:	2b00      	cmp	r3, #0
+ 8006d98:	d103      	bne.n	8006da2 <xQueueGenericSend+0x42>
+ 8006d9a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 8006d9c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8006d9e:	2b00      	cmp	r3, #0
+ 8006da0:	d101      	bne.n	8006da6 <xQueueGenericSend+0x46>
+ 8006da2:	2301      	movs	r3, #1
+ 8006da4:	e000      	b.n	8006da8 <xQueueGenericSend+0x48>
+ 8006da6:	2300      	movs	r3, #0
+ 8006da8:	2b00      	cmp	r3, #0
+ 8006daa:	d10b      	bne.n	8006dc4 <xQueueGenericSend+0x64>
+	__asm volatile
+ 8006dac:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8006db0:	f383 8811 	msr	BASEPRI, r3
+ 8006db4:	f3bf 8f6f 	isb	sy
+ 8006db8:	f3bf 8f4f 	dsb	sy
+ 8006dbc:	627b      	str	r3, [r7, #36]	@ 0x24
+}
+ 8006dbe:	bf00      	nop
+ 8006dc0:	bf00      	nop
+ 8006dc2:	e7fd      	b.n	8006dc0 <xQueueGenericSend+0x60>
+	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
+ 8006dc4:	683b      	ldr	r3, [r7, #0]
+ 8006dc6:	2b02      	cmp	r3, #2
+ 8006dc8:	d103      	bne.n	8006dd2 <xQueueGenericSend+0x72>
+ 8006dca:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 8006dcc:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
+ 8006dce:	2b01      	cmp	r3, #1
+ 8006dd0:	d101      	bne.n	8006dd6 <xQueueGenericSend+0x76>
+ 8006dd2:	2301      	movs	r3, #1
+ 8006dd4:	e000      	b.n	8006dd8 <xQueueGenericSend+0x78>
+ 8006dd6:	2300      	movs	r3, #0
+ 8006dd8:	2b00      	cmp	r3, #0
+ 8006dda:	d10b      	bne.n	8006df4 <xQueueGenericSend+0x94>
+	__asm volatile
+ 8006ddc:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8006de0:	f383 8811 	msr	BASEPRI, r3
+ 8006de4:	f3bf 8f6f 	isb	sy
+ 8006de8:	f3bf 8f4f 	dsb	sy
+ 8006dec:	623b      	str	r3, [r7, #32]
+}
+ 8006dee:	bf00      	nop
+ 8006df0:	bf00      	nop
+ 8006df2:	e7fd      	b.n	8006df0 <xQueueGenericSend+0x90>
+	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+	{
+		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
+ 8006df4:	f000 fd7e 	bl	80078f4 <xTaskGetSchedulerState>
+ 8006df8:	4603      	mov	r3, r0
+ 8006dfa:	2b00      	cmp	r3, #0
+ 8006dfc:	d102      	bne.n	8006e04 <xQueueGenericSend+0xa4>
+ 8006dfe:	687b      	ldr	r3, [r7, #4]
+ 8006e00:	2b00      	cmp	r3, #0
+ 8006e02:	d101      	bne.n	8006e08 <xQueueGenericSend+0xa8>
+ 8006e04:	2301      	movs	r3, #1
+ 8006e06:	e000      	b.n	8006e0a <xQueueGenericSend+0xaa>
+ 8006e08:	2300      	movs	r3, #0
+ 8006e0a:	2b00      	cmp	r3, #0
+ 8006e0c:	d10b      	bne.n	8006e26 <xQueueGenericSend+0xc6>
+	__asm volatile
+ 8006e0e:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8006e12:	f383 8811 	msr	BASEPRI, r3
+ 8006e16:	f3bf 8f6f 	isb	sy
+ 8006e1a:	f3bf 8f4f 	dsb	sy
+ 8006e1e:	61fb      	str	r3, [r7, #28]
+}
+ 8006e20:	bf00      	nop
+ 8006e22:	bf00      	nop
+ 8006e24:	e7fd      	b.n	8006e22 <xQueueGenericSend+0xc2>
+	/*lint -save -e904 This function relaxes the coding standard somewhat to
+	allow return statements within the function itself.  This is done in the
+	interest of execution time efficiency. */
+	for( ;; )
+	{
+		taskENTER_CRITICAL();
+ 8006e26:	f000 fe87 	bl	8007b38 <vPortEnterCritical>
+		{
+			/* Is there room on the queue now?  The running task must be the
+			highest priority task wanting to access the queue.  If the head item
+			in the queue is to be overwritten then it does not matter if the
+			queue is full. */
+			if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
+ 8006e2a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 8006e2c:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
+ 8006e2e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 8006e30:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
+ 8006e32:	429a      	cmp	r2, r3
+ 8006e34:	d302      	bcc.n	8006e3c <xQueueGenericSend+0xdc>
+ 8006e36:	683b      	ldr	r3, [r7, #0]
+ 8006e38:	2b02      	cmp	r3, #2
+ 8006e3a:	d129      	bne.n	8006e90 <xQueueGenericSend+0x130>
+						}
+					}
+				}
+				#else /* configUSE_QUEUE_SETS */
+				{
+					xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
+ 8006e3c:	683a      	ldr	r2, [r7, #0]
+ 8006e3e:	68b9      	ldr	r1, [r7, #8]
+ 8006e40:	6b38      	ldr	r0, [r7, #48]	@ 0x30
+ 8006e42:	f000 f96b 	bl	800711c <prvCopyDataToQueue>
+ 8006e46:	62f8      	str	r0, [r7, #44]	@ 0x2c
+
+					/* If there was a task waiting for data to arrive on the
+					queue then unblock it now. */
+					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+ 8006e48:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 8006e4a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 8006e4c:	2b00      	cmp	r3, #0
+ 8006e4e:	d010      	beq.n	8006e72 <xQueueGenericSend+0x112>
+					{
+						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+ 8006e50:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 8006e52:	3324      	adds	r3, #36	@ 0x24
+ 8006e54:	4618      	mov	r0, r3
+ 8006e56:	f000 fc43 	bl	80076e0 <xTaskRemoveFromEventList>
+ 8006e5a:	4603      	mov	r3, r0
+ 8006e5c:	2b00      	cmp	r3, #0
+ 8006e5e:	d013      	beq.n	8006e88 <xQueueGenericSend+0x128>
+						{
+							/* The unblocked task has a priority higher than
+							our own so yield immediately.  Yes it is ok to do
+							this from within the critical section - the kernel
+							takes care of that. */
+							queueYIELD_IF_USING_PREEMPTION();
+ 8006e60:	4b3f      	ldr	r3, [pc, #252]	@ (8006f60 <xQueueGenericSend+0x200>)
+ 8006e62:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
+ 8006e66:	601a      	str	r2, [r3, #0]
+ 8006e68:	f3bf 8f4f 	dsb	sy
+ 8006e6c:	f3bf 8f6f 	isb	sy
+ 8006e70:	e00a      	b.n	8006e88 <xQueueGenericSend+0x128>
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+					else if( xYieldRequired != pdFALSE )
+ 8006e72:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
+ 8006e74:	2b00      	cmp	r3, #0
+ 8006e76:	d007      	beq.n	8006e88 <xQueueGenericSend+0x128>
+					{
+						/* This path is a special case that will only get
+						executed if the task was holding multiple mutexes and
+						the mutexes were given back in an order that is
+						different to that in which they were taken. */
+						queueYIELD_IF_USING_PREEMPTION();
+ 8006e78:	4b39      	ldr	r3, [pc, #228]	@ (8006f60 <xQueueGenericSend+0x200>)
+ 8006e7a:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
+ 8006e7e:	601a      	str	r2, [r3, #0]
+ 8006e80:	f3bf 8f4f 	dsb	sy
+ 8006e84:	f3bf 8f6f 	isb	sy
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				#endif /* configUSE_QUEUE_SETS */
+
+				taskEXIT_CRITICAL();
+ 8006e88:	f000 fe88 	bl	8007b9c <vPortExitCritical>
+				return pdPASS;
+ 8006e8c:	2301      	movs	r3, #1
+ 8006e8e:	e063      	b.n	8006f58 <xQueueGenericSend+0x1f8>
+			}
+			else
+			{
+				if( xTicksToWait == ( TickType_t ) 0 )
+ 8006e90:	687b      	ldr	r3, [r7, #4]
+ 8006e92:	2b00      	cmp	r3, #0
+ 8006e94:	d103      	bne.n	8006e9e <xQueueGenericSend+0x13e>
+				{
+					/* The queue was full and no block time is specified (or
+					the block time has expired) so leave now. */
+					taskEXIT_CRITICAL();
+ 8006e96:	f000 fe81 	bl	8007b9c <vPortExitCritical>
+
+					/* Return to the original privilege level before exiting
+					the function. */
+					traceQUEUE_SEND_FAILED( pxQueue );
+					return errQUEUE_FULL;
+ 8006e9a:	2300      	movs	r3, #0
+ 8006e9c:	e05c      	b.n	8006f58 <xQueueGenericSend+0x1f8>
+				}
+				else if( xEntryTimeSet == pdFALSE )
+ 8006e9e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
+ 8006ea0:	2b00      	cmp	r3, #0
+ 8006ea2:	d106      	bne.n	8006eb2 <xQueueGenericSend+0x152>
+				{
+					/* The queue was full and a block time was specified so
+					configure the timeout structure. */
+					vTaskInternalSetTimeOutState( &xTimeOut );
+ 8006ea4:	f107 0314 	add.w	r3, r7, #20
+ 8006ea8:	4618      	mov	r0, r3
+ 8006eaa:	f000 fc7d 	bl	80077a8 <vTaskInternalSetTimeOutState>
+					xEntryTimeSet = pdTRUE;
+ 8006eae:	2301      	movs	r3, #1
+ 8006eb0:	637b      	str	r3, [r7, #52]	@ 0x34
+					/* Entry time was already set. */
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+		}
+		taskEXIT_CRITICAL();
+ 8006eb2:	f000 fe73 	bl	8007b9c <vPortExitCritical>
+
+		/* Interrupts and other tasks can send to and receive from the queue
+		now the critical section has been exited. */
+
+		vTaskSuspendAll();
+ 8006eb6:	f000 fa05 	bl	80072c4 <vTaskSuspendAll>
+		prvLockQueue( pxQueue );
+ 8006eba:	f000 fe3d 	bl	8007b38 <vPortEnterCritical>
+ 8006ebe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 8006ec0:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
+ 8006ec4:	b25b      	sxtb	r3, r3
+ 8006ec6:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
+ 8006eca:	d103      	bne.n	8006ed4 <xQueueGenericSend+0x174>
+ 8006ecc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 8006ece:	2200      	movs	r2, #0
+ 8006ed0:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
+ 8006ed4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 8006ed6:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
+ 8006eda:	b25b      	sxtb	r3, r3
+ 8006edc:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
+ 8006ee0:	d103      	bne.n	8006eea <xQueueGenericSend+0x18a>
+ 8006ee2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 8006ee4:	2200      	movs	r2, #0
+ 8006ee6:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
+ 8006eea:	f000 fe57 	bl	8007b9c <vPortExitCritical>
+
+		/* Update the timeout state to see if it has expired yet. */
+		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
+ 8006eee:	1d3a      	adds	r2, r7, #4
+ 8006ef0:	f107 0314 	add.w	r3, r7, #20
+ 8006ef4:	4611      	mov	r1, r2
+ 8006ef6:	4618      	mov	r0, r3
+ 8006ef8:	f000 fc6c 	bl	80077d4 <xTaskCheckForTimeOut>
+ 8006efc:	4603      	mov	r3, r0
+ 8006efe:	2b00      	cmp	r3, #0
+ 8006f00:	d124      	bne.n	8006f4c <xQueueGenericSend+0x1ec>
+		{
+			if( prvIsQueueFull( pxQueue ) != pdFALSE )
+ 8006f02:	6b38      	ldr	r0, [r7, #48]	@ 0x30
+ 8006f04:	f000 f9c6 	bl	8007294 <prvIsQueueFull>
+ 8006f08:	4603      	mov	r3, r0
+ 8006f0a:	2b00      	cmp	r3, #0
+ 8006f0c:	d018      	beq.n	8006f40 <xQueueGenericSend+0x1e0>
+			{
+				traceBLOCKING_ON_QUEUE_SEND( pxQueue );
+				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
+ 8006f0e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
+ 8006f10:	3310      	adds	r3, #16
+ 8006f12:	687a      	ldr	r2, [r7, #4]
+ 8006f14:	4611      	mov	r1, r2
+ 8006f16:	4618      	mov	r0, r3
+ 8006f18:	f000 fbbc 	bl	8007694 <vTaskPlaceOnEventList>
+				/* Unlocking the queue means queue events can effect the
+				event list.  It is possible that interrupts occurring now
+				remove this task from the event list again - but as the
+				scheduler is suspended the task will go onto the pending
+				ready last instead of the actual ready list. */
+				prvUnlockQueue( pxQueue );
+ 8006f1c:	6b38      	ldr	r0, [r7, #48]	@ 0x30
+ 8006f1e:	f000 f967 	bl	80071f0 <prvUnlockQueue>
+				/* Resuming the scheduler will move tasks from the pending
+				ready list into the ready list - so it is feasible that this
+				task is already in a ready list before it yields - in which
+				case the yield will not cause a context switch unless there
+				is also a higher priority task in the pending ready list. */
+				if( xTaskResumeAll() == pdFALSE )
+ 8006f22:	f000 f9dd 	bl	80072e0 <xTaskResumeAll>
+ 8006f26:	4603      	mov	r3, r0
+ 8006f28:	2b00      	cmp	r3, #0
+ 8006f2a:	f47f af7c 	bne.w	8006e26 <xQueueGenericSend+0xc6>
+				{
+					portYIELD_WITHIN_API();
+ 8006f2e:	4b0c      	ldr	r3, [pc, #48]	@ (8006f60 <xQueueGenericSend+0x200>)
+ 8006f30:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
+ 8006f34:	601a      	str	r2, [r3, #0]
+ 8006f36:	f3bf 8f4f 	dsb	sy
+ 8006f3a:	f3bf 8f6f 	isb	sy
+ 8006f3e:	e772      	b.n	8006e26 <xQueueGenericSend+0xc6>
+				}
+			}
+			else
+			{
+				/* Try again. */
+				prvUnlockQueue( pxQueue );
+ 8006f40:	6b38      	ldr	r0, [r7, #48]	@ 0x30
+ 8006f42:	f000 f955 	bl	80071f0 <prvUnlockQueue>
+				( void ) xTaskResumeAll();
+ 8006f46:	f000 f9cb 	bl	80072e0 <xTaskResumeAll>
+ 8006f4a:	e76c      	b.n	8006e26 <xQueueGenericSend+0xc6>
+			}
+		}
+		else
+		{
+			/* The timeout has expired. */
+			prvUnlockQueue( pxQueue );
+ 8006f4c:	6b38      	ldr	r0, [r7, #48]	@ 0x30
+ 8006f4e:	f000 f94f 	bl	80071f0 <prvUnlockQueue>
+			( void ) xTaskResumeAll();
+ 8006f52:	f000 f9c5 	bl	80072e0 <xTaskResumeAll>
+
+			traceQUEUE_SEND_FAILED( pxQueue );
+			return errQUEUE_FULL;
+ 8006f56:	2300      	movs	r3, #0
+		}
+	} /*lint -restore */
+}
+ 8006f58:	4618      	mov	r0, r3
+ 8006f5a:	3738      	adds	r7, #56	@ 0x38
+ 8006f5c:	46bd      	mov	sp, r7
+ 8006f5e:	bd80      	pop	{r7, pc}
+ 8006f60:	e000ed04 	.word	0xe000ed04
+
+08006f64 <xQueueGenericSendFromISR>:
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition )
+{
+ 8006f64:	b580      	push	{r7, lr}
+ 8006f66:	b090      	sub	sp, #64	@ 0x40
+ 8006f68:	af00      	add	r7, sp, #0
+ 8006f6a:	60f8      	str	r0, [r7, #12]
+ 8006f6c:	60b9      	str	r1, [r7, #8]
+ 8006f6e:	607a      	str	r2, [r7, #4]
+ 8006f70:	603b      	str	r3, [r7, #0]
+BaseType_t xReturn;
+UBaseType_t uxSavedInterruptStatus;
+Queue_t * const pxQueue = xQueue;
+ 8006f72:	68fb      	ldr	r3, [r7, #12]
+ 8006f74:	63bb      	str	r3, [r7, #56]	@ 0x38
+
+	configASSERT( pxQueue );
+ 8006f76:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
+ 8006f78:	2b00      	cmp	r3, #0
+ 8006f7a:	d10b      	bne.n	8006f94 <xQueueGenericSendFromISR+0x30>
+	__asm volatile
+ 8006f7c:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8006f80:	f383 8811 	msr	BASEPRI, r3
+ 8006f84:	f3bf 8f6f 	isb	sy
+ 8006f88:	f3bf 8f4f 	dsb	sy
+ 8006f8c:	62bb      	str	r3, [r7, #40]	@ 0x28
+}
+ 8006f8e:	bf00      	nop
+ 8006f90:	bf00      	nop
+ 8006f92:	e7fd      	b.n	8006f90 <xQueueGenericSendFromISR+0x2c>
+	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
+ 8006f94:	68bb      	ldr	r3, [r7, #8]
+ 8006f96:	2b00      	cmp	r3, #0
+ 8006f98:	d103      	bne.n	8006fa2 <xQueueGenericSendFromISR+0x3e>
+ 8006f9a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
+ 8006f9c:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8006f9e:	2b00      	cmp	r3, #0
+ 8006fa0:	d101      	bne.n	8006fa6 <xQueueGenericSendFromISR+0x42>
+ 8006fa2:	2301      	movs	r3, #1
+ 8006fa4:	e000      	b.n	8006fa8 <xQueueGenericSendFromISR+0x44>
+ 8006fa6:	2300      	movs	r3, #0
+ 8006fa8:	2b00      	cmp	r3, #0
+ 8006faa:	d10b      	bne.n	8006fc4 <xQueueGenericSendFromISR+0x60>
+	__asm volatile
+ 8006fac:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8006fb0:	f383 8811 	msr	BASEPRI, r3
+ 8006fb4:	f3bf 8f6f 	isb	sy
+ 8006fb8:	f3bf 8f4f 	dsb	sy
+ 8006fbc:	627b      	str	r3, [r7, #36]	@ 0x24
+}
+ 8006fbe:	bf00      	nop
+ 8006fc0:	bf00      	nop
+ 8006fc2:	e7fd      	b.n	8006fc0 <xQueueGenericSendFromISR+0x5c>
+	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
+ 8006fc4:	683b      	ldr	r3, [r7, #0]
+ 8006fc6:	2b02      	cmp	r3, #2
+ 8006fc8:	d103      	bne.n	8006fd2 <xQueueGenericSendFromISR+0x6e>
+ 8006fca:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
+ 8006fcc:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
+ 8006fce:	2b01      	cmp	r3, #1
+ 8006fd0:	d101      	bne.n	8006fd6 <xQueueGenericSendFromISR+0x72>
+ 8006fd2:	2301      	movs	r3, #1
+ 8006fd4:	e000      	b.n	8006fd8 <xQueueGenericSendFromISR+0x74>
+ 8006fd6:	2300      	movs	r3, #0
+ 8006fd8:	2b00      	cmp	r3, #0
+ 8006fda:	d10b      	bne.n	8006ff4 <xQueueGenericSendFromISR+0x90>
+	__asm volatile
+ 8006fdc:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8006fe0:	f383 8811 	msr	BASEPRI, r3
+ 8006fe4:	f3bf 8f6f 	isb	sy
+ 8006fe8:	f3bf 8f4f 	dsb	sy
+ 8006fec:	623b      	str	r3, [r7, #32]
+}
+ 8006fee:	bf00      	nop
+ 8006ff0:	bf00      	nop
+ 8006ff2:	e7fd      	b.n	8006ff0 <xQueueGenericSendFromISR+0x8c>
+	that have been assigned a priority at or (logically) below the maximum
+	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
+	safe API to ensure interrupt entry is as fast and as simple as possible.
+	More information (albeit Cortex-M specific) is provided on the following
+	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
+	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+ 8006ff4:	f000 fe52 	bl	8007c9c <vPortValidateInterruptPriority>
+
+portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
+{
+uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
+
+	__asm volatile
+ 8006ff8:	f3ef 8211 	mrs	r2, BASEPRI
+ 8006ffc:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8007000:	f383 8811 	msr	BASEPRI, r3
+ 8007004:	f3bf 8f6f 	isb	sy
+ 8007008:	f3bf 8f4f 	dsb	sy
+ 800700c:	61fa      	str	r2, [r7, #28]
+ 800700e:	61bb      	str	r3, [r7, #24]
+		:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+	);
+
+	/* This return will not be reached but is necessary to prevent compiler
+	warnings. */
+	return ulOriginalBASEPRI;
+ 8007010:	69fb      	ldr	r3, [r7, #28]
+	/* Similar to xQueueGenericSend, except without blocking if there is no room
+	in the queue.  Also don't directly wake a task that was blocked on a queue
+	read, instead return a flag to say whether a context switch is required or
+	not (i.e. has a task with a higher priority than us been woken by this
+	post). */
+	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+ 8007012:	637b      	str	r3, [r7, #52]	@ 0x34
+	{
+		if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
+ 8007014:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
+ 8007016:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
+ 8007018:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
+ 800701a:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
+ 800701c:	429a      	cmp	r2, r3
+ 800701e:	d302      	bcc.n	8007026 <xQueueGenericSendFromISR+0xc2>
+ 8007020:	683b      	ldr	r3, [r7, #0]
+ 8007022:	2b02      	cmp	r3, #2
+ 8007024:	d12f      	bne.n	8007086 <xQueueGenericSendFromISR+0x122>
+		{
+			const int8_t cTxLock = pxQueue->cTxLock;
+ 8007026:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
+ 8007028:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
+ 800702c:	f887 3033 	strb.w	r3, [r7, #51]	@ 0x33
+			const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting;
+ 8007030:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
+ 8007032:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
+ 8007034:	62fb      	str	r3, [r7, #44]	@ 0x2c
+			/* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
+			semaphore or mutex.  That means prvCopyDataToQueue() cannot result
+			in a task disinheriting a priority and prvCopyDataToQueue() can be
+			called here even though the disinherit function does not check if
+			the scheduler is suspended before accessing the ready lists. */
+			( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
+ 8007036:	683a      	ldr	r2, [r7, #0]
+ 8007038:	68b9      	ldr	r1, [r7, #8]
+ 800703a:	6bb8      	ldr	r0, [r7, #56]	@ 0x38
+ 800703c:	f000 f86e 	bl	800711c <prvCopyDataToQueue>
+
+			/* The event list is not altered if the queue is locked.  This will
+			be done when the queue is unlocked later. */
+			if( cTxLock == queueUNLOCKED )
+ 8007040:	f997 3033 	ldrsb.w	r3, [r7, #51]	@ 0x33
+ 8007044:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
+ 8007048:	d112      	bne.n	8007070 <xQueueGenericSendFromISR+0x10c>
+						}
+					}
+				}
+				#else /* configUSE_QUEUE_SETS */
+				{
+					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+ 800704a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
+ 800704c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 800704e:	2b00      	cmp	r3, #0
+ 8007050:	d016      	beq.n	8007080 <xQueueGenericSendFromISR+0x11c>
+					{
+						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+ 8007052:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
+ 8007054:	3324      	adds	r3, #36	@ 0x24
+ 8007056:	4618      	mov	r0, r3
+ 8007058:	f000 fb42 	bl	80076e0 <xTaskRemoveFromEventList>
+ 800705c:	4603      	mov	r3, r0
+ 800705e:	2b00      	cmp	r3, #0
+ 8007060:	d00e      	beq.n	8007080 <xQueueGenericSendFromISR+0x11c>
+						{
+							/* The task waiting has a higher priority so record that a
+							context	switch is required. */
+							if( pxHigherPriorityTaskWoken != NULL )
+ 8007062:	687b      	ldr	r3, [r7, #4]
+ 8007064:	2b00      	cmp	r3, #0
+ 8007066:	d00b      	beq.n	8007080 <xQueueGenericSendFromISR+0x11c>
+							{
+								*pxHigherPriorityTaskWoken = pdTRUE;
+ 8007068:	687b      	ldr	r3, [r7, #4]
+ 800706a:	2201      	movs	r2, #1
+ 800706c:	601a      	str	r2, [r3, #0]
+ 800706e:	e007      	b.n	8007080 <xQueueGenericSendFromISR+0x11c>
+			}
+			else
+			{
+				/* Increment the lock count so the task that unlocks the queue
+				knows that data was posted while it was locked. */
+				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
+ 8007070:	f897 3033 	ldrb.w	r3, [r7, #51]	@ 0x33
+ 8007074:	3301      	adds	r3, #1
+ 8007076:	b2db      	uxtb	r3, r3
+ 8007078:	b25a      	sxtb	r2, r3
+ 800707a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
+ 800707c:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
+			}
+
+			xReturn = pdPASS;
+ 8007080:	2301      	movs	r3, #1
+ 8007082:	63fb      	str	r3, [r7, #60]	@ 0x3c
+		{
+ 8007084:	e001      	b.n	800708a <xQueueGenericSendFromISR+0x126>
+		}
+		else
+		{
+			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
+			xReturn = errQUEUE_FULL;
+ 8007086:	2300      	movs	r3, #0
+ 8007088:	63fb      	str	r3, [r7, #60]	@ 0x3c
+ 800708a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
+ 800708c:	617b      	str	r3, [r7, #20]
+}
+/*-----------------------------------------------------------*/
+
+portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
+{
+	__asm volatile
+ 800708e:	697b      	ldr	r3, [r7, #20]
+ 8007090:	f383 8811 	msr	BASEPRI, r3
+	(
+		"	msr basepri, %0	" :: "r" ( ulNewMaskValue ) : "memory"
+	);
+}
+ 8007094:	bf00      	nop
+		}
+	}
+	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+	return xReturn;
+ 8007096:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
+}
+ 8007098:	4618      	mov	r0, r3
+ 800709a:	3740      	adds	r7, #64	@ 0x40
+ 800709c:	46bd      	mov	sp, r7
+ 800709e:	bd80      	pop	{r7, pc}
+
+080070a0 <uxQueueMessagesWaiting>:
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue )
+{
+ 80070a0:	b580      	push	{r7, lr}
+ 80070a2:	b084      	sub	sp, #16
+ 80070a4:	af00      	add	r7, sp, #0
+ 80070a6:	6078      	str	r0, [r7, #4]
+UBaseType_t uxReturn;
+
+	configASSERT( xQueue );
+ 80070a8:	687b      	ldr	r3, [r7, #4]
+ 80070aa:	2b00      	cmp	r3, #0
+ 80070ac:	d10b      	bne.n	80070c6 <uxQueueMessagesWaiting+0x26>
+	__asm volatile
+ 80070ae:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 80070b2:	f383 8811 	msr	BASEPRI, r3
+ 80070b6:	f3bf 8f6f 	isb	sy
+ 80070ba:	f3bf 8f4f 	dsb	sy
+ 80070be:	60bb      	str	r3, [r7, #8]
+}
+ 80070c0:	bf00      	nop
+ 80070c2:	bf00      	nop
+ 80070c4:	e7fd      	b.n	80070c2 <uxQueueMessagesWaiting+0x22>
+
+	taskENTER_CRITICAL();
+ 80070c6:	f000 fd37 	bl	8007b38 <vPortEnterCritical>
+	{
+		uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;
+ 80070ca:	687b      	ldr	r3, [r7, #4]
+ 80070cc:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
+ 80070ce:	60fb      	str	r3, [r7, #12]
+	}
+	taskEXIT_CRITICAL();
+ 80070d0:	f000 fd64 	bl	8007b9c <vPortExitCritical>
+
+	return uxReturn;
+ 80070d4:	68fb      	ldr	r3, [r7, #12]
+} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
+ 80070d6:	4618      	mov	r0, r3
+ 80070d8:	3710      	adds	r7, #16
+ 80070da:	46bd      	mov	sp, r7
+ 80070dc:	bd80      	pop	{r7, pc}
+
+080070de <uxQueueMessagesWaitingFromISR>:
+	return uxReturn;
+} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue )
+{
+ 80070de:	b480      	push	{r7}
+ 80070e0:	b087      	sub	sp, #28
+ 80070e2:	af00      	add	r7, sp, #0
+ 80070e4:	6078      	str	r0, [r7, #4]
+UBaseType_t uxReturn;
+Queue_t * const pxQueue = xQueue;
+ 80070e6:	687b      	ldr	r3, [r7, #4]
+ 80070e8:	617b      	str	r3, [r7, #20]
+
+	configASSERT( pxQueue );
+ 80070ea:	697b      	ldr	r3, [r7, #20]
+ 80070ec:	2b00      	cmp	r3, #0
+ 80070ee:	d10b      	bne.n	8007108 <uxQueueMessagesWaitingFromISR+0x2a>
+	__asm volatile
+ 80070f0:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 80070f4:	f383 8811 	msr	BASEPRI, r3
+ 80070f8:	f3bf 8f6f 	isb	sy
+ 80070fc:	f3bf 8f4f 	dsb	sy
+ 8007100:	60fb      	str	r3, [r7, #12]
+}
+ 8007102:	bf00      	nop
+ 8007104:	bf00      	nop
+ 8007106:	e7fd      	b.n	8007104 <uxQueueMessagesWaitingFromISR+0x26>
+	uxReturn = pxQueue->uxMessagesWaiting;
+ 8007108:	697b      	ldr	r3, [r7, #20]
+ 800710a:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
+ 800710c:	613b      	str	r3, [r7, #16]
+
+	return uxReturn;
+ 800710e:	693b      	ldr	r3, [r7, #16]
+} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
+ 8007110:	4618      	mov	r0, r3
+ 8007112:	371c      	adds	r7, #28
+ 8007114:	46bd      	mov	sp, r7
+ 8007116:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800711a:	4770      	bx	lr
+
+0800711c <prvCopyDataToQueue>:
+
+#endif /* configUSE_MUTEXES */
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
+{
+ 800711c:	b580      	push	{r7, lr}
+ 800711e:	b086      	sub	sp, #24
+ 8007120:	af00      	add	r7, sp, #0
+ 8007122:	60f8      	str	r0, [r7, #12]
+ 8007124:	60b9      	str	r1, [r7, #8]
+ 8007126:	607a      	str	r2, [r7, #4]
+BaseType_t xReturn = pdFALSE;
+ 8007128:	2300      	movs	r3, #0
+ 800712a:	617b      	str	r3, [r7, #20]
+UBaseType_t uxMessagesWaiting;
+
+	/* This function is called from a critical section. */
+
+	uxMessagesWaiting = pxQueue->uxMessagesWaiting;
+ 800712c:	68fb      	ldr	r3, [r7, #12]
+ 800712e:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
+ 8007130:	613b      	str	r3, [r7, #16]
+
+	if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
+ 8007132:	68fb      	ldr	r3, [r7, #12]
+ 8007134:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8007136:	2b00      	cmp	r3, #0
+ 8007138:	d10d      	bne.n	8007156 <prvCopyDataToQueue+0x3a>
+	{
+		#if ( configUSE_MUTEXES == 1 )
+		{
+			if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
+ 800713a:	68fb      	ldr	r3, [r7, #12]
+ 800713c:	681b      	ldr	r3, [r3, #0]
+ 800713e:	2b00      	cmp	r3, #0
+ 8007140:	d14d      	bne.n	80071de <prvCopyDataToQueue+0xc2>
+			{
+				/* The mutex is no longer being held. */
+				xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder );
+ 8007142:	68fb      	ldr	r3, [r7, #12]
+ 8007144:	689b      	ldr	r3, [r3, #8]
+ 8007146:	4618      	mov	r0, r3
+ 8007148:	f000 fbf2 	bl	8007930 <xTaskPriorityDisinherit>
+ 800714c:	6178      	str	r0, [r7, #20]
+				pxQueue->u.xSemaphore.xMutexHolder = NULL;
+ 800714e:	68fb      	ldr	r3, [r7, #12]
+ 8007150:	2200      	movs	r2, #0
+ 8007152:	609a      	str	r2, [r3, #8]
+ 8007154:	e043      	b.n	80071de <prvCopyDataToQueue+0xc2>
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		#endif /* configUSE_MUTEXES */
+	}
+	else if( xPosition == queueSEND_TO_BACK )
+ 8007156:	687b      	ldr	r3, [r7, #4]
+ 8007158:	2b00      	cmp	r3, #0
+ 800715a:	d119      	bne.n	8007190 <prvCopyDataToQueue+0x74>
+	{
+		( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
+ 800715c:	68fb      	ldr	r3, [r7, #12]
+ 800715e:	6858      	ldr	r0, [r3, #4]
+ 8007160:	68fb      	ldr	r3, [r7, #12]
+ 8007162:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8007164:	461a      	mov	r2, r3
+ 8007166:	68b9      	ldr	r1, [r7, #8]
+ 8007168:	f000 fea6 	bl	8007eb8 <memcpy>
+		pxQueue->pcWriteTo += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
+ 800716c:	68fb      	ldr	r3, [r7, #12]
+ 800716e:	685a      	ldr	r2, [r3, #4]
+ 8007170:	68fb      	ldr	r3, [r7, #12]
+ 8007172:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8007174:	441a      	add	r2, r3
+ 8007176:	68fb      	ldr	r3, [r7, #12]
+ 8007178:	605a      	str	r2, [r3, #4]
+		if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
+ 800717a:	68fb      	ldr	r3, [r7, #12]
+ 800717c:	685a      	ldr	r2, [r3, #4]
+ 800717e:	68fb      	ldr	r3, [r7, #12]
+ 8007180:	689b      	ldr	r3, [r3, #8]
+ 8007182:	429a      	cmp	r2, r3
+ 8007184:	d32b      	bcc.n	80071de <prvCopyDataToQueue+0xc2>
+		{
+			pxQueue->pcWriteTo = pxQueue->pcHead;
+ 8007186:	68fb      	ldr	r3, [r7, #12]
+ 8007188:	681a      	ldr	r2, [r3, #0]
+ 800718a:	68fb      	ldr	r3, [r7, #12]
+ 800718c:	605a      	str	r2, [r3, #4]
+ 800718e:	e026      	b.n	80071de <prvCopyDataToQueue+0xc2>
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	else
+	{
+		( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes.  Assert checks null pointer only used when length is 0. */
+ 8007190:	68fb      	ldr	r3, [r7, #12]
+ 8007192:	68d8      	ldr	r0, [r3, #12]
+ 8007194:	68fb      	ldr	r3, [r7, #12]
+ 8007196:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8007198:	461a      	mov	r2, r3
+ 800719a:	68b9      	ldr	r1, [r7, #8]
+ 800719c:	f000 fe8c 	bl	8007eb8 <memcpy>
+		pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize;
+ 80071a0:	68fb      	ldr	r3, [r7, #12]
+ 80071a2:	68da      	ldr	r2, [r3, #12]
+ 80071a4:	68fb      	ldr	r3, [r7, #12]
+ 80071a6:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 80071a8:	425b      	negs	r3, r3
+ 80071aa:	441a      	add	r2, r3
+ 80071ac:	68fb      	ldr	r3, [r7, #12]
+ 80071ae:	60da      	str	r2, [r3, #12]
+		if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
+ 80071b0:	68fb      	ldr	r3, [r7, #12]
+ 80071b2:	68da      	ldr	r2, [r3, #12]
+ 80071b4:	68fb      	ldr	r3, [r7, #12]
+ 80071b6:	681b      	ldr	r3, [r3, #0]
+ 80071b8:	429a      	cmp	r2, r3
+ 80071ba:	d207      	bcs.n	80071cc <prvCopyDataToQueue+0xb0>
+		{
+			pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize );
+ 80071bc:	68fb      	ldr	r3, [r7, #12]
+ 80071be:	689a      	ldr	r2, [r3, #8]
+ 80071c0:	68fb      	ldr	r3, [r7, #12]
+ 80071c2:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 80071c4:	425b      	negs	r3, r3
+ 80071c6:	441a      	add	r2, r3
+ 80071c8:	68fb      	ldr	r3, [r7, #12]
+ 80071ca:	60da      	str	r2, [r3, #12]
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		if( xPosition == queueOVERWRITE )
+ 80071cc:	687b      	ldr	r3, [r7, #4]
+ 80071ce:	2b02      	cmp	r3, #2
+ 80071d0:	d105      	bne.n	80071de <prvCopyDataToQueue+0xc2>
+		{
+			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
+ 80071d2:	693b      	ldr	r3, [r7, #16]
+ 80071d4:	2b00      	cmp	r3, #0
+ 80071d6:	d002      	beq.n	80071de <prvCopyDataToQueue+0xc2>
+			{
+				/* An item is not being added but overwritten, so subtract
+				one from the recorded number of items in the queue so when
+				one is added again below the number of recorded items remains
+				correct. */
+				--uxMessagesWaiting;
+ 80071d8:	693b      	ldr	r3, [r7, #16]
+ 80071da:	3b01      	subs	r3, #1
+ 80071dc:	613b      	str	r3, [r7, #16]
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+
+	pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
+ 80071de:	693b      	ldr	r3, [r7, #16]
+ 80071e0:	1c5a      	adds	r2, r3, #1
+ 80071e2:	68fb      	ldr	r3, [r7, #12]
+ 80071e4:	639a      	str	r2, [r3, #56]	@ 0x38
+
+	return xReturn;
+ 80071e6:	697b      	ldr	r3, [r7, #20]
+}
+ 80071e8:	4618      	mov	r0, r3
+ 80071ea:	3718      	adds	r7, #24
+ 80071ec:	46bd      	mov	sp, r7
+ 80071ee:	bd80      	pop	{r7, pc}
+
+080071f0 <prvUnlockQueue>:
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void prvUnlockQueue( Queue_t * const pxQueue )
+{
+ 80071f0:	b580      	push	{r7, lr}
+ 80071f2:	b084      	sub	sp, #16
+ 80071f4:	af00      	add	r7, sp, #0
+ 80071f6:	6078      	str	r0, [r7, #4]
+
+	/* The lock counts contains the number of extra data items placed or
+	removed from the queue while the queue was locked.  When a queue is
+	locked items can be added or removed, but the event lists cannot be
+	updated. */
+	taskENTER_CRITICAL();
+ 80071f8:	f000 fc9e 	bl	8007b38 <vPortEnterCritical>
+	{
+		int8_t cTxLock = pxQueue->cTxLock;
+ 80071fc:	687b      	ldr	r3, [r7, #4]
+ 80071fe:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
+ 8007202:	73fb      	strb	r3, [r7, #15]
+
+		/* See if data was added to the queue while it was locked. */
+		while( cTxLock > queueLOCKED_UNMODIFIED )
+ 8007204:	e011      	b.n	800722a <prvUnlockQueue+0x3a>
+			}
+			#else /* configUSE_QUEUE_SETS */
+			{
+				/* Tasks that are removed from the event list will get added to
+				the pending ready list as the scheduler is still suspended. */
+				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+ 8007206:	687b      	ldr	r3, [r7, #4]
+ 8007208:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 800720a:	2b00      	cmp	r3, #0
+ 800720c:	d012      	beq.n	8007234 <prvUnlockQueue+0x44>
+				{
+					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+ 800720e:	687b      	ldr	r3, [r7, #4]
+ 8007210:	3324      	adds	r3, #36	@ 0x24
+ 8007212:	4618      	mov	r0, r3
+ 8007214:	f000 fa64 	bl	80076e0 <xTaskRemoveFromEventList>
+ 8007218:	4603      	mov	r3, r0
+ 800721a:	2b00      	cmp	r3, #0
+ 800721c:	d001      	beq.n	8007222 <prvUnlockQueue+0x32>
+					{
+						/* The task waiting has a higher priority so record that
+						a context switch is required. */
+						vTaskMissedYield();
+ 800721e:	f000 fb3d 	bl	800789c <vTaskMissedYield>
+					break;
+				}
+			}
+			#endif /* configUSE_QUEUE_SETS */
+
+			--cTxLock;
+ 8007222:	7bfb      	ldrb	r3, [r7, #15]
+ 8007224:	3b01      	subs	r3, #1
+ 8007226:	b2db      	uxtb	r3, r3
+ 8007228:	73fb      	strb	r3, [r7, #15]
+		while( cTxLock > queueLOCKED_UNMODIFIED )
+ 800722a:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 800722e:	2b00      	cmp	r3, #0
+ 8007230:	dce9      	bgt.n	8007206 <prvUnlockQueue+0x16>
+ 8007232:	e000      	b.n	8007236 <prvUnlockQueue+0x46>
+					break;
+ 8007234:	bf00      	nop
+		}
+
+		pxQueue->cTxLock = queueUNLOCKED;
+ 8007236:	687b      	ldr	r3, [r7, #4]
+ 8007238:	22ff      	movs	r2, #255	@ 0xff
+ 800723a:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
+	}
+	taskEXIT_CRITICAL();
+ 800723e:	f000 fcad 	bl	8007b9c <vPortExitCritical>
+
+	/* Do the same for the Rx lock. */
+	taskENTER_CRITICAL();
+ 8007242:	f000 fc79 	bl	8007b38 <vPortEnterCritical>
+	{
+		int8_t cRxLock = pxQueue->cRxLock;
+ 8007246:	687b      	ldr	r3, [r7, #4]
+ 8007248:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
+ 800724c:	73bb      	strb	r3, [r7, #14]
+
+		while( cRxLock > queueLOCKED_UNMODIFIED )
+ 800724e:	e011      	b.n	8007274 <prvUnlockQueue+0x84>
+		{
+			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+ 8007250:	687b      	ldr	r3, [r7, #4]
+ 8007252:	691b      	ldr	r3, [r3, #16]
+ 8007254:	2b00      	cmp	r3, #0
+ 8007256:	d012      	beq.n	800727e <prvUnlockQueue+0x8e>
+			{
+				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+ 8007258:	687b      	ldr	r3, [r7, #4]
+ 800725a:	3310      	adds	r3, #16
+ 800725c:	4618      	mov	r0, r3
+ 800725e:	f000 fa3f 	bl	80076e0 <xTaskRemoveFromEventList>
+ 8007262:	4603      	mov	r3, r0
+ 8007264:	2b00      	cmp	r3, #0
+ 8007266:	d001      	beq.n	800726c <prvUnlockQueue+0x7c>
+				{
+					vTaskMissedYield();
+ 8007268:	f000 fb18 	bl	800789c <vTaskMissedYield>
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+
+				--cRxLock;
+ 800726c:	7bbb      	ldrb	r3, [r7, #14]
+ 800726e:	3b01      	subs	r3, #1
+ 8007270:	b2db      	uxtb	r3, r3
+ 8007272:	73bb      	strb	r3, [r7, #14]
+		while( cRxLock > queueLOCKED_UNMODIFIED )
+ 8007274:	f997 300e 	ldrsb.w	r3, [r7, #14]
+ 8007278:	2b00      	cmp	r3, #0
+ 800727a:	dce9      	bgt.n	8007250 <prvUnlockQueue+0x60>
+ 800727c:	e000      	b.n	8007280 <prvUnlockQueue+0x90>
+			}
+			else
+			{
+				break;
+ 800727e:	bf00      	nop
+			}
+		}
+
+		pxQueue->cRxLock = queueUNLOCKED;
+ 8007280:	687b      	ldr	r3, [r7, #4]
+ 8007282:	22ff      	movs	r2, #255	@ 0xff
+ 8007284:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
+	}
+	taskEXIT_CRITICAL();
+ 8007288:	f000 fc88 	bl	8007b9c <vPortExitCritical>
+}
+ 800728c:	bf00      	nop
+ 800728e:	3710      	adds	r7, #16
+ 8007290:	46bd      	mov	sp, r7
+ 8007292:	bd80      	pop	{r7, pc}
+
+08007294 <prvIsQueueFull>:
+	return xReturn;
+} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )
+{
+ 8007294:	b580      	push	{r7, lr}
+ 8007296:	b084      	sub	sp, #16
+ 8007298:	af00      	add	r7, sp, #0
+ 800729a:	6078      	str	r0, [r7, #4]
+BaseType_t xReturn;
+
+	taskENTER_CRITICAL();
+ 800729c:	f000 fc4c 	bl	8007b38 <vPortEnterCritical>
+	{
+		if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
+ 80072a0:	687b      	ldr	r3, [r7, #4]
+ 80072a2:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
+ 80072a4:	687b      	ldr	r3, [r7, #4]
+ 80072a6:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
+ 80072a8:	429a      	cmp	r2, r3
+ 80072aa:	d102      	bne.n	80072b2 <prvIsQueueFull+0x1e>
+		{
+			xReturn = pdTRUE;
+ 80072ac:	2301      	movs	r3, #1
+ 80072ae:	60fb      	str	r3, [r7, #12]
+ 80072b0:	e001      	b.n	80072b6 <prvIsQueueFull+0x22>
+		}
+		else
+		{
+			xReturn = pdFALSE;
+ 80072b2:	2300      	movs	r3, #0
+ 80072b4:	60fb      	str	r3, [r7, #12]
+		}
+	}
+	taskEXIT_CRITICAL();
+ 80072b6:	f000 fc71 	bl	8007b9c <vPortExitCritical>
+
+	return xReturn;
+ 80072ba:	68fb      	ldr	r3, [r7, #12]
+}
+ 80072bc:	4618      	mov	r0, r3
+ 80072be:	3710      	adds	r7, #16
+ 80072c0:	46bd      	mov	sp, r7
+ 80072c2:	bd80      	pop	{r7, pc}
+
+080072c4 <vTaskSuspendAll>:
+	vPortEndScheduler();
+}
+/*----------------------------------------------------------*/
+
+void vTaskSuspendAll( void )
+{
+ 80072c4:	b480      	push	{r7}
+ 80072c6:	af00      	add	r7, sp, #0
+	do not otherwise exhibit real time behaviour. */
+	portSOFTWARE_BARRIER();
+
+	/* The scheduler is suspended if uxSchedulerSuspended is non-zero.  An increment
+	is used to allow calls to vTaskSuspendAll() to nest. */
+	++uxSchedulerSuspended;
+ 80072c8:	4b04      	ldr	r3, [pc, #16]	@ (80072dc <vTaskSuspendAll+0x18>)
+ 80072ca:	681b      	ldr	r3, [r3, #0]
+ 80072cc:	3301      	adds	r3, #1
+ 80072ce:	4a03      	ldr	r2, [pc, #12]	@ (80072dc <vTaskSuspendAll+0x18>)
+ 80072d0:	6013      	str	r3, [r2, #0]
+
+	/* Enforces ordering for ports and optimised compilers that may otherwise place
+	the above increment elsewhere. */
+	portMEMORY_BARRIER();
+}
+ 80072d2:	bf00      	nop
+ 80072d4:	46bd      	mov	sp, r7
+ 80072d6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80072da:	4770      	bx	lr
+ 80072dc:	200003bc 	.word	0x200003bc
+
+080072e0 <xTaskResumeAll>:
+
+#endif /* configUSE_TICKLESS_IDLE */
+/*----------------------------------------------------------*/
+
+BaseType_t xTaskResumeAll( void )
+{
+ 80072e0:	b580      	push	{r7, lr}
+ 80072e2:	b084      	sub	sp, #16
+ 80072e4:	af00      	add	r7, sp, #0
+TCB_t *pxTCB = NULL;
+ 80072e6:	2300      	movs	r3, #0
+ 80072e8:	60fb      	str	r3, [r7, #12]
+BaseType_t xAlreadyYielded = pdFALSE;
+ 80072ea:	2300      	movs	r3, #0
+ 80072ec:	60bb      	str	r3, [r7, #8]
+
+	/* If uxSchedulerSuspended is zero then this function does not match a
+	previous call to vTaskSuspendAll(). */
+	configASSERT( uxSchedulerSuspended );
+ 80072ee:	4b42      	ldr	r3, [pc, #264]	@ (80073f8 <xTaskResumeAll+0x118>)
+ 80072f0:	681b      	ldr	r3, [r3, #0]
+ 80072f2:	2b00      	cmp	r3, #0
+ 80072f4:	d10b      	bne.n	800730e <xTaskResumeAll+0x2e>
+	__asm volatile
+ 80072f6:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 80072fa:	f383 8811 	msr	BASEPRI, r3
+ 80072fe:	f3bf 8f6f 	isb	sy
+ 8007302:	f3bf 8f4f 	dsb	sy
+ 8007306:	603b      	str	r3, [r7, #0]
+}
+ 8007308:	bf00      	nop
+ 800730a:	bf00      	nop
+ 800730c:	e7fd      	b.n	800730a <xTaskResumeAll+0x2a>
+	/* It is possible that an ISR caused a task to be removed from an event
+	list while the scheduler was suspended.  If this was the case then the
+	removed task will have been added to the xPendingReadyList.  Once the
+	scheduler has been resumed it is safe to move all the pending ready
+	tasks from this list into their appropriate ready list. */
+	taskENTER_CRITICAL();
+ 800730e:	f000 fc13 	bl	8007b38 <vPortEnterCritical>
+	{
+		--uxSchedulerSuspended;
+ 8007312:	4b39      	ldr	r3, [pc, #228]	@ (80073f8 <xTaskResumeAll+0x118>)
+ 8007314:	681b      	ldr	r3, [r3, #0]
+ 8007316:	3b01      	subs	r3, #1
+ 8007318:	4a37      	ldr	r2, [pc, #220]	@ (80073f8 <xTaskResumeAll+0x118>)
+ 800731a:	6013      	str	r3, [r2, #0]
+
+		if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+ 800731c:	4b36      	ldr	r3, [pc, #216]	@ (80073f8 <xTaskResumeAll+0x118>)
+ 800731e:	681b      	ldr	r3, [r3, #0]
+ 8007320:	2b00      	cmp	r3, #0
+ 8007322:	d161      	bne.n	80073e8 <xTaskResumeAll+0x108>
+		{
+			if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
+ 8007324:	4b35      	ldr	r3, [pc, #212]	@ (80073fc <xTaskResumeAll+0x11c>)
+ 8007326:	681b      	ldr	r3, [r3, #0]
+ 8007328:	2b00      	cmp	r3, #0
+ 800732a:	d05d      	beq.n	80073e8 <xTaskResumeAll+0x108>
+			{
+				/* Move any readied tasks from the pending list into the
+				appropriate ready list. */
+				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
+ 800732c:	e02e      	b.n	800738c <xTaskResumeAll+0xac>
+				{
+					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+ 800732e:	4b34      	ldr	r3, [pc, #208]	@ (8007400 <xTaskResumeAll+0x120>)
+ 8007330:	68db      	ldr	r3, [r3, #12]
+ 8007332:	68db      	ldr	r3, [r3, #12]
+ 8007334:	60fb      	str	r3, [r7, #12]
+					( void ) uxListRemove( &( pxTCB->xEventListItem ) );
+ 8007336:	68fb      	ldr	r3, [r7, #12]
+ 8007338:	3318      	adds	r3, #24
+ 800733a:	4618      	mov	r0, r3
+ 800733c:	f7ff fce5 	bl	8006d0a <uxListRemove>
+					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+ 8007340:	68fb      	ldr	r3, [r7, #12]
+ 8007342:	3304      	adds	r3, #4
+ 8007344:	4618      	mov	r0, r3
+ 8007346:	f7ff fce0 	bl	8006d0a <uxListRemove>
+					prvAddTaskToReadyList( pxTCB );
+ 800734a:	68fb      	ldr	r3, [r7, #12]
+ 800734c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 800734e:	2201      	movs	r2, #1
+ 8007350:	409a      	lsls	r2, r3
+ 8007352:	4b2c      	ldr	r3, [pc, #176]	@ (8007404 <xTaskResumeAll+0x124>)
+ 8007354:	681b      	ldr	r3, [r3, #0]
+ 8007356:	4313      	orrs	r3, r2
+ 8007358:	4a2a      	ldr	r2, [pc, #168]	@ (8007404 <xTaskResumeAll+0x124>)
+ 800735a:	6013      	str	r3, [r2, #0]
+ 800735c:	68fb      	ldr	r3, [r7, #12]
+ 800735e:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
+ 8007360:	4613      	mov	r3, r2
+ 8007362:	009b      	lsls	r3, r3, #2
+ 8007364:	4413      	add	r3, r2
+ 8007366:	009b      	lsls	r3, r3, #2
+ 8007368:	4a27      	ldr	r2, [pc, #156]	@ (8007408 <xTaskResumeAll+0x128>)
+ 800736a:	441a      	add	r2, r3
+ 800736c:	68fb      	ldr	r3, [r7, #12]
+ 800736e:	3304      	adds	r3, #4
+ 8007370:	4619      	mov	r1, r3
+ 8007372:	4610      	mov	r0, r2
+ 8007374:	f7ff fc6c 	bl	8006c50 <vListInsertEnd>
+
+					/* If the moved task has a priority higher than the current
+					task then a yield must be performed. */
+					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+ 8007378:	68fb      	ldr	r3, [r7, #12]
+ 800737a:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
+ 800737c:	4b23      	ldr	r3, [pc, #140]	@ (800740c <xTaskResumeAll+0x12c>)
+ 800737e:	681b      	ldr	r3, [r3, #0]
+ 8007380:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 8007382:	429a      	cmp	r2, r3
+ 8007384:	d302      	bcc.n	800738c <xTaskResumeAll+0xac>
+					{
+						xYieldPending = pdTRUE;
+ 8007386:	4b22      	ldr	r3, [pc, #136]	@ (8007410 <xTaskResumeAll+0x130>)
+ 8007388:	2201      	movs	r2, #1
+ 800738a:	601a      	str	r2, [r3, #0]
+				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
+ 800738c:	4b1c      	ldr	r3, [pc, #112]	@ (8007400 <xTaskResumeAll+0x120>)
+ 800738e:	681b      	ldr	r3, [r3, #0]
+ 8007390:	2b00      	cmp	r3, #0
+ 8007392:	d1cc      	bne.n	800732e <xTaskResumeAll+0x4e>
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+
+				if( pxTCB != NULL )
+ 8007394:	68fb      	ldr	r3, [r7, #12]
+ 8007396:	2b00      	cmp	r3, #0
+ 8007398:	d001      	beq.n	800739e <xTaskResumeAll+0xbe>
+					which may have prevented the next unblock time from being
+					re-calculated, in which case re-calculate it now.  Mainly
+					important for low power tickless implementations, where
+					this can prevent an unnecessary exit from low power
+					state. */
+					prvResetNextTaskUnblockTime();
+ 800739a:	f000 fa8b 	bl	80078b4 <prvResetNextTaskUnblockTime>
+				/* If any ticks occurred while the scheduler was suspended then
+				they should be processed now.  This ensures the tick count does
+				not	slip, and that any delayed tasks are resumed at the correct
+				time. */
+				{
+					TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
+ 800739e:	4b1d      	ldr	r3, [pc, #116]	@ (8007414 <xTaskResumeAll+0x134>)
+ 80073a0:	681b      	ldr	r3, [r3, #0]
+ 80073a2:	607b      	str	r3, [r7, #4]
+
+					if( xPendedCounts > ( TickType_t ) 0U )
+ 80073a4:	687b      	ldr	r3, [r7, #4]
+ 80073a6:	2b00      	cmp	r3, #0
+ 80073a8:	d010      	beq.n	80073cc <xTaskResumeAll+0xec>
+					{
+						do
+						{
+							if( xTaskIncrementTick() != pdFALSE )
+ 80073aa:	f000 f837 	bl	800741c <xTaskIncrementTick>
+ 80073ae:	4603      	mov	r3, r0
+ 80073b0:	2b00      	cmp	r3, #0
+ 80073b2:	d002      	beq.n	80073ba <xTaskResumeAll+0xda>
+							{
+								xYieldPending = pdTRUE;
+ 80073b4:	4b16      	ldr	r3, [pc, #88]	@ (8007410 <xTaskResumeAll+0x130>)
+ 80073b6:	2201      	movs	r2, #1
+ 80073b8:	601a      	str	r2, [r3, #0]
+							}
+							else
+							{
+								mtCOVERAGE_TEST_MARKER();
+							}
+							--xPendedCounts;
+ 80073ba:	687b      	ldr	r3, [r7, #4]
+ 80073bc:	3b01      	subs	r3, #1
+ 80073be:	607b      	str	r3, [r7, #4]
+						} while( xPendedCounts > ( TickType_t ) 0U );
+ 80073c0:	687b      	ldr	r3, [r7, #4]
+ 80073c2:	2b00      	cmp	r3, #0
+ 80073c4:	d1f1      	bne.n	80073aa <xTaskResumeAll+0xca>
+
+						xPendedTicks = 0;
+ 80073c6:	4b13      	ldr	r3, [pc, #76]	@ (8007414 <xTaskResumeAll+0x134>)
+ 80073c8:	2200      	movs	r2, #0
+ 80073ca:	601a      	str	r2, [r3, #0]
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+
+				if( xYieldPending != pdFALSE )
+ 80073cc:	4b10      	ldr	r3, [pc, #64]	@ (8007410 <xTaskResumeAll+0x130>)
+ 80073ce:	681b      	ldr	r3, [r3, #0]
+ 80073d0:	2b00      	cmp	r3, #0
+ 80073d2:	d009      	beq.n	80073e8 <xTaskResumeAll+0x108>
+				{
+					#if( configUSE_PREEMPTION != 0 )
+					{
+						xAlreadyYielded = pdTRUE;
+ 80073d4:	2301      	movs	r3, #1
+ 80073d6:	60bb      	str	r3, [r7, #8]
+					}
+					#endif
+					taskYIELD_IF_USING_PREEMPTION();
+ 80073d8:	4b0f      	ldr	r3, [pc, #60]	@ (8007418 <xTaskResumeAll+0x138>)
+ 80073da:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
+ 80073de:	601a      	str	r2, [r3, #0]
+ 80073e0:	f3bf 8f4f 	dsb	sy
+ 80073e4:	f3bf 8f6f 	isb	sy
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	taskEXIT_CRITICAL();
+ 80073e8:	f000 fbd8 	bl	8007b9c <vPortExitCritical>
+
+	return xAlreadyYielded;
+ 80073ec:	68bb      	ldr	r3, [r7, #8]
+}
+ 80073ee:	4618      	mov	r0, r3
+ 80073f0:	3710      	adds	r7, #16
+ 80073f2:	46bd      	mov	sp, r7
+ 80073f4:	bd80      	pop	{r7, pc}
+ 80073f6:	bf00      	nop
+ 80073f8:	200003bc 	.word	0x200003bc
+ 80073fc:	2000039c 	.word	0x2000039c
+ 8007400:	20000374 	.word	0x20000374
+ 8007404:	200003a4 	.word	0x200003a4
+ 8007408:	200002e0 	.word	0x200002e0
+ 800740c:	200002dc 	.word	0x200002dc
+ 8007410:	200003b0 	.word	0x200003b0
+ 8007414:	200003ac 	.word	0x200003ac
+ 8007418:	e000ed04 	.word	0xe000ed04
+
+0800741c <xTaskIncrementTick>:
+
+#endif /* INCLUDE_xTaskAbortDelay */
+/*----------------------------------------------------------*/
+
+BaseType_t xTaskIncrementTick( void )
+{
+ 800741c:	b580      	push	{r7, lr}
+ 800741e:	b086      	sub	sp, #24
+ 8007420:	af00      	add	r7, sp, #0
+TCB_t * pxTCB;
+TickType_t xItemValue;
+BaseType_t xSwitchRequired = pdFALSE;
+ 8007422:	2300      	movs	r3, #0
+ 8007424:	617b      	str	r3, [r7, #20]
+
+	/* Called by the portable layer each time a tick interrupt occurs.
+	Increments the tick then checks to see if the new tick value will cause any
+	tasks to be unblocked. */
+	traceTASK_INCREMENT_TICK( xTickCount );
+	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+ 8007426:	4b4f      	ldr	r3, [pc, #316]	@ (8007564 <xTaskIncrementTick+0x148>)
+ 8007428:	681b      	ldr	r3, [r3, #0]
+ 800742a:	2b00      	cmp	r3, #0
+ 800742c:	f040 808f 	bne.w	800754e <xTaskIncrementTick+0x132>
+	{
+		/* Minor optimisation.  The tick count cannot change in this
+		block. */
+		const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
+ 8007430:	4b4d      	ldr	r3, [pc, #308]	@ (8007568 <xTaskIncrementTick+0x14c>)
+ 8007432:	681b      	ldr	r3, [r3, #0]
+ 8007434:	3301      	adds	r3, #1
+ 8007436:	613b      	str	r3, [r7, #16]
+
+		/* Increment the RTOS tick, switching the delayed and overflowed
+		delayed lists if it wraps to 0. */
+		xTickCount = xConstTickCount;
+ 8007438:	4a4b      	ldr	r2, [pc, #300]	@ (8007568 <xTaskIncrementTick+0x14c>)
+ 800743a:	693b      	ldr	r3, [r7, #16]
+ 800743c:	6013      	str	r3, [r2, #0]
+
+		if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
+ 800743e:	693b      	ldr	r3, [r7, #16]
+ 8007440:	2b00      	cmp	r3, #0
+ 8007442:	d121      	bne.n	8007488 <xTaskIncrementTick+0x6c>
+		{
+			taskSWITCH_DELAYED_LISTS();
+ 8007444:	4b49      	ldr	r3, [pc, #292]	@ (800756c <xTaskIncrementTick+0x150>)
+ 8007446:	681b      	ldr	r3, [r3, #0]
+ 8007448:	681b      	ldr	r3, [r3, #0]
+ 800744a:	2b00      	cmp	r3, #0
+ 800744c:	d00b      	beq.n	8007466 <xTaskIncrementTick+0x4a>
+	__asm volatile
+ 800744e:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8007452:	f383 8811 	msr	BASEPRI, r3
+ 8007456:	f3bf 8f6f 	isb	sy
+ 800745a:	f3bf 8f4f 	dsb	sy
+ 800745e:	603b      	str	r3, [r7, #0]
+}
+ 8007460:	bf00      	nop
+ 8007462:	bf00      	nop
+ 8007464:	e7fd      	b.n	8007462 <xTaskIncrementTick+0x46>
+ 8007466:	4b41      	ldr	r3, [pc, #260]	@ (800756c <xTaskIncrementTick+0x150>)
+ 8007468:	681b      	ldr	r3, [r3, #0]
+ 800746a:	60fb      	str	r3, [r7, #12]
+ 800746c:	4b40      	ldr	r3, [pc, #256]	@ (8007570 <xTaskIncrementTick+0x154>)
+ 800746e:	681b      	ldr	r3, [r3, #0]
+ 8007470:	4a3e      	ldr	r2, [pc, #248]	@ (800756c <xTaskIncrementTick+0x150>)
+ 8007472:	6013      	str	r3, [r2, #0]
+ 8007474:	4a3e      	ldr	r2, [pc, #248]	@ (8007570 <xTaskIncrementTick+0x154>)
+ 8007476:	68fb      	ldr	r3, [r7, #12]
+ 8007478:	6013      	str	r3, [r2, #0]
+ 800747a:	4b3e      	ldr	r3, [pc, #248]	@ (8007574 <xTaskIncrementTick+0x158>)
+ 800747c:	681b      	ldr	r3, [r3, #0]
+ 800747e:	3301      	adds	r3, #1
+ 8007480:	4a3c      	ldr	r2, [pc, #240]	@ (8007574 <xTaskIncrementTick+0x158>)
+ 8007482:	6013      	str	r3, [r2, #0]
+ 8007484:	f000 fa16 	bl	80078b4 <prvResetNextTaskUnblockTime>
+
+		/* See if this tick has made a timeout expire.  Tasks are stored in
+		the	queue in the order of their wake time - meaning once one task
+		has been found whose block time has not expired there is no need to
+		look any further down the list. */
+		if( xConstTickCount >= xNextTaskUnblockTime )
+ 8007488:	4b3b      	ldr	r3, [pc, #236]	@ (8007578 <xTaskIncrementTick+0x15c>)
+ 800748a:	681b      	ldr	r3, [r3, #0]
+ 800748c:	693a      	ldr	r2, [r7, #16]
+ 800748e:	429a      	cmp	r2, r3
+ 8007490:	d348      	bcc.n	8007524 <xTaskIncrementTick+0x108>
+		{
+			for( ;; )
+			{
+				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+ 8007492:	4b36      	ldr	r3, [pc, #216]	@ (800756c <xTaskIncrementTick+0x150>)
+ 8007494:	681b      	ldr	r3, [r3, #0]
+ 8007496:	681b      	ldr	r3, [r3, #0]
+ 8007498:	2b00      	cmp	r3, #0
+ 800749a:	d104      	bne.n	80074a6 <xTaskIncrementTick+0x8a>
+					/* The delayed list is empty.  Set xNextTaskUnblockTime
+					to the maximum possible value so it is extremely
+					unlikely that the
+					if( xTickCount >= xNextTaskUnblockTime ) test will pass
+					next time through. */
+					xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+ 800749c:	4b36      	ldr	r3, [pc, #216]	@ (8007578 <xTaskIncrementTick+0x15c>)
+ 800749e:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
+ 80074a2:	601a      	str	r2, [r3, #0]
+					break;
+ 80074a4:	e03e      	b.n	8007524 <xTaskIncrementTick+0x108>
+				{
+					/* The delayed list is not empty, get the value of the
+					item at the head of the delayed list.  This is the time
+					at which the task at the head of the delayed list must
+					be removed from the Blocked state. */
+					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+ 80074a6:	4b31      	ldr	r3, [pc, #196]	@ (800756c <xTaskIncrementTick+0x150>)
+ 80074a8:	681b      	ldr	r3, [r3, #0]
+ 80074aa:	68db      	ldr	r3, [r3, #12]
+ 80074ac:	68db      	ldr	r3, [r3, #12]
+ 80074ae:	60bb      	str	r3, [r7, #8]
+					xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
+ 80074b0:	68bb      	ldr	r3, [r7, #8]
+ 80074b2:	685b      	ldr	r3, [r3, #4]
+ 80074b4:	607b      	str	r3, [r7, #4]
+
+					if( xConstTickCount < xItemValue )
+ 80074b6:	693a      	ldr	r2, [r7, #16]
+ 80074b8:	687b      	ldr	r3, [r7, #4]
+ 80074ba:	429a      	cmp	r2, r3
+ 80074bc:	d203      	bcs.n	80074c6 <xTaskIncrementTick+0xaa>
+						/* It is not time to unblock this item yet, but the
+						item value is the time at which the task at the head
+						of the blocked list must be removed from the Blocked
+						state -	so record the item value in
+						xNextTaskUnblockTime. */
+						xNextTaskUnblockTime = xItemValue;
+ 80074be:	4a2e      	ldr	r2, [pc, #184]	@ (8007578 <xTaskIncrementTick+0x15c>)
+ 80074c0:	687b      	ldr	r3, [r7, #4]
+ 80074c2:	6013      	str	r3, [r2, #0]
+						break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
+ 80074c4:	e02e      	b.n	8007524 <xTaskIncrementTick+0x108>
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* It is time to remove the item from the Blocked state. */
+					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+ 80074c6:	68bb      	ldr	r3, [r7, #8]
+ 80074c8:	3304      	adds	r3, #4
+ 80074ca:	4618      	mov	r0, r3
+ 80074cc:	f7ff fc1d 	bl	8006d0a <uxListRemove>
+
+					/* Is the task waiting on an event also?  If so remove
+					it from the event list. */
+					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+ 80074d0:	68bb      	ldr	r3, [r7, #8]
+ 80074d2:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
+ 80074d4:	2b00      	cmp	r3, #0
+ 80074d6:	d004      	beq.n	80074e2 <xTaskIncrementTick+0xc6>
+					{
+						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
+ 80074d8:	68bb      	ldr	r3, [r7, #8]
+ 80074da:	3318      	adds	r3, #24
+ 80074dc:	4618      	mov	r0, r3
+ 80074de:	f7ff fc14 	bl	8006d0a <uxListRemove>
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* Place the unblocked task into the appropriate ready
+					list. */
+					prvAddTaskToReadyList( pxTCB );
+ 80074e2:	68bb      	ldr	r3, [r7, #8]
+ 80074e4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 80074e6:	2201      	movs	r2, #1
+ 80074e8:	409a      	lsls	r2, r3
+ 80074ea:	4b24      	ldr	r3, [pc, #144]	@ (800757c <xTaskIncrementTick+0x160>)
+ 80074ec:	681b      	ldr	r3, [r3, #0]
+ 80074ee:	4313      	orrs	r3, r2
+ 80074f0:	4a22      	ldr	r2, [pc, #136]	@ (800757c <xTaskIncrementTick+0x160>)
+ 80074f2:	6013      	str	r3, [r2, #0]
+ 80074f4:	68bb      	ldr	r3, [r7, #8]
+ 80074f6:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
+ 80074f8:	4613      	mov	r3, r2
+ 80074fa:	009b      	lsls	r3, r3, #2
+ 80074fc:	4413      	add	r3, r2
+ 80074fe:	009b      	lsls	r3, r3, #2
+ 8007500:	4a1f      	ldr	r2, [pc, #124]	@ (8007580 <xTaskIncrementTick+0x164>)
+ 8007502:	441a      	add	r2, r3
+ 8007504:	68bb      	ldr	r3, [r7, #8]
+ 8007506:	3304      	adds	r3, #4
+ 8007508:	4619      	mov	r1, r3
+ 800750a:	4610      	mov	r0, r2
+ 800750c:	f7ff fba0 	bl	8006c50 <vListInsertEnd>
+					{
+						/* Preemption is on, but a context switch should
+						only be performed if the unblocked task has a
+						priority that is equal to or higher than the
+						currently executing task. */
+						if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+ 8007510:	68bb      	ldr	r3, [r7, #8]
+ 8007512:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
+ 8007514:	4b1b      	ldr	r3, [pc, #108]	@ (8007584 <xTaskIncrementTick+0x168>)
+ 8007516:	681b      	ldr	r3, [r3, #0]
+ 8007518:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 800751a:	429a      	cmp	r2, r3
+ 800751c:	d3b9      	bcc.n	8007492 <xTaskIncrementTick+0x76>
+						{
+							xSwitchRequired = pdTRUE;
+ 800751e:	2301      	movs	r3, #1
+ 8007520:	617b      	str	r3, [r7, #20]
+				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+ 8007522:	e7b6      	b.n	8007492 <xTaskIncrementTick+0x76>
+		/* Tasks of equal priority to the currently running task will share
+		processing time (time slice) if preemption is on, and the application
+		writer has not explicitly turned time slicing off. */
+		#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
+		{
+			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
+ 8007524:	4b17      	ldr	r3, [pc, #92]	@ (8007584 <xTaskIncrementTick+0x168>)
+ 8007526:	681b      	ldr	r3, [r3, #0]
+ 8007528:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
+ 800752a:	4915      	ldr	r1, [pc, #84]	@ (8007580 <xTaskIncrementTick+0x164>)
+ 800752c:	4613      	mov	r3, r2
+ 800752e:	009b      	lsls	r3, r3, #2
+ 8007530:	4413      	add	r3, r2
+ 8007532:	009b      	lsls	r3, r3, #2
+ 8007534:	440b      	add	r3, r1
+ 8007536:	681b      	ldr	r3, [r3, #0]
+ 8007538:	2b01      	cmp	r3, #1
+ 800753a:	d901      	bls.n	8007540 <xTaskIncrementTick+0x124>
+			{
+				xSwitchRequired = pdTRUE;
+ 800753c:	2301      	movs	r3, #1
+ 800753e:	617b      	str	r3, [r7, #20]
+		}
+		#endif /* configUSE_TICK_HOOK */
+
+		#if ( configUSE_PREEMPTION == 1 )
+		{
+			if( xYieldPending != pdFALSE )
+ 8007540:	4b11      	ldr	r3, [pc, #68]	@ (8007588 <xTaskIncrementTick+0x16c>)
+ 8007542:	681b      	ldr	r3, [r3, #0]
+ 8007544:	2b00      	cmp	r3, #0
+ 8007546:	d007      	beq.n	8007558 <xTaskIncrementTick+0x13c>
+			{
+				xSwitchRequired = pdTRUE;
+ 8007548:	2301      	movs	r3, #1
+ 800754a:	617b      	str	r3, [r7, #20]
+ 800754c:	e004      	b.n	8007558 <xTaskIncrementTick+0x13c>
+		}
+		#endif /* configUSE_PREEMPTION */
+	}
+	else
+	{
+		++xPendedTicks;
+ 800754e:	4b0f      	ldr	r3, [pc, #60]	@ (800758c <xTaskIncrementTick+0x170>)
+ 8007550:	681b      	ldr	r3, [r3, #0]
+ 8007552:	3301      	adds	r3, #1
+ 8007554:	4a0d      	ldr	r2, [pc, #52]	@ (800758c <xTaskIncrementTick+0x170>)
+ 8007556:	6013      	str	r3, [r2, #0]
+			vApplicationTickHook();
+		}
+		#endif
+	}
+
+	return xSwitchRequired;
+ 8007558:	697b      	ldr	r3, [r7, #20]
+}
+ 800755a:	4618      	mov	r0, r3
+ 800755c:	3718      	adds	r7, #24
+ 800755e:	46bd      	mov	sp, r7
+ 8007560:	bd80      	pop	{r7, pc}
+ 8007562:	bf00      	nop
+ 8007564:	200003bc 	.word	0x200003bc
+ 8007568:	200003a0 	.word	0x200003a0
+ 800756c:	2000036c 	.word	0x2000036c
+ 8007570:	20000370 	.word	0x20000370
+ 8007574:	200003b4 	.word	0x200003b4
+ 8007578:	200003b8 	.word	0x200003b8
+ 800757c:	200003a4 	.word	0x200003a4
+ 8007580:	200002e0 	.word	0x200002e0
+ 8007584:	200002dc 	.word	0x200002dc
+ 8007588:	200003b0 	.word	0x200003b0
+ 800758c:	200003ac 	.word	0x200003ac
+
+08007590 <vTaskSwitchContext>:
+
+#endif /* configUSE_APPLICATION_TASK_TAG */
+/*-----------------------------------------------------------*/
+
+void vTaskSwitchContext( void )
+{
+ 8007590:	b580      	push	{r7, lr}
+ 8007592:	b088      	sub	sp, #32
+ 8007594:	af00      	add	r7, sp, #0
+	if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
+ 8007596:	4b3a      	ldr	r3, [pc, #232]	@ (8007680 <vTaskSwitchContext+0xf0>)
+ 8007598:	681b      	ldr	r3, [r3, #0]
+ 800759a:	2b00      	cmp	r3, #0
+ 800759c:	d003      	beq.n	80075a6 <vTaskSwitchContext+0x16>
+	{
+		/* The scheduler is currently suspended - do not allow a context
+		switch. */
+		xYieldPending = pdTRUE;
+ 800759e:	4b39      	ldr	r3, [pc, #228]	@ (8007684 <vTaskSwitchContext+0xf4>)
+ 80075a0:	2201      	movs	r2, #1
+ 80075a2:	601a      	str	r2, [r3, #0]
+			for additional information. */
+			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
+		}
+		#endif /* configUSE_NEWLIB_REENTRANT */
+	}
+}
+ 80075a4:	e067      	b.n	8007676 <vTaskSwitchContext+0xe6>
+		xYieldPending = pdFALSE;
+ 80075a6:	4b37      	ldr	r3, [pc, #220]	@ (8007684 <vTaskSwitchContext+0xf4>)
+ 80075a8:	2200      	movs	r2, #0
+ 80075aa:	601a      	str	r2, [r3, #0]
+		taskCHECK_FOR_STACK_OVERFLOW();
+ 80075ac:	4b36      	ldr	r3, [pc, #216]	@ (8007688 <vTaskSwitchContext+0xf8>)
+ 80075ae:	681b      	ldr	r3, [r3, #0]
+ 80075b0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 80075b2:	61fb      	str	r3, [r7, #28]
+ 80075b4:	f04f 33a5 	mov.w	r3, #2779096485	@ 0xa5a5a5a5
+ 80075b8:	61bb      	str	r3, [r7, #24]
+ 80075ba:	69fb      	ldr	r3, [r7, #28]
+ 80075bc:	681b      	ldr	r3, [r3, #0]
+ 80075be:	69ba      	ldr	r2, [r7, #24]
+ 80075c0:	429a      	cmp	r2, r3
+ 80075c2:	d111      	bne.n	80075e8 <vTaskSwitchContext+0x58>
+ 80075c4:	69fb      	ldr	r3, [r7, #28]
+ 80075c6:	3304      	adds	r3, #4
+ 80075c8:	681b      	ldr	r3, [r3, #0]
+ 80075ca:	69ba      	ldr	r2, [r7, #24]
+ 80075cc:	429a      	cmp	r2, r3
+ 80075ce:	d10b      	bne.n	80075e8 <vTaskSwitchContext+0x58>
+ 80075d0:	69fb      	ldr	r3, [r7, #28]
+ 80075d2:	3308      	adds	r3, #8
+ 80075d4:	681b      	ldr	r3, [r3, #0]
+ 80075d6:	69ba      	ldr	r2, [r7, #24]
+ 80075d8:	429a      	cmp	r2, r3
+ 80075da:	d105      	bne.n	80075e8 <vTaskSwitchContext+0x58>
+ 80075dc:	69fb      	ldr	r3, [r7, #28]
+ 80075de:	330c      	adds	r3, #12
+ 80075e0:	681b      	ldr	r3, [r3, #0]
+ 80075e2:	69ba      	ldr	r2, [r7, #24]
+ 80075e4:	429a      	cmp	r2, r3
+ 80075e6:	d008      	beq.n	80075fa <vTaskSwitchContext+0x6a>
+ 80075e8:	4b27      	ldr	r3, [pc, #156]	@ (8007688 <vTaskSwitchContext+0xf8>)
+ 80075ea:	681a      	ldr	r2, [r3, #0]
+ 80075ec:	4b26      	ldr	r3, [pc, #152]	@ (8007688 <vTaskSwitchContext+0xf8>)
+ 80075ee:	681b      	ldr	r3, [r3, #0]
+ 80075f0:	3334      	adds	r3, #52	@ 0x34
+ 80075f2:	4619      	mov	r1, r3
+ 80075f4:	4610      	mov	r0, r2
+ 80075f6:	f7f8 ffc5 	bl	8000584 <vApplicationStackOverflowHook>
+		taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+ 80075fa:	4b24      	ldr	r3, [pc, #144]	@ (800768c <vTaskSwitchContext+0xfc>)
+ 80075fc:	681b      	ldr	r3, [r3, #0]
+ 80075fe:	60fb      	str	r3, [r7, #12]
+		__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
+ 8007600:	68fb      	ldr	r3, [r7, #12]
+ 8007602:	fab3 f383 	clz	r3, r3
+ 8007606:	72fb      	strb	r3, [r7, #11]
+		return ucReturn;
+ 8007608:	7afb      	ldrb	r3, [r7, #11]
+ 800760a:	f1c3 031f 	rsb	r3, r3, #31
+ 800760e:	617b      	str	r3, [r7, #20]
+ 8007610:	491f      	ldr	r1, [pc, #124]	@ (8007690 <vTaskSwitchContext+0x100>)
+ 8007612:	697a      	ldr	r2, [r7, #20]
+ 8007614:	4613      	mov	r3, r2
+ 8007616:	009b      	lsls	r3, r3, #2
+ 8007618:	4413      	add	r3, r2
+ 800761a:	009b      	lsls	r3, r3, #2
+ 800761c:	440b      	add	r3, r1
+ 800761e:	681b      	ldr	r3, [r3, #0]
+ 8007620:	2b00      	cmp	r3, #0
+ 8007622:	d10b      	bne.n	800763c <vTaskSwitchContext+0xac>
+	__asm volatile
+ 8007624:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8007628:	f383 8811 	msr	BASEPRI, r3
+ 800762c:	f3bf 8f6f 	isb	sy
+ 8007630:	f3bf 8f4f 	dsb	sy
+ 8007634:	607b      	str	r3, [r7, #4]
+}
+ 8007636:	bf00      	nop
+ 8007638:	bf00      	nop
+ 800763a:	e7fd      	b.n	8007638 <vTaskSwitchContext+0xa8>
+ 800763c:	697a      	ldr	r2, [r7, #20]
+ 800763e:	4613      	mov	r3, r2
+ 8007640:	009b      	lsls	r3, r3, #2
+ 8007642:	4413      	add	r3, r2
+ 8007644:	009b      	lsls	r3, r3, #2
+ 8007646:	4a12      	ldr	r2, [pc, #72]	@ (8007690 <vTaskSwitchContext+0x100>)
+ 8007648:	4413      	add	r3, r2
+ 800764a:	613b      	str	r3, [r7, #16]
+ 800764c:	693b      	ldr	r3, [r7, #16]
+ 800764e:	685b      	ldr	r3, [r3, #4]
+ 8007650:	685a      	ldr	r2, [r3, #4]
+ 8007652:	693b      	ldr	r3, [r7, #16]
+ 8007654:	605a      	str	r2, [r3, #4]
+ 8007656:	693b      	ldr	r3, [r7, #16]
+ 8007658:	685a      	ldr	r2, [r3, #4]
+ 800765a:	693b      	ldr	r3, [r7, #16]
+ 800765c:	3308      	adds	r3, #8
+ 800765e:	429a      	cmp	r2, r3
+ 8007660:	d104      	bne.n	800766c <vTaskSwitchContext+0xdc>
+ 8007662:	693b      	ldr	r3, [r7, #16]
+ 8007664:	685b      	ldr	r3, [r3, #4]
+ 8007666:	685a      	ldr	r2, [r3, #4]
+ 8007668:	693b      	ldr	r3, [r7, #16]
+ 800766a:	605a      	str	r2, [r3, #4]
+ 800766c:	693b      	ldr	r3, [r7, #16]
+ 800766e:	685b      	ldr	r3, [r3, #4]
+ 8007670:	68db      	ldr	r3, [r3, #12]
+ 8007672:	4a05      	ldr	r2, [pc, #20]	@ (8007688 <vTaskSwitchContext+0xf8>)
+ 8007674:	6013      	str	r3, [r2, #0]
+}
+ 8007676:	bf00      	nop
+ 8007678:	3720      	adds	r7, #32
+ 800767a:	46bd      	mov	sp, r7
+ 800767c:	bd80      	pop	{r7, pc}
+ 800767e:	bf00      	nop
+ 8007680:	200003bc 	.word	0x200003bc
+ 8007684:	200003b0 	.word	0x200003b0
+ 8007688:	200002dc 	.word	0x200002dc
+ 800768c:	200003a4 	.word	0x200003a4
+ 8007690:	200002e0 	.word	0x200002e0
+
+08007694 <vTaskPlaceOnEventList>:
+/*-----------------------------------------------------------*/
+
+void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
+{
+ 8007694:	b580      	push	{r7, lr}
+ 8007696:	b084      	sub	sp, #16
+ 8007698:	af00      	add	r7, sp, #0
+ 800769a:	6078      	str	r0, [r7, #4]
+ 800769c:	6039      	str	r1, [r7, #0]
+	configASSERT( pxEventList );
+ 800769e:	687b      	ldr	r3, [r7, #4]
+ 80076a0:	2b00      	cmp	r3, #0
+ 80076a2:	d10b      	bne.n	80076bc <vTaskPlaceOnEventList+0x28>
+	__asm volatile
+ 80076a4:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 80076a8:	f383 8811 	msr	BASEPRI, r3
+ 80076ac:	f3bf 8f6f 	isb	sy
+ 80076b0:	f3bf 8f4f 	dsb	sy
+ 80076b4:	60fb      	str	r3, [r7, #12]
+}
+ 80076b6:	bf00      	nop
+ 80076b8:	bf00      	nop
+ 80076ba:	e7fd      	b.n	80076b8 <vTaskPlaceOnEventList+0x24>
+
+	/* Place the event list item of the TCB in the appropriate event list.
+	This is placed in the list in priority order so the highest priority task
+	is the first to be woken by the event.  The queue that contains the event
+	list is locked, preventing simultaneous access from interrupts. */
+	vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
+ 80076bc:	4b07      	ldr	r3, [pc, #28]	@ (80076dc <vTaskPlaceOnEventList+0x48>)
+ 80076be:	681b      	ldr	r3, [r3, #0]
+ 80076c0:	3318      	adds	r3, #24
+ 80076c2:	4619      	mov	r1, r3
+ 80076c4:	6878      	ldr	r0, [r7, #4]
+ 80076c6:	f7ff fae7 	bl	8006c98 <vListInsert>
+
+	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
+ 80076ca:	2101      	movs	r1, #1
+ 80076cc:	6838      	ldr	r0, [r7, #0]
+ 80076ce:	f000 f9b7 	bl	8007a40 <prvAddCurrentTaskToDelayedList>
+}
+ 80076d2:	bf00      	nop
+ 80076d4:	3710      	adds	r7, #16
+ 80076d6:	46bd      	mov	sp, r7
+ 80076d8:	bd80      	pop	{r7, pc}
+ 80076da:	bf00      	nop
+ 80076dc:	200002dc 	.word	0x200002dc
+
+080076e0 <xTaskRemoveFromEventList>:
+
+#endif /* configUSE_TIMERS */
+/*-----------------------------------------------------------*/
+
+BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
+{
+ 80076e0:	b580      	push	{r7, lr}
+ 80076e2:	b086      	sub	sp, #24
+ 80076e4:	af00      	add	r7, sp, #0
+ 80076e6:	6078      	str	r0, [r7, #4]
+	get called - the lock count on the queue will get modified instead.  This
+	means exclusive access to the event list is guaranteed here.
+
+	This function assumes that a check has already been made to ensure that
+	pxEventList is not empty. */
+	pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+ 80076e8:	687b      	ldr	r3, [r7, #4]
+ 80076ea:	68db      	ldr	r3, [r3, #12]
+ 80076ec:	68db      	ldr	r3, [r3, #12]
+ 80076ee:	613b      	str	r3, [r7, #16]
+	configASSERT( pxUnblockedTCB );
+ 80076f0:	693b      	ldr	r3, [r7, #16]
+ 80076f2:	2b00      	cmp	r3, #0
+ 80076f4:	d10b      	bne.n	800770e <xTaskRemoveFromEventList+0x2e>
+	__asm volatile
+ 80076f6:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 80076fa:	f383 8811 	msr	BASEPRI, r3
+ 80076fe:	f3bf 8f6f 	isb	sy
+ 8007702:	f3bf 8f4f 	dsb	sy
+ 8007706:	60fb      	str	r3, [r7, #12]
+}
+ 8007708:	bf00      	nop
+ 800770a:	bf00      	nop
+ 800770c:	e7fd      	b.n	800770a <xTaskRemoveFromEventList+0x2a>
+	( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
+ 800770e:	693b      	ldr	r3, [r7, #16]
+ 8007710:	3318      	adds	r3, #24
+ 8007712:	4618      	mov	r0, r3
+ 8007714:	f7ff faf9 	bl	8006d0a <uxListRemove>
+
+	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+ 8007718:	4b1d      	ldr	r3, [pc, #116]	@ (8007790 <xTaskRemoveFromEventList+0xb0>)
+ 800771a:	681b      	ldr	r3, [r3, #0]
+ 800771c:	2b00      	cmp	r3, #0
+ 800771e:	d11c      	bne.n	800775a <xTaskRemoveFromEventList+0x7a>
+	{
+		( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
+ 8007720:	693b      	ldr	r3, [r7, #16]
+ 8007722:	3304      	adds	r3, #4
+ 8007724:	4618      	mov	r0, r3
+ 8007726:	f7ff faf0 	bl	8006d0a <uxListRemove>
+		prvAddTaskToReadyList( pxUnblockedTCB );
+ 800772a:	693b      	ldr	r3, [r7, #16]
+ 800772c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 800772e:	2201      	movs	r2, #1
+ 8007730:	409a      	lsls	r2, r3
+ 8007732:	4b18      	ldr	r3, [pc, #96]	@ (8007794 <xTaskRemoveFromEventList+0xb4>)
+ 8007734:	681b      	ldr	r3, [r3, #0]
+ 8007736:	4313      	orrs	r3, r2
+ 8007738:	4a16      	ldr	r2, [pc, #88]	@ (8007794 <xTaskRemoveFromEventList+0xb4>)
+ 800773a:	6013      	str	r3, [r2, #0]
+ 800773c:	693b      	ldr	r3, [r7, #16]
+ 800773e:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
+ 8007740:	4613      	mov	r3, r2
+ 8007742:	009b      	lsls	r3, r3, #2
+ 8007744:	4413      	add	r3, r2
+ 8007746:	009b      	lsls	r3, r3, #2
+ 8007748:	4a13      	ldr	r2, [pc, #76]	@ (8007798 <xTaskRemoveFromEventList+0xb8>)
+ 800774a:	441a      	add	r2, r3
+ 800774c:	693b      	ldr	r3, [r7, #16]
+ 800774e:	3304      	adds	r3, #4
+ 8007750:	4619      	mov	r1, r3
+ 8007752:	4610      	mov	r0, r2
+ 8007754:	f7ff fa7c 	bl	8006c50 <vListInsertEnd>
+ 8007758:	e005      	b.n	8007766 <xTaskRemoveFromEventList+0x86>
+	}
+	else
+	{
+		/* The delayed and ready lists cannot be accessed, so hold this task
+		pending until the scheduler is resumed. */
+		vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
+ 800775a:	693b      	ldr	r3, [r7, #16]
+ 800775c:	3318      	adds	r3, #24
+ 800775e:	4619      	mov	r1, r3
+ 8007760:	480e      	ldr	r0, [pc, #56]	@ (800779c <xTaskRemoveFromEventList+0xbc>)
+ 8007762:	f7ff fa75 	bl	8006c50 <vListInsertEnd>
+	}
+
+	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
+ 8007766:	693b      	ldr	r3, [r7, #16]
+ 8007768:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
+ 800776a:	4b0d      	ldr	r3, [pc, #52]	@ (80077a0 <xTaskRemoveFromEventList+0xc0>)
+ 800776c:	681b      	ldr	r3, [r3, #0]
+ 800776e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 8007770:	429a      	cmp	r2, r3
+ 8007772:	d905      	bls.n	8007780 <xTaskRemoveFromEventList+0xa0>
+	{
+		/* Return true if the task removed from the event list has a higher
+		priority than the calling task.  This allows the calling task to know if
+		it should force a context switch now. */
+		xReturn = pdTRUE;
+ 8007774:	2301      	movs	r3, #1
+ 8007776:	617b      	str	r3, [r7, #20]
+
+		/* Mark that a yield is pending in case the user is not using the
+		"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
+		xYieldPending = pdTRUE;
+ 8007778:	4b0a      	ldr	r3, [pc, #40]	@ (80077a4 <xTaskRemoveFromEventList+0xc4>)
+ 800777a:	2201      	movs	r2, #1
+ 800777c:	601a      	str	r2, [r3, #0]
+ 800777e:	e001      	b.n	8007784 <xTaskRemoveFromEventList+0xa4>
+	}
+	else
+	{
+		xReturn = pdFALSE;
+ 8007780:	2300      	movs	r3, #0
+ 8007782:	617b      	str	r3, [r7, #20]
+	}
+
+	return xReturn;
+ 8007784:	697b      	ldr	r3, [r7, #20]
+}
+ 8007786:	4618      	mov	r0, r3
+ 8007788:	3718      	adds	r7, #24
+ 800778a:	46bd      	mov	sp, r7
+ 800778c:	bd80      	pop	{r7, pc}
+ 800778e:	bf00      	nop
+ 8007790:	200003bc 	.word	0x200003bc
+ 8007794:	200003a4 	.word	0x200003a4
+ 8007798:	200002e0 	.word	0x200002e0
+ 800779c:	20000374 	.word	0x20000374
+ 80077a0:	200002dc 	.word	0x200002dc
+ 80077a4:	200003b0 	.word	0x200003b0
+
+080077a8 <vTaskInternalSetTimeOutState>:
+	taskEXIT_CRITICAL();
+}
+/*-----------------------------------------------------------*/
+
+void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut )
+{
+ 80077a8:	b480      	push	{r7}
+ 80077aa:	b083      	sub	sp, #12
+ 80077ac:	af00      	add	r7, sp, #0
+ 80077ae:	6078      	str	r0, [r7, #4]
+	/* For internal use only as it does not use a critical section. */
+	pxTimeOut->xOverflowCount = xNumOfOverflows;
+ 80077b0:	4b06      	ldr	r3, [pc, #24]	@ (80077cc <vTaskInternalSetTimeOutState+0x24>)
+ 80077b2:	681a      	ldr	r2, [r3, #0]
+ 80077b4:	687b      	ldr	r3, [r7, #4]
+ 80077b6:	601a      	str	r2, [r3, #0]
+	pxTimeOut->xTimeOnEntering = xTickCount;
+ 80077b8:	4b05      	ldr	r3, [pc, #20]	@ (80077d0 <vTaskInternalSetTimeOutState+0x28>)
+ 80077ba:	681a      	ldr	r2, [r3, #0]
+ 80077bc:	687b      	ldr	r3, [r7, #4]
+ 80077be:	605a      	str	r2, [r3, #4]
+}
+ 80077c0:	bf00      	nop
+ 80077c2:	370c      	adds	r7, #12
+ 80077c4:	46bd      	mov	sp, r7
+ 80077c6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80077ca:	4770      	bx	lr
+ 80077cc:	200003b4 	.word	0x200003b4
+ 80077d0:	200003a0 	.word	0x200003a0
+
+080077d4 <xTaskCheckForTimeOut>:
+/*-----------------------------------------------------------*/
+
+BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
+{
+ 80077d4:	b580      	push	{r7, lr}
+ 80077d6:	b088      	sub	sp, #32
+ 80077d8:	af00      	add	r7, sp, #0
+ 80077da:	6078      	str	r0, [r7, #4]
+ 80077dc:	6039      	str	r1, [r7, #0]
+BaseType_t xReturn;
+
+	configASSERT( pxTimeOut );
+ 80077de:	687b      	ldr	r3, [r7, #4]
+ 80077e0:	2b00      	cmp	r3, #0
+ 80077e2:	d10b      	bne.n	80077fc <xTaskCheckForTimeOut+0x28>
+	__asm volatile
+ 80077e4:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 80077e8:	f383 8811 	msr	BASEPRI, r3
+ 80077ec:	f3bf 8f6f 	isb	sy
+ 80077f0:	f3bf 8f4f 	dsb	sy
+ 80077f4:	613b      	str	r3, [r7, #16]
+}
+ 80077f6:	bf00      	nop
+ 80077f8:	bf00      	nop
+ 80077fa:	e7fd      	b.n	80077f8 <xTaskCheckForTimeOut+0x24>
+	configASSERT( pxTicksToWait );
+ 80077fc:	683b      	ldr	r3, [r7, #0]
+ 80077fe:	2b00      	cmp	r3, #0
+ 8007800:	d10b      	bne.n	800781a <xTaskCheckForTimeOut+0x46>
+	__asm volatile
+ 8007802:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8007806:	f383 8811 	msr	BASEPRI, r3
+ 800780a:	f3bf 8f6f 	isb	sy
+ 800780e:	f3bf 8f4f 	dsb	sy
+ 8007812:	60fb      	str	r3, [r7, #12]
+}
+ 8007814:	bf00      	nop
+ 8007816:	bf00      	nop
+ 8007818:	e7fd      	b.n	8007816 <xTaskCheckForTimeOut+0x42>
+
+	taskENTER_CRITICAL();
+ 800781a:	f000 f98d 	bl	8007b38 <vPortEnterCritical>
+	{
+		/* Minor optimisation.  The tick count cannot change in this block. */
+		const TickType_t xConstTickCount = xTickCount;
+ 800781e:	4b1d      	ldr	r3, [pc, #116]	@ (8007894 <xTaskCheckForTimeOut+0xc0>)
+ 8007820:	681b      	ldr	r3, [r3, #0]
+ 8007822:	61bb      	str	r3, [r7, #24]
+		const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering;
+ 8007824:	687b      	ldr	r3, [r7, #4]
+ 8007826:	685b      	ldr	r3, [r3, #4]
+ 8007828:	69ba      	ldr	r2, [r7, #24]
+ 800782a:	1ad3      	subs	r3, r2, r3
+ 800782c:	617b      	str	r3, [r7, #20]
+			}
+			else
+		#endif
+
+		#if ( INCLUDE_vTaskSuspend == 1 )
+			if( *pxTicksToWait == portMAX_DELAY )
+ 800782e:	683b      	ldr	r3, [r7, #0]
+ 8007830:	681b      	ldr	r3, [r3, #0]
+ 8007832:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
+ 8007836:	d102      	bne.n	800783e <xTaskCheckForTimeOut+0x6a>
+			{
+				/* If INCLUDE_vTaskSuspend is set to 1 and the block time
+				specified is the maximum block time then the task should block
+				indefinitely, and therefore never time out. */
+				xReturn = pdFALSE;
+ 8007838:	2300      	movs	r3, #0
+ 800783a:	61fb      	str	r3, [r7, #28]
+ 800783c:	e023      	b.n	8007886 <xTaskCheckForTimeOut+0xb2>
+			}
+			else
+		#endif
+
+		if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
+ 800783e:	687b      	ldr	r3, [r7, #4]
+ 8007840:	681a      	ldr	r2, [r3, #0]
+ 8007842:	4b15      	ldr	r3, [pc, #84]	@ (8007898 <xTaskCheckForTimeOut+0xc4>)
+ 8007844:	681b      	ldr	r3, [r3, #0]
+ 8007846:	429a      	cmp	r2, r3
+ 8007848:	d007      	beq.n	800785a <xTaskCheckForTimeOut+0x86>
+ 800784a:	687b      	ldr	r3, [r7, #4]
+ 800784c:	685b      	ldr	r3, [r3, #4]
+ 800784e:	69ba      	ldr	r2, [r7, #24]
+ 8007850:	429a      	cmp	r2, r3
+ 8007852:	d302      	bcc.n	800785a <xTaskCheckForTimeOut+0x86>
+			/* The tick count is greater than the time at which
+			vTaskSetTimeout() was called, but has also overflowed since
+			vTaskSetTimeOut() was called.  It must have wrapped all the way
+			around and gone past again. This passed since vTaskSetTimeout()
+			was called. */
+			xReturn = pdTRUE;
+ 8007854:	2301      	movs	r3, #1
+ 8007856:	61fb      	str	r3, [r7, #28]
+ 8007858:	e015      	b.n	8007886 <xTaskCheckForTimeOut+0xb2>
+		}
+		else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
+ 800785a:	683b      	ldr	r3, [r7, #0]
+ 800785c:	681b      	ldr	r3, [r3, #0]
+ 800785e:	697a      	ldr	r2, [r7, #20]
+ 8007860:	429a      	cmp	r2, r3
+ 8007862:	d20b      	bcs.n	800787c <xTaskCheckForTimeOut+0xa8>
+		{
+			/* Not a genuine timeout. Adjust parameters for time remaining. */
+			*pxTicksToWait -= xElapsedTime;
+ 8007864:	683b      	ldr	r3, [r7, #0]
+ 8007866:	681a      	ldr	r2, [r3, #0]
+ 8007868:	697b      	ldr	r3, [r7, #20]
+ 800786a:	1ad2      	subs	r2, r2, r3
+ 800786c:	683b      	ldr	r3, [r7, #0]
+ 800786e:	601a      	str	r2, [r3, #0]
+			vTaskInternalSetTimeOutState( pxTimeOut );
+ 8007870:	6878      	ldr	r0, [r7, #4]
+ 8007872:	f7ff ff99 	bl	80077a8 <vTaskInternalSetTimeOutState>
+			xReturn = pdFALSE;
+ 8007876:	2300      	movs	r3, #0
+ 8007878:	61fb      	str	r3, [r7, #28]
+ 800787a:	e004      	b.n	8007886 <xTaskCheckForTimeOut+0xb2>
+		}
+		else
+		{
+			*pxTicksToWait = 0;
+ 800787c:	683b      	ldr	r3, [r7, #0]
+ 800787e:	2200      	movs	r2, #0
+ 8007880:	601a      	str	r2, [r3, #0]
+			xReturn = pdTRUE;
+ 8007882:	2301      	movs	r3, #1
+ 8007884:	61fb      	str	r3, [r7, #28]
+		}
+	}
+	taskEXIT_CRITICAL();
+ 8007886:	f000 f989 	bl	8007b9c <vPortExitCritical>
+
+	return xReturn;
+ 800788a:	69fb      	ldr	r3, [r7, #28]
+}
+ 800788c:	4618      	mov	r0, r3
+ 800788e:	3720      	adds	r7, #32
+ 8007890:	46bd      	mov	sp, r7
+ 8007892:	bd80      	pop	{r7, pc}
+ 8007894:	200003a0 	.word	0x200003a0
+ 8007898:	200003b4 	.word	0x200003b4
+
+0800789c <vTaskMissedYield>:
+/*-----------------------------------------------------------*/
+
+void vTaskMissedYield( void )
+{
+ 800789c:	b480      	push	{r7}
+ 800789e:	af00      	add	r7, sp, #0
+	xYieldPending = pdTRUE;
+ 80078a0:	4b03      	ldr	r3, [pc, #12]	@ (80078b0 <vTaskMissedYield+0x14>)
+ 80078a2:	2201      	movs	r2, #1
+ 80078a4:	601a      	str	r2, [r3, #0]
+}
+ 80078a6:	bf00      	nop
+ 80078a8:	46bd      	mov	sp, r7
+ 80078aa:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80078ae:	4770      	bx	lr
+ 80078b0:	200003b0 	.word	0x200003b0
+
+080078b4 <prvResetNextTaskUnblockTime>:
+
+#endif /* INCLUDE_vTaskDelete */
+/*-----------------------------------------------------------*/
+
+static void prvResetNextTaskUnblockTime( void )
+{
+ 80078b4:	b480      	push	{r7}
+ 80078b6:	b083      	sub	sp, #12
+ 80078b8:	af00      	add	r7, sp, #0
+TCB_t *pxTCB;
+
+	if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+ 80078ba:	4b0c      	ldr	r3, [pc, #48]	@ (80078ec <prvResetNextTaskUnblockTime+0x38>)
+ 80078bc:	681b      	ldr	r3, [r3, #0]
+ 80078be:	681b      	ldr	r3, [r3, #0]
+ 80078c0:	2b00      	cmp	r3, #0
+ 80078c2:	d104      	bne.n	80078ce <prvResetNextTaskUnblockTime+0x1a>
+	{
+		/* The new current delayed list is empty.  Set xNextTaskUnblockTime to
+		the maximum possible value so it is	extremely unlikely that the
+		if( xTickCount >= xNextTaskUnblockTime ) test will pass until
+		there is an item in the delayed list. */
+		xNextTaskUnblockTime = portMAX_DELAY;
+ 80078c4:	4b0a      	ldr	r3, [pc, #40]	@ (80078f0 <prvResetNextTaskUnblockTime+0x3c>)
+ 80078c6:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
+ 80078ca:	601a      	str	r2, [r3, #0]
+		which the task at the head of the delayed list should be removed
+		from the Blocked state. */
+		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
+	}
+}
+ 80078cc:	e008      	b.n	80078e0 <prvResetNextTaskUnblockTime+0x2c>
+		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+ 80078ce:	4b07      	ldr	r3, [pc, #28]	@ (80078ec <prvResetNextTaskUnblockTime+0x38>)
+ 80078d0:	681b      	ldr	r3, [r3, #0]
+ 80078d2:	68db      	ldr	r3, [r3, #12]
+ 80078d4:	68db      	ldr	r3, [r3, #12]
+ 80078d6:	607b      	str	r3, [r7, #4]
+		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
+ 80078d8:	687b      	ldr	r3, [r7, #4]
+ 80078da:	685b      	ldr	r3, [r3, #4]
+ 80078dc:	4a04      	ldr	r2, [pc, #16]	@ (80078f0 <prvResetNextTaskUnblockTime+0x3c>)
+ 80078de:	6013      	str	r3, [r2, #0]
+}
+ 80078e0:	bf00      	nop
+ 80078e2:	370c      	adds	r7, #12
+ 80078e4:	46bd      	mov	sp, r7
+ 80078e6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80078ea:	4770      	bx	lr
+ 80078ec:	2000036c 	.word	0x2000036c
+ 80078f0:	200003b8 	.word	0x200003b8
+
+080078f4 <xTaskGetSchedulerState>:
+/*-----------------------------------------------------------*/
+
+#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+
+	BaseType_t xTaskGetSchedulerState( void )
+	{
+ 80078f4:	b480      	push	{r7}
+ 80078f6:	b083      	sub	sp, #12
+ 80078f8:	af00      	add	r7, sp, #0
+	BaseType_t xReturn;
+
+		if( xSchedulerRunning == pdFALSE )
+ 80078fa:	4b0b      	ldr	r3, [pc, #44]	@ (8007928 <xTaskGetSchedulerState+0x34>)
+ 80078fc:	681b      	ldr	r3, [r3, #0]
+ 80078fe:	2b00      	cmp	r3, #0
+ 8007900:	d102      	bne.n	8007908 <xTaskGetSchedulerState+0x14>
+		{
+			xReturn = taskSCHEDULER_NOT_STARTED;
+ 8007902:	2301      	movs	r3, #1
+ 8007904:	607b      	str	r3, [r7, #4]
+ 8007906:	e008      	b.n	800791a <xTaskGetSchedulerState+0x26>
+		}
+		else
+		{
+			if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+ 8007908:	4b08      	ldr	r3, [pc, #32]	@ (800792c <xTaskGetSchedulerState+0x38>)
+ 800790a:	681b      	ldr	r3, [r3, #0]
+ 800790c:	2b00      	cmp	r3, #0
+ 800790e:	d102      	bne.n	8007916 <xTaskGetSchedulerState+0x22>
+			{
+				xReturn = taskSCHEDULER_RUNNING;
+ 8007910:	2302      	movs	r3, #2
+ 8007912:	607b      	str	r3, [r7, #4]
+ 8007914:	e001      	b.n	800791a <xTaskGetSchedulerState+0x26>
+			}
+			else
+			{
+				xReturn = taskSCHEDULER_SUSPENDED;
+ 8007916:	2300      	movs	r3, #0
+ 8007918:	607b      	str	r3, [r7, #4]
+			}
+		}
+
+		return xReturn;
+ 800791a:	687b      	ldr	r3, [r7, #4]
+	}
+ 800791c:	4618      	mov	r0, r3
+ 800791e:	370c      	adds	r7, #12
+ 8007920:	46bd      	mov	sp, r7
+ 8007922:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8007926:	4770      	bx	lr
+ 8007928:	200003a8 	.word	0x200003a8
+ 800792c:	200003bc 	.word	0x200003bc
+
+08007930 <xTaskPriorityDisinherit>:
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_MUTEXES == 1 )
+
+	BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
+	{
+ 8007930:	b580      	push	{r7, lr}
+ 8007932:	b086      	sub	sp, #24
+ 8007934:	af00      	add	r7, sp, #0
+ 8007936:	6078      	str	r0, [r7, #4]
+	TCB_t * const pxTCB = pxMutexHolder;
+ 8007938:	687b      	ldr	r3, [r7, #4]
+ 800793a:	613b      	str	r3, [r7, #16]
+	BaseType_t xReturn = pdFALSE;
+ 800793c:	2300      	movs	r3, #0
+ 800793e:	617b      	str	r3, [r7, #20]
+
+		if( pxMutexHolder != NULL )
+ 8007940:	687b      	ldr	r3, [r7, #4]
+ 8007942:	2b00      	cmp	r3, #0
+ 8007944:	d070      	beq.n	8007a28 <xTaskPriorityDisinherit+0xf8>
+		{
+			/* A task can only have an inherited priority if it holds the mutex.
+			If the mutex is held by a task then it cannot be given from an
+			interrupt, and if a mutex is given by the holding task then it must
+			be the running state task. */
+			configASSERT( pxTCB == pxCurrentTCB );
+ 8007946:	4b3b      	ldr	r3, [pc, #236]	@ (8007a34 <xTaskPriorityDisinherit+0x104>)
+ 8007948:	681b      	ldr	r3, [r3, #0]
+ 800794a:	693a      	ldr	r2, [r7, #16]
+ 800794c:	429a      	cmp	r2, r3
+ 800794e:	d00b      	beq.n	8007968 <xTaskPriorityDisinherit+0x38>
+	__asm volatile
+ 8007950:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8007954:	f383 8811 	msr	BASEPRI, r3
+ 8007958:	f3bf 8f6f 	isb	sy
+ 800795c:	f3bf 8f4f 	dsb	sy
+ 8007960:	60fb      	str	r3, [r7, #12]
+}
+ 8007962:	bf00      	nop
+ 8007964:	bf00      	nop
+ 8007966:	e7fd      	b.n	8007964 <xTaskPriorityDisinherit+0x34>
+			configASSERT( pxTCB->uxMutexesHeld );
+ 8007968:	693b      	ldr	r3, [r7, #16]
+ 800796a:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
+ 800796c:	2b00      	cmp	r3, #0
+ 800796e:	d10b      	bne.n	8007988 <xTaskPriorityDisinherit+0x58>
+	__asm volatile
+ 8007970:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8007974:	f383 8811 	msr	BASEPRI, r3
+ 8007978:	f3bf 8f6f 	isb	sy
+ 800797c:	f3bf 8f4f 	dsb	sy
+ 8007980:	60bb      	str	r3, [r7, #8]
+}
+ 8007982:	bf00      	nop
+ 8007984:	bf00      	nop
+ 8007986:	e7fd      	b.n	8007984 <xTaskPriorityDisinherit+0x54>
+			( pxTCB->uxMutexesHeld )--;
+ 8007988:	693b      	ldr	r3, [r7, #16]
+ 800798a:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
+ 800798c:	1e5a      	subs	r2, r3, #1
+ 800798e:	693b      	ldr	r3, [r7, #16]
+ 8007990:	649a      	str	r2, [r3, #72]	@ 0x48
+
+			/* Has the holder of the mutex inherited the priority of another
+			task? */
+			if( pxTCB->uxPriority != pxTCB->uxBasePriority )
+ 8007992:	693b      	ldr	r3, [r7, #16]
+ 8007994:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
+ 8007996:	693b      	ldr	r3, [r7, #16]
+ 8007998:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 800799a:	429a      	cmp	r2, r3
+ 800799c:	d044      	beq.n	8007a28 <xTaskPriorityDisinherit+0xf8>
+			{
+				/* Only disinherit if no other mutexes are held. */
+				if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
+ 800799e:	693b      	ldr	r3, [r7, #16]
+ 80079a0:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
+ 80079a2:	2b00      	cmp	r3, #0
+ 80079a4:	d140      	bne.n	8007a28 <xTaskPriorityDisinherit+0xf8>
+					/* A task can only have an inherited priority if it holds
+					the mutex.  If the mutex is held by a task then it cannot be
+					given from an interrupt, and if a mutex is given by the
+					holding task then it must be the running state task.  Remove
+					the holding task from the ready/delayed list. */
+					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+ 80079a6:	693b      	ldr	r3, [r7, #16]
+ 80079a8:	3304      	adds	r3, #4
+ 80079aa:	4618      	mov	r0, r3
+ 80079ac:	f7ff f9ad 	bl	8006d0a <uxListRemove>
+ 80079b0:	4603      	mov	r3, r0
+ 80079b2:	2b00      	cmp	r3, #0
+ 80079b4:	d115      	bne.n	80079e2 <xTaskPriorityDisinherit+0xb2>
+					{
+						taskRESET_READY_PRIORITY( pxTCB->uxPriority );
+ 80079b6:	693b      	ldr	r3, [r7, #16]
+ 80079b8:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
+ 80079ba:	491f      	ldr	r1, [pc, #124]	@ (8007a38 <xTaskPriorityDisinherit+0x108>)
+ 80079bc:	4613      	mov	r3, r2
+ 80079be:	009b      	lsls	r3, r3, #2
+ 80079c0:	4413      	add	r3, r2
+ 80079c2:	009b      	lsls	r3, r3, #2
+ 80079c4:	440b      	add	r3, r1
+ 80079c6:	681b      	ldr	r3, [r3, #0]
+ 80079c8:	2b00      	cmp	r3, #0
+ 80079ca:	d10a      	bne.n	80079e2 <xTaskPriorityDisinherit+0xb2>
+ 80079cc:	693b      	ldr	r3, [r7, #16]
+ 80079ce:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 80079d0:	2201      	movs	r2, #1
+ 80079d2:	fa02 f303 	lsl.w	r3, r2, r3
+ 80079d6:	43da      	mvns	r2, r3
+ 80079d8:	4b18      	ldr	r3, [pc, #96]	@ (8007a3c <xTaskPriorityDisinherit+0x10c>)
+ 80079da:	681b      	ldr	r3, [r3, #0]
+ 80079dc:	4013      	ands	r3, r2
+ 80079de:	4a17      	ldr	r2, [pc, #92]	@ (8007a3c <xTaskPriorityDisinherit+0x10c>)
+ 80079e0:	6013      	str	r3, [r2, #0]
+					}
+
+					/* Disinherit the priority before adding the task into the
+					new	ready list. */
+					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
+					pxTCB->uxPriority = pxTCB->uxBasePriority;
+ 80079e2:	693b      	ldr	r3, [r7, #16]
+ 80079e4:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
+ 80079e6:	693b      	ldr	r3, [r7, #16]
+ 80079e8:	62da      	str	r2, [r3, #44]	@ 0x2c
+
+					/* Reset the event list item value.  It cannot be in use for
+					any other purpose if this task is running, and it must be
+					running to give back the mutex. */
+					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+ 80079ea:	693b      	ldr	r3, [r7, #16]
+ 80079ec:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 80079ee:	f1c3 0207 	rsb	r2, r3, #7
+ 80079f2:	693b      	ldr	r3, [r7, #16]
+ 80079f4:	619a      	str	r2, [r3, #24]
+					prvAddTaskToReadyList( pxTCB );
+ 80079f6:	693b      	ldr	r3, [r7, #16]
+ 80079f8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 80079fa:	2201      	movs	r2, #1
+ 80079fc:	409a      	lsls	r2, r3
+ 80079fe:	4b0f      	ldr	r3, [pc, #60]	@ (8007a3c <xTaskPriorityDisinherit+0x10c>)
+ 8007a00:	681b      	ldr	r3, [r3, #0]
+ 8007a02:	4313      	orrs	r3, r2
+ 8007a04:	4a0d      	ldr	r2, [pc, #52]	@ (8007a3c <xTaskPriorityDisinherit+0x10c>)
+ 8007a06:	6013      	str	r3, [r2, #0]
+ 8007a08:	693b      	ldr	r3, [r7, #16]
+ 8007a0a:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
+ 8007a0c:	4613      	mov	r3, r2
+ 8007a0e:	009b      	lsls	r3, r3, #2
+ 8007a10:	4413      	add	r3, r2
+ 8007a12:	009b      	lsls	r3, r3, #2
+ 8007a14:	4a08      	ldr	r2, [pc, #32]	@ (8007a38 <xTaskPriorityDisinherit+0x108>)
+ 8007a16:	441a      	add	r2, r3
+ 8007a18:	693b      	ldr	r3, [r7, #16]
+ 8007a1a:	3304      	adds	r3, #4
+ 8007a1c:	4619      	mov	r1, r3
+ 8007a1e:	4610      	mov	r0, r2
+ 8007a20:	f7ff f916 	bl	8006c50 <vListInsertEnd>
+					in an order different to that in which they were taken.
+					If a context switch did not occur when the first mutex was
+					returned, even if a task was waiting on it, then a context
+					switch should occur when the last mutex is returned whether
+					a task is waiting on it or not. */
+					xReturn = pdTRUE;
+ 8007a24:	2301      	movs	r3, #1
+ 8007a26:	617b      	str	r3, [r7, #20]
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		return xReturn;
+ 8007a28:	697b      	ldr	r3, [r7, #20]
+	}
+ 8007a2a:	4618      	mov	r0, r3
+ 8007a2c:	3718      	adds	r7, #24
+ 8007a2e:	46bd      	mov	sp, r7
+ 8007a30:	bd80      	pop	{r7, pc}
+ 8007a32:	bf00      	nop
+ 8007a34:	200002dc 	.word	0x200002dc
+ 8007a38:	200002e0 	.word	0x200002e0
+ 8007a3c:	200003a4 	.word	0x200003a4
+
+08007a40 <prvAddCurrentTaskToDelayedList>:
+
+#endif
+/*-----------------------------------------------------------*/
+
+static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
+{
+ 8007a40:	b580      	push	{r7, lr}
+ 8007a42:	b084      	sub	sp, #16
+ 8007a44:	af00      	add	r7, sp, #0
+ 8007a46:	6078      	str	r0, [r7, #4]
+ 8007a48:	6039      	str	r1, [r7, #0]
+TickType_t xTimeToWake;
+const TickType_t xConstTickCount = xTickCount;
+ 8007a4a:	4b29      	ldr	r3, [pc, #164]	@ (8007af0 <prvAddCurrentTaskToDelayedList+0xb0>)
+ 8007a4c:	681b      	ldr	r3, [r3, #0]
+ 8007a4e:	60fb      	str	r3, [r7, #12]
+	}
+	#endif
+
+	/* Remove the task from the ready list before adding it to the blocked list
+	as the same list item is used for both lists. */
+	if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+ 8007a50:	4b28      	ldr	r3, [pc, #160]	@ (8007af4 <prvAddCurrentTaskToDelayedList+0xb4>)
+ 8007a52:	681b      	ldr	r3, [r3, #0]
+ 8007a54:	3304      	adds	r3, #4
+ 8007a56:	4618      	mov	r0, r3
+ 8007a58:	f7ff f957 	bl	8006d0a <uxListRemove>
+ 8007a5c:	4603      	mov	r3, r0
+ 8007a5e:	2b00      	cmp	r3, #0
+ 8007a60:	d10b      	bne.n	8007a7a <prvAddCurrentTaskToDelayedList+0x3a>
+	{
+		/* The current task must be in a ready list, so there is no need to
+		check, and the port reset macro can be called directly. */
+		portRESET_READY_PRIORITY( pxCurrentTCB->uxPriority, uxTopReadyPriority ); /*lint !e931 pxCurrentTCB cannot change as it is the calling task.  pxCurrentTCB->uxPriority and uxTopReadyPriority cannot change as called with scheduler suspended or in a critical section. */
+ 8007a62:	4b24      	ldr	r3, [pc, #144]	@ (8007af4 <prvAddCurrentTaskToDelayedList+0xb4>)
+ 8007a64:	681b      	ldr	r3, [r3, #0]
+ 8007a66:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 8007a68:	2201      	movs	r2, #1
+ 8007a6a:	fa02 f303 	lsl.w	r3, r2, r3
+ 8007a6e:	43da      	mvns	r2, r3
+ 8007a70:	4b21      	ldr	r3, [pc, #132]	@ (8007af8 <prvAddCurrentTaskToDelayedList+0xb8>)
+ 8007a72:	681b      	ldr	r3, [r3, #0]
+ 8007a74:	4013      	ands	r3, r2
+ 8007a76:	4a20      	ldr	r2, [pc, #128]	@ (8007af8 <prvAddCurrentTaskToDelayedList+0xb8>)
+ 8007a78:	6013      	str	r3, [r2, #0]
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	#if ( INCLUDE_vTaskSuspend == 1 )
+	{
+		if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
+ 8007a7a:	687b      	ldr	r3, [r7, #4]
+ 8007a7c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
+ 8007a80:	d10a      	bne.n	8007a98 <prvAddCurrentTaskToDelayedList+0x58>
+ 8007a82:	683b      	ldr	r3, [r7, #0]
+ 8007a84:	2b00      	cmp	r3, #0
+ 8007a86:	d007      	beq.n	8007a98 <prvAddCurrentTaskToDelayedList+0x58>
+		{
+			/* Add the task to the suspended task list instead of a delayed task
+			list to ensure it is not woken by a timing event.  It will block
+			indefinitely. */
+			vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
+ 8007a88:	4b1a      	ldr	r3, [pc, #104]	@ (8007af4 <prvAddCurrentTaskToDelayedList+0xb4>)
+ 8007a8a:	681b      	ldr	r3, [r3, #0]
+ 8007a8c:	3304      	adds	r3, #4
+ 8007a8e:	4619      	mov	r1, r3
+ 8007a90:	481a      	ldr	r0, [pc, #104]	@ (8007afc <prvAddCurrentTaskToDelayedList+0xbc>)
+ 8007a92:	f7ff f8dd 	bl	8006c50 <vListInsertEnd>
+
+		/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
+		( void ) xCanBlockIndefinitely;
+	}
+	#endif /* INCLUDE_vTaskSuspend */
+}
+ 8007a96:	e026      	b.n	8007ae6 <prvAddCurrentTaskToDelayedList+0xa6>
+			xTimeToWake = xConstTickCount + xTicksToWait;
+ 8007a98:	68fa      	ldr	r2, [r7, #12]
+ 8007a9a:	687b      	ldr	r3, [r7, #4]
+ 8007a9c:	4413      	add	r3, r2
+ 8007a9e:	60bb      	str	r3, [r7, #8]
+			listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
+ 8007aa0:	4b14      	ldr	r3, [pc, #80]	@ (8007af4 <prvAddCurrentTaskToDelayedList+0xb4>)
+ 8007aa2:	681b      	ldr	r3, [r3, #0]
+ 8007aa4:	68ba      	ldr	r2, [r7, #8]
+ 8007aa6:	605a      	str	r2, [r3, #4]
+			if( xTimeToWake < xConstTickCount )
+ 8007aa8:	68ba      	ldr	r2, [r7, #8]
+ 8007aaa:	68fb      	ldr	r3, [r7, #12]
+ 8007aac:	429a      	cmp	r2, r3
+ 8007aae:	d209      	bcs.n	8007ac4 <prvAddCurrentTaskToDelayedList+0x84>
+				vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
+ 8007ab0:	4b13      	ldr	r3, [pc, #76]	@ (8007b00 <prvAddCurrentTaskToDelayedList+0xc0>)
+ 8007ab2:	681a      	ldr	r2, [r3, #0]
+ 8007ab4:	4b0f      	ldr	r3, [pc, #60]	@ (8007af4 <prvAddCurrentTaskToDelayedList+0xb4>)
+ 8007ab6:	681b      	ldr	r3, [r3, #0]
+ 8007ab8:	3304      	adds	r3, #4
+ 8007aba:	4619      	mov	r1, r3
+ 8007abc:	4610      	mov	r0, r2
+ 8007abe:	f7ff f8eb 	bl	8006c98 <vListInsert>
+}
+ 8007ac2:	e010      	b.n	8007ae6 <prvAddCurrentTaskToDelayedList+0xa6>
+				vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
+ 8007ac4:	4b0f      	ldr	r3, [pc, #60]	@ (8007b04 <prvAddCurrentTaskToDelayedList+0xc4>)
+ 8007ac6:	681a      	ldr	r2, [r3, #0]
+ 8007ac8:	4b0a      	ldr	r3, [pc, #40]	@ (8007af4 <prvAddCurrentTaskToDelayedList+0xb4>)
+ 8007aca:	681b      	ldr	r3, [r3, #0]
+ 8007acc:	3304      	adds	r3, #4
+ 8007ace:	4619      	mov	r1, r3
+ 8007ad0:	4610      	mov	r0, r2
+ 8007ad2:	f7ff f8e1 	bl	8006c98 <vListInsert>
+				if( xTimeToWake < xNextTaskUnblockTime )
+ 8007ad6:	4b0c      	ldr	r3, [pc, #48]	@ (8007b08 <prvAddCurrentTaskToDelayedList+0xc8>)
+ 8007ad8:	681b      	ldr	r3, [r3, #0]
+ 8007ada:	68ba      	ldr	r2, [r7, #8]
+ 8007adc:	429a      	cmp	r2, r3
+ 8007ade:	d202      	bcs.n	8007ae6 <prvAddCurrentTaskToDelayedList+0xa6>
+					xNextTaskUnblockTime = xTimeToWake;
+ 8007ae0:	4a09      	ldr	r2, [pc, #36]	@ (8007b08 <prvAddCurrentTaskToDelayedList+0xc8>)
+ 8007ae2:	68bb      	ldr	r3, [r7, #8]
+ 8007ae4:	6013      	str	r3, [r2, #0]
+}
+ 8007ae6:	bf00      	nop
+ 8007ae8:	3710      	adds	r7, #16
+ 8007aea:	46bd      	mov	sp, r7
+ 8007aec:	bd80      	pop	{r7, pc}
+ 8007aee:	bf00      	nop
+ 8007af0:	200003a0 	.word	0x200003a0
+ 8007af4:	200002dc 	.word	0x200002dc
+ 8007af8:	200003a4 	.word	0x200003a4
+ 8007afc:	20000388 	.word	0x20000388
+ 8007b00:	20000370 	.word	0x20000370
+ 8007b04:	2000036c 	.word	0x2000036c
+ 8007b08:	200003b8 	.word	0x200003b8
+ 8007b0c:	00000000 	.word	0x00000000
+
+08007b10 <SVC_Handler>:
+}
+/*-----------------------------------------------------------*/
+
+void vPortSVCHandler( void )
+{
+	__asm volatile (
+ 8007b10:	4b07      	ldr	r3, [pc, #28]	@ (8007b30 <pxCurrentTCBConst2>)
+ 8007b12:	6819      	ldr	r1, [r3, #0]
+ 8007b14:	6808      	ldr	r0, [r1, #0]
+ 8007b16:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 8007b1a:	f380 8809 	msr	PSP, r0
+ 8007b1e:	f3bf 8f6f 	isb	sy
+ 8007b22:	f04f 0000 	mov.w	r0, #0
+ 8007b26:	f380 8811 	msr	BASEPRI, r0
+ 8007b2a:	4770      	bx	lr
+ 8007b2c:	f3af 8000 	nop.w
+
+08007b30 <pxCurrentTCBConst2>:
+ 8007b30:	200002dc 	.word	0x200002dc
+					"	bx r14							\n"
+					"									\n"
+					"	.align 4						\n"
+					"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
+				);
+}
+ 8007b34:	bf00      	nop
+ 8007b36:	bf00      	nop
+
+08007b38 <vPortEnterCritical>:
+	configASSERT( uxCriticalNesting == 1000UL );
+}
+/*-----------------------------------------------------------*/
+
+void vPortEnterCritical( void )
+{
+ 8007b38:	b480      	push	{r7}
+ 8007b3a:	b083      	sub	sp, #12
+ 8007b3c:	af00      	add	r7, sp, #0
+	__asm volatile
+ 8007b3e:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8007b42:	f383 8811 	msr	BASEPRI, r3
+ 8007b46:	f3bf 8f6f 	isb	sy
+ 8007b4a:	f3bf 8f4f 	dsb	sy
+ 8007b4e:	607b      	str	r3, [r7, #4]
+}
+ 8007b50:	bf00      	nop
+	portDISABLE_INTERRUPTS();
+	uxCriticalNesting++;
+ 8007b52:	4b10      	ldr	r3, [pc, #64]	@ (8007b94 <vPortEnterCritical+0x5c>)
+ 8007b54:	681b      	ldr	r3, [r3, #0]
+ 8007b56:	3301      	adds	r3, #1
+ 8007b58:	4a0e      	ldr	r2, [pc, #56]	@ (8007b94 <vPortEnterCritical+0x5c>)
+ 8007b5a:	6013      	str	r3, [r2, #0]
+	/* This is not the interrupt safe version of the enter critical function so
+	assert() if it is being called from an interrupt context.  Only API
+	functions that end in "FromISR" can be used in an interrupt.  Only assert if
+	the critical nesting count is 1 to protect against recursive calls if the
+	assert function also uses a critical section. */
+	if( uxCriticalNesting == 1 )
+ 8007b5c:	4b0d      	ldr	r3, [pc, #52]	@ (8007b94 <vPortEnterCritical+0x5c>)
+ 8007b5e:	681b      	ldr	r3, [r3, #0]
+ 8007b60:	2b01      	cmp	r3, #1
+ 8007b62:	d110      	bne.n	8007b86 <vPortEnterCritical+0x4e>
+	{
+		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
+ 8007b64:	4b0c      	ldr	r3, [pc, #48]	@ (8007b98 <vPortEnterCritical+0x60>)
+ 8007b66:	681b      	ldr	r3, [r3, #0]
+ 8007b68:	b2db      	uxtb	r3, r3
+ 8007b6a:	2b00      	cmp	r3, #0
+ 8007b6c:	d00b      	beq.n	8007b86 <vPortEnterCritical+0x4e>
+	__asm volatile
+ 8007b6e:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8007b72:	f383 8811 	msr	BASEPRI, r3
+ 8007b76:	f3bf 8f6f 	isb	sy
+ 8007b7a:	f3bf 8f4f 	dsb	sy
+ 8007b7e:	603b      	str	r3, [r7, #0]
+}
+ 8007b80:	bf00      	nop
+ 8007b82:	bf00      	nop
+ 8007b84:	e7fd      	b.n	8007b82 <vPortEnterCritical+0x4a>
+	}
+}
+ 8007b86:	bf00      	nop
+ 8007b88:	370c      	adds	r7, #12
+ 8007b8a:	46bd      	mov	sp, r7
+ 8007b8c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8007b90:	4770      	bx	lr
+ 8007b92:	bf00      	nop
+ 8007b94:	2000000c 	.word	0x2000000c
+ 8007b98:	e000ed04 	.word	0xe000ed04
+
+08007b9c <vPortExitCritical>:
+/*-----------------------------------------------------------*/
+
+void vPortExitCritical( void )
+{
+ 8007b9c:	b480      	push	{r7}
+ 8007b9e:	b083      	sub	sp, #12
+ 8007ba0:	af00      	add	r7, sp, #0
+	configASSERT( uxCriticalNesting );
+ 8007ba2:	4b12      	ldr	r3, [pc, #72]	@ (8007bec <vPortExitCritical+0x50>)
+ 8007ba4:	681b      	ldr	r3, [r3, #0]
+ 8007ba6:	2b00      	cmp	r3, #0
+ 8007ba8:	d10b      	bne.n	8007bc2 <vPortExitCritical+0x26>
+	__asm volatile
+ 8007baa:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8007bae:	f383 8811 	msr	BASEPRI, r3
+ 8007bb2:	f3bf 8f6f 	isb	sy
+ 8007bb6:	f3bf 8f4f 	dsb	sy
+ 8007bba:	607b      	str	r3, [r7, #4]
+}
+ 8007bbc:	bf00      	nop
+ 8007bbe:	bf00      	nop
+ 8007bc0:	e7fd      	b.n	8007bbe <vPortExitCritical+0x22>
+	uxCriticalNesting--;
+ 8007bc2:	4b0a      	ldr	r3, [pc, #40]	@ (8007bec <vPortExitCritical+0x50>)
+ 8007bc4:	681b      	ldr	r3, [r3, #0]
+ 8007bc6:	3b01      	subs	r3, #1
+ 8007bc8:	4a08      	ldr	r2, [pc, #32]	@ (8007bec <vPortExitCritical+0x50>)
+ 8007bca:	6013      	str	r3, [r2, #0]
+	if( uxCriticalNesting == 0 )
+ 8007bcc:	4b07      	ldr	r3, [pc, #28]	@ (8007bec <vPortExitCritical+0x50>)
+ 8007bce:	681b      	ldr	r3, [r3, #0]
+ 8007bd0:	2b00      	cmp	r3, #0
+ 8007bd2:	d105      	bne.n	8007be0 <vPortExitCritical+0x44>
+ 8007bd4:	2300      	movs	r3, #0
+ 8007bd6:	603b      	str	r3, [r7, #0]
+	__asm volatile
+ 8007bd8:	683b      	ldr	r3, [r7, #0]
+ 8007bda:	f383 8811 	msr	BASEPRI, r3
+}
+ 8007bde:	bf00      	nop
+	{
+		portENABLE_INTERRUPTS();
+	}
+}
+ 8007be0:	bf00      	nop
+ 8007be2:	370c      	adds	r7, #12
+ 8007be4:	46bd      	mov	sp, r7
+ 8007be6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8007bea:	4770      	bx	lr
+ 8007bec:	2000000c 	.word	0x2000000c
+
+08007bf0 <PendSV_Handler>:
+
+void xPortPendSVHandler( void )
+{
+	/* This is a naked function. */
+
+	__asm volatile
+ 8007bf0:	f3ef 8009 	mrs	r0, PSP
+ 8007bf4:	f3bf 8f6f 	isb	sy
+ 8007bf8:	4b15      	ldr	r3, [pc, #84]	@ (8007c50 <pxCurrentTCBConst>)
+ 8007bfa:	681a      	ldr	r2, [r3, #0]
+ 8007bfc:	f01e 0f10 	tst.w	lr, #16
+ 8007c00:	bf08      	it	eq
+ 8007c02:	ed20 8a10 	vstmdbeq	r0!, {s16-s31}
+ 8007c06:	e920 4ff0 	stmdb	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 8007c0a:	6010      	str	r0, [r2, #0]
+ 8007c0c:	e92d 0009 	stmdb	sp!, {r0, r3}
+ 8007c10:	f04f 0050 	mov.w	r0, #80	@ 0x50
+ 8007c14:	f380 8811 	msr	BASEPRI, r0
+ 8007c18:	f3bf 8f4f 	dsb	sy
+ 8007c1c:	f3bf 8f6f 	isb	sy
+ 8007c20:	f7ff fcb6 	bl	8007590 <vTaskSwitchContext>
+ 8007c24:	f04f 0000 	mov.w	r0, #0
+ 8007c28:	f380 8811 	msr	BASEPRI, r0
+ 8007c2c:	bc09      	pop	{r0, r3}
+ 8007c2e:	6819      	ldr	r1, [r3, #0]
+ 8007c30:	6808      	ldr	r0, [r1, #0]
+ 8007c32:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 8007c36:	f01e 0f10 	tst.w	lr, #16
+ 8007c3a:	bf08      	it	eq
+ 8007c3c:	ecb0 8a10 	vldmiaeq	r0!, {s16-s31}
+ 8007c40:	f380 8809 	msr	PSP, r0
+ 8007c44:	f3bf 8f6f 	isb	sy
+ 8007c48:	4770      	bx	lr
+ 8007c4a:	bf00      	nop
+ 8007c4c:	f3af 8000 	nop.w
+
+08007c50 <pxCurrentTCBConst>:
+ 8007c50:	200002dc 	.word	0x200002dc
+	"										\n"
+	"	.align 4							\n"
+	"pxCurrentTCBConst: .word pxCurrentTCB	\n"
+	::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
+	);
+}
+ 8007c54:	bf00      	nop
+ 8007c56:	bf00      	nop
+
+08007c58 <SysTick_Handler>:
+/*-----------------------------------------------------------*/
+
+void xPortSysTickHandler( void )
+{
+ 8007c58:	b580      	push	{r7, lr}
+ 8007c5a:	b082      	sub	sp, #8
+ 8007c5c:	af00      	add	r7, sp, #0
+	__asm volatile
+ 8007c5e:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8007c62:	f383 8811 	msr	BASEPRI, r3
+ 8007c66:	f3bf 8f6f 	isb	sy
+ 8007c6a:	f3bf 8f4f 	dsb	sy
+ 8007c6e:	607b      	str	r3, [r7, #4]
+}
+ 8007c70:	bf00      	nop
+	save and then restore the interrupt mask value as its value is already
+	known. */
+	portDISABLE_INTERRUPTS();
+	{
+		/* Increment the RTOS tick. */
+		if( xTaskIncrementTick() != pdFALSE )
+ 8007c72:	f7ff fbd3 	bl	800741c <xTaskIncrementTick>
+ 8007c76:	4603      	mov	r3, r0
+ 8007c78:	2b00      	cmp	r3, #0
+ 8007c7a:	d003      	beq.n	8007c84 <SysTick_Handler+0x2c>
+		{
+			/* A context switch is required.  Context switching is performed in
+			the PendSV interrupt.  Pend the PendSV interrupt. */
+			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+ 8007c7c:	4b06      	ldr	r3, [pc, #24]	@ (8007c98 <SysTick_Handler+0x40>)
+ 8007c7e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
+ 8007c82:	601a      	str	r2, [r3, #0]
+ 8007c84:	2300      	movs	r3, #0
+ 8007c86:	603b      	str	r3, [r7, #0]
+	__asm volatile
+ 8007c88:	683b      	ldr	r3, [r7, #0]
+ 8007c8a:	f383 8811 	msr	BASEPRI, r3
+}
+ 8007c8e:	bf00      	nop
+		}
+	}
+	portENABLE_INTERRUPTS();
+}
+ 8007c90:	bf00      	nop
+ 8007c92:	3708      	adds	r7, #8
+ 8007c94:	46bd      	mov	sp, r7
+ 8007c96:	bd80      	pop	{r7, pc}
+ 8007c98:	e000ed04 	.word	0xe000ed04
+
+08007c9c <vPortValidateInterruptPriority>:
+/*-----------------------------------------------------------*/
+
+#if( configASSERT_DEFINED == 1 )
+
+	void vPortValidateInterruptPriority( void )
+	{
+ 8007c9c:	b480      	push	{r7}
+ 8007c9e:	b085      	sub	sp, #20
+ 8007ca0:	af00      	add	r7, sp, #0
+	uint32_t ulCurrentInterrupt;
+	uint8_t ucCurrentPriority;
+
+		/* Obtain the number of the currently executing interrupt. */
+		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
+ 8007ca2:	f3ef 8305 	mrs	r3, IPSR
+ 8007ca6:	60fb      	str	r3, [r7, #12]
+
+		/* Is the interrupt number a user defined interrupt? */
+		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
+ 8007ca8:	68fb      	ldr	r3, [r7, #12]
+ 8007caa:	2b0f      	cmp	r3, #15
+ 8007cac:	d915      	bls.n	8007cda <vPortValidateInterruptPriority+0x3e>
+		{
+			/* Look up the interrupt's priority. */
+			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
+ 8007cae:	4a18      	ldr	r2, [pc, #96]	@ (8007d10 <vPortValidateInterruptPriority+0x74>)
+ 8007cb0:	68fb      	ldr	r3, [r7, #12]
+ 8007cb2:	4413      	add	r3, r2
+ 8007cb4:	781b      	ldrb	r3, [r3, #0]
+ 8007cb6:	72fb      	strb	r3, [r7, #11]
+			interrupt entry is as fast and simple as possible.
+
+			The following links provide detailed information:
+			http://www.freertos.org/RTOS-Cortex-M3-M4.html
+			http://www.freertos.org/FAQHelp.html */
+			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
+ 8007cb8:	4b16      	ldr	r3, [pc, #88]	@ (8007d14 <vPortValidateInterruptPriority+0x78>)
+ 8007cba:	781b      	ldrb	r3, [r3, #0]
+ 8007cbc:	7afa      	ldrb	r2, [r7, #11]
+ 8007cbe:	429a      	cmp	r2, r3
+ 8007cc0:	d20b      	bcs.n	8007cda <vPortValidateInterruptPriority+0x3e>
+	__asm volatile
+ 8007cc2:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8007cc6:	f383 8811 	msr	BASEPRI, r3
+ 8007cca:	f3bf 8f6f 	isb	sy
+ 8007cce:	f3bf 8f4f 	dsb	sy
+ 8007cd2:	607b      	str	r3, [r7, #4]
+}
+ 8007cd4:	bf00      	nop
+ 8007cd6:	bf00      	nop
+ 8007cd8:	e7fd      	b.n	8007cd6 <vPortValidateInterruptPriority+0x3a>
+		configuration then the correct setting can be achieved on all Cortex-M
+		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
+		scheduler.  Note however that some vendor specific peripheral libraries
+		assume a non-zero priority group setting, in which cases using a value
+		of zero will result in unpredictable behaviour. */
+		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
+ 8007cda:	4b0f      	ldr	r3, [pc, #60]	@ (8007d18 <vPortValidateInterruptPriority+0x7c>)
+ 8007cdc:	681b      	ldr	r3, [r3, #0]
+ 8007cde:	f403 62e0 	and.w	r2, r3, #1792	@ 0x700
+ 8007ce2:	4b0e      	ldr	r3, [pc, #56]	@ (8007d1c <vPortValidateInterruptPriority+0x80>)
+ 8007ce4:	681b      	ldr	r3, [r3, #0]
+ 8007ce6:	429a      	cmp	r2, r3
+ 8007ce8:	d90b      	bls.n	8007d02 <vPortValidateInterruptPriority+0x66>
+	__asm volatile
+ 8007cea:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8007cee:	f383 8811 	msr	BASEPRI, r3
+ 8007cf2:	f3bf 8f6f 	isb	sy
+ 8007cf6:	f3bf 8f4f 	dsb	sy
+ 8007cfa:	603b      	str	r3, [r7, #0]
+}
+ 8007cfc:	bf00      	nop
+ 8007cfe:	bf00      	nop
+ 8007d00:	e7fd      	b.n	8007cfe <vPortValidateInterruptPriority+0x62>
+	}
+ 8007d02:	bf00      	nop
+ 8007d04:	3714      	adds	r7, #20
+ 8007d06:	46bd      	mov	sp, r7
+ 8007d08:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8007d0c:	4770      	bx	lr
+ 8007d0e:	bf00      	nop
+ 8007d10:	e000e3f0 	.word	0xe000e3f0
+ 8007d14:	200003c0 	.word	0x200003c0
+ 8007d18:	e000ed0c 	.word	0xe000ed0c
+ 8007d1c:	200003c4 	.word	0x200003c4
+
+08007d20 <HAL_HCD_SOF_Callback>:
+  * @brief  SOF callback.
+  * @param  hhcd: HCD handle
+  * @retval None
+  */
+void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd)
+{
+ 8007d20:	b580      	push	{r7, lr}
+ 8007d22:	b082      	sub	sp, #8
+ 8007d24:	af00      	add	r7, sp, #0
+ 8007d26:	6078      	str	r0, [r7, #4]
+  USBH_LL_IncTimer(hhcd->pData);
+ 8007d28:	687b      	ldr	r3, [r7, #4]
+ 8007d2a:	f8d3 33dc 	ldr.w	r3, [r3, #988]	@ 0x3dc
+ 8007d2e:	4618      	mov	r0, r3
+ 8007d30:	f7fe fe3e 	bl	80069b0 <USBH_LL_IncTimer>
+}
+ 8007d34:	bf00      	nop
+ 8007d36:	3708      	adds	r7, #8
+ 8007d38:	46bd      	mov	sp, r7
+ 8007d3a:	bd80      	pop	{r7, pc}
+
+08007d3c <HAL_HCD_Connect_Callback>:
+  * @brief  SOF callback.
+  * @param  hhcd: HCD handle
+  * @retval None
+  */
+void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd)
+{
+ 8007d3c:	b580      	push	{r7, lr}
+ 8007d3e:	b082      	sub	sp, #8
+ 8007d40:	af00      	add	r7, sp, #0
+ 8007d42:	6078      	str	r0, [r7, #4]
+  USBH_LL_Connect(hhcd->pData);
+ 8007d44:	687b      	ldr	r3, [r7, #4]
+ 8007d46:	f8d3 33dc 	ldr.w	r3, [r3, #988]	@ 0x3dc
+ 8007d4a:	4618      	mov	r0, r3
+ 8007d4c:	f7fe fe7e 	bl	8006a4c <USBH_LL_Connect>
+}
+ 8007d50:	bf00      	nop
+ 8007d52:	3708      	adds	r7, #8
+ 8007d54:	46bd      	mov	sp, r7
+ 8007d56:	bd80      	pop	{r7, pc}
+
+08007d58 <HAL_HCD_Disconnect_Callback>:
+  * @brief  SOF callback.
+  * @param  hhcd: HCD handle
+  * @retval None
+  */
+void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd)
+{
+ 8007d58:	b580      	push	{r7, lr}
+ 8007d5a:	b082      	sub	sp, #8
+ 8007d5c:	af00      	add	r7, sp, #0
+ 8007d5e:	6078      	str	r0, [r7, #4]
+  USBH_LL_Disconnect(hhcd->pData);
+ 8007d60:	687b      	ldr	r3, [r7, #4]
+ 8007d62:	f8d3 33dc 	ldr.w	r3, [r3, #988]	@ 0x3dc
+ 8007d66:	4618      	mov	r0, r3
+ 8007d68:	f7fe fe8b 	bl	8006a82 <USBH_LL_Disconnect>
+}
+ 8007d6c:	bf00      	nop
+ 8007d6e:	3708      	adds	r7, #8
+ 8007d70:	46bd      	mov	sp, r7
+ 8007d72:	bd80      	pop	{r7, pc}
+
+08007d74 <HAL_HCD_HC_NotifyURBChange_Callback>:
+  * @param  chnum: channel number
+  * @param  urb_state: state
+  * @retval None
+  */
+void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t chnum, HCD_URBStateTypeDef urb_state)
+{
+ 8007d74:	b580      	push	{r7, lr}
+ 8007d76:	b082      	sub	sp, #8
+ 8007d78:	af00      	add	r7, sp, #0
+ 8007d7a:	6078      	str	r0, [r7, #4]
+ 8007d7c:	460b      	mov	r3, r1
+ 8007d7e:	70fb      	strb	r3, [r7, #3]
+ 8007d80:	4613      	mov	r3, r2
+ 8007d82:	70bb      	strb	r3, [r7, #2]
+  /* To be used with OS to sync URB state with the global state machine */
+#if (USBH_USE_OS == 1)
+  USBH_LL_NotifyURBChange(hhcd->pData);
+ 8007d84:	687b      	ldr	r3, [r7, #4]
+ 8007d86:	f8d3 33dc 	ldr.w	r3, [r3, #988]	@ 0x3dc
+ 8007d8a:	4618      	mov	r0, r3
+ 8007d8c:	f7fe feca 	bl	8006b24 <USBH_LL_NotifyURBChange>
+#endif
+}
+ 8007d90:	bf00      	nop
+ 8007d92:	3708      	adds	r7, #8
+ 8007d94:	46bd      	mov	sp, r7
+ 8007d96:	bd80      	pop	{r7, pc}
+
+08007d98 <HAL_HCD_PortEnabled_Callback>:
+* @brief  Port Port Enabled callback.
+  * @param  hhcd: HCD handle
+  * @retval None
+  */
+void HAL_HCD_PortEnabled_Callback(HCD_HandleTypeDef *hhcd)
+{
+ 8007d98:	b580      	push	{r7, lr}
+ 8007d9a:	b082      	sub	sp, #8
+ 8007d9c:	af00      	add	r7, sp, #0
+ 8007d9e:	6078      	str	r0, [r7, #4]
+  USBH_LL_PortEnabled(hhcd->pData);
+ 8007da0:	687b      	ldr	r3, [r7, #4]
+ 8007da2:	f8d3 33dc 	ldr.w	r3, [r3, #988]	@ 0x3dc
+ 8007da6:	4618      	mov	r0, r3
+ 8007da8:	f7fe fe2c 	bl	8006a04 <USBH_LL_PortEnabled>
+}
+ 8007dac:	bf00      	nop
+ 8007dae:	3708      	adds	r7, #8
+ 8007db0:	46bd      	mov	sp, r7
+ 8007db2:	bd80      	pop	{r7, pc}
+
+08007db4 <HAL_HCD_PortDisabled_Callback>:
+  * @brief  Port Port Disabled callback.
+  * @param  hhcd: HCD handle
+  * @retval None
+  */
+void HAL_HCD_PortDisabled_Callback(HCD_HandleTypeDef *hhcd)
+{
+ 8007db4:	b580      	push	{r7, lr}
+ 8007db6:	b082      	sub	sp, #8
+ 8007db8:	af00      	add	r7, sp, #0
+ 8007dba:	6078      	str	r0, [r7, #4]
+  USBH_LL_PortDisabled(hhcd->pData);
+ 8007dbc:	687b      	ldr	r3, [r7, #4]
+ 8007dbe:	f8d3 33dc 	ldr.w	r3, [r3, #988]	@ 0x3dc
+ 8007dc2:	4618      	mov	r0, r3
+ 8007dc4:	f7fe fe30 	bl	8006a28 <USBH_LL_PortDisabled>
+}
+ 8007dc8:	bf00      	nop
+ 8007dca:	3708      	adds	r7, #8
+ 8007dcc:	46bd      	mov	sp, r7
+ 8007dce:	bd80      	pop	{r7, pc}
+
+08007dd0 <USBH_LL_Stop>:
+  * @brief  Stop the low level portion of the host driver.
+  * @param  phost: Host handle
+  * @retval USBH status
+  */
+USBH_StatusTypeDef USBH_LL_Stop(USBH_HandleTypeDef *phost)
+{
+ 8007dd0:	b580      	push	{r7, lr}
+ 8007dd2:	b084      	sub	sp, #16
+ 8007dd4:	af00      	add	r7, sp, #0
+ 8007dd6:	6078      	str	r0, [r7, #4]
+  HAL_StatusTypeDef hal_status = HAL_OK;
+ 8007dd8:	2300      	movs	r3, #0
+ 8007dda:	73fb      	strb	r3, [r7, #15]
+  USBH_StatusTypeDef usb_status = USBH_OK;
+ 8007ddc:	2300      	movs	r3, #0
+ 8007dde:	73bb      	strb	r3, [r7, #14]
+
+  hal_status = HAL_HCD_Stop(phost->pData);
+ 8007de0:	687b      	ldr	r3, [r7, #4]
+ 8007de2:	f8d3 33d0 	ldr.w	r3, [r3, #976]	@ 0x3d0
+ 8007de6:	4618      	mov	r0, r3
+ 8007de8:	f7fa fa1f 	bl	800222a <HAL_HCD_Stop>
+ 8007dec:	4603      	mov	r3, r0
+ 8007dee:	73fb      	strb	r3, [r7, #15]
+
+  usb_status = USBH_Get_USB_Status(hal_status);
+ 8007df0:	7bfb      	ldrb	r3, [r7, #15]
+ 8007df2:	4618      	mov	r0, r3
+ 8007df4:	f000 f808 	bl	8007e08 <USBH_Get_USB_Status>
+ 8007df8:	4603      	mov	r3, r0
+ 8007dfa:	73bb      	strb	r3, [r7, #14]
+
+  return usb_status;
+ 8007dfc:	7bbb      	ldrb	r3, [r7, #14]
+}
+ 8007dfe:	4618      	mov	r0, r3
+ 8007e00:	3710      	adds	r7, #16
+ 8007e02:	46bd      	mov	sp, r7
+ 8007e04:	bd80      	pop	{r7, pc}
+	...
+
+08007e08 <USBH_Get_USB_Status>:
+  * @brief  Returns the USB status depending on the HAL status:
+  * @param  hal_status: HAL status
+  * @retval USB status
+  */
+USBH_StatusTypeDef USBH_Get_USB_Status(HAL_StatusTypeDef hal_status)
+{
+ 8007e08:	b480      	push	{r7}
+ 8007e0a:	b085      	sub	sp, #20
+ 8007e0c:	af00      	add	r7, sp, #0
+ 8007e0e:	4603      	mov	r3, r0
+ 8007e10:	71fb      	strb	r3, [r7, #7]
+  USBH_StatusTypeDef usb_status = USBH_OK;
+ 8007e12:	2300      	movs	r3, #0
+ 8007e14:	73fb      	strb	r3, [r7, #15]
+
+  switch (hal_status)
+ 8007e16:	79fb      	ldrb	r3, [r7, #7]
+ 8007e18:	2b03      	cmp	r3, #3
+ 8007e1a:	d817      	bhi.n	8007e4c <USBH_Get_USB_Status+0x44>
+ 8007e1c:	a201      	add	r2, pc, #4	@ (adr r2, 8007e24 <USBH_Get_USB_Status+0x1c>)
+ 8007e1e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
+ 8007e22:	bf00      	nop
+ 8007e24:	08007e35 	.word	0x08007e35
+ 8007e28:	08007e3b 	.word	0x08007e3b
+ 8007e2c:	08007e41 	.word	0x08007e41
+ 8007e30:	08007e47 	.word	0x08007e47
+  {
+    case HAL_OK :
+      usb_status = USBH_OK;
+ 8007e34:	2300      	movs	r3, #0
+ 8007e36:	73fb      	strb	r3, [r7, #15]
+    break;
+ 8007e38:	e00b      	b.n	8007e52 <USBH_Get_USB_Status+0x4a>
+    case HAL_ERROR :
+      usb_status = USBH_FAIL;
+ 8007e3a:	2302      	movs	r3, #2
+ 8007e3c:	73fb      	strb	r3, [r7, #15]
+    break;
+ 8007e3e:	e008      	b.n	8007e52 <USBH_Get_USB_Status+0x4a>
+    case HAL_BUSY :
+      usb_status = USBH_BUSY;
+ 8007e40:	2301      	movs	r3, #1
+ 8007e42:	73fb      	strb	r3, [r7, #15]
+    break;
+ 8007e44:	e005      	b.n	8007e52 <USBH_Get_USB_Status+0x4a>
+    case HAL_TIMEOUT :
+      usb_status = USBH_FAIL;
+ 8007e46:	2302      	movs	r3, #2
+ 8007e48:	73fb      	strb	r3, [r7, #15]
+    break;
+ 8007e4a:	e002      	b.n	8007e52 <USBH_Get_USB_Status+0x4a>
+    default :
+      usb_status = USBH_FAIL;
+ 8007e4c:	2302      	movs	r3, #2
+ 8007e4e:	73fb      	strb	r3, [r7, #15]
+    break;
+ 8007e50:	bf00      	nop
+  }
+  return usb_status;
+ 8007e52:	7bfb      	ldrb	r3, [r7, #15]
+}
+ 8007e54:	4618      	mov	r0, r3
+ 8007e56:	3714      	adds	r7, #20
+ 8007e58:	46bd      	mov	sp, r7
+ 8007e5a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8007e5e:	4770      	bx	lr
+
+08007e60 <memset>:
+ 8007e60:	4402      	add	r2, r0
+ 8007e62:	4603      	mov	r3, r0
+ 8007e64:	4293      	cmp	r3, r2
+ 8007e66:	d100      	bne.n	8007e6a <memset+0xa>
+ 8007e68:	4770      	bx	lr
+ 8007e6a:	f803 1b01 	strb.w	r1, [r3], #1
+ 8007e6e:	e7f9      	b.n	8007e64 <memset+0x4>
+
+08007e70 <__libc_init_array>:
+ 8007e70:	b570      	push	{r4, r5, r6, lr}
+ 8007e72:	4d0d      	ldr	r5, [pc, #52]	@ (8007ea8 <__libc_init_array+0x38>)
+ 8007e74:	4c0d      	ldr	r4, [pc, #52]	@ (8007eac <__libc_init_array+0x3c>)
+ 8007e76:	1b64      	subs	r4, r4, r5
+ 8007e78:	10a4      	asrs	r4, r4, #2
+ 8007e7a:	2600      	movs	r6, #0
+ 8007e7c:	42a6      	cmp	r6, r4
+ 8007e7e:	d109      	bne.n	8007e94 <__libc_init_array+0x24>
+ 8007e80:	4d0b      	ldr	r5, [pc, #44]	@ (8007eb0 <__libc_init_array+0x40>)
+ 8007e82:	4c0c      	ldr	r4, [pc, #48]	@ (8007eb4 <__libc_init_array+0x44>)
+ 8007e84:	f000 f826 	bl	8007ed4 <_init>
+ 8007e88:	1b64      	subs	r4, r4, r5
+ 8007e8a:	10a4      	asrs	r4, r4, #2
+ 8007e8c:	2600      	movs	r6, #0
+ 8007e8e:	42a6      	cmp	r6, r4
+ 8007e90:	d105      	bne.n	8007e9e <__libc_init_array+0x2e>
+ 8007e92:	bd70      	pop	{r4, r5, r6, pc}
+ 8007e94:	f855 3b04 	ldr.w	r3, [r5], #4
+ 8007e98:	4798      	blx	r3
+ 8007e9a:	3601      	adds	r6, #1
+ 8007e9c:	e7ee      	b.n	8007e7c <__libc_init_array+0xc>
+ 8007e9e:	f855 3b04 	ldr.w	r3, [r5], #4
+ 8007ea2:	4798      	blx	r3
+ 8007ea4:	3601      	adds	r6, #1
+ 8007ea6:	e7f2      	b.n	8007e8e <__libc_init_array+0x1e>
+ 8007ea8:	08007f0c 	.word	0x08007f0c
+ 8007eac:	08007f0c 	.word	0x08007f0c
+ 8007eb0:	08007f0c 	.word	0x08007f0c
+ 8007eb4:	08007f10 	.word	0x08007f10
+
+08007eb8 <memcpy>:
+ 8007eb8:	440a      	add	r2, r1
+ 8007eba:	4291      	cmp	r1, r2
+ 8007ebc:	f100 33ff 	add.w	r3, r0, #4294967295	@ 0xffffffff
+ 8007ec0:	d100      	bne.n	8007ec4 <memcpy+0xc>
+ 8007ec2:	4770      	bx	lr
+ 8007ec4:	b510      	push	{r4, lr}
+ 8007ec6:	f811 4b01 	ldrb.w	r4, [r1], #1
+ 8007eca:	f803 4f01 	strb.w	r4, [r3, #1]!
+ 8007ece:	4291      	cmp	r1, r2
+ 8007ed0:	d1f9      	bne.n	8007ec6 <memcpy+0xe>
+ 8007ed2:	bd10      	pop	{r4, pc}
+
+08007ed4 <_init>:
+ 8007ed4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 8007ed6:	bf00      	nop
+ 8007ed8:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 8007eda:	bc08      	pop	{r3}
+ 8007edc:	469e      	mov	lr, r3
+ 8007ede:	4770      	bx	lr
+
+08007ee0 <_fini>:
+ 8007ee0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 8007ee2:	bf00      	nop
+ 8007ee4:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 8007ee6:	bc08      	pop	{r3}
+ 8007ee8:	469e      	mov	lr, r3
+ 8007eea:	4770      	bx	lr
diff --git a/TrafficLightsPlus/Debug/TrafficLightsPlus.map b/TrafficLightsPlus/Debug/TrafficLightsPlus.map
new file mode 100644
index 0000000..968b70f
--- /dev/null
+++ b/TrafficLightsPlus/Debug/TrafficLightsPlus.map
@@ -0,0 +1,10325 @@
+Archive member included to satisfy reference by file (symbol)
+
+/home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-exit.o)
+                              /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o (exit)
+/home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-malloc.o)
+                              ./Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.o (malloc)
+/home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-mallocr.o)
+                              /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-malloc.o) (_malloc_r)
+/home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-mlock.o)
+                              /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-mallocr.o) (__malloc_lock)
+/home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-findfp.o)
+                              /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-exit.o) (__stdio_exit_handler)
+/home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-fwalk.o)
+                              /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-findfp.o) (_fwalk_sglue)
+/home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-stdio.o)
+                              /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-findfp.o) (__sread)
+/home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o)
+                              /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o (memset)
+/home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-closer.o)
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+ .text.HAL_SPI_MspInit
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+ .text.HAL_SPI_MspDeInit
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+ .text.HAL_SPI_TransmitReceive
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+ .text.HAL_SPI_Receive_IT
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+ .text.HAL_SPI_Transmit_DMA
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+ .text.HAL_SPI_Receive_DMA
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+ .text.HAL_SPI_TransmitReceive_DMA
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+ .text.HAL_SPI_TxCpltCallback
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+ .text.HAL_SPI_RxCpltCallback
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+ .text.HAL_SPI_TxHalfCpltCallback
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+ .text.HAL_SPI_RxHalfCpltCallback
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+ .text.HAL_SPI_AbortCpltCallback
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+ .text.HAL_SPI_GetError
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+ .text.SPI_DMAReceiveCplt
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+ .text.SPI_DMATransmitReceiveCplt
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+ .text.SPI_DMATxAbortCallback
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+ .data          0x00000000        0x0 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o)
+ .bss           0x00000000        0x0 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o)
+ .text          0x00000000        0x0 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtend.o
+ .data          0x00000000        0x0 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtend.o
+ .bss           0x00000000        0x0 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtend.o
+ .rodata        0x00000000       0x24 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtend.o
+ .eh_frame      0x00000000        0x4 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtend.o
+ .ARM.attributes
+                0x00000000       0x34 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtend.o
+ .text          0x00000000        0x0 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtn.o
+ .data          0x00000000        0x0 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtn.o
+ .bss           0x00000000        0x0 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtn.o
+
+Memory Configuration
+
+Name             Origin             Length             Attributes
+CCMRAM           0x10000000         0x00010000         xrw
+RAM              0x20000000         0x00030000         xrw
+FLASH            0x08000000         0x00200000         xr
+*default*        0x00000000         0xffffffff
+
+Linker script and memory map
+
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crti.o
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o
+LOAD ./Core/Src/breadboard.o
+LOAD ./Core/Src/freertos.o
+LOAD ./Core/Src/main.o
+LOAD ./Core/Src/stm32f4xx_hal_msp.o
+LOAD ./Core/Src/stm32f4xx_hal_timebase_tim.o
+LOAD ./Core/Src/stm32f4xx_it.o
+LOAD ./Core/Src/syscalls.o
+LOAD ./Core/Src/sysmem.o
+LOAD ./Core/Src/system_stm32f4xx.o
+LOAD ./Core/Startup/startup_stm32f429zitx.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o
+LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o
+LOAD ./Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.o
+LOAD ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o
+LOAD ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.o
+LOAD ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.o
+LOAD ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.o
+LOAD ./Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+LOAD ./Middlewares/Third_Party/FreeRTOS/Source/croutine.o
+LOAD ./Middlewares/Third_Party/FreeRTOS/Source/event_groups.o
+LOAD ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+LOAD ./Middlewares/Third_Party/FreeRTOS/Source/queue.o
+LOAD ./Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o
+LOAD ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+LOAD ./Middlewares/Third_Party/FreeRTOS/Source/timers.o
+LOAD ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
+LOAD ./Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o
+LOAD ./USB_HOST/App/usb_host.o
+LOAD ./USB_HOST/Target/usbh_conf.o
+LOAD ./USB_HOST/Target/usbh_platform.o
+START GROUP
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libm.a
+END GROUP
+START GROUP
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
+END GROUP
+START GROUP
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libnosys.a
+END GROUP
+START GROUP
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libnosys.a
+END GROUP
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtend.o
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtn.o
+                0x20030000                        _estack = (ORIGIN (RAM) + LENGTH (RAM))
+                0x00000200                        _Min_Heap_Size = 0x200
+                0x00000400                        _Min_Stack_Size = 0x400
+
+.isr_vector     0x08000000      0x1ac
+                0x08000000                        . = ALIGN (0x4)
+ *(.isr_vector)
+ .isr_vector    0x08000000      0x1ac ./Core/Startup/startup_stm32f429zitx.o
+                0x08000000                g_pfnVectors
+                0x080001ac                        . = ALIGN (0x4)
+
+.text           0x080001b0     0x7d3c
+                0x080001b0                        . = ALIGN (0x4)
+ *(.text)
+ .text          0x080001b0       0x40 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+ .text          0x080001f0       0x30 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o)
+                0x080001f0                __aeabi_uldivmod
+ .text          0x08000220      0x2f8 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o)
+                0x08000220                __udivmoddi4
+ .text          0x08000518        0x4 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o)
+                0x08000518                __aeabi_ldiv0
+                0x08000518                __aeabi_idiv0
+ *(.text*)
+ .text.breadboard
+                0x0800051c       0x68 ./Core/Src/breadboard.o
+                0x0800051c                breadboard
+ .text.vApplicationStackOverflowHook
+                0x08000584       0x16 ./Core/Src/freertos.o
+                0x08000584                vApplicationStackOverflowHook
+ .text.main     0x0800059a       0x3a ./Core/Src/main.o
+                0x0800059a                main
+ .text.SystemClock_Config
+                0x080005d4       0xd4 ./Core/Src/main.o
+                0x080005d4                SystemClock_Config
+ .text.MX_CRC_Init
+                0x080006a8       0x28 ./Core/Src/main.o
+ .text.MX_DMA2D_Init
+                0x080006d0       0x64 ./Core/Src/main.o
+ .text.MX_I2C3_Init
+                0x08000734       0x80 ./Core/Src/main.o
+ .text.MX_LTDC_Init
+                0x080007b4      0x100 ./Core/Src/main.o
+ .text.MX_SPI5_Init
+                0x080008b4       0x6c ./Core/Src/main.o
+ .text.MX_TIM1_Init
+                0x08000920       0xa0 ./Core/Src/main.o
+ .text.MX_USART1_UART_Init
+                0x080009c0       0x54 ./Core/Src/main.o
+ .text.MX_FMC_Init
+                0x08000a14       0xa0 ./Core/Src/main.o
+ .text.MX_GPIO_Init
+                0x08000ab4      0x248 ./Core/Src/main.o
+ .text.HAL_TIM_PeriodElapsedCallback
+                0x08000cfc       0x24 ./Core/Src/main.o
+                0x08000cfc                HAL_TIM_PeriodElapsedCallback
+ .text.Error_Handler
+                0x08000d20        0xc ./Core/Src/main.o
+                0x08000d20                Error_Handler
+ .text.HAL_MspInit
+                0x08000d2c       0x58 ./Core/Src/stm32f4xx_hal_msp.o
+                0x08000d2c                HAL_MspInit
+ .text.HAL_CRC_MspInit
+                0x08000d84       0x44 ./Core/Src/stm32f4xx_hal_msp.o
+                0x08000d84                HAL_CRC_MspInit
+ .text.HAL_DMA2D_MspInit
+                0x08000dc8       0x50 ./Core/Src/stm32f4xx_hal_msp.o
+                0x08000dc8                HAL_DMA2D_MspInit
+ .text.HAL_I2C_MspInit
+                0x08000e18       0xd4 ./Core/Src/stm32f4xx_hal_msp.o
+                0x08000e18                HAL_I2C_MspInit
+ .text.HAL_LTDC_MspInit
+                0x08000eec      0x260 ./Core/Src/stm32f4xx_hal_msp.o
+                0x08000eec                HAL_LTDC_MspInit
+ .text.HAL_SPI_MspInit
+                0x0800114c       0x90 ./Core/Src/stm32f4xx_hal_msp.o
+                0x0800114c                HAL_SPI_MspInit
+ .text.HAL_TIM_Base_MspInit
+                0x080011dc       0x44 ./Core/Src/stm32f4xx_hal_msp.o
+                0x080011dc                HAL_TIM_Base_MspInit
+ .text.HAL_UART_MspInit
+                0x08001220       0x90 ./Core/Src/stm32f4xx_hal_msp.o
+                0x08001220                HAL_UART_MspInit
+ .text.HAL_FMC_MspInit
+                0x080012b0      0x124 ./Core/Src/stm32f4xx_hal_msp.o
+ .text.HAL_SDRAM_MspInit
+                0x080013d4       0x14 ./Core/Src/stm32f4xx_hal_msp.o
+                0x080013d4                HAL_SDRAM_MspInit
+ .text.HAL_InitTick
+                0x080013e8       0xf8 ./Core/Src/stm32f4xx_hal_timebase_tim.o
+                0x080013e8                HAL_InitTick
+ .text.NMI_Handler
+                0x080014e0        0x8 ./Core/Src/stm32f4xx_it.o
+                0x080014e0                NMI_Handler
+ .text.HardFault_Handler
+                0x080014e8        0x8 ./Core/Src/stm32f4xx_it.o
+                0x080014e8                HardFault_Handler
+ .text.MemManage_Handler
+                0x080014f0        0x8 ./Core/Src/stm32f4xx_it.o
+                0x080014f0                MemManage_Handler
+ .text.BusFault_Handler
+                0x080014f8        0x8 ./Core/Src/stm32f4xx_it.o
+                0x080014f8                BusFault_Handler
+ .text.UsageFault_Handler
+                0x08001500        0x8 ./Core/Src/stm32f4xx_it.o
+                0x08001500                UsageFault_Handler
+ .text.DebugMon_Handler
+                0x08001508        0xe ./Core/Src/stm32f4xx_it.o
+                0x08001508                DebugMon_Handler
+ *fill*         0x08001516        0x2 
+ .text.TIM6_DAC_IRQHandler
+                0x08001518       0x14 ./Core/Src/stm32f4xx_it.o
+                0x08001518                TIM6_DAC_IRQHandler
+ .text.OTG_HS_IRQHandler
+                0x0800152c       0x14 ./Core/Src/stm32f4xx_it.o
+                0x0800152c                OTG_HS_IRQHandler
+ .text.LTDC_IRQHandler
+                0x08001540       0x14 ./Core/Src/stm32f4xx_it.o
+                0x08001540                LTDC_IRQHandler
+ .text.DMA2D_IRQHandler
+                0x08001554       0x14 ./Core/Src/stm32f4xx_it.o
+                0x08001554                DMA2D_IRQHandler
+ .text.SystemInit
+                0x08001568       0x24 ./Core/Src/system_stm32f4xx.o
+                0x08001568                SystemInit
+ .text.Reset_Handler
+                0x0800158c       0x50 ./Core/Startup/startup_stm32f429zitx.o
+                0x0800158c                Reset_Handler
+ .text.Default_Handler
+                0x080015dc        0x2 ./Core/Startup/startup_stm32f429zitx.o
+                0x080015dc                RTC_Alarm_IRQHandler
+                0x080015dc                HASH_RNG_IRQHandler
+                0x080015dc                EXTI2_IRQHandler
+                0x080015dc                TIM8_CC_IRQHandler
+                0x080015dc                UART8_IRQHandler
+                0x080015dc                SPI4_IRQHandler
+                0x080015dc                TIM1_CC_IRQHandler
+                0x080015dc                DMA2_Stream5_IRQHandler
+                0x080015dc                DMA1_Stream5_IRQHandler
+                0x080015dc                PVD_IRQHandler
+                0x080015dc                SDIO_IRQHandler
+                0x080015dc                TAMP_STAMP_IRQHandler
+                0x080015dc                CAN2_RX1_IRQHandler
+                0x080015dc                EXTI3_IRQHandler
+                0x080015dc                TIM8_TRG_COM_TIM14_IRQHandler
+                0x080015dc                TIM1_UP_TIM10_IRQHandler
+                0x080015dc                TIM8_UP_TIM13_IRQHandler
+                0x080015dc                I2C3_ER_IRQHandler
+                0x080015dc                EXTI0_IRQHandler
+                0x080015dc                I2C2_EV_IRQHandler
+                0x080015dc                DMA1_Stream2_IRQHandler
+                0x080015dc                CAN1_RX0_IRQHandler
+                0x080015dc                FPU_IRQHandler
+                0x080015dc                OTG_HS_WKUP_IRQHandler
+                0x080015dc                LTDC_ER_IRQHandler
+                0x080015dc                CAN2_SCE_IRQHandler
+                0x080015dc                DMA2_Stream2_IRQHandler
+                0x080015dc                SPI1_IRQHandler
+                0x080015dc                TIM1_BRK_TIM9_IRQHandler
+                0x080015dc                DCMI_IRQHandler
+                0x080015dc                CAN2_RX0_IRQHandler
+                0x080015dc                DMA2_Stream3_IRQHandler
+                0x080015dc                USART6_IRQHandler
+                0x080015dc                USART3_IRQHandler
+                0x080015dc                CAN1_RX1_IRQHandler
+                0x080015dc                UART5_IRQHandler
+                0x080015dc                DMA2_Stream0_IRQHandler
+                0x080015dc                TIM4_IRQHandler
+                0x080015dc                I2C1_EV_IRQHandler
+                0x080015dc                DMA1_Stream6_IRQHandler
+                0x080015dc                DMA1_Stream1_IRQHandler
+                0x080015dc                UART4_IRQHandler
+                0x080015dc                TIM3_IRQHandler
+                0x080015dc                RCC_IRQHandler
+                0x080015dc                TIM8_BRK_TIM12_IRQHandler
+                0x080015dc                Default_Handler
+                0x080015dc                EXTI15_10_IRQHandler
+                0x080015dc                ADC_IRQHandler
+                0x080015dc                DMA1_Stream7_IRQHandler
+                0x080015dc                SPI5_IRQHandler
+                0x080015dc                TIM7_IRQHandler
+                0x080015dc                CAN2_TX_IRQHandler
+                0x080015dc                TIM5_IRQHandler
+                0x080015dc                DMA2_Stream7_IRQHandler
+                0x080015dc                I2C3_EV_IRQHandler
+                0x080015dc                EXTI9_5_IRQHandler
+                0x080015dc                RTC_WKUP_IRQHandler
+                0x080015dc                ETH_WKUP_IRQHandler
+                0x080015dc                SPI2_IRQHandler
+                0x080015dc                OTG_HS_EP1_IN_IRQHandler
+                0x080015dc                DMA1_Stream0_IRQHandler
+                0x080015dc                CAN1_TX_IRQHandler
+                0x080015dc                EXTI4_IRQHandler
+                0x080015dc                ETH_IRQHandler
+                0x080015dc                OTG_HS_EP1_OUT_IRQHandler
+                0x080015dc                WWDG_IRQHandler
+                0x080015dc                SPI6_IRQHandler
+                0x080015dc                TIM2_IRQHandler
+                0x080015dc                OTG_FS_WKUP_IRQHandler
+                0x080015dc                TIM1_TRG_COM_TIM11_IRQHandler
+                0x080015dc                EXTI1_IRQHandler
+                0x080015dc                UART7_IRQHandler
+                0x080015dc                USART2_IRQHandler
+                0x080015dc                I2C2_ER_IRQHandler
+                0x080015dc                DMA2_Stream1_IRQHandler
+                0x080015dc                CAN1_SCE_IRQHandler
+                0x080015dc                FLASH_IRQHandler
+                0x080015dc                DMA2_Stream4_IRQHandler
+                0x080015dc                USART1_IRQHandler
+                0x080015dc                OTG_FS_IRQHandler
+                0x080015dc                SPI3_IRQHandler
+                0x080015dc                DMA1_Stream4_IRQHandler
+                0x080015dc                I2C1_ER_IRQHandler
+                0x080015dc                FMC_IRQHandler
+                0x080015dc                DMA2_Stream6_IRQHandler
+                0x080015dc                SAI1_IRQHandler
+                0x080015dc                DMA1_Stream3_IRQHandler
+ *fill*         0x080015de        0x2 
+ .text.HAL_Init
+                0x080015e0       0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+                0x080015e0                HAL_Init
+ .text.HAL_IncTick
+                0x08001624       0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+                0x08001624                HAL_IncTick
+ .text.HAL_GetTick
+                0x0800164c       0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+                0x0800164c                HAL_GetTick
+ .text.HAL_Delay
+                0x08001664       0x48 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+                0x08001664                HAL_Delay
+ .text.__NVIC_SetPriorityGrouping
+                0x080016ac       0x48 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+ .text.__NVIC_GetPriorityGrouping
+                0x080016f4       0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+ .text.__NVIC_EnableIRQ
+                0x08001710       0x3c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+ .text.__NVIC_SetPriority
+                0x0800174c       0x54 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+ .text.NVIC_EncodePriority
+                0x080017a0       0x66 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+ .text.HAL_NVIC_SetPriorityGrouping
+                0x08001806       0x16 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+                0x08001806                HAL_NVIC_SetPriorityGrouping
+ .text.HAL_NVIC_SetPriority
+                0x0800181c       0x38 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+                0x0800181c                HAL_NVIC_SetPriority
+ .text.HAL_NVIC_EnableIRQ
+                0x08001854       0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+                0x08001854                HAL_NVIC_EnableIRQ
+ .text.HAL_CRC_Init
+                0x08001870       0x38 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.o
+                0x08001870                HAL_CRC_Init
+ .text.HAL_DMA2D_Init
+                0x080018a8       0x92 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+                0x080018a8                HAL_DMA2D_Init
+ .text.HAL_DMA2D_IRQHandler
+                0x0800193a      0x1f8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+                0x0800193a                HAL_DMA2D_IRQHandler
+ .text.HAL_DMA2D_LineEventCallback
+                0x08001b32       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+                0x08001b32                HAL_DMA2D_LineEventCallback
+ .text.HAL_DMA2D_CLUTLoadingCpltCallback
+                0x08001b46       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+                0x08001b46                HAL_DMA2D_CLUTLoadingCpltCallback
+ *fill*         0x08001b5a        0x2 
+ .text.HAL_DMA2D_ConfigLayer
+                0x08001b5c      0x124 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+                0x08001b5c                HAL_DMA2D_ConfigLayer
+ .text.HAL_GPIO_Init
+                0x08001c80      0x358 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+                0x08001c80                HAL_GPIO_Init
+ .text.HAL_GPIO_WritePin
+                0x08001fd8       0x32 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+                0x08001fd8                HAL_GPIO_WritePin
+ .text.HAL_HCD_IRQHandler
+                0x0800200a      0x220 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o
+                0x0800200a                HAL_HCD_IRQHandler
+ .text.HAL_HCD_Stop
+                0x0800222a       0x3a ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o
+                0x0800222a                HAL_HCD_Stop
+ .text.HCD_HC_IN_IRQHandler
+                0x08002264      0xcd2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o
+ .text.HCD_HC_OUT_IRQHandler
+                0x08002f36      0x97e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o
+ .text.HCD_RXQLVL_IRQHandler
+                0x080038b4      0x1be ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o
+ .text.HCD_Port_IRQHandler
+                0x08003a72       0xe6 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o
+ .text.HAL_I2C_Init
+                0x08003b58      0x288 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.o
+                0x08003b58                HAL_I2C_Init
+ .text.HAL_I2CEx_ConfigAnalogFilter
+                0x08003de0       0x78 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.o
+                0x08003de0                HAL_I2CEx_ConfigAnalogFilter
+ .text.HAL_I2CEx_ConfigDigitalFilter
+                0x08003e58       0x7e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.o
+                0x08003e58                HAL_I2CEx_ConfigDigitalFilter
+ .text.HAL_LTDC_Init
+                0x08003ed6      0x13a ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o
+                0x08003ed6                HAL_LTDC_Init
+ .text.HAL_LTDC_IRQHandler
+                0x08004010      0x148 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o
+                0x08004010                HAL_LTDC_IRQHandler
+ .text.HAL_LTDC_ErrorCallback
+                0x08004158       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o
+                0x08004158                HAL_LTDC_ErrorCallback
+ .text.HAL_LTDC_LineEventCallback
+                0x0800416c       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o
+                0x0800416c                HAL_LTDC_LineEventCallback
+ .text.HAL_LTDC_ReloadEventCallback
+                0x08004180       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o
+                0x08004180                HAL_LTDC_ReloadEventCallback
+ .text.HAL_LTDC_ConfigLayer
+                0x08004194       0x7c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o
+                0x08004194                HAL_LTDC_ConfigLayer
+ .text.LTDC_SetConfig
+                0x08004210      0x2e6 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o
+ *fill*         0x080044f6        0x2 
+ .text.HAL_RCC_OscConfig
+                0x080044f8      0x4f0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x080044f8                HAL_RCC_OscConfig
+ .text.HAL_RCC_ClockConfig
+                0x080049e8      0x1cc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x080049e8                HAL_RCC_ClockConfig
+ .text.HAL_RCC_GetSysClockFreq
+                0x08004bb4      0x20c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x08004bb4                HAL_RCC_GetSysClockFreq
+ .text.HAL_RCC_GetHCLKFreq
+                0x08004dc0       0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x08004dc0                HAL_RCC_GetHCLKFreq
+ .text.HAL_RCC_GetPCLK1Freq
+                0x08004dd8       0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x08004dd8                HAL_RCC_GetPCLK1Freq
+ .text.HAL_RCC_GetPCLK2Freq
+                0x08004e00       0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x08004e00                HAL_RCC_GetPCLK2Freq
+ .text.HAL_RCC_GetClockConfig
+                0x08004e28       0x64 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x08004e28                HAL_RCC_GetClockConfig
+ .text.HAL_RCCEx_PeriphCLKConfig
+                0x08004e8c      0x380 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o
+                0x08004e8c                HAL_RCCEx_PeriphCLKConfig
+ .text.HAL_SDRAM_Init
+                0x0800520c       0x68 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.o
+                0x0800520c                HAL_SDRAM_Init
+ .text.HAL_SPI_Init
+                0x08005274      0x112 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o
+                0x08005274                HAL_SPI_Init
+ .text.HAL_TIM_Base_Init
+                0x08005386       0x9e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x08005386                HAL_TIM_Base_Init
+ .text.HAL_TIM_Base_Start_IT
+                0x08005424       0xe0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x08005424                HAL_TIM_Base_Start_IT
+ .text.HAL_TIM_IRQHandler
+                0x08005504      0x1e0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x08005504                HAL_TIM_IRQHandler
+ .text.HAL_TIM_ConfigClockSource
+                0x080056e4      0x18e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x080056e4                HAL_TIM_ConfigClockSource
+ .text.HAL_TIM_OC_DelayElapsedCallback
+                0x08005872       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x08005872                HAL_TIM_OC_DelayElapsedCallback
+ .text.HAL_TIM_IC_CaptureCallback
+                0x08005886       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x08005886                HAL_TIM_IC_CaptureCallback
+ .text.HAL_TIM_PWM_PulseFinishedCallback
+                0x0800589a       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x0800589a                HAL_TIM_PWM_PulseFinishedCallback
+ .text.HAL_TIM_TriggerCallback
+                0x080058ae       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x080058ae                HAL_TIM_TriggerCallback
+ *fill*         0x080058c2        0x2 
+ .text.TIM_Base_SetConfig
+                0x080058c4      0x14c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x080058c4                TIM_Base_SetConfig
+ .text.TIM_TI1_ConfigInputStage
+                0x08005a10       0x5e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+ .text.TIM_TI2_ConfigInputStage
+                0x08005a6e       0x60 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+ .text.TIM_ITRx_SetConfig
+                0x08005ace       0x36 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+ .text.TIM_ETR_SetConfig
+                0x08005b04       0x40 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x08005b04                TIM_ETR_SetConfig
+ .text.HAL_TIMEx_MasterConfigSynchronization
+                0x08005b44       0xf8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+                0x08005b44                HAL_TIMEx_MasterConfigSynchronization
+ .text.HAL_TIMEx_CommutCallback
+                0x08005c3c       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+                0x08005c3c                HAL_TIMEx_CommutCallback
+ .text.HAL_TIMEx_BreakCallback
+                0x08005c50       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+                0x08005c50                HAL_TIMEx_BreakCallback
+ .text.HAL_UART_Init
+                0x08005c64       0xa0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
+                0x08005c64                HAL_UART_Init
+ .text.UART_SetConfig
+                0x08005d04      0x4e8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
+ .text.FMC_SDRAM_Init
+                0x080061ec       0xba ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o
+                0x080061ec                FMC_SDRAM_Init
+ .text.FMC_SDRAM_Timing_Init
+                0x080062a6       0xd2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o
+                0x080062a6                FMC_SDRAM_Timing_Init
+ .text.USB_EnableGlobalInt
+                0x08006378       0x22 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o
+                0x08006378                USB_EnableGlobalInt
+ .text.USB_DisableGlobalInt
+                0x0800639a       0x22 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o
+                0x0800639a                USB_DisableGlobalInt
+ .text.USB_FlushTxFifo
+                0x080063bc       0x64 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o
+                0x080063bc                USB_FlushTxFifo
+ .text.USB_FlushRxFifo
+                0x08006420       0x5c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o
+                0x08006420                USB_FlushRxFifo
+ .text.USB_ReadPacket
+                0x0800647c       0xb0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o
+                0x0800647c                USB_ReadPacket
+ .text.USB_ReadInterrupts
+                0x0800652c       0x26 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o
+                0x0800652c                USB_ReadInterrupts
+ .text.USB_ReadChInterrupts
+                0x08006552       0x42 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o
+                0x08006552                USB_ReadChInterrupts
+ .text.USB_GetMode
+                0x08006594       0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o
+                0x08006594                USB_GetMode
+ .text.USB_InitFSLSPClkSel
+                0x080065b0       0x7a ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o
+                0x080065b0                USB_InitFSLSPClkSel
+ .text.USB_HC_ReadInterrupt
+                0x0800662a       0x22 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o
+                0x0800662a                USB_HC_ReadInterrupt
+ .text.USB_HC_Halt
+                0x0800664c      0x240 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o
+                0x0800664c                USB_HC_Halt
+ .text.USB_StopHost
+                0x0800688c      0x124 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o
+                0x0800688c                USB_StopHost
+ .text.USBH_LL_IncTimer
+                0x080069b0       0x24 ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o
+                0x080069b0                USBH_LL_IncTimer
+ .text.USBH_HandleSof
+                0x080069d4       0x30 ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o
+ .text.USBH_LL_PortEnabled
+                0x08006a04       0x24 ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o
+                0x08006a04                USBH_LL_PortEnabled
+ .text.USBH_LL_PortDisabled
+                0x08006a28       0x24 ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o
+                0x08006a28                USBH_LL_PortDisabled
+ .text.USBH_LL_Connect
+                0x08006a4c       0x36 ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o
+                0x08006a4c                USBH_LL_Connect
+ .text.USBH_LL_Disconnect
+                0x08006a82       0x54 ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o
+                0x08006a82                USBH_LL_Disconnect
+ .text.USBH_OS_PutMessage
+                0x08006ad6       0x4e ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o
+                0x08006ad6                USBH_OS_PutMessage
+ .text.USBH_LL_NotifyURBChange
+                0x08006b24       0x1e ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o
+                0x08006b24                USBH_LL_NotifyURBChange
+ .text.USBH_FreePipe
+                0x08006b42       0x3c ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.o
+                0x08006b42                USBH_FreePipe
+ .text.inHandlerMode
+                0x08006b7e       0x24 ./Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ *fill*         0x08006ba2        0x2 
+ .text.osMessagePut
+                0x08006ba4       0x80 ./Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                0x08006ba4                osMessagePut
+ .text.osMessageWaiting
+                0x08006c24       0x2c ./Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+                0x08006c24                osMessageWaiting
+ .text.vListInsertEnd
+                0x08006c50       0x48 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+                0x08006c50                vListInsertEnd
+ .text.vListInsert
+                0x08006c98       0x72 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+                0x08006c98                vListInsert
+ .text.uxListRemove
+                0x08006d0a       0x54 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+                0x08006d0a                uxListRemove
+ *fill*         0x08006d5e        0x2 
+ .text.xQueueGenericSend
+                0x08006d60      0x204 ./Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x08006d60                xQueueGenericSend
+ .text.xQueueGenericSendFromISR
+                0x08006f64      0x13c ./Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x08006f64                xQueueGenericSendFromISR
+ .text.uxQueueMessagesWaiting
+                0x080070a0       0x3e ./Middlewares/Third_Party/FreeRTOS/Source/queue.o
+                0x080070a0                uxQueueMessagesWaiting
+ .text.uxQueueMessagesWaitingFromISR
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+ .ARM.attributes
+                0x0000031b       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.o
+ .ARM.attributes
+                0x0000034f       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.o
+ .ARM.attributes
+                0x00000383       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o
+ .ARM.attributes
+                0x000003b7       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+ .ARM.attributes
+                0x000003eb       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o
+ .ARM.attributes
+                0x0000041f       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.o
+ .ARM.attributes
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+ .ARM.attributes
+                0x00000487       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+ .ARM.attributes
+                0x000004bb       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+ .ARM.attributes
+                0x000004ef       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
+ .ARM.attributes
+                0x00000523       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o
+ .ARM.attributes
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+ .ARM.attributes
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+ .ARM.attributes
+                0x000005bf       0x34 ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.o
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+ .ARM.attributes
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+ .ARM.attributes
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+ .ARM.attributes
+                0x0000075f       0x34 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o)
+ .ARM.attributes
+                0x00000793       0x34 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memcpy-stub.o)
+ .ARM.attributes
+                0x000007c7       0x22 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o)
+ .ARM.attributes
+                0x000007e9       0x34 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o)
+ .ARM.attributes
+                0x0000081d       0x22 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o)
+ .ARM.attributes
+                0x0000083f       0x22 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtn.o
+OUTPUT(TrafficLightsPlus.elf elf32-littlearm)
+LOAD linker stubs
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libm.a
+LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a
+
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+ .debug_frame   0x0000074c      0x3b4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+ .debug_frame   0x00000b00      0x508 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+ .debug_frame   0x00001008      0x120 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.o
+ .debug_frame   0x00001128      0x4e0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+ .debug_frame   0x00001608      0x14c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+ .debug_frame   0x00001754      0x498 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o
+ .debug_frame   0x00001bec      0xc84 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.o
+ .debug_frame   0x00002870       0x60 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.o
+ .debug_frame   0x000028d0      0x61c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o
+ .debug_frame   0x00002eec      0x1f4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+ .debug_frame   0x000030e0      0x13c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o
+ .debug_frame   0x0000321c      0x3e8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.o
+ .debug_frame   0x00003604      0x828 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o
+ .debug_frame   0x00003e2c     0x11c0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+ .debug_frame   0x00004fec      0x638 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+ .debug_frame   0x00005624      0x954 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o
+ .debug_frame   0x00005f78      0x440 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o
+ .debug_frame   0x000063b8      0x7c0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o
+ .debug_frame   0x00006b78      0x398 ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o
+ .debug_frame   0x00006f10       0xcc ./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.o
+ .debug_frame   0x00006fdc      0x800 ./Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o
+ .debug_frame   0x000077dc       0xd8 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_frame   0x000078b4      0x504 ./Middlewares/Third_Party/FreeRTOS/Source/queue.o
+ .debug_frame   0x00007db8      0x80c ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_frame   0x000085c4      0x1a8 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
+ .debug_frame   0x0000876c      0x3b0 ./USB_HOST/Target/usbh_conf.o
+ .debug_frame   0x00008b1c       0x20 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o)
+ .debug_frame   0x00008b3c       0x2c /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o)
+ .debug_frame   0x00008b68       0x28 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memcpy-stub.o)
+ .debug_frame   0x00008b90       0x2c /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o)
+ .debug_frame   0x00008bbc       0x34 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o)
+
+.debug_line_str
+                0x00000000       0x51
+ .debug_line_str
+                0x00000000       0x51 ./Core/Startup/startup_stm32f429zitx.o
diff --git a/TrafficLightsPlus/Debug/USB_HOST/App/subdir.mk b/TrafficLightsPlus/Debug/USB_HOST/App/subdir.mk
new file mode 100644
index 0000000..e6629e2
--- /dev/null
+++ b/TrafficLightsPlus/Debug/USB_HOST/App/subdir.mk
@@ -0,0 +1,27 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../USB_HOST/App/usb_host.c 
+
+OBJS += \
+./USB_HOST/App/usb_host.o 
+
+C_DEPS += \
+./USB_HOST/App/usb_host.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+USB_HOST/App/%.o USB_HOST/App/%.su USB_HOST/App/%.cyclo: ../USB_HOST/App/%.c USB_HOST/App/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../USB_HOST/App -I../USB_HOST/Target -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/ST/STM32_USB_Host_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-USB_HOST-2f-App
+
+clean-USB_HOST-2f-App:
+	-$(RM) ./USB_HOST/App/usb_host.cyclo ./USB_HOST/App/usb_host.d ./USB_HOST/App/usb_host.o ./USB_HOST/App/usb_host.su
+
+.PHONY: clean-USB_HOST-2f-App
+
diff --git a/TrafficLightsPlus/Debug/USB_HOST/App/usb_host.cyclo b/TrafficLightsPlus/Debug/USB_HOST/App/usb_host.cyclo
new file mode 100644
index 0000000..8e04692
--- /dev/null
+++ b/TrafficLightsPlus/Debug/USB_HOST/App/usb_host.cyclo
@@ -0,0 +1,2 @@
+../USB_HOST/App/usb_host.c:68:6:MX_USB_HOST_Init	4
+../USB_HOST/App/usb_host.c:95:13:USBH_UserProcess	4
diff --git a/TrafficLightsPlus/Debug/USB_HOST/App/usb_host.d b/TrafficLightsPlus/Debug/USB_HOST/App/usb_host.d
new file mode 100644
index 0000000..0f4661b
--- /dev/null
+++ b/TrafficLightsPlus/Debug/USB_HOST/App/usb_host.d
@@ -0,0 +1,132 @@
+USB_HOST/App/usb_host.o: ../USB_HOST/App/usb_host.c \
+ ../USB_HOST/App/usb_host.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h \
+ ../USB_HOST/Target/usbh_conf.h ../Core/Inc/main.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc/usbh_cdc.h
+../USB_HOST/App/usb_host.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h:
+../USB_HOST/Target/usbh_conf.h:
+../Core/Inc/main.h:
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h:
+../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc/usbh_cdc.h:
diff --git a/TrafficLightsPlus/Debug/USB_HOST/App/usb_host.o b/TrafficLightsPlus/Debug/USB_HOST/App/usb_host.o
new file mode 100644
index 0000000..91e9682
Binary files /dev/null and b/TrafficLightsPlus/Debug/USB_HOST/App/usb_host.o differ
diff --git a/TrafficLightsPlus/Debug/USB_HOST/App/usb_host.su b/TrafficLightsPlus/Debug/USB_HOST/App/usb_host.su
new file mode 100644
index 0000000..6670942
--- /dev/null
+++ b/TrafficLightsPlus/Debug/USB_HOST/App/usb_host.su
@@ -0,0 +1,2 @@
+../USB_HOST/App/usb_host.c:68:6:MX_USB_HOST_Init	8	static
+../USB_HOST/App/usb_host.c:95:13:USBH_UserProcess	16	static
diff --git a/TrafficLightsPlus/Debug/USB_HOST/Target/subdir.mk b/TrafficLightsPlus/Debug/USB_HOST/Target/subdir.mk
new file mode 100644
index 0000000..686e5a8
--- /dev/null
+++ b/TrafficLightsPlus/Debug/USB_HOST/Target/subdir.mk
@@ -0,0 +1,30 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+# Add inputs and outputs from these tool invocations to the build variables 
+C_SRCS += \
+../USB_HOST/Target/usbh_conf.c \
+../USB_HOST/Target/usbh_platform.c 
+
+OBJS += \
+./USB_HOST/Target/usbh_conf.o \
+./USB_HOST/Target/usbh_platform.o 
+
+C_DEPS += \
+./USB_HOST/Target/usbh_conf.d \
+./USB_HOST/Target/usbh_platform.d 
+
+
+# Each subdirectory must supply rules for building sources it contributes
+USB_HOST/Target/%.o USB_HOST/Target/%.su USB_HOST/Target/%.cyclo: ../USB_HOST/Target/%.c USB_HOST/Target/subdir.mk
+	arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../USB_HOST/App -I../USB_HOST/Target -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Middlewares/ST/STM32_USB_Host_Library/Core/Inc -I../Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Inc -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
+
+clean: clean-USB_HOST-2f-Target
+
+clean-USB_HOST-2f-Target:
+	-$(RM) ./USB_HOST/Target/usbh_conf.cyclo ./USB_HOST/Target/usbh_conf.d ./USB_HOST/Target/usbh_conf.o ./USB_HOST/Target/usbh_conf.su ./USB_HOST/Target/usbh_platform.cyclo ./USB_HOST/Target/usbh_platform.d ./USB_HOST/Target/usbh_platform.o ./USB_HOST/Target/usbh_platform.su
+
+.PHONY: clean-USB_HOST-2f-Target
+
diff --git a/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_conf.cyclo b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_conf.cyclo
new file mode 100644
index 0000000..83a9b4d
--- /dev/null
+++ b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_conf.cyclo
@@ -0,0 +1,25 @@
+../USB_HOST/Target/usbh_conf.c:62:6:HAL_HCD_MspInit	2
+../USB_HOST/Target/usbh_conf.c:102:6:HAL_HCD_MspDeInit	2
+../USB_HOST/Target/usbh_conf.c:134:6:HAL_HCD_SOF_Callback	1
+../USB_HOST/Target/usbh_conf.c:144:6:HAL_HCD_Connect_Callback	1
+../USB_HOST/Target/usbh_conf.c:154:6:HAL_HCD_Disconnect_Callback	1
+../USB_HOST/Target/usbh_conf.c:166:6:HAL_HCD_HC_NotifyURBChange_Callback	1
+../USB_HOST/Target/usbh_conf.c:178:6:HAL_HCD_PortEnabled_Callback	1
+../USB_HOST/Target/usbh_conf.c:188:6:HAL_HCD_PortDisabled_Callback	1
+../USB_HOST/Target/usbh_conf.c:202:20:USBH_LL_Init	3
+../USB_HOST/Target/usbh_conf.c:234:20:USBH_LL_DeInit	1
+../USB_HOST/Target/usbh_conf.c:251:20:USBH_LL_Start	1
+../USB_HOST/Target/usbh_conf.c:268:20:USBH_LL_Stop	1
+../USB_HOST/Target/usbh_conf.c:285:19:USBH_LL_GetSpeed	5
+../USB_HOST/Target/usbh_conf.c:315:20:USBH_LL_ResetPort	1
+../USB_HOST/Target/usbh_conf.c:333:10:USBH_LL_GetLastXferSize	1
+../USB_HOST/Target/usbh_conf.c:349:20:USBH_LL_OpenPipe	1
+../USB_HOST/Target/usbh_conf.c:374:20:USBH_LL_ClosePipe	1
+../USB_HOST/Target/usbh_conf.c:390:20:USBH_LL_ActivatePipe	1
+../USB_HOST/Target/usbh_conf.c:426:20:USBH_LL_SubmitURB	1
+../USB_HOST/Target/usbh_conf.c:455:22:USBH_LL_GetURBState	1
+../USB_HOST/Target/usbh_conf.c:469:20:USBH_LL_DriverVBUS	2
+../USB_HOST/Target/usbh_conf.c:490:20:USBH_LL_SetToggle	2
+../USB_HOST/Target/usbh_conf.c:513:9:USBH_LL_GetToggle	2
+../USB_HOST/Target/usbh_conf.c:535:6:USBH_Delay	1
+../USB_HOST/Target/usbh_conf.c:545:20:USBH_Get_USB_Status	5
diff --git a/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_conf.d b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_conf.d
new file mode 100644
index 0000000..0fa5ce2
--- /dev/null
+++ b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_conf.d
@@ -0,0 +1,131 @@
+USB_HOST/Target/usbh_conf.o: ../USB_HOST/Target/usbh_conf.c \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h \
+ ../USB_HOST/Target/usbh_conf.h ../Core/Inc/main.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h \
+ ../Core/Inc/FreeRTOSConfig.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/list.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/task.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h \
+ ../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h \
+ ../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h \
+ ../USB_HOST/Target/usbh_platform.h ../USB_HOST/App/usb_host.h
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h:
+../USB_HOST/Target/usbh_conf.h:
+../Core/Inc/main.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
+../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h:
+../Core/Inc/FreeRTOSConfig.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/portable.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h:
+../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/portmacro.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/list.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/task.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/queue.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h:
+../Middlewares/Third_Party/FreeRTOS/Source/include/timers.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_def.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ioreq.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_core.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_pipes.h:
+../Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_ctlreq.h:
+../USB_HOST/Target/usbh_platform.h:
+../USB_HOST/App/usb_host.h:
diff --git a/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_conf.o b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_conf.o
new file mode 100644
index 0000000..ea0b1f6
Binary files /dev/null and b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_conf.o differ
diff --git a/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_conf.su b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_conf.su
new file mode 100644
index 0000000..b263450
--- /dev/null
+++ b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_conf.su
@@ -0,0 +1,25 @@
+../USB_HOST/Target/usbh_conf.c:62:6:HAL_HCD_MspInit	48	static
+../USB_HOST/Target/usbh_conf.c:102:6:HAL_HCD_MspDeInit	16	static
+../USB_HOST/Target/usbh_conf.c:134:6:HAL_HCD_SOF_Callback	16	static
+../USB_HOST/Target/usbh_conf.c:144:6:HAL_HCD_Connect_Callback	16	static
+../USB_HOST/Target/usbh_conf.c:154:6:HAL_HCD_Disconnect_Callback	16	static
+../USB_HOST/Target/usbh_conf.c:166:6:HAL_HCD_HC_NotifyURBChange_Callback	16	static
+../USB_HOST/Target/usbh_conf.c:178:6:HAL_HCD_PortEnabled_Callback	16	static
+../USB_HOST/Target/usbh_conf.c:188:6:HAL_HCD_PortDisabled_Callback	16	static
+../USB_HOST/Target/usbh_conf.c:202:20:USBH_LL_Init	16	static
+../USB_HOST/Target/usbh_conf.c:234:20:USBH_LL_DeInit	24	static
+../USB_HOST/Target/usbh_conf.c:251:20:USBH_LL_Start	24	static
+../USB_HOST/Target/usbh_conf.c:268:20:USBH_LL_Stop	24	static
+../USB_HOST/Target/usbh_conf.c:285:19:USBH_LL_GetSpeed	24	static
+../USB_HOST/Target/usbh_conf.c:315:20:USBH_LL_ResetPort	24	static
+../USB_HOST/Target/usbh_conf.c:333:10:USBH_LL_GetLastXferSize	16	static
+../USB_HOST/Target/usbh_conf.c:349:20:USBH_LL_OpenPipe	48	static
+../USB_HOST/Target/usbh_conf.c:374:20:USBH_LL_ClosePipe	16	static
+../USB_HOST/Target/usbh_conf.c:390:20:USBH_LL_ActivatePipe	16	static
+../USB_HOST/Target/usbh_conf.c:426:20:USBH_LL_SubmitURB	48	static
+../USB_HOST/Target/usbh_conf.c:455:22:USBH_LL_GetURBState	16	static
+../USB_HOST/Target/usbh_conf.c:469:20:USBH_LL_DriverVBUS	16	static
+../USB_HOST/Target/usbh_conf.c:490:20:USBH_LL_SetToggle	24	static
+../USB_HOST/Target/usbh_conf.c:513:9:USBH_LL_GetToggle	24	static
+../USB_HOST/Target/usbh_conf.c:535:6:USBH_Delay	16	static
+../USB_HOST/Target/usbh_conf.c:545:20:USBH_Get_USB_Status	24	static
diff --git a/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_platform.cyclo b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_platform.cyclo
new file mode 100644
index 0000000..52234fc
--- /dev/null
+++ b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_platform.cyclo
@@ -0,0 +1 @@
+../USB_HOST/Target/usbh_platform.c:35:6:MX_DriverVbusHS	2
diff --git a/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_platform.d b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_platform.d
new file mode 100644
index 0000000..379bf66
--- /dev/null
+++ b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_platform.d
@@ -0,0 +1,82 @@
+USB_HOST/Target/usbh_platform.o: ../USB_HOST/Target/usbh_platform.c \
+ ../USB_HOST/Target/usbh_platform.h ../USB_HOST/App/usb_host.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \
+ ../Drivers/CMSIS/Include/core_cm4.h \
+ ../Drivers/CMSIS/Include/cmsis_version.h \
+ ../Drivers/CMSIS/Include/cmsis_compiler.h \
+ ../Drivers/CMSIS/Include/cmsis_gcc.h \
+ ../Drivers/CMSIS/Include/mpu_armv7.h \
+ ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ ../Core/Inc/stm32f4xx_hal_conf.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h \
+ ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
+../USB_HOST/Target/usbh_platform.h:
+../USB_HOST/App/usb_host.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h:
+../Drivers/CMSIS/Include/core_cm4.h:
+../Drivers/CMSIS/Include/cmsis_version.h:
+../Drivers/CMSIS/Include/cmsis_compiler.h:
+../Drivers/CMSIS/Include/cmsis_gcc.h:
+../Drivers/CMSIS/Include/mpu_armv7.h:
+../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+../Core/Inc/stm32f4xx_hal_conf.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_crc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma2d.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_fmc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_ltdc_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_hcd.h:
+../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h:
diff --git a/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_platform.o b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_platform.o
new file mode 100644
index 0000000..fe6ff4b
Binary files /dev/null and b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_platform.o differ
diff --git a/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_platform.su b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_platform.su
new file mode 100644
index 0000000..be063a4
--- /dev/null
+++ b/TrafficLightsPlus/Debug/USB_HOST/Target/usbh_platform.su
@@ -0,0 +1 @@
+../USB_HOST/Target/usbh_platform.c:35:6:MX_DriverVbusHS	24	static
diff --git a/TrafficLightsPlus/Debug/makefile b/TrafficLightsPlus/Debug/makefile
new file mode 100644
index 0000000..a1710e8
--- /dev/null
+++ b/TrafficLightsPlus/Debug/makefile
@@ -0,0 +1,102 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+-include ../makefile.init
+
+RM := rm -rf
+
+# All of the sources participating in the build are defined here
+-include sources.mk
+-include USB_HOST/Target/subdir.mk
+-include USB_HOST/App/subdir.mk
+-include Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/subdir.mk
+-include Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/subdir.mk
+-include Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/subdir.mk
+-include Middlewares/Third_Party/FreeRTOS/Source/subdir.mk
+-include Middlewares/ST/STM32_USB_Host_Library/Core/Src/subdir.mk
+-include Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/subdir.mk
+-include Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk
+-include Core/Startup/subdir.mk
+-include Core/Src/subdir.mk
+-include objects.mk
+
+ifneq ($(MAKECMDGOALS),clean)
+ifneq ($(strip $(S_DEPS)),)
+-include $(S_DEPS)
+endif
+ifneq ($(strip $(S_UPPER_DEPS)),)
+-include $(S_UPPER_DEPS)
+endif
+ifneq ($(strip $(C_DEPS)),)
+-include $(C_DEPS)
+endif
+endif
+
+-include ../makefile.defs
+
+OPTIONAL_TOOL_DEPS := \
+$(wildcard ../makefile.defs) \
+$(wildcard ../makefile.init) \
+$(wildcard ../makefile.targets) \
+
+
+BUILD_ARTIFACT_NAME := TrafficLightsPlus
+BUILD_ARTIFACT_EXTENSION := elf
+BUILD_ARTIFACT_PREFIX :=
+BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME)$(if $(BUILD_ARTIFACT_EXTENSION),.$(BUILD_ARTIFACT_EXTENSION),)
+
+# Add inputs and outputs from these tool invocations to the build variables 
+EXECUTABLES += \
+TrafficLightsPlus.elf \
+
+MAP_FILES += \
+TrafficLightsPlus.map \
+
+SIZE_OUTPUT += \
+default.size.stdout \
+
+OBJDUMP_LIST += \
+TrafficLightsPlus.list \
+
+
+# All Target
+all: main-build
+
+# Main-build Target
+main-build: TrafficLightsPlus.elf secondary-outputs
+
+# Tool invocations
+TrafficLightsPlus.elf TrafficLightsPlus.map: $(OBJS) $(USER_OBJS) /home/ja/st/Home/TrafficLightsPlus/STM32F429ZITX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS)
+	arm-none-eabi-gcc -o "TrafficLightsPlus.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"/home/ja/st/Home/TrafficLightsPlus/STM32F429ZITX_FLASH.ld" --specs=nosys.specs -Wl,-Map="TrafficLightsPlus.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
+	@echo 'Finished building target: $@'
+	@echo ' '
+
+default.size.stdout: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS)
+	arm-none-eabi-size  $(EXECUTABLES)
+	@echo 'Finished building: $@'
+	@echo ' '
+
+TrafficLightsPlus.list: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS)
+	arm-none-eabi-objdump -h -S $(EXECUTABLES) > "TrafficLightsPlus.list"
+	@echo 'Finished building: $@'
+	@echo ' '
+
+# Other Targets
+clean:
+	-$(RM) TrafficLightsPlus.elf TrafficLightsPlus.list TrafficLightsPlus.map default.size.stdout
+	-@echo ' '
+
+secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST)
+
+fail-specified-linker-script-missing:
+	@echo 'Error: Cannot find the specified linker script. Check the linker settings in the build configuration.'
+	@exit 2
+
+warn-no-linker-script-specified:
+	@echo 'Warning: No linker script specified. Check the linker settings in the build configuration.'
+
+.PHONY: all clean dependents main-build fail-specified-linker-script-missing warn-no-linker-script-specified
+
+-include ../makefile.targets
diff --git a/TrafficLightsPlus/Debug/objects.list b/TrafficLightsPlus/Debug/objects.list
new file mode 100644
index 0000000..75c8275
--- /dev/null
+++ b/TrafficLightsPlus/Debug/objects.list
@@ -0,0 +1,60 @@
+"./Core/Src/breadboard.o"
+"./Core/Src/freertos.o"
+"./Core/Src/main.o"
+"./Core/Src/stm32f4xx_hal_msp.o"
+"./Core/Src/stm32f4xx_hal_timebase_tim.o"
+"./Core/Src/stm32f4xx_it.o"
+"./Core/Src/syscalls.o"
+"./Core/Src/sysmem.o"
+"./Core/Src/system_stm32f4xx.o"
+"./Core/Startup/startup_stm32f429zitx.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_crc.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dsi.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_ltdc_ex.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nand.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_nor.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pccard.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sdram.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fmc.o"
+"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.o"
+"./Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src/usbh_cdc.o"
+"./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.o"
+"./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.o"
+"./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.o"
+"./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.o"
+"./Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.o"
+"./Middlewares/Third_Party/FreeRTOS/Source/croutine.o"
+"./Middlewares/Third_Party/FreeRTOS/Source/event_groups.o"
+"./Middlewares/Third_Party/FreeRTOS/Source/list.o"
+"./Middlewares/Third_Party/FreeRTOS/Source/queue.o"
+"./Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.o"
+"./Middlewares/Third_Party/FreeRTOS/Source/tasks.o"
+"./Middlewares/Third_Party/FreeRTOS/Source/timers.o"
+"./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o"
+"./Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.o"
+"./USB_HOST/App/usb_host.o"
+"./USB_HOST/Target/usbh_conf.o"
+"./USB_HOST/Target/usbh_platform.o"
diff --git a/TrafficLightsPlus/Debug/objects.mk b/TrafficLightsPlus/Debug/objects.mk
new file mode 100644
index 0000000..b471e98
--- /dev/null
+++ b/TrafficLightsPlus/Debug/objects.mk
@@ -0,0 +1,9 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+USER_OBJS :=
+
+LIBS :=
+
diff --git a/TrafficLightsPlus/Debug/sources.mk b/TrafficLightsPlus/Debug/sources.mk
new file mode 100644
index 0000000..8aed649
--- /dev/null
+++ b/TrafficLightsPlus/Debug/sources.mk
@@ -0,0 +1,36 @@
+################################################################################
+# Automatically-generated file. Do not edit!
+# Toolchain: GNU Tools for STM32 (13.3.rel1)
+################################################################################
+
+ELF_SRCS := 
+OBJ_SRCS := 
+S_SRCS := 
+C_SRCS := 
+S_UPPER_SRCS := 
+O_SRCS := 
+CYCLO_FILES := 
+SIZE_OUTPUT := 
+OBJDUMP_LIST := 
+SU_FILES := 
+EXECUTABLES := 
+OBJS := 
+MAP_FILES := 
+S_DEPS := 
+S_UPPER_DEPS := 
+C_DEPS := 
+
+# Every subdirectory with source files must be described here
+SUBDIRS := \
+Core/Src \
+Core/Startup \
+Drivers/STM32F4xx_HAL_Driver/Src \
+Middlewares/ST/STM32_USB_Host_Library/Class/CDC/Src \
+Middlewares/ST/STM32_USB_Host_Library/Core/Src \
+Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS \
+Middlewares/Third_Party/FreeRTOS/Source \
+Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F \
+Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang \
+USB_HOST/App \
+USB_HOST/Target \
+
diff --git a/TrafficLightsPlus/TrafficLightsPlus.ioc b/TrafficLightsPlus/TrafficLightsPlus.ioc
index 945fd38..1c0c30e 100644
--- a/TrafficLightsPlus/TrafficLightsPlus.ioc
+++ b/TrafficLightsPlus/TrafficLightsPlus.ioc
@@ -66,105 +66,108 @@ Mcu.IP9=SYS
 Mcu.IPNb=14
 Mcu.Name=STM32F429ZITx
 Mcu.Package=LQFP144
-Mcu.Pin0=PC14/OSC32_IN
-Mcu.Pin1=PC15/OSC32_OUT
-Mcu.Pin10=PF9
-Mcu.Pin11=PF10
-Mcu.Pin12=PH0/OSC_IN
-Mcu.Pin13=PH1/OSC_OUT
-Mcu.Pin14=PC0
-Mcu.Pin15=PC1
-Mcu.Pin16=PC2
-Mcu.Pin17=PA0/WKUP
-Mcu.Pin18=PA1
-Mcu.Pin19=PA2
-Mcu.Pin2=PF0
-Mcu.Pin20=PA3
-Mcu.Pin21=PA4
-Mcu.Pin22=PA6
-Mcu.Pin23=PA7
-Mcu.Pin24=PC4
-Mcu.Pin25=PC5
-Mcu.Pin26=PB0
-Mcu.Pin27=PB1
-Mcu.Pin28=PB2/BOOT1
-Mcu.Pin29=PF11
-Mcu.Pin3=PF1
-Mcu.Pin30=PF12
-Mcu.Pin31=PF13
-Mcu.Pin32=PF14
-Mcu.Pin33=PF15
-Mcu.Pin34=PG0
-Mcu.Pin35=PG1
-Mcu.Pin36=PE7
-Mcu.Pin37=PE8
-Mcu.Pin38=PE9
-Mcu.Pin39=PE10
-Mcu.Pin4=PF2
-Mcu.Pin40=PE11
-Mcu.Pin41=PE12
-Mcu.Pin42=PE13
-Mcu.Pin43=PE14
-Mcu.Pin44=PE15
-Mcu.Pin45=PB10
-Mcu.Pin46=PB11
-Mcu.Pin47=PB12
-Mcu.Pin48=PB13
-Mcu.Pin49=PB14
-Mcu.Pin5=PF3
-Mcu.Pin50=PB15
-Mcu.Pin51=PD8
-Mcu.Pin52=PD9
-Mcu.Pin53=PD10
-Mcu.Pin54=PD11
-Mcu.Pin55=PD12
-Mcu.Pin56=PD13
-Mcu.Pin57=PD14
-Mcu.Pin58=PD15
-Mcu.Pin59=PG4
-Mcu.Pin6=PF4
-Mcu.Pin60=PG5
-Mcu.Pin61=PG6
-Mcu.Pin62=PG7
-Mcu.Pin63=PG8
-Mcu.Pin64=PC6
-Mcu.Pin65=PC7
-Mcu.Pin66=PC9
-Mcu.Pin67=PA8
-Mcu.Pin68=PA9
-Mcu.Pin69=PA10
-Mcu.Pin7=PF5
-Mcu.Pin70=PA11
-Mcu.Pin71=PA12
-Mcu.Pin72=PA13
-Mcu.Pin73=PA14
-Mcu.Pin74=PA15
-Mcu.Pin75=PC10
-Mcu.Pin76=PD0
-Mcu.Pin77=PD1
-Mcu.Pin78=PD3
-Mcu.Pin79=PD6
-Mcu.Pin8=PF7
-Mcu.Pin80=PG10
-Mcu.Pin81=PG11
-Mcu.Pin82=PG12
-Mcu.Pin83=PG13
-Mcu.Pin84=PG14
-Mcu.Pin85=PG15
-Mcu.Pin86=PB5
-Mcu.Pin87=PB6
-Mcu.Pin88=PB8
-Mcu.Pin89=PB9
-Mcu.Pin9=PF8
-Mcu.Pin90=PE0
-Mcu.Pin91=PE1
-Mcu.Pin92=VP_CRC_VS_CRC
-Mcu.Pin93=VP_DMA2D_VS_DMA2D
-Mcu.Pin94=VP_FREERTOS_VS_CMSIS_V1
-Mcu.Pin95=VP_SYS_VS_tim6
-Mcu.Pin96=VP_TIM1_VS_ClockSourceINT
-Mcu.Pin97=VP_USB_HOST_VS_USB_HOST_CDC_HS
-Mcu.PinsNb=98
+Mcu.Pin0=PE2
+Mcu.Pin1=PE3
+Mcu.Pin10=PF5
+Mcu.Pin100=VP_USB_HOST_VS_USB_HOST_CDC_HS
+Mcu.Pin11=PF7
+Mcu.Pin12=PF8
+Mcu.Pin13=PF9
+Mcu.Pin14=PF10
+Mcu.Pin15=PH0/OSC_IN
+Mcu.Pin16=PH1/OSC_OUT
+Mcu.Pin17=PC0
+Mcu.Pin18=PC1
+Mcu.Pin19=PC2
+Mcu.Pin2=PE4
+Mcu.Pin20=PA0/WKUP
+Mcu.Pin21=PA1
+Mcu.Pin22=PA2
+Mcu.Pin23=PA3
+Mcu.Pin24=PA4
+Mcu.Pin25=PA6
+Mcu.Pin26=PA7
+Mcu.Pin27=PC4
+Mcu.Pin28=PC5
+Mcu.Pin29=PB0
+Mcu.Pin3=PC14/OSC32_IN
+Mcu.Pin30=PB1
+Mcu.Pin31=PB2/BOOT1
+Mcu.Pin32=PF11
+Mcu.Pin33=PF12
+Mcu.Pin34=PF13
+Mcu.Pin35=PF14
+Mcu.Pin36=PF15
+Mcu.Pin37=PG0
+Mcu.Pin38=PG1
+Mcu.Pin39=PE7
+Mcu.Pin4=PC15/OSC32_OUT
+Mcu.Pin40=PE8
+Mcu.Pin41=PE9
+Mcu.Pin42=PE10
+Mcu.Pin43=PE11
+Mcu.Pin44=PE12
+Mcu.Pin45=PE13
+Mcu.Pin46=PE14
+Mcu.Pin47=PE15
+Mcu.Pin48=PB10
+Mcu.Pin49=PB11
+Mcu.Pin5=PF0
+Mcu.Pin50=PB12
+Mcu.Pin51=PB13
+Mcu.Pin52=PB14
+Mcu.Pin53=PB15
+Mcu.Pin54=PD8
+Mcu.Pin55=PD9
+Mcu.Pin56=PD10
+Mcu.Pin57=PD11
+Mcu.Pin58=PD12
+Mcu.Pin59=PD13
+Mcu.Pin6=PF1
+Mcu.Pin60=PD14
+Mcu.Pin61=PD15
+Mcu.Pin62=PG4
+Mcu.Pin63=PG5
+Mcu.Pin64=PG6
+Mcu.Pin65=PG7
+Mcu.Pin66=PG8
+Mcu.Pin67=PC6
+Mcu.Pin68=PC7
+Mcu.Pin69=PC9
+Mcu.Pin7=PF2
+Mcu.Pin70=PA8
+Mcu.Pin71=PA9
+Mcu.Pin72=PA10
+Mcu.Pin73=PA11
+Mcu.Pin74=PA12
+Mcu.Pin75=PA13
+Mcu.Pin76=PA14
+Mcu.Pin77=PA15
+Mcu.Pin78=PC10
+Mcu.Pin79=PD0
+Mcu.Pin8=PF3
+Mcu.Pin80=PD1
+Mcu.Pin81=PD3
+Mcu.Pin82=PD6
+Mcu.Pin83=PG10
+Mcu.Pin84=PG11
+Mcu.Pin85=PG12
+Mcu.Pin86=PG13
+Mcu.Pin87=PG14
+Mcu.Pin88=PG15
+Mcu.Pin89=PB5
+Mcu.Pin9=PF4
+Mcu.Pin90=PB6
+Mcu.Pin91=PB8
+Mcu.Pin92=PB9
+Mcu.Pin93=PE0
+Mcu.Pin94=PE1
+Mcu.Pin95=VP_CRC_VS_CRC
+Mcu.Pin96=VP_DMA2D_VS_DMA2D
+Mcu.Pin97=VP_FREERTOS_VS_CMSIS_V1
+Mcu.Pin98=VP_SYS_VS_tim6
+Mcu.Pin99=VP_TIM1_VS_ClockSourceINT
+Mcu.PinsNb=101
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32F429ZITx
@@ -603,6 +606,18 @@ PE15.GPIO_PuPd=GPIO_NOPULL
 PE15.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
 PE15.Locked=true
 PE15.Signal=FMC_D12_DA12
+PE2.GPIOParameters=GPIO_Label
+PE2.GPIO_Label=RedLight
+PE2.Locked=true
+PE2.Signal=GPIO_Output
+PE3.GPIOParameters=GPIO_Label
+PE3.GPIO_Label=YellowLight
+PE3.Locked=true
+PE3.Signal=GPIO_Output
+PE4.GPIOParameters=GPIO_Label
+PE4.GPIO_Label=GreenLight
+PE4.Locked=true
+PE4.Signal=GPIO_Output
 PE7.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
 PE7.GPIO_Label=D4
 PE7.GPIO_Mode=GPIO_MODE_AF_PP