diff --git a/.metadata/.ide.log b/.metadata/.ide.log
index e7e826d..9f28caa 100644
--- a/.metadata/.ide.log
+++ b/.metadata/.ide.log
@@ -310,3 +310,1484 @@
 2025-10-13 14:22:05,212 [INFO] IntegrityCheckThread:100 - exiting critical section [integrity check]
 2025-10-13 14:22:05,212 [INFO] IntegrityCheckThread:103 - End integrity checks thread
 2025-10-13 14:55:00,763 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 
+2025-10-13 14:55:58,768 [INFO] Activator:176 - 
+
+
+2025-10-13 14:55:58,769 [INFO] Activator:177 - !SESSION log4j initialized
+2025-10-13 14:56:03,760 [INFO] LogOutputStream:77 - [STDOUT_REDIRECT] 
+2025-10-13 14:56:05,109 [INFO] ApplicationProperties:184 - Using Application install path: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659
+2025-10-13 14:56:05,122 [INFO] DbMcusXml:78 - Set database path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//mcu/
+2025-10-13 14:56:05,123 [INFO] ApiDb:274 - Set plugin database path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//plugins/boardmanager/
+2025-10-13 14:56:05,123 [WARN] ApiDb:259 - Overriding images path with different value:  => /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//plugins/mcufinder/images/
+2025-10-13 14:56:05,126 [INFO] ApiDb:250 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/
+2025-10-13 14:56:05,127 [INFO] DbMcusAds:125 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/
+2025-10-13 14:56:05,129 [INFO] CrossReferenceDbSqlite:203 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/cs/
+2025-10-13 14:56:05,237 [INFO] RulesReader:64 - Compatibility file has been processed (317 Rules)
+2025-10-13 14:56:05,282 [INFO] DbMcusXml:78 - Set database path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//mcu/
+2025-10-13 14:56:05,282 [INFO] ApiDb:274 - Set plugin database path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//plugins/boardmanager/
+2025-10-13 14:56:05,282 [INFO] ApiDb:261 - Set plugin images path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//plugins/mcufinder/images/
+2025-10-13 14:56:05,282 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-10-13 14:56:05,282 [INFO] ApiDb:250 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/
+2025-10-13 14:56:05,282 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-10-13 14:56:05,282 [INFO] DbMcusAds:125 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/
+2025-10-13 14:56:05,282 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-10-13 14:56:05,283 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-10-13 14:56:05,283 [INFO] CrossReferenceDbSqlite:203 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/cs/
+2025-10-13 14:56:05,329 [INFO] MainPanel:274 - HeapMemory: 268435456
+2025-10-13 14:56:05,669 [INFO] DbMcusXml:78 - Set database path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//mcu/
+2025-10-13 14:56:05,669 [INFO] ApiDb:274 - Set plugin database path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//plugins/boardmanager/
+2025-10-13 14:56:05,670 [INFO] ApiDb:261 - Set plugin images path to: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db//plugins/mcufinder/images/
+2025-10-13 14:56:05,670 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-10-13 14:56:05,670 [INFO] ApiDb:250 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/
+2025-10-13 14:56:05,670 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-10-13 14:56:05,670 [INFO] DbMcusAds:125 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/
+2025-10-13 14:56:05,670 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-10-13 14:56:05,671 [WARN] DbFile:41 - Overriding database path with different value: /home/ja/.stmcufinder/plugins/mcufinder/ => /home/ja/.stmcufinder/plugins/mcufinder
+2025-10-13 14:56:05,671 [INFO] CrossReferenceDbSqlite:203 - Set database path to: /home/ja/.stmcufinder/plugins/mcufinder//mcu/cs/
+2025-10-13 14:56:05,688 [INFO] ApplicationProperties:184 - Using Application install path: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659
+2025-10-13 14:56:05,689 [INFO] PluginManage:196 - Search for loadable plugins [exclusion list=, ]
+2025-10-13 14:56:05,690 [INFO] PluginManage:310 - Check plugin analytics
+2025-10-13 14:56:06,015 [INFO] AnalyticsPlugin:253 - Accepted Software Licenses: STM32CubeMX.6.15.0
+2025-10-13 14:56:06,015 [INFO] AnalyticsPlugin:255 - Accepted CMSIS Pack Licenses: 
+2025-10-13 14:56:06,016 [INFO] AnalyticsPlugin:257 - Accepted Firmware Licenses: FW.F4.1.28.0
+2025-10-13 14:56:06,017 [INFO] PluginManage:359 - Loaded plugin analytics (category:tool,tabindex:-1)
+2025-10-13 14:56:06,018 [INFO] PluginManage:310 - Check plugin cadmodel
+2025-10-13 14:56:06,020 [INFO] CADModel:105 - Init CAD model plugin
+2025-10-13 14:56:06,021 [INFO] PluginManage:359 - Loaded plugin cadmodel (category:power,tabindex:5)
+2025-10-13 14:56:06,021 [INFO] PluginManage:310 - Check plugin clock
+2025-10-13 14:56:06,028 [INFO] PluginManage:359 - Loaded plugin clock (category:base,tabindex:2)
+2025-10-13 14:56:06,028 [INFO] PluginManage:310 - Check plugin ddr
+2025-10-13 14:56:06,029 [INFO] PluginManage:359 - Loaded plugin ddr (category:tool,tabindex:6)
+2025-10-13 14:56:06,030 [INFO] PluginManage:310 - Check plugin filemanager
+2025-10-13 14:56:06,153 [INFO] PluginManage:359 - Loaded plugin filemanager (category:base,tabindex:10)
+2025-10-13 14:56:06,153 [INFO] PluginManage:310 - Check plugin ipmanager
+2025-10-13 14:56:06,157 [INFO] PluginManage:359 - Loaded plugin ipmanager (category:base,tabindex:5)
+2025-10-13 14:56:06,157 [INFO] PluginManage:310 - Check plugin lpbam
+2025-10-13 14:56:06,165 [INFO] PluginManage:359 - Loaded plugin lpbam (category:base,tabindex:0)
+2025-10-13 14:56:06,165 [INFO] PluginManage:310 - Check plugin memorymap
+2025-10-13 14:56:06,174 [INFO] PluginManage:359 - Loaded plugin memorymap (category:base,tabindex:4)
+2025-10-13 14:56:06,174 [INFO] PluginManage:310 - Check plugin pinoutandconfiguration
+2025-10-13 14:56:06,181 [INFO] PluginManage:359 - Loaded plugin pinoutandconfiguration (category:base,tabindex:1)
+2025-10-13 14:56:06,181 [INFO] PluginManage:310 - Check plugin pinoutconfig
+2025-10-13 14:56:06,262 [WARN] SupportedApi:132 - Cannot load RTOS API schema: s4s-elt-must-match.1: The content of 'definitions' must match (annotation?, (simpleType | complexType)?, (unique | key | keyref)*)). A problem was found starting at: attribute.
+2025-10-13 14:56:06,380 [INFO] PluginManage:359 - Loaded plugin pinoutconfig (category:base,tabindex:0)
+2025-10-13 14:56:06,380 [INFO] PluginManage:310 - Check plugin power
+2025-10-13 14:56:06,387 [INFO] PluginManage:359 - Loaded plugin power (category:power,tabindex:4)
+2025-10-13 14:56:06,388 [INFO] PluginManage:310 - Check plugin projectmanager
+2025-10-13 14:56:06,401 [INFO] PluginManage:359 - Loaded plugin projectmanager (category:projectmanager,tabindex:4)
+2025-10-13 14:56:06,402 [INFO] PluginManage:310 - Check plugin rif
+2025-10-13 14:56:06,409 [INFO] PluginManage:359 - Loaded plugin rif (category:base,tabindex:3)
+2025-10-13 14:56:06,410 [INFO] PluginManage:310 - Check plugin thirdparty
+2025-10-13 14:56:06,519 [INFO] PluginManage:359 - Loaded plugin thirdparty (category:base,tabindex:-1)
+2025-10-13 14:56:06,519 [WARN] IntegrityCheckThread:84 - waiting for thirdparty lock release [integrity check]
+2025-10-13 14:56:06,519 [INFO] PluginManage:310 - Check plugin tools
+2025-10-13 14:56:06,519 [INFO] IntegrityCheckThread:86 - entering critical section [integrity check]
+2025-10-13 14:56:06,520 [INFO] ThirdPartyUpdaterWithRetryManager:70 - Updater plugin not ready yet. [1/15]
+2025-10-13 14:56:06,521 [INFO] PluginManage:359 - Loaded plugin tools (category:base,tabindex:7)
+2025-10-13 14:56:06,521 [INFO] PluginManage:310 - Check plugin tutovideos
+2025-10-13 14:56:06,684 [INFO] PluginManage:359 - Loaded plugin tutovideos (category:base,tabindex:-1)
+2025-10-13 14:56:06,684 [INFO] PluginManage:310 - Check plugin updater
+2025-10-13 14:56:06,703 [INFO] PluginManage:359 - Loaded plugin updater (category:base,tabindex:12)
+2025-10-13 14:56:06,703 [INFO] PluginManage:310 - Check plugin userauth
+2025-10-13 14:56:06,707 [INFO] UserAuth:118 - Init User Auth plugin
+2025-10-13 14:56:06,709 [INFO] PluginManage:359 - Loaded plugin userauth (category:base,tabindex:14)
+2025-10-13 14:56:06,709 [INFO] PluginManage:283 - PluginManage : Loaded plugins [18]
+2025-10-13 14:56:06,860 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-10-13 14:56:06,916 [INFO] CADModel:165 - CPN selected for project level
+2025-10-13 14:56:06,916 [INFO] CADModel:114 - Register for checkConnection events
+2025-10-13 14:56:06,924 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,924 [INFO] PluginManager:220 - loadIPPluginJar : add gtzc
+2025-10-13 14:56:06,929 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,929 [INFO] PluginManager:220 - loadIPPluginJar : add usbx
+2025-10-13 14:56:06,930 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,930 [INFO] PluginManager:220 - loadIPPluginJar : add fatfs
+2025-10-13 14:56:06,933 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,933 [INFO] PluginManager:220 - loadIPPluginJar : add i2c
+2025-10-13 14:56:06,934 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,934 [INFO] PluginManager:220 - loadIPPluginJar : add tim
+2025-10-13 14:56:06,935 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,935 [INFO] PluginManager:220 - loadIPPluginJar : add quadspi
+2025-10-13 14:56:06,938 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,938 [INFO] PluginManager:220 - loadIPPluginJar : add ipddr
+2025-10-13 14:56:06,939 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,939 [INFO] PluginManager:220 - loadIPPluginJar : add i2s
+2025-10-13 14:56:06,941 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,941 [INFO] PluginManager:220 - loadIPPluginJar : add openamp
+2025-10-13 14:56:06,943 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,943 [INFO] PluginManager:220 - loadIPPluginJar : add i3c
+2025-10-13 14:56:06,944 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,944 [INFO] PluginManager:220 - loadIPPluginJar : add ucpd
+2025-10-13 14:56:06,946 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,946 [INFO] PluginManager:220 - loadIPPluginJar : add cryp
+2025-10-13 14:56:06,947 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,947 [INFO] PluginManager:220 - loadIPPluginJar : add comp
+2025-10-13 14:56:06,949 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,949 [INFO] PluginManager:220 - loadIPPluginJar : add spi
+2025-10-13 14:56:06,951 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,951 [INFO] PluginManager:220 - loadIPPluginJar : add touchsensing
+2025-10-13 14:56:06,953 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,953 [INFO] PluginManager:220 - loadIPPluginJar : add can
+2025-10-13 14:56:06,955 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,955 [INFO] PluginManager:220 - loadIPPluginJar : add aes
+2025-10-13 14:56:06,961 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,961 [INFO] PluginManager:220 - loadIPPluginJar : add adc
+2025-10-13 14:56:06,964 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,964 [INFO] PluginManager:220 - loadIPPluginJar : add nvic
+2025-10-13 14:56:06,969 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,969 [INFO] PluginManager:220 - loadIPPluginJar : add freertos
+2025-10-13 14:56:06,975 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,976 [INFO] PluginManager:220 - loadIPPluginJar : add dma
+2025-10-13 14:56:06,979 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,979 [INFO] PluginManager:220 - loadIPPluginJar : add resmgrutility
+2025-10-13 14:56:06,982 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,982 [INFO] PluginManager:220 - loadIPPluginJar : add pdm2pcm
+2025-10-13 14:56:06,984 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,984 [INFO] PluginManager:220 - loadIPPluginJar : add hash
+2025-10-13 14:56:06,987 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,987 [INFO] PluginManager:220 - loadIPPluginJar : add dfsdm
+2025-10-13 14:56:06,989 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,989 [INFO] PluginManager:220 - loadIPPluginJar : add radio
+2025-10-13 14:56:06,996 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:06,999 [INFO] PluginManager:220 - loadIPPluginJar : add plateformsettings
+2025-10-13 14:56:07,005 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,005 [INFO] PluginManager:220 - loadIPPluginJar : add gic
+2025-10-13 14:56:07,006 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,006 [INFO] PluginManager:220 - loadIPPluginJar : add ltdc
+2025-10-13 14:56:07,009 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,009 [INFO] PluginManager:220 - loadIPPluginJar : add tracer_emb
+2025-10-13 14:56:07,011 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,011 [INFO] PluginManager:220 - loadIPPluginJar : add lorawan
+2025-10-13 14:56:07,013 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,013 [INFO] PluginManager:220 - loadIPPluginJar : add tsc
+2025-10-13 14:56:07,015 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,015 [INFO] PluginManager:220 - loadIPPluginJar : add ts
+2025-10-13 14:56:07,017 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,017 [INFO] PluginManager:220 - loadIPPluginJar : add gfxmmu
+2025-10-13 14:56:07,020 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,020 [INFO] PluginManager:220 - loadIPPluginJar : add dma3
+2025-10-13 14:56:07,022 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,023 [INFO] PluginManager:220 - loadIPPluginJar : add ddr_ctrl_phy
+2025-10-13 14:56:07,024 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,024 [INFO] PluginManager:220 - loadIPPluginJar : add genericplugin
+2025-10-13 14:56:07,027 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,027 [INFO] PluginManager:220 - loadIPPluginJar : add opamp
+2025-10-13 14:56:07,033 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,033 [INFO] PluginManager:220 - loadIPPluginJar : add stm32_wpan
+2025-10-13 14:56:07,035 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,035 [INFO] PluginManager:220 - loadIPPluginJar : add usart
+2025-10-13 14:56:07,037 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,037 [INFO] PluginManager:220 - loadIPPluginJar : add sai
+2025-10-13 14:56:07,043 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,043 [INFO] PluginManager:220 - loadIPPluginJar : add linkedlist
+2025-10-13 14:56:07,045 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,046 [INFO] PluginManager:220 - loadIPPluginJar : add extmemmanager
+2025-10-13 14:56:07,049 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,049 [INFO] PluginManager:220 - loadIPPluginJar : add fmc
+2025-10-13 14:56:07,053 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,053 [INFO] PluginManager:220 - loadIPPluginJar : add gpio
+2025-10-13 14:56:07,058 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:07,058 [INFO] PluginManager:220 - loadIPPluginJar : add mdma
+2025-10-13 14:56:07,154 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-10-13 14:56:07,185 [INFO] RulesReader:64 - Compatibility file has been processed (317 Rules)
+2025-10-13 14:56:07,201 [INFO] RulesReader:64 - Compatibility file has been processed (317 Rules)
+2025-10-13 14:56:07,209 [INFO] CADModel:165 - CPN selected for project level
+2025-10-13 14:56:07,209 [INFO] CADModel:114 - Register for checkConnection events
+2025-10-13 14:56:07,209 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-10-13 14:56:07,209 [ERROR] CADModel:125 - Updater not yet initialized, retry later 
+2025-10-13 14:56:07,334 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-10-13 14:56:07,335 [INFO] CADModel:165 - CPN selected for project level
+2025-10-13 14:56:07,335 [INFO] CADModel:114 - Register for checkConnection events
+2025-10-13 14:56:07,336 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-10-13 14:56:07,336 [ERROR] CADModel:125 - Updater not yet initialized, retry later 
+2025-10-13 14:56:07,339 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-10-13 14:56:07,427 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-10-13 14:56:07,433 [INFO] DbMcusAds:53 - JSON generation date=Tue Jul 08 03:14:23 CDT 2025 (1751962463524)
+2025-10-13 14:56:07,433 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-10-13 14:56:07,470 [WARN] DetailPanel:346 - Failed to get advertising image, set to default
+2025-10-13 14:56:07,550 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-10-13 14:56:07,552 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-10-13 14:56:07,552 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-10-13 14:56:07,552 [WARN] DetailPanel:346 - Failed to get advertising image, set to default
+2025-10-13 14:56:07,553 [FATAL] Updater:351 - Updater called before beeing initialized
+2025-10-13 14:56:07,603 [ERROR] Updater:1198 - MainUpdater not yet initialized. External WinMGr cannot be set.
+2025-10-13 14:56:07,605 [INFO] Updater:1134 - Updater Version found : 6.15.0
+2025-10-13 14:56:07,624 [INFO] ApplicationProperties:184 - Using Application install path: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659
+2025-10-13 14:56:08,406 [INFO] MainUpdater:2872 - connection check result : 10
+2025-10-13 14:56:08,406 [INFO] MainUpdater:289 - Updater Check For Update Now.
+2025-10-13 14:56:08,406 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-10-13 14:56:08,410 [INFO] McuFinderGlobals:63 - Set McuFinder mode to 2 (CubeIDE integrated)
+2025-10-13 14:56:08,410 [INFO] UserAuth:487 - Internet connection configuration mode: 1
+2025-10-13 14:56:08,421 [INFO] JxBrowserEngine:152 - Initiate JxBrowser Engine with user profile folder
+2025-10-13 14:56:08,586 [INFO] CheckServerUpdateThread:120 - End of CheckServer Thread
+2025-10-13 14:56:08,867 [INFO] WebApp:169 - Instantiating new browser for Auth
+2025-10-13 14:56:09,480 [INFO] WebApp:463 - Apply proxy settings
+2025-10-13 14:56:09,481 [INFO] WebApp:548 - Chromium requires no authentication
+2025-10-13 14:56:09,487 [INFO] WebApp:491 - Direct internet connection detected
+2025-10-13 14:56:09,502 [INFO] WebApp:900 - Register for checkConnection events
+2025-10-13 14:56:09,503 [INFO] WebApp:463 - Apply proxy settings
+2025-10-13 14:56:09,503 [INFO] WebApp:548 - Chromium requires no authentication
+2025-10-13 14:56:09,503 [INFO] WebApp:491 - Direct internet connection detected
+2025-10-13 14:56:09,665 [INFO] WebApp:225 - Starting web application
+2025-10-13 14:56:09,666 [INFO] WebApp:593 - Web application path used /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659/db/plugins/mcufinder/reactClient1/index.html
+2025-10-13 14:56:09,667 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-SNS-MOTENVWB1.1.4.0
+2025-10-13 14:56:09,679 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-ATR-ASTRA1.2.0.2
+2025-10-13 14:56:09,687 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-SMBUS.2.1.0
+2025-10-13 14:56:09,693 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-ST60.1.0.0
+2025-10-13 14:56:09,742 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-F7.1.1.0
+2025-10-13 14:56:09,755 [WARN] PackLoader:240 - Cannot read IP mode file for WES.I-CUBE-Cesium.1.4.0
+2025-10-13 14:56:09,781 [WARN] PackLoader:240 - Cannot read IP mode file for Infineon.AIROC-Wi-Fi-Bluetooth-STM32.1.7.1
+2025-10-13 14:56:09,798 [INFO] UserAuth:487 - Internet connection configuration mode: 1
+2025-10-13 14:56:09,820 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-H7.3.4.0
+2025-10-13 14:56:09,833 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-DISPLAY.3.0.0
+2025-10-13 14:56:09,850 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-NFC10.1.0.0
+2025-10-13 14:56:09,857 [WARN] PackLoader:240 - Cannot read IP mode file for emotas.I-CUBE-CANOPEN.1.3.0
+2025-10-13 14:56:09,866 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-SNS-STBOX1.2.1.0
+2025-10-13 14:56:09,873 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-SNS-SMARTAG2.1.2.0
+2025-10-13 14:56:09,878 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-SNS-FLIGHT1.5.1.0
+2025-10-13 14:56:09,888 [INFO] LogOutputStream:77 - [STDOUT_REDIRECT] 1 : Invalid condition id : UX_CORESTACK_Condition cause : null
+2025-10-13 14:56:09,889 [INFO] LogOutputStream:77 - [STDOUT_REDIRECT] 1 : Invalid condition id : UX_CORESTACK_Condition cause : null
+2025-10-13 14:56:09,889 [INFO] LogOutputStream:77 - [STDOUT_REDIRECT] 1 : Invalid condition id : UX_CORESTACK_Condition cause : null
+2025-10-13 14:56:09,889 [INFO] LogOutputStream:77 - [STDOUT_REDIRECT] 1 : Invalid condition id : UX_CORESTACK_Condition cause : null
+2025-10-13 14:56:09,890 [INFO] LogOutputStream:77 - [STDOUT_REDIRECT] 1 : Invalid condition id : UX_CORESTACK_Condition cause : null
+2025-10-13 14:56:09,894 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-WL.2.0.0
+2025-10-13 14:56:09,900 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-SNS-MOTENV1.5.0.0
+2025-10-13 14:56:09,907 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-BLE2.3.3.0
+2025-10-13 14:56:09,914 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-NFC9.1.0.0
+2025-10-13 14:56:09,921 [WARN] PackLoader:240 - Cannot read IP mode file for wolfSSL.I-CUBE-wolfSSL.5.8.2
+2025-10-13 14:56:09,925 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-BLE1.7.1.0
+2025-10-13 14:56:09,929 [WARN] PackLoader:240 - Cannot read IP mode file for wolfSSL.I-CUBE-wolfMQTT.1.19.2
+2025-10-13 14:56:09,947 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-EEPRMA1.5.2.0
+2025-10-13 14:56:09,956 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-ST67W61.1.1.0
+2025-10-13 14:56:09,976 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-G0.1.1.0
+2025-10-13 14:56:09,984 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-SAFEA1.1.2.2
+2025-10-13 14:56:09,990 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-NFC4.3.0.0
+2025-10-13 14:56:10,000 [WARN] PackLoader:240 - Cannot read IP mode file for EmbeddedOffice.I-CUBE-FS-RTOS.1.0.1
+2025-10-13 14:56:10,005 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-WB05N.2.0.0
+2025-10-13 14:56:10,009 [WARN] PackLoader:240 - Cannot read IP mode file for wolfSSL.I-CUBE-wolfTPM.3.8.0
+2025-10-13 14:56:10,013 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-TCPP.4.2.0
+2025-10-13 14:56:10,019 [WARN] PackLoader:240 - Cannot read IP mode file for RealThread.X-CUBE-RT-Thread_Nano.4.1.1
+2025-10-13 14:56:10,022 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-ATR-SIGFOX1.3.2.0
+2025-10-13 14:56:10,027 [WARN] PackLoader:240 - Cannot read IP mode file for ITTIA_DB.I-CUBE-ITTIADB.8.9.0
+2025-10-13 14:56:10,032 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-ST67W61.1.0.0
+2025-10-13 14:56:10,036 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AI.10.2.0
+2025-10-13 14:56:10,067 [WARN] PackLoader:240 - Cannot read IP mode file for SEGGER.I-CUBE-embOS.1.3.1
+2025-10-13 14:56:10,121 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-ALGOBUILD.1.4.0
+2025-10-13 14:56:10,182 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-MEMS1.11.3.0
+2025-10-13 14:56:10,407 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-PM33A1.1.0.0
+2025-10-13 14:56:10,414 [INFO] WebApp:191 - Connection restablished
+2025-10-13 14:56:10,444 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-F4.1.1.0
+2025-10-13 14:56:10,458 [WARN] PackLoader:240 - Cannot read IP mode file for Avnet-IotConnect.X-CUBE-IoTC-DA16k-PMOD.1.0.0
+2025-10-13 14:56:10,462 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-ISPU.2.1.0
+2025-10-13 14:56:10,479 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-IPS.3.2.0
+2025-10-13 14:56:10,509 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-NFC12.1.0.0
+2025-10-13 14:56:10,534 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-L5.2.0.0
+2025-10-13 14:56:10,544 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-NFC6.3.1.0
+2025-10-13 14:56:10,549 [INFO] McuFinderGlobals:63 - Set McuFinder mode to 2 (CubeIDE integrated)
+2025-10-13 14:56:10,552 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-FREERTOS.1.3.1
+2025-10-13 14:56:10,554 [INFO] MainUpdater:2872 - connection check result : 10
+2025-10-13 14:56:10,554 [INFO] MainUpdater:2872 - connection check result : 10
+2025-10-13 14:56:10,556 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-TOUCHGFX.4.26.0
+2025-10-13 14:56:10,561 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.FP-SNS-STAIOTCFT.1.0.0
+2025-10-13 14:56:10,566 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-DPower.1.3.0
+2025-10-13 14:56:10,591 [WARN] ConditionMgr:438 - getConditionDescription Invalid condition id : LAN8742 Phy interface Condition cause : null
+2025-10-13 14:56:10,593 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-L4.2.0.0
+2025-10-13 14:56:10,595 [INFO] MicroXplorer:468 - Change Database Path : 
+2025-10-13 14:56:10,595 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : LAN8742 Phy interface Condition cause : null
+2025-10-13 14:56:10,596 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : LAN8742 Phy interface Condition cause : null
+2025-10-13 14:56:10,597 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : LAN8742 Phy interface Condition cause : null
+2025-10-13 14:56:10,597 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-10-13 14:56:10,611 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-SFXS2LP1.4.0.0
+2025-10-13 14:56:10,612 [WARN] ThirdParty:871 - waiting for thirdparty lock release [close project]
+2025-10-13 14:56:10,626 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-BLEMGR.4.1.0
+2025-10-13 14:56:10,647 [WARN] ConditionMgr:438 - getConditionDescription Invalid condition id : UX DEVICE CLASS RTOS Condition cause : null
+2025-10-13 14:56:10,647 [WARN] ConditionMgr:438 - getConditionDescription Invalid condition id : UX DEVICE CLASS RTOS Condition cause : null
+2025-10-13 14:56:10,650 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-WB.2.0.0
+2025-10-13 14:56:10,651 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : UX DEVICE CLASS RTOS Condition cause : null
+2025-10-13 14:56:10,651 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : UX DEVICE CLASS RTOS Condition cause : null
+2025-10-13 14:56:10,651 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : UX DEVICE CLASS RTOS Condition cause : null
+2025-10-13 14:56:10,652 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : UX DEVICE CLASS RTOS Condition cause : null
+2025-10-13 14:56:10,652 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : UX DEVICE CLASS RTOS Condition cause : null
+2025-10-13 14:56:10,657 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-GNSS1.7.0.1
+2025-10-13 14:56:10,661 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-TOUCHGFX.4.25.0
+2025-10-13 14:56:10,663 [WARN] ConditionMgr:438 - getConditionDescription Invalid condition id : Cortex-A Device cause : null
+2025-10-13 14:56:10,681 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : Cortex-A Device cause : null
+2025-10-13 14:56:10,681 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : Cortex-A Device cause : null
+2025-10-13 14:56:10,681 [WARN] ConditionMgr:1044 - genDependencies : Invalid condition id : Cortex-A Device cause : null
+2025-10-13 14:56:10,690 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-SUBG2.5.0.0
+2025-10-13 14:56:10,710 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-H7RS.1.1.0
+2025-10-13 14:56:10,715 [WARN] PackLoader:240 - Cannot read IP mode file for Cesanta.I-CUBE-Mongoose.7.13.0
+2025-10-13 14:56:10,729 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-AZRTOS-G4.2.0.0
+2025-10-13 14:56:10,734 [WARN] PackLoader:240 - Cannot read IP mode file for wolfSSL.I-CUBE-wolfSSH.1.4.20
+2025-10-13 14:56:10,737 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-NFC7.2.0.0
+2025-10-13 14:56:10,749 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-IPS.3.1.0
+2025-10-13 14:56:10,761 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-ALS.1.0.2
+2025-10-13 14:56:10,767 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-STSE01.1.0.0
+2025-10-13 14:56:10,773 [WARN] PackLoader:240 - Cannot read IP mode file for portGmbH.I-Cube-SoM-uGOAL.1.1.0
+2025-10-13 14:56:10,783 [WARN] PackLoader:240 - Cannot read IP mode file for STMicroelectronics.X-CUBE-TOF1.3.4.3
+2025-10-13 14:56:10,796 [INFO] ThirdParty:978 - Integrity check success = true
+2025-10-13 14:56:10,797 [INFO] IntegrityCheckThread:100 - exiting critical section [integrity check]
+2025-10-13 14:56:10,797 [INFO] ThirdParty:873 - entering critical section [close project]
+2025-10-13 14:56:10,798 [INFO] ThirdParty:883 - exiting critical section [close project]
+2025-10-13 14:56:10,800 [INFO] IntegrityCheckThread:103 - End integrity checks thread
+2025-10-13 14:56:10,800 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-10-13 14:56:10,802 [INFO] UtilMem:75 - Begin LoadConfig() Used Memory: 274608312 Bytes (325058560)
+2025-10-13 14:56:10,803 [INFO] MicroXplorer:468 - Change Database Path : 
+2025-10-13 14:56:10,803 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-10-13 14:56:10,804 [INFO] OpenFileManager:355 - Change cursor
+2025-10-13 14:56:10,834 [INFO] Mcu:2029 - Initializing MCU STM32F429ZITx STM32F429ZITx STM32F429ZIT6
+2025-10-13 14:56:12,814 [INFO] Context:786 - Trying to add GPIOservice into a context  which must be forbidden
+2025-10-13 14:56:13,417 [INFO] ImportTextPane:234 - (OptionalMessage_ERROR) Pin10 (VP_RIF_VS_RIF1) cannot be retrieved for this MCU
+2025-10-13 14:56:13,519 [INFO] RtosManager:558 - Registered RTOS mode: class=CMSIS, group=RTOS, mode=CMSIS_V1, owner=FREERTOS
+2025-10-13 14:56:13,519 [INFO] RtosManager:558 - Registered RTOS mode: class=CMSIS, group=RTOS2, mode=CMSIS_V2, owner=FREERTOS
+2025-10-13 14:56:13,519 [INFO] RtosManager:558 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V1, owner=FREERTOS
+2025-10-13 14:56:13,519 [INFO] RtosManager:558 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V2, owner=FREERTOS
+2025-10-13 14:56:13,519 [WARN] ModelIntegratedComponent:184 - Missing modes for component STMicroelectronics:FreeRTOS:0.0.1:STMicroelectronics:RTOS:FreeRTOS:Core:::10.2.0:
+2025-10-13 14:56:13,540 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,540 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,540 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,540 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,541 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,542 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,542 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,542 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,542 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,542 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,542 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,542 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,542 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,542 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,542 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,542 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 14:56:13,542 [WARN] ModelPack:524 - Component already loaded: STMicroelectronics:HAL Drivers:0.0.0:STMicroelectronics:Device:STMicro_Driver:XSPI:HAL::0.0.1:HAL_XSPI
+2025-10-13 14:56:13,660 [INFO] ThirdPartyModel:298 - Start build external matchings
+2025-10-13 14:56:14,138 [INFO] ThirdPartyModel:316 - End build external matchings
+2025-10-13 14:56:14,152 [INFO] RtosManager:1018 - Current active RTOS is FREERTOS [Cortex-M4NS]
+2025-10-13 14:56:14,496 [INFO] ApiDb:581 - Connected to CubeFinder SQLite database (/home/ja/.stmcufinder/plugins/mcufinder/mcu/cube-finder-db.db)
+2025-10-13 14:56:14,543 [INFO] ApiDb:668 - CubeFinder database Data Model version=2.1
+2025-10-13 14:56:14,543 [INFO] ApiDb:669 - CubeFinder database Configuration version=3.0.39
+2025-10-13 14:56:14,544 [INFO] ApiDb:670 - CubeFinder database generation date=2025-08-25 (1756130511)
+2025-10-13 14:56:14,544 [INFO] ApiDb:671 - CubeFinder database FW Pack versions=[FP-ATR-ASTRA1_V2.0.0, FP-SNS-FLIGHT1_V5.1.0, FP-SNS-MOTENV1_V5.0.0, FP-SNS-MOTENVWB1_V1.4.0, FP-SNS-SMARTAG2_V1.2.0, FP-SNS-STBOX1_V2.1.0, STM32Cube_FW_C0_V1.4.0, STM32Cube_FW_F4_V1.28.3, STM32Cube_FW_F7_V1.17.4, STM32Cube_FW_G0_V1.6.2, STM32Cube_FW_G4_V1.6.1, STM32Cube_FW_H5_V1.5.0, STM32Cube_FW_H7RS_V1.2.0, STM32Cube_FW_H7_V1.12.1, STM32Cube_FW_L0_V1.12.2, STM32Cube_FW_L4_V1.18.1, STM32Cube_FW_L5_V1.5.1, STM32Cube_FW_N6_V1.2.0, STM32Cube_FW_U0_V1.3.0, STM32Cube_FW_U3_V1.2.0, STM32Cube_FW_U5_V1.8.0, STM32Cube_FW_WB0_V1.3.0, STM32Cube_FW_WBA_V1.7.0, STM32Cube_FW_WB_V1.23.0, STM32Cube_FW_WL3_V1.2.0, STM32Cube_FW_WL_V1.3.1, X-CUBE-ALGOBUILD_V1.4.0, X-CUBE-ALS_V1.0.2, X-CUBE-AZRTOS-F4_V1.1.0, X-CUBE-AZRTOS-F7_V1.1.0, X-CUBE-AZRTOS-G0_V1.1.0, X-CUBE-AZRTOS-G4_V2.0.0, X-CUBE-AZRTOS-H7RS_V1.1.0, X-CUBE-AZRTOS-H7_V3.4.0, X-CUBE-AZRTOS-L4_V2.0.0, X-CUBE-AZRTOS-L5_V2.0.0, X-CUBE-AZRTOS-WB_V2.0.0, X-CUBE-AZRTOS-WL_V2.0.0, X-CUBE-BLE1_V7.1.0, X-CUBE-BLE2_V3.3.0, X-CUBE-BLEMGR_V4.1.0, X-CUBE-EEPRMA1_V5.2.0, X-CUBE-FREERTOS_V1.3.1, X-CUBE-GNSS1_V6.0.0, X-CUBE-MEMS1_V11.3.0, X-CUBE-NFC4_V3.0.0, X-CUBE-NFC7_V2.0.0, X-CUBE-SFXS2LP1_V4.0.0, X-CUBE-ST67W61_V1.0.0, X-CUBE-SUBG2_V5.0.0, X-CUBE-TOF1_V3.4.3]
+2025-10-13 14:56:14,614 [INFO] DbBoardsSqlite:226 - include board P-NUCLEO-WB55-NUCLEO as a kit item of type 'Nucleo-64'
+2025-10-13 14:56:14,615 [INFO] DbBoardsSqlite:226 - include board P-NUCLEO-WB55-USBDONGLE as a kit item of type 'Nucleo USB Dongle'
+2025-10-13 14:56:14,616 [INFO] DbBoardsSqlite:226 - include board STEVAL-IDP005V1 as a kit item of type 'Evaluation Board'
+2025-10-13 14:56:14,616 [INFO] DbBoardsSqlite:226 - include board STEVAL-IDP005V2 as a kit item of type 'Evaluation Board'
+2025-10-13 14:56:14,707 [INFO] ApiDb:240 - Found 880 in-development CPN: [B-G473E-ZEST1S, B-WB1M-WPAN1, B-WBA5M-WPAN, B-WL5M-SUBG1, NUCLEO-C031C6, NUCLEO-C051C8, NUCLEO-C071RB, NUCLEO-C092RC, NUCLEO-H503RB, NUCLEO-H533RE, NUCLEO-H563ZI, NUCLEO-H7S3L8, NUCLEO-N657X0-Q, NUCLEO-U031R8, NUCLEO-U083RC, NUCLEO-U385RG-Q, NUCLEO-U545RE-Q, NUCLEO-U5A5ZJ-Q, NUCLEO-WB05KZ, NUCLEO-WB07CC, NUCLEO-WB09KE, NUCLEO-WBA52CG, NUCLEO-WBA55CG, NUCLEO-WL33CC1, NUCLEO-WL33CC2, STEVAL-PROTEUS1, STEVAL-SMARTAG2, STEVAL-STWINBX1, STM320518-EVAL, STM32C0116-DK, STM32C011D6Y3TR, STM32C011D6Y6TR, STM32C011F4P3, STM32C011F4P6, STM32C011F4U3, STM32C011F4U6TR, STM32C011F6P3, STM32C011F6P6, STM32C011F6U3, STM32C011F6U6TR, STM32C011J4M3, STM32C011J4M6, STM32C011J6M3, STM32C011J6M6, STM32C0316-DK, STM32C031C4T3, STM32C031C4T6, STM32C031C4U3, STM32C031C4U6, STM32C031C6T3, STM32C031C6T6, STM32C031C6U3, STM32C031C6U6, STM32C031F4P3, STM32C031F4P6, STM32C031F6P3, STM32C031F6P6, STM32C031G4U3, STM32C031G4U6, STM32C031G6U3, STM32C031G6U6, STM32C031K4T3, STM32C031K4T6, STM32C031K4U3, STM32C031K4U6, STM32C031K6T3, STM32C031K6T6, STM32C031K6U3, STM32C031K6U6, STM32C051C6T6, STM32C051C6U6, STM32C051C8T6, STM32C051C8U6, STM32C051D8Y6TR, STM32C051F6P6, STM32C051F8P6, STM32C051G6U6, STM32C051G8U6, STM32C051K6T6, STM32C051K6U6, STM32C051K8T6, STM32C071C8T6, STM32C071C8T6N, STM32C071C8U6, STM32C071C8U6N, STM32C071CBT6, STM32C071CBT6N, STM32C071CBU6, STM32C071CBU6N, STM32C071F8P6, STM32C071F8P6N, STM32C071FBP6, STM32C071FBP6N, STM32C071FBY6TR, STM32C071G8U6, STM32C071G8U6N, STM32C071GBU6, STM32C071GBU6N, STM32C071K8T6, STM32C071K8T6N, STM32C071K8U6, STM32C071K8U6N, STM32C071KBT6, STM32C071KBT6N, STM32C071KBU6, STM32C071KBU6N, STM32C071R8T6, STM32C071R8T6N, STM32C071RBI6N, STM32C071RBT6, STM32C071RBT6N, STM32C091CBT6, STM32C091CBU6, STM32C091CCT6, STM32C091CCU6, STM32C091ECY6TR, STM32C091FBP6, STM32C091FCP6, STM32C091GBU6, STM32C091GCU6, STM32C091KBT6, STM32C091KBU6, STM32C091KCT6, STM32C091KCU6, STM32C091RBT6, STM32C091RCI6, STM32C091RCT6, STM32C092CBT6, STM32C092CBU6, STM32C092CCT6, STM32C092CCU6, STM32C092ECY6TR, STM32C092FBP6, STM32C092FCP6, STM32C092GBU6, STM32C092GCU6, STM32C092KBT6, STM32C092KBU6, STM32C092KCT6, STM32C092KCU6, STM32C092RBT6, STM32C092RCI6, STM32C092RCT6, STM32G071K8TXN, STM32G071K8UXN, STM32G081GBU6N, STM32G081KBT6N, STM32G081KBUXN, STM32G0B1CCT6N, STM32G0B1KCT6, STM32G0B1NEY6TR, STM32G0B1RCT6N, STM32G0C1CCT6, STM32G0C1CCT6N, STM32G0C1CCU6N, STM32G0C1CET6N, STM32G0C1CEU6N, STM32G0C1KCT6, STM32G0C1NEY6TR, STM32G0C1RCI6N, STM32G0C1RCT6N, STM32G0C1REI6N, STM32G0C1RET6N, STM32G0C1VCI6, STM32G0C1VEI6, STM32G411C6T3, STM32G411C6T6, STM32G411C6U3, STM32G411C6U6, STM32G411C8T3, STM32G411C8T6, STM32G411C8U3, STM32G411C8U6, STM32G411CBT3, STM32G411CBT6, STM32G411CBU3, STM32G411CBU6, STM32G411K6T3, STM32G411K6T6, STM32G411K6U3, STM32G411K6U6, STM32G411K8T3, STM32G411K8T6, STM32G411K8U3, STM32G411K8U6, STM32G411KBT3, STM32G411KBT6, STM32G411KBU3, STM32G411KBU6, STM32G411M6T3, STM32G411M6T6, STM32G411M8T3, STM32G411M8T6, STM32G411MBT3, STM32G411MBT6, STM32G411R6T3, STM32G411R6T6, STM32G411R8T3, STM32G411R8T6, STM32G411RBT3, STM32G411RBT6, STM32G414CBT3, STM32G414CBT6, STM32G414CBU3, STM32G414CBU6, STM32G414CCT3, STM32G414CCT6, STM32G414CCU3, STM32G414CCU6, STM32G414MBT3, STM32G414MBT6, STM32G414MCT3, STM32G414MCT6, STM32G414RBT3, STM32G414RBT6, STM32G414RCT3, STM32G414RCT6, STM32G414VBT3, STM32G414VBT6, STM32G414VCT3, STM32G414VCT6, STM32G431CBT3Z, STM32G431RBT3Z, STM32G471CCT6, STM32G471CCU6, STM32G471CET3, STM32G471CET6, STM32G471CEU3, STM32G471CEU6, STM32G471MCT6, STM32G471MET3, STM32G471MET6, STM32G471MEY6TR, STM32G471QCT6, STM32G471QET3, STM32G471RCT6, STM32G471RET3, STM32G471RET6, STM32G471VCH6, STM32G471VCI6, STM32G471VCT6, STM32G471VEH3, STM32G471VEH6, STM32G471VEI3, STM32G471VEI6, STM32G471VET3, STM32G471VET6, STM32G473QET3Z, STM32G473RET3Z, STM32G474CCT6, STM32G491RET3Z, STM32H503CBT6, STM32H503CBU6, STM32H503EBY6TR, STM32H503KBU6, STM32H503RBT6, STM32H523CCT6, STM32H523CCU6, STM32H523CET6, STM32H523CEU6, STM32H523HEY6TR, STM32H523RCT6, STM32H523RET6, STM32H523VCI6, STM32H523VCT6, STM32H523VEI6, STM32H523VET6, STM32H523ZCJ6, STM32H523ZCT6, STM32H523ZEJ6, STM32H523ZET6, STM32H533CET6, STM32H533CEU6, STM32H533HEY6TR, STM32H533RET6, STM32H533VEI6, STM32H533VET6, STM32H533ZEJ6, STM32H533ZET6, STM32H562AGI6, STM32H562AII6, STM32H562IGK6, STM32H562IGT6, STM32H562IIK6, STM32H562IIT6, STM32H562RGT6, STM32H562RGV6, STM32H562RIT6, STM32H562RIV6, STM32H562VGT6, STM32H562VIT6, STM32H562ZGT6, STM32H562ZIT6, STM32H563AGI6, STM32H563AII3Q, STM32H563AII6, STM32H563IGK6, STM32H563IGT6, STM32H563IIK3Q, STM32H563IIK6, STM32H563IIT3Q, STM32H563IIT6, STM32H563MIY3QTR, STM32H563RGT6, STM32H563RGV6, STM32H563RIT6, STM32H563RIV6, STM32H563VGT6, STM32H563VIT3Q, STM32H563VIT6, STM32H563ZGT6, STM32H563ZIT3Q, STM32H563ZIT6, STM32H573AII3Q, STM32H573AII6, STM32H573I-DK, STM32H573IIK3Q, STM32H573IIK6, STM32H573IIT3Q, STM32H573IIT6, STM32H573MIY3QTR, STM32H573RIT6, STM32H573RIV6, STM32H573VIT3Q, STM32H573VIT6, STM32H573ZIT3Q, STM32H573ZIT6, STM32H7R3A8I6, STM32H7R3I8K6, STM32H7R3I8T6, STM32H7R3L8H6, STM32H7R3L8H6H, STM32H7R3R8V6, STM32H7R3V8H6, STM32H7R3V8T6, STM32H7R3V8Y6TR, STM32H7R3Z8J6, STM32H7R3Z8T6, STM32H7R7A8I6, STM32H7R7I8K6, STM32H7R7I8T6, STM32H7R7L8H6, STM32H7R7L8H6H, STM32H7R7Z8J6, STM32H7S3A8I6, STM32H7S3I8K6, STM32H7S3I8T6, STM32H7S3L8H6, STM32H7S3L8H6H, STM32H7S3R8V6, STM32H7S3V8H6, STM32H7S3V8T6, STM32H7S3V8Y6TR, STM32H7S3Z8J6, STM32H7S3Z8T6, STM32H7S78-DK, STM32H7S7A8I6, STM32H7S7I8K6, STM32H7S7I8T6, STM32H7S7L8H6, STM32H7S7L8H6H, STM32H7S7Z8J6, STM32L4R5QGI6STR, STM32MP131AAE3, STM32MP131AAF3, STM32MP131AAG3, STM32MP131CAE3, STM32MP131CAF3, STM32MP131CAG3, STM32MP131DAE7, STM32MP131DAF7, STM32MP131DAG7, STM32MP131FAE7, STM32MP131FAF7, STM32MP131FAG7, STM32MP133AAE3, STM32MP133AAF3, STM32MP133AAG3, STM32MP133CAE3, STM32MP133CAF3, STM32MP133CAG3, STM32MP133DAE7, STM32MP133DAF7, STM32MP133DAG7, STM32MP133FAE7, STM32MP133FAF7, STM32MP133FAG7, STM32MP135AAE3, STM32MP135AAF3, STM32MP135AAG3, STM32MP135CAE3, STM32MP135CAF3, STM32MP135CAG3, STM32MP135DAE7, STM32MP135DAF7, STM32MP135DAG7, STM32MP135F-DK, STM32MP135FAE7, STM32MP135FAF7, STM32MP135FAF7T, STM32MP135FAF7U, STM32MP135FAG7, STM32MP211AAL3, STM32MP211AAM3, STM32MP211AAN3, STM32MP211AAO3, STM32MP211CAL3, STM32MP211CAM3, STM32MP211CAN3, STM32MP211CAO3, STM32MP211DAL3, STM32MP211DAM3, STM32MP211DAN3, STM32MP211DAO3, STM32MP211FAL3, STM32MP211FAM3, STM32MP211FAN3, STM32MP211FAO3, STM32MP213AAL3, STM32MP213AAM3, STM32MP213AAN3, STM32MP213AAO3, STM32MP213CAL3, STM32MP213CAM3, STM32MP213CAN3, STM32MP213CAO3, STM32MP213DAL3, STM32MP213DAM3, STM32MP213DAN3, STM32MP213DAO3, STM32MP213FAL3, STM32MP213FAM3, STM32MP213FAN3, STM32MP213FAO3, STM32MP215AAL3, STM32MP215AAM3, STM32MP215AAN3, STM32MP215AAO3, STM32MP215CAL3, STM32MP215CAM3, STM32MP215CAN3, STM32MP215CAO3, STM32MP215DAL3, STM32MP215DAM3, STM32MP215DAN3, STM32MP215DAO3, STM32MP215F-DK, STM32MP215FAL3, STM32MP215FAM3, STM32MP215FAN3, STM32MP215FAO3, STM32MP231AAJ3, STM32MP231AAK3, STM32MP231AAL3, STM32MP231CAJ3, STM32MP231CAK3, STM32MP231CAL3, STM32MP231DAJ3, STM32MP231DAK3, STM32MP231DAL3, STM32MP231FAJ3, STM32MP231FAK3, STM32MP231FAL3, STM32MP233AAJ3, STM32MP233AAK3, STM32MP233AAL3, STM32MP233CAJ3, STM32MP233CAK3, STM32MP233CAL3, STM32MP233DAJ3, STM32MP233DAK3, STM32MP233DAL3, STM32MP233FAJ3, STM32MP233FAK3, STM32MP233FAL3, STM32MP235AAJ3, STM32MP235AAK3, STM32MP235AAL3, STM32MP235CAJ3, STM32MP235CAK3, STM32MP235CAL3, STM32MP235DAJ3, STM32MP235DAK3, STM32MP235DAL3, STM32MP235FAJ3, STM32MP235FAK3, STM32MP235FAL3, STM32MP251AAI3, STM32MP251AAK3, STM32MP251AAL3, STM32MP251CAI3, STM32MP251CAK3, STM32MP251CAL3, STM32MP251DAI3, STM32MP251DAK3, STM32MP251DAL3, STM32MP251FAI3, STM32MP251FAK3, STM32MP251FAL3, STM32MP253AAI3, STM32MP253AAK3, STM32MP253AAL3, STM32MP253CAI3, STM32MP253CAK3, STM32MP253CAL3, STM32MP253DAI3, STM32MP253DAK3, STM32MP253DAL3, STM32MP253FAI3, STM32MP253FAK3, STM32MP253FAL3, STM32MP255AAI3, STM32MP255AAK3, STM32MP255AAL3, STM32MP255CAI3, STM32MP255CAK3, STM32MP255CAL3, STM32MP255DAI3, STM32MP255DAK3, STM32MP255DAL3, STM32MP255FAI3, STM32MP255FAK3, STM32MP255FAL3, STM32MP257AAI3, STM32MP257AAK3, STM32MP257AAL3, STM32MP257CAI3, STM32MP257CAK3, STM32MP257CAL3, STM32MP257DAI3, STM32MP257DAK3, STM32MP257DAL3, STM32MP257F-DK, STM32MP257F-EV1, STM32MP257FAI3, STM32MP257FAK3, STM32MP257FAL3, STM32N645A0H3Q, STM32N645B0H3Q, STM32N645I0H3Q, STM32N645L0H3Q, STM32N645X0H3Q, STM32N645Z0H3Q, STM32N647A0H3Q, STM32N647B0H3Q, STM32N647I0H3Q, STM32N647L0H3Q, STM32N647X0H3Q, STM32N647Z0H3Q, STM32N655A0H3Q, STM32N655B0H3Q, STM32N655I0H3Q, STM32N655L0H3Q, STM32N655X0H3Q, STM32N655Z0H3Q, STM32N6570-DK, STM32N657A0H3Q, STM32N657B0H3Q, STM32N657I0H3Q, STM32N657L0H3Q, STM32N657X0H3Q, STM32N657Z0H3Q, STM32U031C6T6, STM32U031C6U6, STM32U031C8T6, STM32U031C8U6, STM32U031F4P6, STM32U031F6P6, STM32U031F8P6, STM32U031G6Y6TR, STM32U031G8Y6TR, STM32U031K4U6, STM32U031K6U6, STM32U031K8U6, STM32U031R6I6, STM32U031R6T6, STM32U031R8I6, STM32U031R8T6, STM32U073C8T6, STM32U073C8U6, STM32U073CBT6, STM32U073CBU6, STM32U073CCT6, STM32U073CCU6, STM32U073H8Y6TR, STM32U073HBY6TR, STM32U073HCY6TR, STM32U073K8U6, STM32U073KBU6, STM32U073KCU6, STM32U073M8I6, STM32U073M8T6, STM32U073MBI6, STM32U073MBT6, STM32U073MCI6, STM32U073MCT6, STM32U073R8I6, STM32U073R8T6, STM32U073RBI6, STM32U073RBT6, STM32U073RCI6, STM32U073RCT6, STM32U083C-DK, STM32U083CCT6, STM32U083CCU6, STM32U083HCY6TR, STM32U083KCU6, STM32U083MCI6, STM32U083MCT6, STM32U083RCI6, STM32U083RCT6, STM32U375CET6, STM32U375CET6Q, STM32U375CEU6, STM32U375CEU6Q, STM32U375CEY6QTR, STM32U375CGT6, STM32U375CGT6Q, STM32U375CGU6, STM32U375CGU6Q, STM32U375CGY6QTR, STM32U375KEU6, STM32U375KGU6, STM32U375REI6, STM32U375REI6Q, STM32U375RET6, STM32U375RET6Q, STM32U375REY6GTR, STM32U375REY6QTR, STM32U375RGI6, STM32U375RGI6Q, STM32U375RGT6, STM32U375RGT6Q, STM32U375RGY6GTR, STM32U375RGY6QTR, STM32U375VEI6, STM32U375VEI6Q, STM32U375VET6, STM32U375VET6Q, STM32U375VGI6, STM32U375VGI6Q, STM32U375VGT6, STM32U375VGT6Q, STM32U385CGT6, STM32U385CGT6Q, STM32U385CGU6, STM32U385CGU6Q, STM32U385CGY6QTR, STM32U385KGU6, STM32U385RGI6, STM32U385RGI6Q, STM32U385RGT6, STM32U385RGT6Q, STM32U385RGY6GTR, STM32U385RGY6QTR, STM32U385VGI6, STM32U385VGI6Q, STM32U385VGT6, STM32U385VGT6Q, STM32U535CBT6, STM32U535CBT6Q, STM32U535CBU6, STM32U535CBU6Q, STM32U535CCT6, STM32U535CCT6Q, STM32U535CCU6, STM32U535CCU6Q, STM32U535CET6, STM32U535CET6Q, STM32U535CEU6, STM32U535CEU6Q, STM32U535JEY6QTR, STM32U535NCY6QTR, STM32U535NEY6QTR, STM32U535RBI6, STM32U535RBI6Q, STM32U535RBT6, STM32U535RBT6Q, STM32U535RCI6, STM32U535RCI6Q, STM32U535RCT6, STM32U535RCT6Q, STM32U535REI6, STM32U535REI6Q, STM32U535RET6, STM32U535RET6Q, STM32U535VCI6, STM32U535VCI6Q, STM32U535VCT6, STM32U535VCT6Q, STM32U535VEI6, STM32U535VEI6Q, STM32U535VET6, STM32U535VET6Q, STM32U545CET6, STM32U545CET6Q, STM32U545CEU6, STM32U545CEU6Q, STM32U545JEY6QTR, STM32U545NEY6QTR, STM32U545REI6, STM32U545REI6Q, STM32U545RET6, STM32U545RET6Q, STM32U545VEI6, STM32U545VEI6Q, STM32U545VET6, STM32U545VET6Q, STM32U595AIH6, STM32U595AIH6Q, STM32U595AJH6, STM32U595AJH6Q, STM32U595QII6, STM32U595QII6Q, STM32U595QJI6, STM32U595QJI6Q, STM32U595RIT6, STM32U595RIT6Q, STM32U595RJT6, STM32U595RJT6Q, STM32U595VIT6, STM32U595VIT6Q, STM32U595VJT6, STM32U595VJT6Q, STM32U595ZIT6, STM32U595ZIT6Q, STM32U595ZIY6QTR, STM32U595ZJT6, STM32U595ZJT6Q, STM32U595ZJY6QTR, STM32U599BJY6QTR, STM32U599NIH6Q, STM32U599NJH6Q, STM32U599VIT6Q, STM32U599VJT6, STM32U599VJT6Q, STM32U599ZIT6Q, STM32U599ZIY6QTR, STM32U599ZJT6Q, STM32U599ZJY6QTR, STM32U5A5AJH6, STM32U5A5AJH6Q, STM32U5A5QII3Q , STM32U5A5QJI6, STM32U5A5QJI6Q, STM32U5A5RJT6, STM32U5A5RJT6Q, STM32U5A5VJT6, STM32U5A5VJT6Q, STM32U5A5ZJT6, STM32U5A5ZJT6Q, STM32U5A5ZJY6QTR, STM32U5A9BJY6QTR, STM32U5A9J-DK, STM32U5A9NJH6Q, STM32U5A9VJT6Q, STM32U5A9ZJT6Q, STM32U5A9ZJY6QTR, STM32U5F7VIT6, STM32U5F7VIT6Q, STM32U5F7VJT6, STM32U5F7VJT6Q, STM32U5F9BJY6QTR, STM32U5F9NJH6Q, STM32U5F9VIT6Q, STM32U5F9VJT6Q, STM32U5F9ZIJ6QTR, STM32U5F9ZIT6Q, STM32U5F9ZJJ6QTR, STM32U5F9ZJT6Q, STM32U5G7VJT6, STM32U5G7VJT6Q, STM32U5G9BJY6QTR, STM32U5G9J-DK1, STM32U5G9J-DK2, STM32U5G9NJH6Q, STM32U5G9VJT6Q, STM32U5G9ZJJ6QTR, STM32U5G9ZJT6Q, STM32WB05KZV6TR, STM32WB05KZV7TR, STM32WB05TZF6TR, STM32WB05TZF7TR, STM32WB06CCF6TR, STM32WB06CCF7TR, STM32WB06CCV6TR, STM32WB06CCV7TR, STM32WB06KCV6TR, STM32WB06KCV7TR, STM32WB07CCF6TR, STM32WB07CCF7TR, STM32WB07CCV6TR, STM32WB07CCV7TR, STM32WB07KCV6TR, STM32WB07KCV7TR, STM32WB09KEV6TR, STM32WB09KEV7TR, STM32WB09TEF6TR, STM32WB09TEF7TR, STM32WB1MMCH6, STM32WBA50KGU6, STM32WBA50KGU6TR, STM32WBA52CEU6, STM32WBA52CEU6TR, STM32WBA52CEU7, STM32WBA52CEU7TR, STM32WBA52CGU6, STM32WBA52CGU6TR, STM32WBA52CGU6U, STM32WBA52CGU7, STM32WBA52CGU7TR, STM32WBA52KEU6, STM32WBA52KEU6TR, STM32WBA52KGU6, STM32WBA52KGU6TR, STM32WBA54CEU6, STM32WBA54CEU6TR, STM32WBA54CEU7, STM32WBA54CEU7TR, STM32WBA54CGU6, STM32WBA54CGU6TR, STM32WBA54CGU7, STM32WBA54CGU7TR, STM32WBA54KEU6, STM32WBA54KEU6TR, STM32WBA54KEU7, STM32WBA54KEU7TR, STM32WBA54KGU6, STM32WBA54KGU6TR, STM32WBA54KGU7, STM32WBA54KGU7TR, STM32WBA55CEU6, STM32WBA55CEU6TR, STM32WBA55CEU7, STM32WBA55CEU7TR, STM32WBA55CGU6, STM32WBA55CGU6TR, STM32WBA55CGU6U, STM32WBA55CGU7, STM32WBA55CGU7TR, STM32WBA55G-DK1, STM32WBA55HEF6, STM32WBA55HEF7, STM32WBA55HGF6, STM32WBA55HGF7, STM32WBA55UEI6, STM32WBA55UEI6TR, STM32WBA55UEI7, STM32WBA55UEI7TR, STM32WBA55UGI6, STM32WBA55UGI6TR, STM32WBA55UGI7, STM32WBA55UGI7TR, STM32WBA5MMGH6TR, STM32WBA62MGF6, STM32WBA62MIF6, STM32WBA65MGF7, STM32WBA65MIF6, STM32WBA65MIF7, STM32WL30K8V6, STM32WL30KBV6, STM32WL31C8V6, STM32WL31CBV6, STM32WL31K8V6, STM32WL31KBV6, STM32WL33C8V6, STM32WL33C8V6X, STM32WL33CBV6, STM32WL33CBV6X, STM32WL33CCV6, STM32WL33CCV6A, STM32WL33CCV6X, STM32WL33K8V7, STM32WL33K8V7X, STM32WL33KBV7 , STM32WL33KBV7X, STM32WL33KCV7, STM32WL33KCV7X, STM32WL5MOCH6, STM32WL5MOCH6TR]
+2025-10-13 14:56:14,807 [INFO] BoardInfo:889 - No configuration file found for board P-NUCLEO-WB55
+2025-10-13 14:56:14,808 [INFO] DbBoards:161 - Kit is not supported: P-NUCLEO-WB55
+2025-10-13 14:56:14,811 [INFO] BoardInfo:889 - No configuration file found for board STEVAL-BFA001V1B
+2025-10-13 14:56:14,811 [INFO] DbBoards:161 - Kit is not supported: STEVAL-BFA001V1B
+2025-10-13 14:56:14,812 [INFO] BoardInfo:889 - No configuration file found for board STEVAL-BFA001V2B
+2025-10-13 14:56:14,812 [INFO] DbBoards:161 - Kit is not supported: STEVAL-BFA001V2B
+2025-10-13 14:56:14,931 [INFO] DbBoards:168 - Found 212 boards, 209 are supported
+2025-10-13 14:56:14,932 [INFO] DbBoards:169 - Found 212 boards, 43 of them is supported for  Bsp
+2025-10-13 14:56:14,941 [INFO] ApiDb:668 - CubeFinder database Data Model version=2.1
+2025-10-13 14:56:14,941 [INFO] ApiDb:669 - CubeFinder database Configuration version=3.0.39
+2025-10-13 14:56:14,942 [INFO] ApiDb:670 - CubeFinder database generation date=2025-08-25 (1756130511)
+2025-10-13 14:56:14,942 [INFO] ApiDb:671 - CubeFinder database FW Pack versions=[FP-ATR-ASTRA1_V2.0.0, FP-SNS-FLIGHT1_V5.1.0, FP-SNS-MOTENV1_V5.0.0, FP-SNS-MOTENVWB1_V1.4.0, FP-SNS-SMARTAG2_V1.2.0, FP-SNS-STBOX1_V2.1.0, STM32Cube_FW_C0_V1.4.0, STM32Cube_FW_F4_V1.28.3, STM32Cube_FW_F7_V1.17.4, STM32Cube_FW_G0_V1.6.2, STM32Cube_FW_G4_V1.6.1, STM32Cube_FW_H5_V1.5.0, STM32Cube_FW_H7RS_V1.2.0, STM32Cube_FW_H7_V1.12.1, STM32Cube_FW_L0_V1.12.2, STM32Cube_FW_L4_V1.18.1, STM32Cube_FW_L5_V1.5.1, STM32Cube_FW_N6_V1.2.0, STM32Cube_FW_U0_V1.3.0, STM32Cube_FW_U3_V1.2.0, STM32Cube_FW_U5_V1.8.0, STM32Cube_FW_WB0_V1.3.0, STM32Cube_FW_WBA_V1.7.0, STM32Cube_FW_WB_V1.23.0, STM32Cube_FW_WL3_V1.2.0, STM32Cube_FW_WL_V1.3.1, X-CUBE-ALGOBUILD_V1.4.0, X-CUBE-ALS_V1.0.2, X-CUBE-AZRTOS-F4_V1.1.0, X-CUBE-AZRTOS-F7_V1.1.0, X-CUBE-AZRTOS-G0_V1.1.0, X-CUBE-AZRTOS-G4_V2.0.0, X-CUBE-AZRTOS-H7RS_V1.1.0, X-CUBE-AZRTOS-H7_V3.4.0, X-CUBE-AZRTOS-L4_V2.0.0, X-CUBE-AZRTOS-L5_V2.0.0, X-CUBE-AZRTOS-WB_V2.0.0, X-CUBE-AZRTOS-WL_V2.0.0, X-CUBE-BLE1_V7.1.0, X-CUBE-BLE2_V3.3.0, X-CUBE-BLEMGR_V4.1.0, X-CUBE-EEPRMA1_V5.2.0, X-CUBE-FREERTOS_V1.3.1, X-CUBE-GNSS1_V6.0.0, X-CUBE-MEMS1_V11.3.0, X-CUBE-NFC4_V3.0.0, X-CUBE-NFC7_V2.0.0, X-CUBE-SFXS2LP1_V4.0.0, X-CUBE-ST67W61_V1.0.0, X-CUBE-SUBG2_V5.0.0, X-CUBE-TOF1_V3.4.3]
+2025-10-13 14:56:17,086 [INFO] ApiDb:240 - Found 880 in-development CPN: [B-G473E-ZEST1S, B-WB1M-WPAN1, B-WBA5M-WPAN, B-WL5M-SUBG1, NUCLEO-C031C6, NUCLEO-C051C8, NUCLEO-C071RB, NUCLEO-C092RC, NUCLEO-H503RB, NUCLEO-H533RE, NUCLEO-H563ZI, NUCLEO-H7S3L8, NUCLEO-N657X0-Q, NUCLEO-U031R8, NUCLEO-U083RC, NUCLEO-U385RG-Q, NUCLEO-U545RE-Q, NUCLEO-U5A5ZJ-Q, NUCLEO-WB05KZ, NUCLEO-WB07CC, NUCLEO-WB09KE, NUCLEO-WBA52CG, NUCLEO-WBA55CG, NUCLEO-WL33CC1, NUCLEO-WL33CC2, STEVAL-PROTEUS1, STEVAL-SMARTAG2, STEVAL-STWINBX1, STM320518-EVAL, STM32C0116-DK, STM32C011D6Y3TR, STM32C011D6Y6TR, STM32C011F4P3, STM32C011F4P6, STM32C011F4U3, STM32C011F4U6TR, STM32C011F6P3, STM32C011F6P6, STM32C011F6U3, STM32C011F6U6TR, STM32C011J4M3, STM32C011J4M6, STM32C011J6M3, STM32C011J6M6, STM32C0316-DK, STM32C031C4T3, STM32C031C4T6, STM32C031C4U3, STM32C031C4U6, STM32C031C6T3, STM32C031C6T6, STM32C031C6U3, STM32C031C6U6, STM32C031F4P3, STM32C031F4P6, STM32C031F6P3, STM32C031F6P6, STM32C031G4U3, STM32C031G4U6, STM32C031G6U3, STM32C031G6U6, STM32C031K4T3, STM32C031K4T6, STM32C031K4U3, STM32C031K4U6, STM32C031K6T3, STM32C031K6T6, STM32C031K6U3, STM32C031K6U6, STM32C051C6T6, STM32C051C6U6, STM32C051C8T6, STM32C051C8U6, STM32C051D8Y6TR, STM32C051F6P6, STM32C051F8P6, STM32C051G6U6, STM32C051G8U6, STM32C051K6T6, STM32C051K6U6, STM32C051K8T6, STM32C071C8T6, STM32C071C8T6N, STM32C071C8U6, STM32C071C8U6N, STM32C071CBT6, STM32C071CBT6N, STM32C071CBU6, STM32C071CBU6N, STM32C071F8P6, STM32C071F8P6N, STM32C071FBP6, STM32C071FBP6N, STM32C071FBY6TR, STM32C071G8U6, STM32C071G8U6N, STM32C071GBU6, STM32C071GBU6N, STM32C071K8T6, STM32C071K8T6N, STM32C071K8U6, STM32C071K8U6N, STM32C071KBT6, STM32C071KBT6N, STM32C071KBU6, STM32C071KBU6N, STM32C071R8T6, STM32C071R8T6N, STM32C071RBI6N, STM32C071RBT6, STM32C071RBT6N, STM32C091CBT6, STM32C091CBU6, STM32C091CCT6, STM32C091CCU6, STM32C091ECY6TR, STM32C091FBP6, STM32C091FCP6, STM32C091GBU6, STM32C091GCU6, STM32C091KBT6, STM32C091KBU6, STM32C091KCT6, STM32C091KCU6, STM32C091RBT6, STM32C091RCI6, STM32C091RCT6, STM32C092CBT6, STM32C092CBU6, STM32C092CCT6, STM32C092CCU6, STM32C092ECY6TR, STM32C092FBP6, STM32C092FCP6, STM32C092GBU6, STM32C092GCU6, STM32C092KBT6, STM32C092KBU6, STM32C092KCT6, STM32C092KCU6, STM32C092RBT6, STM32C092RCI6, STM32C092RCT6, STM32G071K8TXN, STM32G071K8UXN, STM32G081GBU6N, STM32G081KBT6N, STM32G081KBUXN, STM32G0B1CCT6N, STM32G0B1KCT6, STM32G0B1NEY6TR, STM32G0B1RCT6N, STM32G0C1CCT6, STM32G0C1CCT6N, STM32G0C1CCU6N, STM32G0C1CET6N, STM32G0C1CEU6N, STM32G0C1KCT6, STM32G0C1NEY6TR, STM32G0C1RCI6N, STM32G0C1RCT6N, STM32G0C1REI6N, STM32G0C1RET6N, STM32G0C1VCI6, STM32G0C1VEI6, STM32G411C6T3, STM32G411C6T6, STM32G411C6U3, STM32G411C6U6, STM32G411C8T3, STM32G411C8T6, STM32G411C8U3, STM32G411C8U6, STM32G411CBT3, STM32G411CBT6, STM32G411CBU3, STM32G411CBU6, STM32G411K6T3, STM32G411K6T6, STM32G411K6U3, STM32G411K6U6, STM32G411K8T3, STM32G411K8T6, STM32G411K8U3, STM32G411K8U6, STM32G411KBT3, STM32G411KBT6, STM32G411KBU3, STM32G411KBU6, STM32G411M6T3, STM32G411M6T6, STM32G411M8T3, STM32G411M8T6, STM32G411MBT3, STM32G411MBT6, STM32G411R6T3, STM32G411R6T6, STM32G411R8T3, STM32G411R8T6, STM32G411RBT3, STM32G411RBT6, STM32G414CBT3, STM32G414CBT6, STM32G414CBU3, STM32G414CBU6, STM32G414CCT3, STM32G414CCT6, STM32G414CCU3, STM32G414CCU6, STM32G414MBT3, STM32G414MBT6, STM32G414MCT3, STM32G414MCT6, STM32G414RBT3, STM32G414RBT6, STM32G414RCT3, STM32G414RCT6, STM32G414VBT3, STM32G414VBT6, STM32G414VCT3, STM32G414VCT6, STM32G431CBT3Z, STM32G431RBT3Z, STM32G471CCT6, STM32G471CCU6, STM32G471CET3, STM32G471CET6, STM32G471CEU3, STM32G471CEU6, STM32G471MCT6, STM32G471MET3, STM32G471MET6, STM32G471MEY6TR, STM32G471QCT6, STM32G471QET3, STM32G471RCT6, STM32G471RET3, STM32G471RET6, STM32G471VCH6, STM32G471VCI6, STM32G471VCT6, STM32G471VEH3, STM32G471VEH6, STM32G471VEI3, STM32G471VEI6, STM32G471VET3, STM32G471VET6, STM32G473QET3Z, STM32G473RET3Z, STM32G474CCT6, STM32G491RET3Z, STM32H503CBT6, STM32H503CBU6, STM32H503EBY6TR, STM32H503KBU6, STM32H503RBT6, STM32H523CCT6, STM32H523CCU6, STM32H523CET6, STM32H523CEU6, STM32H523HEY6TR, STM32H523RCT6, STM32H523RET6, STM32H523VCI6, STM32H523VCT6, STM32H523VEI6, STM32H523VET6, STM32H523ZCJ6, STM32H523ZCT6, STM32H523ZEJ6, STM32H523ZET6, STM32H533CET6, STM32H533CEU6, STM32H533HEY6TR, STM32H533RET6, STM32H533VEI6, STM32H533VET6, STM32H533ZEJ6, STM32H533ZET6, STM32H562AGI6, STM32H562AII6, STM32H562IGK6, STM32H562IGT6, STM32H562IIK6, STM32H562IIT6, STM32H562RGT6, STM32H562RGV6, STM32H562RIT6, STM32H562RIV6, STM32H562VGT6, STM32H562VIT6, STM32H562ZGT6, STM32H562ZIT6, STM32H563AGI6, STM32H563AII3Q, STM32H563AII6, STM32H563IGK6, STM32H563IGT6, STM32H563IIK3Q, STM32H563IIK6, STM32H563IIT3Q, STM32H563IIT6, STM32H563MIY3QTR, STM32H563RGT6, STM32H563RGV6, STM32H563RIT6, STM32H563RIV6, STM32H563VGT6, STM32H563VIT3Q, STM32H563VIT6, STM32H563ZGT6, STM32H563ZIT3Q, STM32H563ZIT6, STM32H573AII3Q, STM32H573AII6, STM32H573I-DK, STM32H573IIK3Q, STM32H573IIK6, STM32H573IIT3Q, STM32H573IIT6, STM32H573MIY3QTR, STM32H573RIT6, STM32H573RIV6, STM32H573VIT3Q, STM32H573VIT6, STM32H573ZIT3Q, STM32H573ZIT6, STM32H7R3A8I6, STM32H7R3I8K6, STM32H7R3I8T6, STM32H7R3L8H6, STM32H7R3L8H6H, STM32H7R3R8V6, STM32H7R3V8H6, STM32H7R3V8T6, STM32H7R3V8Y6TR, STM32H7R3Z8J6, STM32H7R3Z8T6, STM32H7R7A8I6, STM32H7R7I8K6, STM32H7R7I8T6, STM32H7R7L8H6, STM32H7R7L8H6H, STM32H7R7Z8J6, STM32H7S3A8I6, STM32H7S3I8K6, STM32H7S3I8T6, STM32H7S3L8H6, STM32H7S3L8H6H, STM32H7S3R8V6, STM32H7S3V8H6, STM32H7S3V8T6, STM32H7S3V8Y6TR, STM32H7S3Z8J6, STM32H7S3Z8T6, STM32H7S78-DK, STM32H7S7A8I6, STM32H7S7I8K6, STM32H7S7I8T6, STM32H7S7L8H6, STM32H7S7L8H6H, STM32H7S7Z8J6, STM32L4R5QGI6STR, STM32MP131AAE3, STM32MP131AAF3, STM32MP131AAG3, STM32MP131CAE3, STM32MP131CAF3, STM32MP131CAG3, STM32MP131DAE7, STM32MP131DAF7, STM32MP131DAG7, STM32MP131FAE7, STM32MP131FAF7, STM32MP131FAG7, STM32MP133AAE3, STM32MP133AAF3, STM32MP133AAG3, STM32MP133CAE3, STM32MP133CAF3, STM32MP133CAG3, STM32MP133DAE7, STM32MP133DAF7, STM32MP133DAG7, STM32MP133FAE7, STM32MP133FAF7, STM32MP133FAG7, STM32MP135AAE3, STM32MP135AAF3, STM32MP135AAG3, STM32MP135CAE3, STM32MP135CAF3, STM32MP135CAG3, STM32MP135DAE7, STM32MP135DAF7, STM32MP135DAG7, STM32MP135F-DK, STM32MP135FAE7, STM32MP135FAF7, STM32MP135FAF7T, STM32MP135FAF7U, STM32MP135FAG7, STM32MP211AAL3, STM32MP211AAM3, STM32MP211AAN3, STM32MP211AAO3, STM32MP211CAL3, STM32MP211CAM3, STM32MP211CAN3, STM32MP211CAO3, STM32MP211DAL3, STM32MP211DAM3, STM32MP211DAN3, STM32MP211DAO3, STM32MP211FAL3, STM32MP211FAM3, STM32MP211FAN3, STM32MP211FAO3, STM32MP213AAL3, STM32MP213AAM3, STM32MP213AAN3, STM32MP213AAO3, STM32MP213CAL3, STM32MP213CAM3, STM32MP213CAN3, STM32MP213CAO3, STM32MP213DAL3, STM32MP213DAM3, STM32MP213DAN3, STM32MP213DAO3, STM32MP213FAL3, STM32MP213FAM3, STM32MP213FAN3, STM32MP213FAO3, STM32MP215AAL3, STM32MP215AAM3, STM32MP215AAN3, STM32MP215AAO3, STM32MP215CAL3, STM32MP215CAM3, STM32MP215CAN3, STM32MP215CAO3, STM32MP215DAL3, STM32MP215DAM3, STM32MP215DAN3, STM32MP215DAO3, STM32MP215F-DK, STM32MP215FAL3, STM32MP215FAM3, STM32MP215FAN3, STM32MP215FAO3, STM32MP231AAJ3, STM32MP231AAK3, STM32MP231AAL3, STM32MP231CAJ3, STM32MP231CAK3, STM32MP231CAL3, STM32MP231DAJ3, STM32MP231DAK3, STM32MP231DAL3, STM32MP231FAJ3, STM32MP231FAK3, STM32MP231FAL3, STM32MP233AAJ3, STM32MP233AAK3, STM32MP233AAL3, STM32MP233CAJ3, STM32MP233CAK3, STM32MP233CAL3, STM32MP233DAJ3, STM32MP233DAK3, STM32MP233DAL3, STM32MP233FAJ3, STM32MP233FAK3, STM32MP233FAL3, STM32MP235AAJ3, STM32MP235AAK3, STM32MP235AAL3, STM32MP235CAJ3, STM32MP235CAK3, STM32MP235CAL3, STM32MP235DAJ3, STM32MP235DAK3, STM32MP235DAL3, STM32MP235FAJ3, STM32MP235FAK3, STM32MP235FAL3, STM32MP251AAI3, STM32MP251AAK3, STM32MP251AAL3, STM32MP251CAI3, STM32MP251CAK3, STM32MP251CAL3, STM32MP251DAI3, STM32MP251DAK3, STM32MP251DAL3, STM32MP251FAI3, STM32MP251FAK3, STM32MP251FAL3, STM32MP253AAI3, STM32MP253AAK3, STM32MP253AAL3, STM32MP253CAI3, STM32MP253CAK3, STM32MP253CAL3, STM32MP253DAI3, STM32MP253DAK3, STM32MP253DAL3, STM32MP253FAI3, STM32MP253FAK3, STM32MP253FAL3, STM32MP255AAI3, STM32MP255AAK3, STM32MP255AAL3, STM32MP255CAI3, STM32MP255CAK3, STM32MP255CAL3, STM32MP255DAI3, STM32MP255DAK3, STM32MP255DAL3, STM32MP255FAI3, STM32MP255FAK3, STM32MP255FAL3, STM32MP257AAI3, STM32MP257AAK3, STM32MP257AAL3, STM32MP257CAI3, STM32MP257CAK3, STM32MP257CAL3, STM32MP257DAI3, STM32MP257DAK3, STM32MP257DAL3, STM32MP257F-DK, STM32MP257F-EV1, STM32MP257FAI3, STM32MP257FAK3, STM32MP257FAL3, STM32N645A0H3Q, STM32N645B0H3Q, STM32N645I0H3Q, STM32N645L0H3Q, STM32N645X0H3Q, STM32N645Z0H3Q, STM32N647A0H3Q, STM32N647B0H3Q, STM32N647I0H3Q, STM32N647L0H3Q, STM32N647X0H3Q, STM32N647Z0H3Q, STM32N655A0H3Q, STM32N655B0H3Q, STM32N655I0H3Q, STM32N655L0H3Q, STM32N655X0H3Q, STM32N655Z0H3Q, STM32N6570-DK, STM32N657A0H3Q, STM32N657B0H3Q, STM32N657I0H3Q, STM32N657L0H3Q, STM32N657X0H3Q, STM32N657Z0H3Q, STM32U031C6T6, STM32U031C6U6, STM32U031C8T6, STM32U031C8U6, STM32U031F4P6, STM32U031F6P6, STM32U031F8P6, STM32U031G6Y6TR, STM32U031G8Y6TR, STM32U031K4U6, STM32U031K6U6, STM32U031K8U6, STM32U031R6I6, STM32U031R6T6, STM32U031R8I6, STM32U031R8T6, STM32U073C8T6, STM32U073C8U6, STM32U073CBT6, STM32U073CBU6, STM32U073CCT6, STM32U073CCU6, STM32U073H8Y6TR, STM32U073HBY6TR, STM32U073HCY6TR, STM32U073K8U6, STM32U073KBU6, STM32U073KCU6, STM32U073M8I6, STM32U073M8T6, STM32U073MBI6, STM32U073MBT6, STM32U073MCI6, STM32U073MCT6, STM32U073R8I6, STM32U073R8T6, STM32U073RBI6, STM32U073RBT6, STM32U073RCI6, STM32U073RCT6, STM32U083C-DK, STM32U083CCT6, STM32U083CCU6, STM32U083HCY6TR, STM32U083KCU6, STM32U083MCI6, STM32U083MCT6, STM32U083RCI6, STM32U083RCT6, STM32U375CET6, STM32U375CET6Q, STM32U375CEU6, STM32U375CEU6Q, STM32U375CEY6QTR, STM32U375CGT6, STM32U375CGT6Q, STM32U375CGU6, STM32U375CGU6Q, STM32U375CGY6QTR, STM32U375KEU6, STM32U375KGU6, STM32U375REI6, STM32U375REI6Q, STM32U375RET6, STM32U375RET6Q, STM32U375REY6GTR, STM32U375REY6QTR, STM32U375RGI6, STM32U375RGI6Q, STM32U375RGT6, STM32U375RGT6Q, STM32U375RGY6GTR, STM32U375RGY6QTR, STM32U375VEI6, STM32U375VEI6Q, STM32U375VET6, STM32U375VET6Q, STM32U375VGI6, STM32U375VGI6Q, STM32U375VGT6, STM32U375VGT6Q, STM32U385CGT6, STM32U385CGT6Q, STM32U385CGU6, STM32U385CGU6Q, STM32U385CGY6QTR, STM32U385KGU6, STM32U385RGI6, STM32U385RGI6Q, STM32U385RGT6, STM32U385RGT6Q, STM32U385RGY6GTR, STM32U385RGY6QTR, STM32U385VGI6, STM32U385VGI6Q, STM32U385VGT6, STM32U385VGT6Q, STM32U535CBT6, STM32U535CBT6Q, STM32U535CBU6, STM32U535CBU6Q, STM32U535CCT6, STM32U535CCT6Q, STM32U535CCU6, STM32U535CCU6Q, STM32U535CET6, STM32U535CET6Q, STM32U535CEU6, STM32U535CEU6Q, STM32U535JEY6QTR, STM32U535NCY6QTR, STM32U535NEY6QTR, STM32U535RBI6, STM32U535RBI6Q, STM32U535RBT6, STM32U535RBT6Q, STM32U535RCI6, STM32U535RCI6Q, STM32U535RCT6, STM32U535RCT6Q, STM32U535REI6, STM32U535REI6Q, STM32U535RET6, STM32U535RET6Q, STM32U535VCI6, STM32U535VCI6Q, STM32U535VCT6, STM32U535VCT6Q, STM32U535VEI6, STM32U535VEI6Q, STM32U535VET6, STM32U535VET6Q, STM32U545CET6, STM32U545CET6Q, STM32U545CEU6, STM32U545CEU6Q, STM32U545JEY6QTR, STM32U545NEY6QTR, STM32U545REI6, STM32U545REI6Q, STM32U545RET6, STM32U545RET6Q, STM32U545VEI6, STM32U545VEI6Q, STM32U545VET6, STM32U545VET6Q, STM32U595AIH6, STM32U595AIH6Q, STM32U595AJH6, STM32U595AJH6Q, STM32U595QII6, STM32U595QII6Q, STM32U595QJI6, STM32U595QJI6Q, STM32U595RIT6, STM32U595RIT6Q, STM32U595RJT6, STM32U595RJT6Q, STM32U595VIT6, STM32U595VIT6Q, STM32U595VJT6, STM32U595VJT6Q, STM32U595ZIT6, STM32U595ZIT6Q, STM32U595ZIY6QTR, STM32U595ZJT6, STM32U595ZJT6Q, STM32U595ZJY6QTR, STM32U599BJY6QTR, STM32U599NIH6Q, STM32U599NJH6Q, STM32U599VIT6Q, STM32U599VJT6, STM32U599VJT6Q, STM32U599ZIT6Q, STM32U599ZIY6QTR, STM32U599ZJT6Q, STM32U599ZJY6QTR, STM32U5A5AJH6, STM32U5A5AJH6Q, STM32U5A5QII3Q , STM32U5A5QJI6, STM32U5A5QJI6Q, STM32U5A5RJT6, STM32U5A5RJT6Q, STM32U5A5VJT6, STM32U5A5VJT6Q, STM32U5A5ZJT6, STM32U5A5ZJT6Q, STM32U5A5ZJY6QTR, STM32U5A9BJY6QTR, STM32U5A9J-DK, STM32U5A9NJH6Q, STM32U5A9VJT6Q, STM32U5A9ZJT6Q, STM32U5A9ZJY6QTR, STM32U5F7VIT6, STM32U5F7VIT6Q, STM32U5F7VJT6, STM32U5F7VJT6Q, STM32U5F9BJY6QTR, STM32U5F9NJH6Q, STM32U5F9VIT6Q, STM32U5F9VJT6Q, STM32U5F9ZIJ6QTR, STM32U5F9ZIT6Q, STM32U5F9ZJJ6QTR, STM32U5F9ZJT6Q, STM32U5G7VJT6, STM32U5G7VJT6Q, STM32U5G9BJY6QTR, STM32U5G9J-DK1, STM32U5G9J-DK2, STM32U5G9NJH6Q, STM32U5G9VJT6Q, STM32U5G9ZJJ6QTR, STM32U5G9ZJT6Q, STM32WB05KZV6TR, STM32WB05KZV7TR, STM32WB05TZF6TR, STM32WB05TZF7TR, STM32WB06CCF6TR, STM32WB06CCF7TR, STM32WB06CCV6TR, STM32WB06CCV7TR, STM32WB06KCV6TR, STM32WB06KCV7TR, STM32WB07CCF6TR, STM32WB07CCF7TR, STM32WB07CCV6TR, STM32WB07CCV7TR, STM32WB07KCV6TR, STM32WB07KCV7TR, STM32WB09KEV6TR, STM32WB09KEV7TR, STM32WB09TEF6TR, STM32WB09TEF7TR, STM32WB1MMCH6, STM32WBA50KGU6, STM32WBA50KGU6TR, STM32WBA52CEU6, STM32WBA52CEU6TR, STM32WBA52CEU7, STM32WBA52CEU7TR, STM32WBA52CGU6, STM32WBA52CGU6TR, STM32WBA52CGU6U, STM32WBA52CGU7, STM32WBA52CGU7TR, STM32WBA52KEU6, STM32WBA52KEU6TR, STM32WBA52KGU6, STM32WBA52KGU6TR, STM32WBA54CEU6, STM32WBA54CEU6TR, STM32WBA54CEU7, STM32WBA54CEU7TR, STM32WBA54CGU6, STM32WBA54CGU6TR, STM32WBA54CGU7, STM32WBA54CGU7TR, STM32WBA54KEU6, STM32WBA54KEU6TR, STM32WBA54KEU7, STM32WBA54KEU7TR, STM32WBA54KGU6, STM32WBA54KGU6TR, STM32WBA54KGU7, STM32WBA54KGU7TR, STM32WBA55CEU6, STM32WBA55CEU6TR, STM32WBA55CEU7, STM32WBA55CEU7TR, STM32WBA55CGU6, STM32WBA55CGU6TR, STM32WBA55CGU6U, STM32WBA55CGU7, STM32WBA55CGU7TR, STM32WBA55G-DK1, STM32WBA55HEF6, STM32WBA55HEF7, STM32WBA55HGF6, STM32WBA55HGF7, STM32WBA55UEI6, STM32WBA55UEI6TR, STM32WBA55UEI7, STM32WBA55UEI7TR, STM32WBA55UGI6, STM32WBA55UGI6TR, STM32WBA55UGI7, STM32WBA55UGI7TR, STM32WBA5MMGH6TR, STM32WBA62MGF6, STM32WBA62MIF6, STM32WBA65MGF7, STM32WBA65MIF6, STM32WBA65MIF7, STM32WL30K8V6, STM32WL30KBV6, STM32WL31C8V6, STM32WL31CBV6, STM32WL31K8V6, STM32WL31KBV6, STM32WL33C8V6, STM32WL33C8V6X, STM32WL33CBV6, STM32WL33CBV6X, STM32WL33CCV6, STM32WL33CCV6A, STM32WL33CCV6X, STM32WL33K8V7, STM32WL33K8V7X, STM32WL33KBV7 , STM32WL33KBV7X, STM32WL33KCV7, STM32WL33KCV7X, STM32WL5MOCH6, STM32WL5MOCH6TR]
+2025-10-13 14:56:17,090 [INFO] DbMcus:218 - Found 4801 MCUs, 4801 are supported
+2025-10-13 14:56:17,091 [INFO] ApiDb:423 - Load user favorites file /home/ja/.stm32cubeide/favorites.mcus.txt: 0 item(s)
+2025-10-13 14:56:17,091 [INFO] ApiDb:427 - User favorites MCUs=[]
+2025-10-13 14:56:17,091 [INFO] DbMcus:224 - Set 0 / 0 favorites MCUs
+2025-10-13 14:56:17,569 [INFO] ApiDb:423 - Load user favorites file /home/ja/.stm32cubeide/favorites.boards.txt: 1 item(s)
+2025-10-13 14:56:17,569 [INFO] ApiDb:427 - User favorites Boards=[STM32F429I-DISC1]
+2025-10-13 14:56:17,569 [INFO] DbBoards:198 - Set 1 / 1 favorites Boards
+2025-10-13 14:56:17,614 [INFO] UtilMem:75 - End LoadConfig() Used Memory: 384223304 Bytes (450887680)
+2025-10-13 14:56:17,750 [WARN] ThirdParty:833 - waiting for thirdparty lock release [change project]
+2025-10-13 14:56:17,750 [INFO] ThirdParty:835 - entering critical section [change project]
+2025-10-13 14:56:17,750 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-PM33A1 1.0.0
+2025-10-13 14:56:17,750 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USBPD 4.1
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC9 1.0.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_HOST 2.0.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-MOTENVWB1 1.4.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-F4 1.1.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics LIBJPEG 8.0.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-ATR-ASTRA1 2.0.2
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfSSL 5.8.2
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLE1 7.1.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :Avnet-IotConnect X-CUBE-IoTC-DA16k-PMOD 1.0.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SMBUS 2.1.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfMQTT 1.19.2
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 3.0.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ISPU 2.1.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-EEPRMA1 5.2.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-IPS 3.2.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLEMGR 4.1.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-WB 2.0.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ST60 1.0.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-GNSS1 7.0.1
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC12 1.0.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-F7 1.1.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-L5 2.0.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TOUCHGFX 4.25.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 2.0.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC6 3.1.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ST67W61 1.1.0
+2025-10-13 14:56:17,751 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :quantropi X-CUBE-qispace-sdk-base 2.1.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FreeRTOS 0.0.1
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-G0 1.1.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SAFEA1 1.2.2
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC4 3.0.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SUBG2 5.0.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-H7RS 1.1.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics STM32_WPAN 1.0.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :EmbeddedOffice I-CUBE-FS-RTOS 1.0.1
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics lwIP 2.0.3
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :WES I-CUBE-Cesium 1.4.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :Cesanta I-CUBE-Mongoose 7.13.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_HOST 1.0.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :Infineon AIROC-Wi-Fi-Bluetooth-STM32 1.7.1
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-G4 2.0.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-WB05N 2.0.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.1.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.3.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfTPM 3.8.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-H7 3.4.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-DISPLAY 3.0.0
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfSSH 1.4.20
+2025-10-13 14:56:17,752 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC7 2.0.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TCPP 4.2.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :RealThread X-CUBE-RT-Thread_Nano 4.1.1
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-ATR-SIGFOX1 3.2.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC10 1.0.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-FREERTOS 1.3.1
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics HAL Drivers 0.0.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics MBEDTLS 2.16.2
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-IPS 3.1.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ALS 1.0.2
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :emotas I-CUBE-CANOPEN 1.3.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics MBEDTLS 2.14.1
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :ITTIA_DB I-CUBE-ITTIADB 8.9.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TOUCHGFX 4.26.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-STSE01 1.0.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :portGmbH I-Cube-SoM-uGOAL 1.1.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ST67W61 1.0.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-STBOX1 2.1.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AI 10.2.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-STAIOTCFT 1.0.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics ThreadX 1.0.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-SMARTAG2 1.2.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-FLIGHT1 5.1.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-WL 2.0.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :SEGGER I-CUBE-embOS 1.3.1
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ALGOBUILD 1.4.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-DPower 1.3.0
+2025-10-13 14:56:17,753 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-MEMS1 11.3.0
+2025-10-13 14:56:17,754 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-MOTENV1 5.0.0
+2025-10-13 14:56:17,754 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 1.0.0
+2025-10-13 14:56:17,754 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-L4 2.0.0
+2025-10-13 14:56:17,754 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics ThreadX 0.0.2
+2025-10-13 14:56:17,754 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics lwIP 2.1.2
+2025-10-13 14:56:17,754 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SFXS2LP1 4.0.0
+2025-10-13 14:56:17,754 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLE2 3.3.0
+2025-10-13 14:56:17,754 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TOF1 3.4.3
+2025-10-13 14:56:17,754 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.2.0
+2025-10-13 14:56:17,754 [INFO] ThirdParty:841 - exiting critical section [change project]
+2025-10-13 14:56:18,299 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-10-13 14:56:18,300 [INFO] PinOutPanel:1589 - setPackage(STM32F429ZITx,LQFP144)
+2025-10-13 14:56:18,715 [INFO] UtilMem:75 - Before build in PCC Used Memory: 239130568 Bytes (450887680)
+2025-10-13 14:56:19,344 [INFO] UtilMem:75 - After build in PCC Used Memory: 355141512 Bytes (450887680)
+2025-10-13 14:56:19,412 [INFO] ApiDbMcu:532 - Load IP Config File for FREERTOS
+2025-10-13 14:56:19,453 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,453 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,453 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,453 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,453 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,454 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,454 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,454 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,454 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,454 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,455 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,455 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,455 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,455 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,456 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,456 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,456 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,456 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,456 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,456 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,456 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,457 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,457 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,457 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,457 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,458 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,458 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,459 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,459 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,459 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,460 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,461 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,461 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,461 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,461 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,462 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,462 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,462 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,462 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,463 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,463 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,463 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,463 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,463 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,463 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,463 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,463 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,463 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,463 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,463 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,464 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,464 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,464 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,464 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,465 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,465 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,465 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,465 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,466 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,466 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,466 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,467 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,468 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,468 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,469 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,470 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 14:56:19,478 [INFO] ApiDbMcu:532 - Load IP Config File for PDM2PCM
+2025-10-13 14:56:19,515 [WARN] FreeRTOS:1023 - Null or empty value: should not occur! (nothing added to the table)
+2025-10-13 14:56:19,742 [INFO] CADModel:165 - CPN selected for project levelSTM32F429ZIT6
+2025-10-13 14:56:19,742 [INFO] CADModel:114 - Register for checkConnection events
+2025-10-13 14:56:19,745 [INFO] RtosManager:728 - Active RTOS found at IOC load: FREERTOS [Cortex-M4NS]
+2025-10-13 14:56:19,786 [INFO] OpenFileManager:386 - Restore cursor
+2025-10-13 14:56:27,925 [INFO] DmaTabbedPanel:205 - Cannot restore the selected Tab for DMA
+2025-10-13 15:00:59,404 [INFO] MainUpdater:2872 - connection check result : 10
+2025-10-13 15:00:59,404 [INFO] MainUpdater:2872 - connection check result : 10
+2025-10-13 15:01:00,454 [INFO] MicroXplorer:468 - Change Database Path : 
+2025-10-13 15:01:00,454 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-10-13 15:01:00,462 [ERROR] ProjectManagerView:395 - 
+java.lang.NullPointerException: Cannot invoke "javax.swing.JTextField.getText()" because the return value of "java.util.List.get(int)" is null
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab$9.caretUpdate(ProjectChoiceTab.java:2706) ~[filemanager.jar:?]
+	at javax.swing.text.JTextComponent.fireCaretUpdate(JTextComponent.java:408) ~[?:?]
+	at javax.swing.text.JTextComponent$MutableCaretEvent.fire(JTextComponent.java:4484) ~[?:?]
+	at javax.swing.text.JTextComponent$MutableCaretEvent.stateChanged(JTextComponent.java:4506) ~[?:?]
+	at javax.swing.text.DefaultCaret.fireStateChanged(DefaultCaret.java:857) ~[?:?]
+	at javax.swing.text.DefaultCaret.changeCaretPosition(DefaultCaret.java:1343) ~[?:?]
+	at javax.swing.text.DefaultCaret.handleSetDot(DefaultCaret.java:1242) ~[?:?]
+	at javax.swing.text.DefaultCaret.setDot(DefaultCaret.java:1223) ~[?:?]
+	at javax.swing.text.DefaultCaret$Handler.insertUpdate(DefaultCaret.java:1819) ~[?:?]
+	at javax.swing.text.AbstractDocument.fireInsertUpdate(AbstractDocument.java:227) ~[?:?]
+	at javax.swing.text.AbstractDocument.handleInsertString(AbstractDocument.java:781) ~[?:?]
+	at javax.swing.text.AbstractDocument.insertString(AbstractDocument.java:740) ~[?:?]
+	at javax.swing.text.PlainDocument.insertString(PlainDocument.java:131) ~[?:?]
+	at javax.swing.text.AbstractDocument.replace(AbstractDocument.java:699) ~[?:?]
+	at javax.swing.text.JTextComponent.setText(JTextComponent.java:1725) ~[?:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.createHeapStackFields(ProjectChoiceTab.java:993) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.buildLinkSettingsPanel(ProjectChoiceTab.java:3813) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.defineWindowsFields(ProjectChoiceTab.java:1987) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.updateSettings(ProjectChoiceTab.java:558) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectSettingsPanel.UpdateDialog(ProjectSettingsPanel.java:247) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.ProjectManagerView.propertyChange(ProjectManagerView.java:392) ~[filemanager.jar:?]
+	at java.beans.PropertyChangeSupport.fire(PropertyChangeSupport.java:343) ~[?:?]
+	at java.beans.PropertyChangeSupport.firePropertyChange(PropertyChangeSupport.java:335) ~[?:?]
+	at java.beans.PropertyChangeSupport.firePropertyChange(PropertyChangeSupport.java:268) ~[?:?]
+	at com.st.microxplorer.util.MXPropertyChangeSupport.firePropertyChange(MXPropertyChangeSupport.java:54) ~[STM32CubeMX.jar:?]
+	at com.st.microxplorer.mxsystem.MxSystem.closeConfig(MxSystem.java:899) ~[STM32CubeMX.jar:?]
+	at com.st.microxplorer.maingui.MainPanel.closeConfig(MainPanel.java:792) ~[STM32CubeMX.jar:?]
+	at com.st.microxplorer.plugins.filemanager.engine.OpenFileManager.loadConfigurationFile(OpenFileManager.java:288) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.filemanager.engine.MainFileManager.userLoadConfig(MainFileManager.java:364) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.filemanager.engine.MainFileManager.userLoadConfig(MainFileManager.java:342) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.filemanager.FileManagerView.getSpecificTask(FileManagerView.java:264) ~[filemanager.jar:?]
+	at com.st.stm32cube.common.mx.editor.CubeMxEditor.getMxTabbedPaneInstance(CubeMxEditor.java:1198) ~[com.st.stm32cube.common.mx_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.editor.CubeMxEditor$12$1.createSwingComponent(CubeMxEditor.java:1068) ~[com.st.stm32cube.common.mx_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.EmbeddedSwingComposite.doComponentCreation(EmbeddedSwingComposite.java:492) ~[com.st.stm32cube.common.mx.oss_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.EmbeddedSwingComposite$4.run(EmbeddedSwingComposite.java:291) ~[com.st.stm32cube.common.mx.oss_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.AwtEnvironment$2.run(AwtEnvironment.java:166) ~[com.st.stm32cube.common.mx.oss_6.15.0.202507011659/:?]
+	at java.awt.event.InvocationEvent.dispatch(InvocationEvent.java:318) ~[?:?]
+	at java.awt.EventQueue.dispatchEventImpl(EventQueue.java:773) ~[?:?]
+	at java.awt.EventQueue$4.run(EventQueue.java:720) ~[?:?]
+	at java.awt.EventQueue$4.run(EventQueue.java:714) ~[?:?]
+	at java.security.AccessController.doPrivileged(AccessController.java:400) ~[?:?]
+	at java.security.ProtectionDomain$JavaSecurityAccessImpl.doIntersectionPrivilege(ProtectionDomain.java:87) ~[?:?]
+	at java.awt.EventQueue.dispatchEvent(EventQueue.java:742) ~[?:?]
+	at java.awt.EventDispatchThread.pumpOneEventForFilters(EventDispatchThread.java:203) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEventsForFilter(EventDispatchThread.java:124) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEventsForHierarchy(EventDispatchThread.java:113) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:109) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:101) ~[?:?]
+	at java.awt.EventDispatchThread.run(EventDispatchThread.java:90) ~[?:?]
+2025-10-13 15:01:00,470 [WARN] ThirdParty:871 - waiting for thirdparty lock release [close project]
+2025-10-13 15:01:00,470 [INFO] ThirdParty:873 - entering critical section [close project]
+2025-10-13 15:01:00,470 [INFO] ThirdParty:883 - exiting critical section [close project]
+2025-10-13 15:01:00,472 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-10-13 15:01:00,485 [WARN] IpParametersView:155 - Warning: This peripheral hasn't parameters
+2025-10-13 15:01:00,498 [WARN] MainPanel:289 - <html><b><center>Warning: This peripheral has no parameters to be configured<br></b></html>
+2025-10-13 15:01:00,507 [INFO] UtilMem:75 - Begin LoadConfig() Used Memory: 626526208 Bytes (990904320)
+2025-10-13 15:01:00,507 [INFO] MicroXplorer:468 - Change Database Path : 
+2025-10-13 15:01:00,507 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-10-13 15:01:00,507 [INFO] OpenFileManager:355 - Change cursor
+2025-10-13 15:01:00,515 [INFO] Mcu:2029 - Initializing MCU STM32F429ZITx STM32F429ZITx STM32F429ZIT6
+2025-10-13 15:01:01,788 [INFO] Context:786 - Trying to add GPIOservice into a context  which must be forbidden
+2025-10-13 15:01:02,615 [INFO] ImportTextPane:234 - (OptionalMessage_ERROR) Pin10 (VP_RIF_VS_RIF1) cannot be retrieved for this MCU
+2025-10-13 15:01:02,689 [INFO] RtosManager:558 - Registered RTOS mode: class=CMSIS, group=RTOS, mode=CMSIS_V1, owner=FREERTOS
+2025-10-13 15:01:02,690 [INFO] RtosManager:558 - Registered RTOS mode: class=CMSIS, group=RTOS2, mode=CMSIS_V2, owner=FREERTOS
+2025-10-13 15:01:02,690 [INFO] RtosManager:558 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V1, owner=FREERTOS
+2025-10-13 15:01:02,690 [INFO] RtosManager:558 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V2, owner=FREERTOS
+2025-10-13 15:01:02,690 [WARN] ModelIntegratedComponent:184 - Missing modes for component STMicroelectronics:FreeRTOS:0.0.1:STMicroelectronics:RTOS:FreeRTOS:Core:::10.2.0:
+2025-10-13 15:01:02,717 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,718 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,718 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,718 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,718 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,718 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,718 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,718 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,718 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,718 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,718 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,719 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,719 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,719 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,719 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,719 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,719 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,719 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,720 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:01:02,721 [WARN] ModelPack:524 - Component already loaded: STMicroelectronics:HAL Drivers:0.0.0:STMicroelectronics:Device:STMicro_Driver:XSPI:HAL::0.0.1:HAL_XSPI
+2025-10-13 15:01:02,900 [INFO] ThirdPartyModel:298 - Start build external matchings
+2025-10-13 15:01:03,316 [INFO] ThirdPartyModel:316 - End build external matchings
+2025-10-13 15:01:03,330 [INFO] RtosManager:1018 - Current active RTOS is FREERTOS [Cortex-M4NS]
+2025-10-13 15:01:03,549 [INFO] UtilMem:75 - End LoadConfig() Used Memory: 954563808 Bytes (1073741824)
+2025-10-13 15:01:03,561 [WARN] ThirdParty:833 - waiting for thirdparty lock release [change project]
+2025-10-13 15:01:03,562 [INFO] ThirdParty:835 - entering critical section [change project]
+2025-10-13 15:01:03,563 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-PM33A1 1.0.0
+2025-10-13 15:01:03,563 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USBPD 4.1
+2025-10-13 15:01:03,564 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC9 1.0.0
+2025-10-13 15:01:03,564 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_HOST 2.0.0
+2025-10-13 15:01:03,564 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-MOTENVWB1 1.4.0
+2025-10-13 15:01:03,564 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-F4 1.1.0
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+2025-10-13 15:01:03,564 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-ATR-ASTRA1 2.0.2
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+2025-10-13 15:01:03,565 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SMBUS 2.1.0
+2025-10-13 15:01:03,565 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfMQTT 1.19.2
+2025-10-13 15:01:03,565 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 3.0.0
+2025-10-13 15:01:03,565 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ISPU 2.1.0
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+2025-10-13 15:01:03,565 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLEMGR 4.1.0
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+2025-10-13 15:01:03,565 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-GNSS1 7.0.1
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+2025-10-13 15:01:03,569 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ST67W61 1.1.0
+2025-10-13 15:01:03,569 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :quantropi X-CUBE-qispace-sdk-base 2.1.0
+2025-10-13 15:01:03,569 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FreeRTOS 0.0.1
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+2025-10-13 15:01:03,569 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics STM32_WPAN 1.0.0
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+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.1.0
+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.3.0
+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :wolfSSL I-CUBE-wolfTPM 3.8.0
+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-H7 3.4.0
+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-DISPLAY 3.0.0
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+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :RealThread X-CUBE-RT-Thread_Nano 4.1.1
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+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC10 1.0.0
+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-FREERTOS 1.3.1
+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics HAL Drivers 0.0.0
+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics MBEDTLS 2.16.2
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+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ALS 1.0.2
+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :emotas I-CUBE-CANOPEN 1.3.0
+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics MBEDTLS 2.14.1
+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :ITTIA_DB I-CUBE-ITTIADB 8.9.0
+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TOUCHGFX 4.26.0
+2025-10-13 15:01:03,570 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-STSE01 1.0.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :portGmbH I-Cube-SoM-uGOAL 1.1.0
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+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-STBOX1 2.1.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AI 10.2.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-STAIOTCFT 1.0.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics ThreadX 1.0.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-SMARTAG2 1.2.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-FLIGHT1 5.1.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-WL 2.0.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :SEGGER I-CUBE-embOS 1.3.1
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ALGOBUILD 1.4.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-DPower 1.3.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-MEMS1 11.3.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-MOTENV1 5.0.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 1.0.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-L4 2.0.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics ThreadX 0.0.2
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics lwIP 2.1.2
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SFXS2LP1 4.0.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLE2 3.3.0
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TOF1 3.4.3
+2025-10-13 15:01:03,571 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.2.0
+2025-10-13 15:01:03,572 [INFO] ThirdParty:841 - exiting critical section [change project]
+2025-10-13 15:01:03,894 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-10-13 15:01:03,895 [INFO] PinOutPanel:1589 - setPackage(STM32F429ZITx,LQFP144)
+2025-10-13 15:01:04,203 [INFO] UtilMem:75 - Before build in PCC Used Memory: 832301904 Bytes (1073741824)
+2025-10-13 15:01:04,503 [INFO] UtilMem:75 - After build in PCC Used Memory: 881584976 Bytes (1073741824)
+2025-10-13 15:01:04,513 [INFO] ApiDbMcu:532 - Load IP Config File for FREERTOS
+2025-10-13 15:01:04,551 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,552 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,552 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,552 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,552 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,552 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,552 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,553 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,553 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,553 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,553 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,553 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,553 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,553 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,554 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,554 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,554 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,554 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,554 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,554 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,554 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,555 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,555 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,555 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,555 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,556 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,556 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,556 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,556 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,557 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,557 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,557 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,558 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,558 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,558 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,558 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,558 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,558 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,559 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,559 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,559 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,559 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,559 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,559 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,559 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,559 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,559 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,560 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,560 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,560 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,560 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,560 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,560 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,561 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,561 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,561 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,562 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,562 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,563 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,563 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,563 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,564 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,565 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,566 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,566 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,567 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:01:04,569 [INFO] ApiDbMcu:532 - Load IP Config File for PDM2PCM
+2025-10-13 15:01:04,579 [WARN] FreeRTOS:1023 - Null or empty value: should not occur! (nothing added to the table)
+2025-10-13 15:01:04,645 [INFO] CADModel:165 - CPN selected for project levelSTM32F429ZIT6
+2025-10-13 15:01:04,645 [INFO] CADModel:114 - Register for checkConnection events
+2025-10-13 15:01:04,649 [INFO] RtosManager:728 - Active RTOS found at IOC load: FREERTOS [Cortex-M4NS]
+2025-10-13 15:01:04,689 [INFO] OpenFileManager:386 - Restore cursor
+2025-10-13 15:01:13,357 [INFO] CADModel:198 - CPN selected (Project mode): STM32F429ZIT6
+2025-10-13 15:01:13,357 [INFO] CADModel:200 - Internet connection configuration mode: 1
+2025-10-13 15:01:13,358 [INFO] CADModel:203 - rpn retrievedSTM32F429ZI
+2025-10-13 15:01:13,364 [INFO] WebAppUi:336 - Instantiating new browser for Project
+2025-10-13 15:01:13,469 [INFO] WebAppUi:1235 - Register for checkConnection events
+2025-10-13 15:01:13,469 [INFO] WebAppUi:1270 - Apply proxy settings
+2025-10-13 15:01:13,470 [INFO] WebAppUi:1308 - Chromium requires no authentication
+2025-10-13 15:01:13,470 [INFO] WebAppUi:1294 - Direct internet connection detected
+2025-10-13 15:01:13,474 [INFO] WebAppUi:1166 - Web application path used /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659/db/plugins/mcufinder/reactClient/index.html
+2025-10-13 15:01:13,486 [INFO] WebAppUi:938 - Path where api_config.json is located /home/ja/.stmcufinder/plugins/mcufinder//mcu/api_config.json
+2025-10-13 15:01:13,486 [INFO] WebAppUi:939 - Setting api config in window object
+2025-10-13 15:01:13,520 [INFO] WebAppUi:947 - Path where cad_preferences.json is located /home/ja/.stm32cubeide/
+2025-10-13 15:01:13,520 [INFO] WebAppUi:948 - Setting consent info in window object
+2025-10-13 15:01:14,685 [INFO] WebAppUi:843 - Allow Downloads
+2025-10-13 15:01:14,686 [INFO] WebAppUi:336 - Instantiating new browser for Finder
+2025-10-13 15:01:14,806 [INFO] WebAppUi:1235 - Register for checkConnection events
+2025-10-13 15:01:14,806 [INFO] WebAppUi:1270 - Apply proxy settings
+2025-10-13 15:01:14,806 [INFO] WebAppUi:1308 - Chromium requires no authentication
+2025-10-13 15:01:14,807 [INFO] WebAppUi:1294 - Direct internet connection detected
+2025-10-13 15:01:14,811 [INFO] WebAppUi:1166 - Web application path used /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659/db/plugins/mcufinder/reactClient/index.html
+2025-10-13 15:01:14,821 [INFO] WebAppUi:938 - Path where api_config.json is located /home/ja/.stmcufinder/plugins/mcufinder//mcu/api_config.json
+2025-10-13 15:01:14,822 [INFO] WebAppUi:939 - Setting api config in window object
+2025-10-13 15:01:14,840 [INFO] WebAppUi:947 - Path where cad_preferences.json is located /home/ja/.stm32cubeide/
+2025-10-13 15:01:14,840 [INFO] WebAppUi:948 - Setting consent info in window object
+2025-10-13 15:01:15,949 [INFO] WebAppUi:843 - Allow Downloads
+2025-10-13 15:01:15,949 [INFO] WebAppUi:664 - RPN selected STM32F429ZI
+2025-10-13 15:01:15,950 [INFO] WebAppUi:665 - RefName selected STM32F429ZITx
+2025-10-13 15:01:15,950 [INFO] WebAppUi:666 - CPN selected STM32F429ZIT6
+2025-10-13 15:01:15,953 [INFO] WebAppUi:829 - Which Bigleton in use 2 and which CPN is about STM32F429ZIT6
+2025-10-13 15:01:15,958 [INFO] WebAppUi:703 - Have injected Javascript into web application
+2025-10-13 15:01:15,958 [INFO] WebAppUiContainer:153 - Web application run mode: Project CPN: STM32F429ZIT6
+2025-10-13 15:01:17,258 [INFO] WebAppUi:938 - Path where api_config.json is located /home/ja/.stmcufinder/plugins/mcufinder//mcu/api_config.json
+2025-10-13 15:01:17,258 [INFO] WebAppUi:939 - Setting api config in window object
+2025-10-13 15:01:17,285 [INFO] WebAppUi:947 - Path where cad_preferences.json is located /home/ja/.stm32cubeide/
+2025-10-13 15:01:17,285 [INFO] WebAppUi:948 - Setting consent info in window object
+2025-10-13 15:01:17,869 [INFO] WebAppUi:1100 - Web application message: THREE.WebGLRenderer 101
+2025-10-13 15:07:53,919 [INFO] MainUpdater:2872 - connection check result : 10
+2025-10-13 15:07:53,920 [INFO] McuFinderGlobals:76 - Set McuFinderConnectedMode to true
+2025-10-13 15:07:55,078 [INFO] ServerAccessManage:452 - Complete download http(s) 200
+2025-10-13 15:07:55,079 [ERROR] ServerAccessManage:457 - Unexpected HTTP response Code (200)
+2025-10-13 15:07:55,079 [ERROR] ServerAccessManage:740 - Problem during Download of File : mcusAds.json._tmp_.
+2025-10-13 15:07:58,452 [INFO] LoadUrlFilesThread:156 - End of LoadUrlFiles Thread
+2025-10-13 15:07:59,414 [INFO] DbMcusAds:53 - JSON generation date=Tue Jul 08 03:14:23 CDT 2025 (1751962463524)
+2025-10-13 15:07:59,417 [INFO] ApiDb:448 - Save user favorites file /home/ja/.stm32cubeide/favorites.mcus.txt: 0 item(s)
+2025-10-13 15:07:59,425 [INFO] ApiDb:452 - User favorites MCUs=[]
+2025-10-13 15:07:59,426 [INFO] ApiDb:581 - Connected to CubeFinder SQLite database (/home/ja/.stmcufinder/plugins/mcufinder/mcu/cube-finder-db.db)
+2025-10-13 15:07:59,465 [INFO] ApiDb:668 - CubeFinder database Data Model version=2.1
+2025-10-13 15:07:59,465 [INFO] ApiDb:669 - CubeFinder database Configuration version=3.0.39
+2025-10-13 15:07:59,465 [INFO] ApiDb:670 - CubeFinder database generation date=2025-08-25 (1756130511)
+2025-10-13 15:07:59,466 [INFO] ApiDb:671 - CubeFinder database FW Pack versions=[FP-ATR-ASTRA1_V2.0.0, FP-SNS-FLIGHT1_V5.1.0, FP-SNS-MOTENV1_V5.0.0, FP-SNS-MOTENVWB1_V1.4.0, FP-SNS-SMARTAG2_V1.2.0, FP-SNS-STBOX1_V2.1.0, STM32Cube_FW_C0_V1.4.0, STM32Cube_FW_F4_V1.28.3, STM32Cube_FW_F7_V1.17.4, STM32Cube_FW_G0_V1.6.2, STM32Cube_FW_G4_V1.6.1, STM32Cube_FW_H5_V1.5.0, STM32Cube_FW_H7RS_V1.2.0, STM32Cube_FW_H7_V1.12.1, STM32Cube_FW_L0_V1.12.2, STM32Cube_FW_L4_V1.18.1, STM32Cube_FW_L5_V1.5.1, STM32Cube_FW_N6_V1.2.0, STM32Cube_FW_U0_V1.3.0, STM32Cube_FW_U3_V1.2.0, STM32Cube_FW_U5_V1.8.0, STM32Cube_FW_WB0_V1.3.0, STM32Cube_FW_WBA_V1.7.0, STM32Cube_FW_WB_V1.23.0, STM32Cube_FW_WL3_V1.2.0, STM32Cube_FW_WL_V1.3.1, X-CUBE-ALGOBUILD_V1.4.0, X-CUBE-ALS_V1.0.2, X-CUBE-AZRTOS-F4_V1.1.0, X-CUBE-AZRTOS-F7_V1.1.0, X-CUBE-AZRTOS-G0_V1.1.0, X-CUBE-AZRTOS-G4_V2.0.0, X-CUBE-AZRTOS-H7RS_V1.1.0, X-CUBE-AZRTOS-H7_V3.4.0, X-CUBE-AZRTOS-L4_V2.0.0, X-CUBE-AZRTOS-L5_V2.0.0, X-CUBE-AZRTOS-WB_V2.0.0, X-CUBE-AZRTOS-WL_V2.0.0, X-CUBE-BLE1_V7.1.0, X-CUBE-BLE2_V3.3.0, X-CUBE-BLEMGR_V4.1.0, X-CUBE-EEPRMA1_V5.2.0, X-CUBE-FREERTOS_V1.3.1, X-CUBE-GNSS1_V6.0.0, X-CUBE-MEMS1_V11.3.0, X-CUBE-NFC4_V3.0.0, X-CUBE-NFC7_V2.0.0, X-CUBE-SFXS2LP1_V4.0.0, X-CUBE-ST67W61_V1.0.0, X-CUBE-SUBG2_V5.0.0, X-CUBE-TOF1_V3.4.3]
+2025-10-13 15:08:01,506 [INFO] ApiDb:240 - Found 880 in-development CPN: [B-G473E-ZEST1S, B-WB1M-WPAN1, B-WBA5M-WPAN, B-WL5M-SUBG1, NUCLEO-C031C6, NUCLEO-C051C8, NUCLEO-C071RB, NUCLEO-C092RC, NUCLEO-H503RB, NUCLEO-H533RE, NUCLEO-H563ZI, NUCLEO-H7S3L8, NUCLEO-N657X0-Q, NUCLEO-U031R8, NUCLEO-U083RC, NUCLEO-U385RG-Q, NUCLEO-U545RE-Q, NUCLEO-U5A5ZJ-Q, NUCLEO-WB05KZ, NUCLEO-WB07CC, NUCLEO-WB09KE, NUCLEO-WBA52CG, NUCLEO-WBA55CG, NUCLEO-WL33CC1, NUCLEO-WL33CC2, STEVAL-PROTEUS1, STEVAL-SMARTAG2, STEVAL-STWINBX1, STM320518-EVAL, STM32C0116-DK, STM32C011D6Y3TR, STM32C011D6Y6TR, STM32C011F4P3, STM32C011F4P6, STM32C011F4U3, STM32C011F4U6TR, STM32C011F6P3, STM32C011F6P6, STM32C011F6U3, STM32C011F6U6TR, STM32C011J4M3, STM32C011J4M6, STM32C011J6M3, STM32C011J6M6, STM32C0316-DK, STM32C031C4T3, STM32C031C4T6, STM32C031C4U3, STM32C031C4U6, STM32C031C6T3, STM32C031C6T6, STM32C031C6U3, STM32C031C6U6, STM32C031F4P3, STM32C031F4P6, STM32C031F6P3, STM32C031F6P6, STM32C031G4U3, STM32C031G4U6, STM32C031G6U3, STM32C031G6U6, STM32C031K4T3, STM32C031K4T6, STM32C031K4U3, STM32C031K4U6, STM32C031K6T3, STM32C031K6T6, STM32C031K6U3, STM32C031K6U6, STM32C051C6T6, STM32C051C6U6, STM32C051C8T6, STM32C051C8U6, STM32C051D8Y6TR, STM32C051F6P6, STM32C051F8P6, STM32C051G6U6, STM32C051G8U6, STM32C051K6T6, STM32C051K6U6, STM32C051K8T6, STM32C071C8T6, STM32C071C8T6N, STM32C071C8U6, STM32C071C8U6N, STM32C071CBT6, STM32C071CBT6N, STM32C071CBU6, STM32C071CBU6N, STM32C071F8P6, STM32C071F8P6N, STM32C071FBP6, STM32C071FBP6N, STM32C071FBY6TR, STM32C071G8U6, STM32C071G8U6N, STM32C071GBU6, STM32C071GBU6N, STM32C071K8T6, STM32C071K8T6N, STM32C071K8U6, STM32C071K8U6N, STM32C071KBT6, STM32C071KBT6N, STM32C071KBU6, STM32C071KBU6N, STM32C071R8T6, STM32C071R8T6N, STM32C071RBI6N, STM32C071RBT6, STM32C071RBT6N, STM32C091CBT6, STM32C091CBU6, STM32C091CCT6, STM32C091CCU6, STM32C091ECY6TR, STM32C091FBP6, STM32C091FCP6, STM32C091GBU6, STM32C091GCU6, STM32C091KBT6, STM32C091KBU6, STM32C091KCT6, STM32C091KCU6, STM32C091RBT6, STM32C091RCI6, STM32C091RCT6, STM32C092CBT6, STM32C092CBU6, STM32C092CCT6, STM32C092CCU6, STM32C092ECY6TR, STM32C092FBP6, STM32C092FCP6, STM32C092GBU6, STM32C092GCU6, STM32C092KBT6, STM32C092KBU6, STM32C092KCT6, STM32C092KCU6, STM32C092RBT6, STM32C092RCI6, STM32C092RCT6, STM32G071K8TXN, STM32G071K8UXN, STM32G081GBU6N, STM32G081KBT6N, STM32G081KBUXN, STM32G0B1CCT6N, STM32G0B1KCT6, STM32G0B1NEY6TR, STM32G0B1RCT6N, STM32G0C1CCT6, STM32G0C1CCT6N, STM32G0C1CCU6N, STM32G0C1CET6N, STM32G0C1CEU6N, STM32G0C1KCT6, STM32G0C1NEY6TR, STM32G0C1RCI6N, STM32G0C1RCT6N, STM32G0C1REI6N, STM32G0C1RET6N, STM32G0C1VCI6, STM32G0C1VEI6, STM32G411C6T3, STM32G411C6T6, STM32G411C6U3, STM32G411C6U6, STM32G411C8T3, STM32G411C8T6, STM32G411C8U3, STM32G411C8U6, STM32G411CBT3, STM32G411CBT6, STM32G411CBU3, STM32G411CBU6, STM32G411K6T3, STM32G411K6T6, STM32G411K6U3, STM32G411K6U6, STM32G411K8T3, STM32G411K8T6, STM32G411K8U3, STM32G411K8U6, STM32G411KBT3, STM32G411KBT6, STM32G411KBU3, STM32G411KBU6, STM32G411M6T3, STM32G411M6T6, STM32G411M8T3, STM32G411M8T6, STM32G411MBT3, STM32G411MBT6, STM32G411R6T3, STM32G411R6T6, STM32G411R8T3, STM32G411R8T6, STM32G411RBT3, STM32G411RBT6, STM32G414CBT3, STM32G414CBT6, STM32G414CBU3, STM32G414CBU6, STM32G414CCT3, STM32G414CCT6, STM32G414CCU3, STM32G414CCU6, STM32G414MBT3, STM32G414MBT6, STM32G414MCT3, STM32G414MCT6, STM32G414RBT3, STM32G414RBT6, STM32G414RCT3, STM32G414RCT6, STM32G414VBT3, STM32G414VBT6, STM32G414VCT3, STM32G414VCT6, STM32G431CBT3Z, STM32G431RBT3Z, STM32G471CCT6, STM32G471CCU6, STM32G471CET3, STM32G471CET6, STM32G471CEU3, STM32G471CEU6, STM32G471MCT6, STM32G471MET3, STM32G471MET6, STM32G471MEY6TR, STM32G471QCT6, STM32G471QET3, STM32G471RCT6, STM32G471RET3, STM32G471RET6, STM32G471VCH6, STM32G471VCI6, STM32G471VCT6, STM32G471VEH3, STM32G471VEH6, STM32G471VEI3, STM32G471VEI6, STM32G471VET3, STM32G471VET6, STM32G473QET3Z, STM32G473RET3Z, STM32G474CCT6, STM32G491RET3Z, STM32H503CBT6, STM32H503CBU6, STM32H503EBY6TR, STM32H503KBU6, STM32H503RBT6, STM32H523CCT6, STM32H523CCU6, STM32H523CET6, STM32H523CEU6, STM32H523HEY6TR, STM32H523RCT6, STM32H523RET6, STM32H523VCI6, STM32H523VCT6, STM32H523VEI6, STM32H523VET6, STM32H523ZCJ6, STM32H523ZCT6, STM32H523ZEJ6, STM32H523ZET6, STM32H533CET6, STM32H533CEU6, STM32H533HEY6TR, STM32H533RET6, STM32H533VEI6, STM32H533VET6, STM32H533ZEJ6, STM32H533ZET6, STM32H562AGI6, STM32H562AII6, STM32H562IGK6, STM32H562IGT6, STM32H562IIK6, STM32H562IIT6, STM32H562RGT6, STM32H562RGV6, STM32H562RIT6, STM32H562RIV6, STM32H562VGT6, STM32H562VIT6, STM32H562ZGT6, STM32H562ZIT6, STM32H563AGI6, STM32H563AII3Q, STM32H563AII6, STM32H563IGK6, STM32H563IGT6, STM32H563IIK3Q, STM32H563IIK6, STM32H563IIT3Q, STM32H563IIT6, STM32H563MIY3QTR, STM32H563RGT6, STM32H563RGV6, STM32H563RIT6, STM32H563RIV6, STM32H563VGT6, STM32H563VIT3Q, STM32H563VIT6, STM32H563ZGT6, STM32H563ZIT3Q, STM32H563ZIT6, STM32H573AII3Q, STM32H573AII6, STM32H573I-DK, STM32H573IIK3Q, STM32H573IIK6, STM32H573IIT3Q, STM32H573IIT6, STM32H573MIY3QTR, STM32H573RIT6, STM32H573RIV6, STM32H573VIT3Q, STM32H573VIT6, STM32H573ZIT3Q, STM32H573ZIT6, STM32H7R3A8I6, STM32H7R3I8K6, STM32H7R3I8T6, STM32H7R3L8H6, STM32H7R3L8H6H, STM32H7R3R8V6, STM32H7R3V8H6, STM32H7R3V8T6, STM32H7R3V8Y6TR, STM32H7R3Z8J6, STM32H7R3Z8T6, STM32H7R7A8I6, STM32H7R7I8K6, STM32H7R7I8T6, STM32H7R7L8H6, STM32H7R7L8H6H, STM32H7R7Z8J6, STM32H7S3A8I6, STM32H7S3I8K6, STM32H7S3I8T6, STM32H7S3L8H6, STM32H7S3L8H6H, STM32H7S3R8V6, STM32H7S3V8H6, STM32H7S3V8T6, STM32H7S3V8Y6TR, STM32H7S3Z8J6, STM32H7S3Z8T6, STM32H7S78-DK, STM32H7S7A8I6, STM32H7S7I8K6, STM32H7S7I8T6, STM32H7S7L8H6, STM32H7S7L8H6H, STM32H7S7Z8J6, STM32L4R5QGI6STR, STM32MP131AAE3, STM32MP131AAF3, STM32MP131AAG3, STM32MP131CAE3, STM32MP131CAF3, STM32MP131CAG3, STM32MP131DAE7, STM32MP131DAF7, STM32MP131DAG7, STM32MP131FAE7, STM32MP131FAF7, STM32MP131FAG7, STM32MP133AAE3, STM32MP133AAF3, STM32MP133AAG3, STM32MP133CAE3, STM32MP133CAF3, STM32MP133CAG3, STM32MP133DAE7, STM32MP133DAF7, STM32MP133DAG7, STM32MP133FAE7, STM32MP133FAF7, STM32MP133FAG7, STM32MP135AAE3, STM32MP135AAF3, STM32MP135AAG3, STM32MP135CAE3, STM32MP135CAF3, STM32MP135CAG3, STM32MP135DAE7, STM32MP135DAF7, STM32MP135DAG7, STM32MP135F-DK, STM32MP135FAE7, STM32MP135FAF7, STM32MP135FAF7T, STM32MP135FAF7U, STM32MP135FAG7, STM32MP211AAL3, STM32MP211AAM3, STM32MP211AAN3, STM32MP211AAO3, STM32MP211CAL3, STM32MP211CAM3, STM32MP211CAN3, STM32MP211CAO3, STM32MP211DAL3, STM32MP211DAM3, STM32MP211DAN3, STM32MP211DAO3, STM32MP211FAL3, STM32MP211FAM3, STM32MP211FAN3, STM32MP211FAO3, STM32MP213AAL3, STM32MP213AAM3, STM32MP213AAN3, STM32MP213AAO3, STM32MP213CAL3, STM32MP213CAM3, STM32MP213CAN3, STM32MP213CAO3, STM32MP213DAL3, STM32MP213DAM3, STM32MP213DAN3, STM32MP213DAO3, STM32MP213FAL3, STM32MP213FAM3, STM32MP213FAN3, STM32MP213FAO3, STM32MP215AAL3, STM32MP215AAM3, STM32MP215AAN3, STM32MP215AAO3, STM32MP215CAL3, STM32MP215CAM3, STM32MP215CAN3, STM32MP215CAO3, STM32MP215DAL3, STM32MP215DAM3, STM32MP215DAN3, STM32MP215DAO3, STM32MP215F-DK, STM32MP215FAL3, STM32MP215FAM3, STM32MP215FAN3, STM32MP215FAO3, STM32MP231AAJ3, STM32MP231AAK3, STM32MP231AAL3, STM32MP231CAJ3, STM32MP231CAK3, STM32MP231CAL3, STM32MP231DAJ3, STM32MP231DAK3, STM32MP231DAL3, STM32MP231FAJ3, STM32MP231FAK3, STM32MP231FAL3, STM32MP233AAJ3, STM32MP233AAK3, STM32MP233AAL3, STM32MP233CAJ3, STM32MP233CAK3, STM32MP233CAL3, STM32MP233DAJ3, STM32MP233DAK3, STM32MP233DAL3, STM32MP233FAJ3, STM32MP233FAK3, STM32MP233FAL3, STM32MP235AAJ3, STM32MP235AAK3, STM32MP235AAL3, STM32MP235CAJ3, STM32MP235CAK3, STM32MP235CAL3, STM32MP235DAJ3, STM32MP235DAK3, STM32MP235DAL3, STM32MP235FAJ3, STM32MP235FAK3, STM32MP235FAL3, STM32MP251AAI3, STM32MP251AAK3, STM32MP251AAL3, STM32MP251CAI3, STM32MP251CAK3, STM32MP251CAL3, STM32MP251DAI3, STM32MP251DAK3, STM32MP251DAL3, STM32MP251FAI3, STM32MP251FAK3, STM32MP251FAL3, STM32MP253AAI3, STM32MP253AAK3, STM32MP253AAL3, STM32MP253CAI3, STM32MP253CAK3, STM32MP253CAL3, STM32MP253DAI3, STM32MP253DAK3, STM32MP253DAL3, STM32MP253FAI3, STM32MP253FAK3, STM32MP253FAL3, STM32MP255AAI3, STM32MP255AAK3, STM32MP255AAL3, STM32MP255CAI3, STM32MP255CAK3, STM32MP255CAL3, STM32MP255DAI3, STM32MP255DAK3, STM32MP255DAL3, STM32MP255FAI3, STM32MP255FAK3, STM32MP255FAL3, STM32MP257AAI3, STM32MP257AAK3, STM32MP257AAL3, STM32MP257CAI3, STM32MP257CAK3, STM32MP257CAL3, STM32MP257DAI3, STM32MP257DAK3, STM32MP257DAL3, STM32MP257F-DK, STM32MP257F-EV1, STM32MP257FAI3, STM32MP257FAK3, STM32MP257FAL3, STM32N645A0H3Q, STM32N645B0H3Q, STM32N645I0H3Q, STM32N645L0H3Q, STM32N645X0H3Q, STM32N645Z0H3Q, STM32N647A0H3Q, STM32N647B0H3Q, STM32N647I0H3Q, STM32N647L0H3Q, STM32N647X0H3Q, STM32N647Z0H3Q, STM32N655A0H3Q, STM32N655B0H3Q, STM32N655I0H3Q, STM32N655L0H3Q, STM32N655X0H3Q, STM32N655Z0H3Q, STM32N6570-DK, STM32N657A0H3Q, STM32N657B0H3Q, STM32N657I0H3Q, STM32N657L0H3Q, STM32N657X0H3Q, STM32N657Z0H3Q, STM32U031C6T6, STM32U031C6U6, STM32U031C8T6, STM32U031C8U6, STM32U031F4P6, STM32U031F6P6, STM32U031F8P6, STM32U031G6Y6TR, STM32U031G8Y6TR, STM32U031K4U6, STM32U031K6U6, STM32U031K8U6, STM32U031R6I6, STM32U031R6T6, STM32U031R8I6, STM32U031R8T6, STM32U073C8T6, STM32U073C8U6, STM32U073CBT6, STM32U073CBU6, STM32U073CCT6, STM32U073CCU6, STM32U073H8Y6TR, STM32U073HBY6TR, STM32U073HCY6TR, STM32U073K8U6, STM32U073KBU6, STM32U073KCU6, STM32U073M8I6, STM32U073M8T6, STM32U073MBI6, STM32U073MBT6, STM32U073MCI6, STM32U073MCT6, STM32U073R8I6, STM32U073R8T6, STM32U073RBI6, STM32U073RBT6, STM32U073RCI6, STM32U073RCT6, STM32U083C-DK, STM32U083CCT6, STM32U083CCU6, STM32U083HCY6TR, STM32U083KCU6, STM32U083MCI6, STM32U083MCT6, STM32U083RCI6, STM32U083RCT6, STM32U375CET6, STM32U375CET6Q, STM32U375CEU6, STM32U375CEU6Q, STM32U375CEY6QTR, STM32U375CGT6, STM32U375CGT6Q, STM32U375CGU6, STM32U375CGU6Q, STM32U375CGY6QTR, STM32U375KEU6, STM32U375KGU6, STM32U375REI6, STM32U375REI6Q, STM32U375RET6, STM32U375RET6Q, STM32U375REY6GTR, STM32U375REY6QTR, STM32U375RGI6, STM32U375RGI6Q, STM32U375RGT6, STM32U375RGT6Q, STM32U375RGY6GTR, STM32U375RGY6QTR, STM32U375VEI6, STM32U375VEI6Q, STM32U375VET6, STM32U375VET6Q, STM32U375VGI6, STM32U375VGI6Q, STM32U375VGT6, STM32U375VGT6Q, STM32U385CGT6, STM32U385CGT6Q, STM32U385CGU6, STM32U385CGU6Q, STM32U385CGY6QTR, STM32U385KGU6, STM32U385RGI6, STM32U385RGI6Q, STM32U385RGT6, STM32U385RGT6Q, STM32U385RGY6GTR, STM32U385RGY6QTR, STM32U385VGI6, STM32U385VGI6Q, STM32U385VGT6, STM32U385VGT6Q, STM32U535CBT6, STM32U535CBT6Q, STM32U535CBU6, STM32U535CBU6Q, STM32U535CCT6, STM32U535CCT6Q, STM32U535CCU6, STM32U535CCU6Q, STM32U535CET6, STM32U535CET6Q, STM32U535CEU6, STM32U535CEU6Q, STM32U535JEY6QTR, STM32U535NCY6QTR, STM32U535NEY6QTR, STM32U535RBI6, STM32U535RBI6Q, STM32U535RBT6, STM32U535RBT6Q, STM32U535RCI6, STM32U535RCI6Q, STM32U535RCT6, STM32U535RCT6Q, STM32U535REI6, STM32U535REI6Q, STM32U535RET6, STM32U535RET6Q, STM32U535VCI6, STM32U535VCI6Q, STM32U535VCT6, STM32U535VCT6Q, STM32U535VEI6, STM32U535VEI6Q, STM32U535VET6, STM32U535VET6Q, STM32U545CET6, STM32U545CET6Q, STM32U545CEU6, STM32U545CEU6Q, STM32U545JEY6QTR, STM32U545NEY6QTR, STM32U545REI6, STM32U545REI6Q, STM32U545RET6, STM32U545RET6Q, STM32U545VEI6, STM32U545VEI6Q, STM32U545VET6, STM32U545VET6Q, STM32U595AIH6, STM32U595AIH6Q, STM32U595AJH6, STM32U595AJH6Q, STM32U595QII6, STM32U595QII6Q, STM32U595QJI6, STM32U595QJI6Q, STM32U595RIT6, STM32U595RIT6Q, STM32U595RJT6, STM32U595RJT6Q, STM32U595VIT6, STM32U595VIT6Q, STM32U595VJT6, STM32U595VJT6Q, STM32U595ZIT6, STM32U595ZIT6Q, STM32U595ZIY6QTR, STM32U595ZJT6, STM32U595ZJT6Q, STM32U595ZJY6QTR, STM32U599BJY6QTR, STM32U599NIH6Q, STM32U599NJH6Q, STM32U599VIT6Q, STM32U599VJT6, STM32U599VJT6Q, STM32U599ZIT6Q, STM32U599ZIY6QTR, STM32U599ZJT6Q, STM32U599ZJY6QTR, STM32U5A5AJH6, STM32U5A5AJH6Q, STM32U5A5QII3Q , STM32U5A5QJI6, STM32U5A5QJI6Q, STM32U5A5RJT6, STM32U5A5RJT6Q, STM32U5A5VJT6, STM32U5A5VJT6Q, STM32U5A5ZJT6, STM32U5A5ZJT6Q, STM32U5A5ZJY6QTR, STM32U5A9BJY6QTR, STM32U5A9J-DK, STM32U5A9NJH6Q, STM32U5A9VJT6Q, STM32U5A9ZJT6Q, STM32U5A9ZJY6QTR, STM32U5F7VIT6, STM32U5F7VIT6Q, STM32U5F7VJT6, STM32U5F7VJT6Q, STM32U5F9BJY6QTR, STM32U5F9NJH6Q, STM32U5F9VIT6Q, STM32U5F9VJT6Q, STM32U5F9ZIJ6QTR, STM32U5F9ZIT6Q, STM32U5F9ZJJ6QTR, STM32U5F9ZJT6Q, STM32U5G7VJT6, STM32U5G7VJT6Q, STM32U5G9BJY6QTR, STM32U5G9J-DK1, STM32U5G9J-DK2, STM32U5G9NJH6Q, STM32U5G9VJT6Q, STM32U5G9ZJJ6QTR, STM32U5G9ZJT6Q, STM32WB05KZV6TR, STM32WB05KZV7TR, STM32WB05TZF6TR, STM32WB05TZF7TR, STM32WB06CCF6TR, STM32WB06CCF7TR, STM32WB06CCV6TR, STM32WB06CCV7TR, STM32WB06KCV6TR, STM32WB06KCV7TR, STM32WB07CCF6TR, STM32WB07CCF7TR, STM32WB07CCV6TR, STM32WB07CCV7TR, STM32WB07KCV6TR, STM32WB07KCV7TR, STM32WB09KEV6TR, STM32WB09KEV7TR, STM32WB09TEF6TR, STM32WB09TEF7TR, STM32WB1MMCH6, STM32WBA50KGU6, STM32WBA50KGU6TR, STM32WBA52CEU6, STM32WBA52CEU6TR, STM32WBA52CEU7, STM32WBA52CEU7TR, STM32WBA52CGU6, STM32WBA52CGU6TR, STM32WBA52CGU6U, STM32WBA52CGU7, STM32WBA52CGU7TR, STM32WBA52KEU6, STM32WBA52KEU6TR, STM32WBA52KGU6, STM32WBA52KGU6TR, STM32WBA54CEU6, STM32WBA54CEU6TR, STM32WBA54CEU7, STM32WBA54CEU7TR, STM32WBA54CGU6, STM32WBA54CGU6TR, STM32WBA54CGU7, STM32WBA54CGU7TR, STM32WBA54KEU6, STM32WBA54KEU6TR, STM32WBA54KEU7, STM32WBA54KEU7TR, STM32WBA54KGU6, STM32WBA54KGU6TR, STM32WBA54KGU7, STM32WBA54KGU7TR, STM32WBA55CEU6, STM32WBA55CEU6TR, STM32WBA55CEU7, STM32WBA55CEU7TR, STM32WBA55CGU6, STM32WBA55CGU6TR, STM32WBA55CGU6U, STM32WBA55CGU7, STM32WBA55CGU7TR, STM32WBA55G-DK1, STM32WBA55HEF6, STM32WBA55HEF7, STM32WBA55HGF6, STM32WBA55HGF7, STM32WBA55UEI6, STM32WBA55UEI6TR, STM32WBA55UEI7, STM32WBA55UEI7TR, STM32WBA55UGI6, STM32WBA55UGI6TR, STM32WBA55UGI7, STM32WBA55UGI7TR, STM32WBA5MMGH6TR, STM32WBA62MGF6, STM32WBA62MIF6, STM32WBA65MGF7, STM32WBA65MIF6, STM32WBA65MIF7, STM32WL30K8V6, STM32WL30KBV6, STM32WL31C8V6, STM32WL31CBV6, STM32WL31K8V6, STM32WL31KBV6, STM32WL33C8V6, STM32WL33C8V6X, STM32WL33CBV6, STM32WL33CBV6X, STM32WL33CCV6, STM32WL33CCV6A, STM32WL33CCV6X, STM32WL33K8V7, STM32WL33K8V7X, STM32WL33KBV7 , STM32WL33KBV7X, STM32WL33KCV7, STM32WL33KCV7X, STM32WL5MOCH6, STM32WL5MOCH6TR]
+2025-10-13 15:08:01,509 [INFO] DbMcus:218 - Found 4801 MCUs, 4801 are supported
+2025-10-13 15:08:01,509 [INFO] ApiDb:423 - Load user favorites file /home/ja/.stm32cubeide/favorites.mcus.txt: 0 item(s)
+2025-10-13 15:08:01,509 [INFO] ApiDb:427 - User favorites MCUs=[]
+2025-10-13 15:08:01,509 [INFO] DbMcus:224 - Set 0 / 0 favorites MCUs
+2025-10-13 15:08:01,905 [INFO] ApiDb:448 - Save user favorites file /home/ja/.stm32cubeide/favorites.boards.txt: 1 item(s)
+2025-10-13 15:08:01,906 [INFO] ApiDb:452 - User favorites Boards=[STM32F429I-DISC1]
+2025-10-13 15:08:01,906 [INFO] ApiDb:581 - Connected to CubeFinder SQLite database (/home/ja/.stmcufinder/plugins/mcufinder/mcu/cube-finder-db.db)
+2025-10-13 15:08:01,942 [INFO] ApiDb:668 - CubeFinder database Data Model version=2.1
+2025-10-13 15:08:01,942 [INFO] ApiDb:669 - CubeFinder database Configuration version=3.0.39
+2025-10-13 15:08:01,942 [INFO] ApiDb:670 - CubeFinder database generation date=2025-08-25 (1756130511)
+2025-10-13 15:08:01,942 [INFO] ApiDb:671 - CubeFinder database FW Pack versions=[FP-ATR-ASTRA1_V2.0.0, FP-SNS-FLIGHT1_V5.1.0, FP-SNS-MOTENV1_V5.0.0, FP-SNS-MOTENVWB1_V1.4.0, FP-SNS-SMARTAG2_V1.2.0, FP-SNS-STBOX1_V2.1.0, STM32Cube_FW_C0_V1.4.0, STM32Cube_FW_F4_V1.28.3, STM32Cube_FW_F7_V1.17.4, STM32Cube_FW_G0_V1.6.2, STM32Cube_FW_G4_V1.6.1, STM32Cube_FW_H5_V1.5.0, STM32Cube_FW_H7RS_V1.2.0, STM32Cube_FW_H7_V1.12.1, STM32Cube_FW_L0_V1.12.2, STM32Cube_FW_L4_V1.18.1, STM32Cube_FW_L5_V1.5.1, STM32Cube_FW_N6_V1.2.0, STM32Cube_FW_U0_V1.3.0, STM32Cube_FW_U3_V1.2.0, STM32Cube_FW_U5_V1.8.0, STM32Cube_FW_WB0_V1.3.0, STM32Cube_FW_WBA_V1.7.0, STM32Cube_FW_WB_V1.23.0, STM32Cube_FW_WL3_V1.2.0, STM32Cube_FW_WL_V1.3.1, X-CUBE-ALGOBUILD_V1.4.0, X-CUBE-ALS_V1.0.2, X-CUBE-AZRTOS-F4_V1.1.0, X-CUBE-AZRTOS-F7_V1.1.0, X-CUBE-AZRTOS-G0_V1.1.0, X-CUBE-AZRTOS-G4_V2.0.0, X-CUBE-AZRTOS-H7RS_V1.1.0, X-CUBE-AZRTOS-H7_V3.4.0, X-CUBE-AZRTOS-L4_V2.0.0, X-CUBE-AZRTOS-L5_V2.0.0, X-CUBE-AZRTOS-WB_V2.0.0, X-CUBE-AZRTOS-WL_V2.0.0, X-CUBE-BLE1_V7.1.0, X-CUBE-BLE2_V3.3.0, X-CUBE-BLEMGR_V4.1.0, X-CUBE-EEPRMA1_V5.2.0, X-CUBE-FREERTOS_V1.3.1, X-CUBE-GNSS1_V6.0.0, X-CUBE-MEMS1_V11.3.0, X-CUBE-NFC4_V3.0.0, X-CUBE-NFC7_V2.0.0, X-CUBE-SFXS2LP1_V4.0.0, X-CUBE-ST67W61_V1.0.0, X-CUBE-SUBG2_V5.0.0, X-CUBE-TOF1_V3.4.3]
+2025-10-13 15:08:01,980 [INFO] DbBoardsSqlite:226 - include board P-NUCLEO-WB55-NUCLEO as a kit item of type 'Nucleo-64'
+2025-10-13 15:08:01,980 [INFO] DbBoardsSqlite:226 - include board P-NUCLEO-WB55-USBDONGLE as a kit item of type 'Nucleo USB Dongle'
+2025-10-13 15:08:01,981 [INFO] DbBoardsSqlite:226 - include board STEVAL-IDP005V1 as a kit item of type 'Evaluation Board'
+2025-10-13 15:08:01,981 [INFO] DbBoardsSqlite:226 - include board STEVAL-IDP005V2 as a kit item of type 'Evaluation Board'
+2025-10-13 15:08:02,013 [INFO] ApiDb:240 - Found 880 in-development CPN: [B-G473E-ZEST1S, B-WB1M-WPAN1, B-WBA5M-WPAN, B-WL5M-SUBG1, NUCLEO-C031C6, NUCLEO-C051C8, NUCLEO-C071RB, NUCLEO-C092RC, NUCLEO-H503RB, NUCLEO-H533RE, NUCLEO-H563ZI, NUCLEO-H7S3L8, NUCLEO-N657X0-Q, NUCLEO-U031R8, NUCLEO-U083RC, NUCLEO-U385RG-Q, NUCLEO-U545RE-Q, NUCLEO-U5A5ZJ-Q, NUCLEO-WB05KZ, NUCLEO-WB07CC, NUCLEO-WB09KE, NUCLEO-WBA52CG, NUCLEO-WBA55CG, NUCLEO-WL33CC1, NUCLEO-WL33CC2, STEVAL-PROTEUS1, STEVAL-SMARTAG2, STEVAL-STWINBX1, STM320518-EVAL, STM32C0116-DK, STM32C011D6Y3TR, STM32C011D6Y6TR, STM32C011F4P3, STM32C011F4P6, STM32C011F4U3, STM32C011F4U6TR, STM32C011F6P3, STM32C011F6P6, STM32C011F6U3, STM32C011F6U6TR, STM32C011J4M3, STM32C011J4M6, STM32C011J6M3, STM32C011J6M6, STM32C0316-DK, STM32C031C4T3, STM32C031C4T6, STM32C031C4U3, STM32C031C4U6, STM32C031C6T3, STM32C031C6T6, STM32C031C6U3, STM32C031C6U6, STM32C031F4P3, STM32C031F4P6, STM32C031F6P3, STM32C031F6P6, STM32C031G4U3, STM32C031G4U6, STM32C031G6U3, STM32C031G6U6, STM32C031K4T3, STM32C031K4T6, STM32C031K4U3, STM32C031K4U6, STM32C031K6T3, STM32C031K6T6, STM32C031K6U3, STM32C031K6U6, STM32C051C6T6, STM32C051C6U6, STM32C051C8T6, STM32C051C8U6, STM32C051D8Y6TR, STM32C051F6P6, STM32C051F8P6, STM32C051G6U6, STM32C051G8U6, STM32C051K6T6, STM32C051K6U6, STM32C051K8T6, STM32C071C8T6, STM32C071C8T6N, STM32C071C8U6, STM32C071C8U6N, STM32C071CBT6, STM32C071CBT6N, STM32C071CBU6, STM32C071CBU6N, STM32C071F8P6, STM32C071F8P6N, STM32C071FBP6, STM32C071FBP6N, STM32C071FBY6TR, STM32C071G8U6, STM32C071G8U6N, STM32C071GBU6, STM32C071GBU6N, STM32C071K8T6, STM32C071K8T6N, STM32C071K8U6, STM32C071K8U6N, STM32C071KBT6, STM32C071KBT6N, STM32C071KBU6, STM32C071KBU6N, STM32C071R8T6, STM32C071R8T6N, STM32C071RBI6N, STM32C071RBT6, STM32C071RBT6N, STM32C091CBT6, STM32C091CBU6, STM32C091CCT6, STM32C091CCU6, STM32C091ECY6TR, STM32C091FBP6, STM32C091FCP6, STM32C091GBU6, STM32C091GCU6, STM32C091KBT6, STM32C091KBU6, STM32C091KCT6, STM32C091KCU6, STM32C091RBT6, STM32C091RCI6, STM32C091RCT6, STM32C092CBT6, STM32C092CBU6, STM32C092CCT6, STM32C092CCU6, STM32C092ECY6TR, STM32C092FBP6, STM32C092FCP6, STM32C092GBU6, STM32C092GCU6, STM32C092KBT6, STM32C092KBU6, STM32C092KCT6, STM32C092KCU6, STM32C092RBT6, STM32C092RCI6, STM32C092RCT6, STM32G071K8TXN, STM32G071K8UXN, STM32G081GBU6N, STM32G081KBT6N, STM32G081KBUXN, STM32G0B1CCT6N, STM32G0B1KCT6, STM32G0B1NEY6TR, STM32G0B1RCT6N, STM32G0C1CCT6, STM32G0C1CCT6N, STM32G0C1CCU6N, STM32G0C1CET6N, STM32G0C1CEU6N, STM32G0C1KCT6, STM32G0C1NEY6TR, STM32G0C1RCI6N, STM32G0C1RCT6N, STM32G0C1REI6N, STM32G0C1RET6N, STM32G0C1VCI6, STM32G0C1VEI6, STM32G411C6T3, STM32G411C6T6, STM32G411C6U3, STM32G411C6U6, STM32G411C8T3, STM32G411C8T6, STM32G411C8U3, STM32G411C8U6, STM32G411CBT3, STM32G411CBT6, STM32G411CBU3, STM32G411CBU6, STM32G411K6T3, STM32G411K6T6, STM32G411K6U3, STM32G411K6U6, STM32G411K8T3, STM32G411K8T6, STM32G411K8U3, STM32G411K8U6, STM32G411KBT3, STM32G411KBT6, STM32G411KBU3, STM32G411KBU6, STM32G411M6T3, STM32G411M6T6, STM32G411M8T3, STM32G411M8T6, STM32G411MBT3, STM32G411MBT6, STM32G411R6T3, STM32G411R6T6, STM32G411R8T3, STM32G411R8T6, STM32G411RBT3, STM32G411RBT6, STM32G414CBT3, STM32G414CBT6, STM32G414CBU3, STM32G414CBU6, STM32G414CCT3, STM32G414CCT6, STM32G414CCU3, STM32G414CCU6, STM32G414MBT3, STM32G414MBT6, STM32G414MCT3, STM32G414MCT6, STM32G414RBT3, STM32G414RBT6, STM32G414RCT3, STM32G414RCT6, STM32G414VBT3, STM32G414VBT6, STM32G414VCT3, STM32G414VCT6, STM32G431CBT3Z, STM32G431RBT3Z, STM32G471CCT6, STM32G471CCU6, STM32G471CET3, STM32G471CET6, STM32G471CEU3, STM32G471CEU6, STM32G471MCT6, STM32G471MET3, STM32G471MET6, STM32G471MEY6TR, STM32G471QCT6, STM32G471QET3, STM32G471RCT6, STM32G471RET3, STM32G471RET6, STM32G471VCH6, STM32G471VCI6, STM32G471VCT6, STM32G471VEH3, STM32G471VEH6, STM32G471VEI3, STM32G471VEI6, STM32G471VET3, STM32G471VET6, STM32G473QET3Z, STM32G473RET3Z, STM32G474CCT6, STM32G491RET3Z, STM32H503CBT6, STM32H503CBU6, STM32H503EBY6TR, STM32H503KBU6, STM32H503RBT6, STM32H523CCT6, STM32H523CCU6, STM32H523CET6, STM32H523CEU6, STM32H523HEY6TR, STM32H523RCT6, STM32H523RET6, STM32H523VCI6, STM32H523VCT6, STM32H523VEI6, STM32H523VET6, STM32H523ZCJ6, STM32H523ZCT6, STM32H523ZEJ6, STM32H523ZET6, STM32H533CET6, STM32H533CEU6, STM32H533HEY6TR, STM32H533RET6, STM32H533VEI6, STM32H533VET6, STM32H533ZEJ6, STM32H533ZET6, STM32H562AGI6, STM32H562AII6, STM32H562IGK6, STM32H562IGT6, STM32H562IIK6, STM32H562IIT6, STM32H562RGT6, STM32H562RGV6, STM32H562RIT6, STM32H562RIV6, STM32H562VGT6, STM32H562VIT6, STM32H562ZGT6, STM32H562ZIT6, STM32H563AGI6, STM32H563AII3Q, STM32H563AII6, STM32H563IGK6, STM32H563IGT6, STM32H563IIK3Q, STM32H563IIK6, STM32H563IIT3Q, STM32H563IIT6, STM32H563MIY3QTR, STM32H563RGT6, STM32H563RGV6, STM32H563RIT6, STM32H563RIV6, STM32H563VGT6, STM32H563VIT3Q, STM32H563VIT6, STM32H563ZGT6, STM32H563ZIT3Q, STM32H563ZIT6, STM32H573AII3Q, STM32H573AII6, STM32H573I-DK, STM32H573IIK3Q, STM32H573IIK6, STM32H573IIT3Q, STM32H573IIT6, STM32H573MIY3QTR, STM32H573RIT6, STM32H573RIV6, STM32H573VIT3Q, STM32H573VIT6, STM32H573ZIT3Q, STM32H573ZIT6, STM32H7R3A8I6, STM32H7R3I8K6, STM32H7R3I8T6, STM32H7R3L8H6, STM32H7R3L8H6H, STM32H7R3R8V6, STM32H7R3V8H6, STM32H7R3V8T6, STM32H7R3V8Y6TR, STM32H7R3Z8J6, STM32H7R3Z8T6, STM32H7R7A8I6, STM32H7R7I8K6, STM32H7R7I8T6, STM32H7R7L8H6, STM32H7R7L8H6H, STM32H7R7Z8J6, STM32H7S3A8I6, STM32H7S3I8K6, STM32H7S3I8T6, STM32H7S3L8H6, STM32H7S3L8H6H, STM32H7S3R8V6, STM32H7S3V8H6, STM32H7S3V8T6, STM32H7S3V8Y6TR, STM32H7S3Z8J6, STM32H7S3Z8T6, STM32H7S78-DK, STM32H7S7A8I6, STM32H7S7I8K6, STM32H7S7I8T6, STM32H7S7L8H6, STM32H7S7L8H6H, STM32H7S7Z8J6, STM32L4R5QGI6STR, STM32MP131AAE3, STM32MP131AAF3, STM32MP131AAG3, STM32MP131CAE3, STM32MP131CAF3, STM32MP131CAG3, STM32MP131DAE7, STM32MP131DAF7, STM32MP131DAG7, STM32MP131FAE7, STM32MP131FAF7, STM32MP131FAG7, STM32MP133AAE3, STM32MP133AAF3, STM32MP133AAG3, STM32MP133CAE3, STM32MP133CAF3, STM32MP133CAG3, STM32MP133DAE7, STM32MP133DAF7, STM32MP133DAG7, STM32MP133FAE7, STM32MP133FAF7, STM32MP133FAG7, STM32MP135AAE3, STM32MP135AAF3, STM32MP135AAG3, STM32MP135CAE3, STM32MP135CAF3, STM32MP135CAG3, STM32MP135DAE7, STM32MP135DAF7, STM32MP135DAG7, STM32MP135F-DK, STM32MP135FAE7, STM32MP135FAF7, STM32MP135FAF7T, STM32MP135FAF7U, STM32MP135FAG7, STM32MP211AAL3, STM32MP211AAM3, STM32MP211AAN3, STM32MP211AAO3, STM32MP211CAL3, STM32MP211CAM3, STM32MP211CAN3, STM32MP211CAO3, STM32MP211DAL3, STM32MP211DAM3, STM32MP211DAN3, STM32MP211DAO3, STM32MP211FAL3, STM32MP211FAM3, STM32MP211FAN3, STM32MP211FAO3, STM32MP213AAL3, STM32MP213AAM3, STM32MP213AAN3, STM32MP213AAO3, STM32MP213CAL3, STM32MP213CAM3, STM32MP213CAN3, STM32MP213CAO3, STM32MP213DAL3, STM32MP213DAM3, STM32MP213DAN3, STM32MP213DAO3, STM32MP213FAL3, STM32MP213FAM3, STM32MP213FAN3, STM32MP213FAO3, STM32MP215AAL3, STM32MP215AAM3, STM32MP215AAN3, STM32MP215AAO3, STM32MP215CAL3, STM32MP215CAM3, STM32MP215CAN3, STM32MP215CAO3, STM32MP215DAL3, STM32MP215DAM3, STM32MP215DAN3, STM32MP215DAO3, STM32MP215F-DK, STM32MP215FAL3, STM32MP215FAM3, STM32MP215FAN3, STM32MP215FAO3, STM32MP231AAJ3, STM32MP231AAK3, STM32MP231AAL3, STM32MP231CAJ3, STM32MP231CAK3, STM32MP231CAL3, STM32MP231DAJ3, STM32MP231DAK3, STM32MP231DAL3, STM32MP231FAJ3, STM32MP231FAK3, STM32MP231FAL3, STM32MP233AAJ3, STM32MP233AAK3, STM32MP233AAL3, STM32MP233CAJ3, STM32MP233CAK3, STM32MP233CAL3, STM32MP233DAJ3, STM32MP233DAK3, STM32MP233DAL3, STM32MP233FAJ3, STM32MP233FAK3, STM32MP233FAL3, STM32MP235AAJ3, STM32MP235AAK3, STM32MP235AAL3, STM32MP235CAJ3, STM32MP235CAK3, STM32MP235CAL3, STM32MP235DAJ3, STM32MP235DAK3, STM32MP235DAL3, STM32MP235FAJ3, STM32MP235FAK3, STM32MP235FAL3, STM32MP251AAI3, STM32MP251AAK3, STM32MP251AAL3, STM32MP251CAI3, STM32MP251CAK3, STM32MP251CAL3, STM32MP251DAI3, STM32MP251DAK3, STM32MP251DAL3, STM32MP251FAI3, STM32MP251FAK3, STM32MP251FAL3, STM32MP253AAI3, STM32MP253AAK3, STM32MP253AAL3, STM32MP253CAI3, STM32MP253CAK3, STM32MP253CAL3, STM32MP253DAI3, STM32MP253DAK3, STM32MP253DAL3, STM32MP253FAI3, STM32MP253FAK3, STM32MP253FAL3, STM32MP255AAI3, STM32MP255AAK3, STM32MP255AAL3, STM32MP255CAI3, STM32MP255CAK3, STM32MP255CAL3, STM32MP255DAI3, STM32MP255DAK3, STM32MP255DAL3, STM32MP255FAI3, STM32MP255FAK3, STM32MP255FAL3, STM32MP257AAI3, STM32MP257AAK3, STM32MP257AAL3, STM32MP257CAI3, STM32MP257CAK3, STM32MP257CAL3, STM32MP257DAI3, STM32MP257DAK3, STM32MP257DAL3, STM32MP257F-DK, STM32MP257F-EV1, STM32MP257FAI3, STM32MP257FAK3, STM32MP257FAL3, STM32N645A0H3Q, STM32N645B0H3Q, STM32N645I0H3Q, STM32N645L0H3Q, STM32N645X0H3Q, STM32N645Z0H3Q, STM32N647A0H3Q, STM32N647B0H3Q, STM32N647I0H3Q, STM32N647L0H3Q, STM32N647X0H3Q, STM32N647Z0H3Q, STM32N655A0H3Q, STM32N655B0H3Q, STM32N655I0H3Q, STM32N655L0H3Q, STM32N655X0H3Q, STM32N655Z0H3Q, STM32N6570-DK, STM32N657A0H3Q, STM32N657B0H3Q, STM32N657I0H3Q, STM32N657L0H3Q, STM32N657X0H3Q, STM32N657Z0H3Q, STM32U031C6T6, STM32U031C6U6, STM32U031C8T6, STM32U031C8U6, STM32U031F4P6, STM32U031F6P6, STM32U031F8P6, STM32U031G6Y6TR, STM32U031G8Y6TR, STM32U031K4U6, STM32U031K6U6, STM32U031K8U6, STM32U031R6I6, STM32U031R6T6, STM32U031R8I6, STM32U031R8T6, STM32U073C8T6, STM32U073C8U6, STM32U073CBT6, STM32U073CBU6, STM32U073CCT6, STM32U073CCU6, STM32U073H8Y6TR, STM32U073HBY6TR, STM32U073HCY6TR, STM32U073K8U6, STM32U073KBU6, STM32U073KCU6, STM32U073M8I6, STM32U073M8T6, STM32U073MBI6, STM32U073MBT6, STM32U073MCI6, STM32U073MCT6, STM32U073R8I6, STM32U073R8T6, STM32U073RBI6, STM32U073RBT6, STM32U073RCI6, STM32U073RCT6, STM32U083C-DK, STM32U083CCT6, STM32U083CCU6, STM32U083HCY6TR, STM32U083KCU6, STM32U083MCI6, STM32U083MCT6, STM32U083RCI6, STM32U083RCT6, STM32U375CET6, STM32U375CET6Q, STM32U375CEU6, STM32U375CEU6Q, STM32U375CEY6QTR, STM32U375CGT6, STM32U375CGT6Q, STM32U375CGU6, STM32U375CGU6Q, STM32U375CGY6QTR, STM32U375KEU6, STM32U375KGU6, STM32U375REI6, STM32U375REI6Q, STM32U375RET6, STM32U375RET6Q, STM32U375REY6GTR, STM32U375REY6QTR, STM32U375RGI6, STM32U375RGI6Q, STM32U375RGT6, STM32U375RGT6Q, STM32U375RGY6GTR, STM32U375RGY6QTR, STM32U375VEI6, STM32U375VEI6Q, STM32U375VET6, STM32U375VET6Q, STM32U375VGI6, STM32U375VGI6Q, STM32U375VGT6, STM32U375VGT6Q, STM32U385CGT6, STM32U385CGT6Q, STM32U385CGU6, STM32U385CGU6Q, STM32U385CGY6QTR, STM32U385KGU6, STM32U385RGI6, STM32U385RGI6Q, STM32U385RGT6, STM32U385RGT6Q, STM32U385RGY6GTR, STM32U385RGY6QTR, STM32U385VGI6, STM32U385VGI6Q, STM32U385VGT6, STM32U385VGT6Q, STM32U535CBT6, STM32U535CBT6Q, STM32U535CBU6, STM32U535CBU6Q, STM32U535CCT6, STM32U535CCT6Q, STM32U535CCU6, STM32U535CCU6Q, STM32U535CET6, STM32U535CET6Q, STM32U535CEU6, STM32U535CEU6Q, STM32U535JEY6QTR, STM32U535NCY6QTR, STM32U535NEY6QTR, STM32U535RBI6, STM32U535RBI6Q, STM32U535RBT6, STM32U535RBT6Q, STM32U535RCI6, STM32U535RCI6Q, STM32U535RCT6, STM32U535RCT6Q, STM32U535REI6, STM32U535REI6Q, STM32U535RET6, STM32U535RET6Q, STM32U535VCI6, STM32U535VCI6Q, STM32U535VCT6, STM32U535VCT6Q, STM32U535VEI6, STM32U535VEI6Q, STM32U535VET6, STM32U535VET6Q, STM32U545CET6, STM32U545CET6Q, STM32U545CEU6, STM32U545CEU6Q, STM32U545JEY6QTR, STM32U545NEY6QTR, STM32U545REI6, STM32U545REI6Q, STM32U545RET6, STM32U545RET6Q, STM32U545VEI6, STM32U545VEI6Q, STM32U545VET6, STM32U545VET6Q, STM32U595AIH6, STM32U595AIH6Q, STM32U595AJH6, STM32U595AJH6Q, STM32U595QII6, STM32U595QII6Q, STM32U595QJI6, STM32U595QJI6Q, STM32U595RIT6, STM32U595RIT6Q, STM32U595RJT6, STM32U595RJT6Q, STM32U595VIT6, STM32U595VIT6Q, STM32U595VJT6, STM32U595VJT6Q, STM32U595ZIT6, STM32U595ZIT6Q, STM32U595ZIY6QTR, STM32U595ZJT6, STM32U595ZJT6Q, STM32U595ZJY6QTR, STM32U599BJY6QTR, STM32U599NIH6Q, STM32U599NJH6Q, STM32U599VIT6Q, STM32U599VJT6, STM32U599VJT6Q, STM32U599ZIT6Q, STM32U599ZIY6QTR, STM32U599ZJT6Q, STM32U599ZJY6QTR, STM32U5A5AJH6, STM32U5A5AJH6Q, STM32U5A5QII3Q , STM32U5A5QJI6, STM32U5A5QJI6Q, STM32U5A5RJT6, STM32U5A5RJT6Q, STM32U5A5VJT6, STM32U5A5VJT6Q, STM32U5A5ZJT6, STM32U5A5ZJT6Q, STM32U5A5ZJY6QTR, STM32U5A9BJY6QTR, STM32U5A9J-DK, STM32U5A9NJH6Q, STM32U5A9VJT6Q, STM32U5A9ZJT6Q, STM32U5A9ZJY6QTR, STM32U5F7VIT6, STM32U5F7VIT6Q, STM32U5F7VJT6, STM32U5F7VJT6Q, STM32U5F9BJY6QTR, STM32U5F9NJH6Q, STM32U5F9VIT6Q, STM32U5F9VJT6Q, STM32U5F9ZIJ6QTR, STM32U5F9ZIT6Q, STM32U5F9ZJJ6QTR, STM32U5F9ZJT6Q, STM32U5G7VJT6, STM32U5G7VJT6Q, STM32U5G9BJY6QTR, STM32U5G9J-DK1, STM32U5G9J-DK2, STM32U5G9NJH6Q, STM32U5G9VJT6Q, STM32U5G9ZJJ6QTR, STM32U5G9ZJT6Q, STM32WB05KZV6TR, STM32WB05KZV7TR, STM32WB05TZF6TR, STM32WB05TZF7TR, STM32WB06CCF6TR, STM32WB06CCF7TR, STM32WB06CCV6TR, STM32WB06CCV7TR, STM32WB06KCV6TR, STM32WB06KCV7TR, STM32WB07CCF6TR, STM32WB07CCF7TR, STM32WB07CCV6TR, STM32WB07CCV7TR, STM32WB07KCV6TR, STM32WB07KCV7TR, STM32WB09KEV6TR, STM32WB09KEV7TR, STM32WB09TEF6TR, STM32WB09TEF7TR, STM32WB1MMCH6, STM32WBA50KGU6, STM32WBA50KGU6TR, STM32WBA52CEU6, STM32WBA52CEU6TR, STM32WBA52CEU7, STM32WBA52CEU7TR, STM32WBA52CGU6, STM32WBA52CGU6TR, STM32WBA52CGU6U, STM32WBA52CGU7, STM32WBA52CGU7TR, STM32WBA52KEU6, STM32WBA52KEU6TR, STM32WBA52KGU6, STM32WBA52KGU6TR, STM32WBA54CEU6, STM32WBA54CEU6TR, STM32WBA54CEU7, STM32WBA54CEU7TR, STM32WBA54CGU6, STM32WBA54CGU6TR, STM32WBA54CGU7, STM32WBA54CGU7TR, STM32WBA54KEU6, STM32WBA54KEU6TR, STM32WBA54KEU7, STM32WBA54KEU7TR, STM32WBA54KGU6, STM32WBA54KGU6TR, STM32WBA54KGU7, STM32WBA54KGU7TR, STM32WBA55CEU6, STM32WBA55CEU6TR, STM32WBA55CEU7, STM32WBA55CEU7TR, STM32WBA55CGU6, STM32WBA55CGU6TR, STM32WBA55CGU6U, STM32WBA55CGU7, STM32WBA55CGU7TR, STM32WBA55G-DK1, STM32WBA55HEF6, STM32WBA55HEF7, STM32WBA55HGF6, STM32WBA55HGF7, STM32WBA55UEI6, STM32WBA55UEI6TR, STM32WBA55UEI7, STM32WBA55UEI7TR, STM32WBA55UGI6, STM32WBA55UGI6TR, STM32WBA55UGI7, STM32WBA55UGI7TR, STM32WBA5MMGH6TR, STM32WBA62MGF6, STM32WBA62MIF6, STM32WBA65MGF7, STM32WBA65MIF6, STM32WBA65MIF7, STM32WL30K8V6, STM32WL30KBV6, STM32WL31C8V6, STM32WL31CBV6, STM32WL31K8V6, STM32WL31KBV6, STM32WL33C8V6, STM32WL33C8V6X, STM32WL33CBV6, STM32WL33CBV6X, STM32WL33CCV6, STM32WL33CCV6A, STM32WL33CCV6X, STM32WL33K8V7, STM32WL33K8V7X, STM32WL33KBV7 , STM32WL33KBV7X, STM32WL33KCV7, STM32WL33KCV7X, STM32WL5MOCH6, STM32WL5MOCH6TR]
+2025-10-13 15:08:02,109 [INFO] BoardInfo:889 - No configuration file found for board P-NUCLEO-WB55
+2025-10-13 15:08:02,109 [INFO] DbBoards:161 - Kit is not supported: P-NUCLEO-WB55
+2025-10-13 15:08:02,113 [INFO] BoardInfo:889 - No configuration file found for board STEVAL-BFA001V1B
+2025-10-13 15:08:02,113 [INFO] DbBoards:161 - Kit is not supported: STEVAL-BFA001V1B
+2025-10-13 15:08:02,113 [INFO] BoardInfo:889 - No configuration file found for board STEVAL-BFA001V2B
+2025-10-13 15:08:02,114 [INFO] DbBoards:161 - Kit is not supported: STEVAL-BFA001V2B
+2025-10-13 15:08:02,238 [INFO] DbBoards:168 - Found 212 boards, 209 are supported
+2025-10-13 15:08:02,239 [INFO] DbBoards:169 - Found 212 boards, 43 of them is supported for  Bsp
+2025-10-13 15:08:02,241 [INFO] ApiDb:423 - Load user favorites file /home/ja/.stm32cubeide/favorites.boards.txt: 1 item(s)
+2025-10-13 15:08:02,241 [INFO] ApiDb:427 - User favorites Boards=[STM32F429I-DISC1]
+2025-10-13 15:08:02,241 [INFO] DbBoards:198 - Set 1 / 1 favorites Boards
+2025-10-13 15:08:02,258 [ERROR] TargetSelectorAdapter:267 - Unable to refresh data
+2025-10-13 15:08:02,422 [INFO] McuFinderGlobals:76 - Set McuFinderConnectedMode to true
+2025-10-13 15:08:02,433 [INFO] MultiScanPanel:200 - Auto-refresh data requested => check proxy status ongoing
+2025-10-13 15:08:02,435 [INFO] FinderPluginLoader:96 - Searching for filters in installed packs
+2025-10-13 15:08:03,757 [INFO] LoadUrlFilesThread:185 - End of LoadServerUrlFiles without Thread
+2025-10-13 15:08:03,839 [INFO] DetailPanel:341 - Set advertising image to /home/ja/STM32Cube/Repository//en.2400x1350px.jpeg
+2025-10-13 15:08:38,719 [INFO] MainUpdater:2872 - connection check result : 10
+2025-10-13 15:08:38,719 [INFO] McuFinderGlobals:76 - Set McuFinderConnectedMode to true
+2025-10-13 15:08:39,442 [INFO] ServerAccessManage:452 - Complete download http(s) 200
+2025-10-13 15:08:39,443 [ERROR] ServerAccessManage:457 - Unexpected HTTP response Code (200)
+2025-10-13 15:08:39,443 [ERROR] ServerAccessManage:740 - Problem during Download of File : mcusAds.json._tmp_.
+2025-10-13 15:08:41,046 [INFO] LoadUrlFilesThread:156 - End of LoadUrlFiles Thread
+2025-10-13 15:08:41,931 [INFO] DbMcusAds:53 - JSON generation date=Tue Jul 08 03:14:23 CDT 2025 (1751962463524)
+2025-10-13 15:08:41,933 [INFO] ApiDb:448 - Save user favorites file /home/ja/.stm32cubeide/favorites.mcus.txt: 0 item(s)
+2025-10-13 15:08:41,933 [INFO] ApiDb:452 - User favorites MCUs=[]
+2025-10-13 15:08:41,935 [INFO] ApiDb:581 - Connected to CubeFinder SQLite database (/home/ja/.stmcufinder/plugins/mcufinder/mcu/cube-finder-db.db)
+2025-10-13 15:08:41,988 [INFO] ApiDb:668 - CubeFinder database Data Model version=2.1
+2025-10-13 15:08:41,988 [INFO] ApiDb:669 - CubeFinder database Configuration version=3.0.39
+2025-10-13 15:08:41,988 [INFO] ApiDb:670 - CubeFinder database generation date=2025-08-25 (1756130511)
+2025-10-13 15:08:41,988 [INFO] ApiDb:671 - CubeFinder database FW Pack versions=[FP-ATR-ASTRA1_V2.0.0, FP-SNS-FLIGHT1_V5.1.0, FP-SNS-MOTENV1_V5.0.0, FP-SNS-MOTENVWB1_V1.4.0, FP-SNS-SMARTAG2_V1.2.0, FP-SNS-STBOX1_V2.1.0, STM32Cube_FW_C0_V1.4.0, STM32Cube_FW_F4_V1.28.3, STM32Cube_FW_F7_V1.17.4, STM32Cube_FW_G0_V1.6.2, STM32Cube_FW_G4_V1.6.1, STM32Cube_FW_H5_V1.5.0, STM32Cube_FW_H7RS_V1.2.0, STM32Cube_FW_H7_V1.12.1, STM32Cube_FW_L0_V1.12.2, STM32Cube_FW_L4_V1.18.1, STM32Cube_FW_L5_V1.5.1, STM32Cube_FW_N6_V1.2.0, STM32Cube_FW_U0_V1.3.0, STM32Cube_FW_U3_V1.2.0, STM32Cube_FW_U5_V1.8.0, STM32Cube_FW_WB0_V1.3.0, STM32Cube_FW_WBA_V1.7.0, STM32Cube_FW_WB_V1.23.0, STM32Cube_FW_WL3_V1.2.0, STM32Cube_FW_WL_V1.3.1, X-CUBE-ALGOBUILD_V1.4.0, X-CUBE-ALS_V1.0.2, X-CUBE-AZRTOS-F4_V1.1.0, X-CUBE-AZRTOS-F7_V1.1.0, X-CUBE-AZRTOS-G0_V1.1.0, X-CUBE-AZRTOS-G4_V2.0.0, X-CUBE-AZRTOS-H7RS_V1.1.0, X-CUBE-AZRTOS-H7_V3.4.0, X-CUBE-AZRTOS-L4_V2.0.0, X-CUBE-AZRTOS-L5_V2.0.0, X-CUBE-AZRTOS-WB_V2.0.0, X-CUBE-AZRTOS-WL_V2.0.0, X-CUBE-BLE1_V7.1.0, X-CUBE-BLE2_V3.3.0, X-CUBE-BLEMGR_V4.1.0, X-CUBE-EEPRMA1_V5.2.0, X-CUBE-FREERTOS_V1.3.1, X-CUBE-GNSS1_V6.0.0, X-CUBE-MEMS1_V11.3.0, X-CUBE-NFC4_V3.0.0, X-CUBE-NFC7_V2.0.0, X-CUBE-SFXS2LP1_V4.0.0, X-CUBE-ST67W61_V1.0.0, X-CUBE-SUBG2_V5.0.0, X-CUBE-TOF1_V3.4.3]
+2025-10-13 15:08:44,113 [INFO] ApiDb:240 - Found 880 in-development CPN: [B-G473E-ZEST1S, B-WB1M-WPAN1, B-WBA5M-WPAN, B-WL5M-SUBG1, NUCLEO-C031C6, NUCLEO-C051C8, NUCLEO-C071RB, NUCLEO-C092RC, NUCLEO-H503RB, NUCLEO-H533RE, NUCLEO-H563ZI, NUCLEO-H7S3L8, NUCLEO-N657X0-Q, NUCLEO-U031R8, NUCLEO-U083RC, NUCLEO-U385RG-Q, NUCLEO-U545RE-Q, NUCLEO-U5A5ZJ-Q, NUCLEO-WB05KZ, NUCLEO-WB07CC, NUCLEO-WB09KE, NUCLEO-WBA52CG, NUCLEO-WBA55CG, NUCLEO-WL33CC1, NUCLEO-WL33CC2, STEVAL-PROTEUS1, STEVAL-SMARTAG2, STEVAL-STWINBX1, STM320518-EVAL, STM32C0116-DK, STM32C011D6Y3TR, STM32C011D6Y6TR, STM32C011F4P3, STM32C011F4P6, STM32C011F4U3, STM32C011F4U6TR, STM32C011F6P3, STM32C011F6P6, STM32C011F6U3, STM32C011F6U6TR, STM32C011J4M3, STM32C011J4M6, STM32C011J6M3, STM32C011J6M6, STM32C0316-DK, STM32C031C4T3, STM32C031C4T6, STM32C031C4U3, STM32C031C4U6, STM32C031C6T3, STM32C031C6T6, STM32C031C6U3, STM32C031C6U6, STM32C031F4P3, STM32C031F4P6, STM32C031F6P3, STM32C031F6P6, STM32C031G4U3, STM32C031G4U6, STM32C031G6U3, STM32C031G6U6, STM32C031K4T3, STM32C031K4T6, STM32C031K4U3, STM32C031K4U6, STM32C031K6T3, STM32C031K6T6, STM32C031K6U3, STM32C031K6U6, STM32C051C6T6, STM32C051C6U6, STM32C051C8T6, STM32C051C8U6, STM32C051D8Y6TR, STM32C051F6P6, STM32C051F8P6, STM32C051G6U6, STM32C051G8U6, STM32C051K6T6, STM32C051K6U6, STM32C051K8T6, STM32C071C8T6, STM32C071C8T6N, STM32C071C8U6, STM32C071C8U6N, STM32C071CBT6, STM32C071CBT6N, STM32C071CBU6, STM32C071CBU6N, STM32C071F8P6, STM32C071F8P6N, STM32C071FBP6, STM32C071FBP6N, STM32C071FBY6TR, STM32C071G8U6, STM32C071G8U6N, STM32C071GBU6, STM32C071GBU6N, STM32C071K8T6, STM32C071K8T6N, STM32C071K8U6, STM32C071K8U6N, STM32C071KBT6, STM32C071KBT6N, STM32C071KBU6, STM32C071KBU6N, STM32C071R8T6, STM32C071R8T6N, STM32C071RBI6N, STM32C071RBT6, STM32C071RBT6N, STM32C091CBT6, STM32C091CBU6, STM32C091CCT6, STM32C091CCU6, STM32C091ECY6TR, STM32C091FBP6, STM32C091FCP6, STM32C091GBU6, STM32C091GCU6, STM32C091KBT6, STM32C091KBU6, STM32C091KCT6, STM32C091KCU6, STM32C091RBT6, STM32C091RCI6, STM32C091RCT6, STM32C092CBT6, STM32C092CBU6, STM32C092CCT6, STM32C092CCU6, STM32C092ECY6TR, STM32C092FBP6, STM32C092FCP6, STM32C092GBU6, STM32C092GCU6, STM32C092KBT6, STM32C092KBU6, STM32C092KCT6, STM32C092KCU6, STM32C092RBT6, STM32C092RCI6, STM32C092RCT6, STM32G071K8TXN, STM32G071K8UXN, STM32G081GBU6N, STM32G081KBT6N, STM32G081KBUXN, STM32G0B1CCT6N, STM32G0B1KCT6, STM32G0B1NEY6TR, STM32G0B1RCT6N, STM32G0C1CCT6, STM32G0C1CCT6N, STM32G0C1CCU6N, STM32G0C1CET6N, STM32G0C1CEU6N, STM32G0C1KCT6, STM32G0C1NEY6TR, STM32G0C1RCI6N, STM32G0C1RCT6N, STM32G0C1REI6N, STM32G0C1RET6N, STM32G0C1VCI6, STM32G0C1VEI6, STM32G411C6T3, STM32G411C6T6, STM32G411C6U3, STM32G411C6U6, STM32G411C8T3, STM32G411C8T6, STM32G411C8U3, STM32G411C8U6, STM32G411CBT3, STM32G411CBT6, STM32G411CBU3, STM32G411CBU6, STM32G411K6T3, STM32G411K6T6, STM32G411K6U3, STM32G411K6U6, STM32G411K8T3, STM32G411K8T6, STM32G411K8U3, STM32G411K8U6, STM32G411KBT3, STM32G411KBT6, STM32G411KBU3, STM32G411KBU6, STM32G411M6T3, STM32G411M6T6, STM32G411M8T3, STM32G411M8T6, STM32G411MBT3, STM32G411MBT6, STM32G411R6T3, STM32G411R6T6, STM32G411R8T3, STM32G411R8T6, STM32G411RBT3, STM32G411RBT6, STM32G414CBT3, STM32G414CBT6, STM32G414CBU3, STM32G414CBU6, STM32G414CCT3, STM32G414CCT6, STM32G414CCU3, STM32G414CCU6, STM32G414MBT3, STM32G414MBT6, STM32G414MCT3, STM32G414MCT6, STM32G414RBT3, STM32G414RBT6, STM32G414RCT3, STM32G414RCT6, STM32G414VBT3, STM32G414VBT6, STM32G414VCT3, STM32G414VCT6, STM32G431CBT3Z, STM32G431RBT3Z, STM32G471CCT6, STM32G471CCU6, STM32G471CET3, STM32G471CET6, STM32G471CEU3, STM32G471CEU6, STM32G471MCT6, STM32G471MET3, STM32G471MET6, STM32G471MEY6TR, STM32G471QCT6, STM32G471QET3, STM32G471RCT6, STM32G471RET3, STM32G471RET6, STM32G471VCH6, STM32G471VCI6, STM32G471VCT6, STM32G471VEH3, STM32G471VEH6, STM32G471VEI3, STM32G471VEI6, STM32G471VET3, STM32G471VET6, STM32G473QET3Z, STM32G473RET3Z, STM32G474CCT6, STM32G491RET3Z, STM32H503CBT6, STM32H503CBU6, STM32H503EBY6TR, STM32H503KBU6, STM32H503RBT6, STM32H523CCT6, STM32H523CCU6, STM32H523CET6, STM32H523CEU6, STM32H523HEY6TR, STM32H523RCT6, STM32H523RET6, STM32H523VCI6, STM32H523VCT6, STM32H523VEI6, STM32H523VET6, STM32H523ZCJ6, STM32H523ZCT6, STM32H523ZEJ6, STM32H523ZET6, STM32H533CET6, STM32H533CEU6, STM32H533HEY6TR, STM32H533RET6, STM32H533VEI6, STM32H533VET6, STM32H533ZEJ6, STM32H533ZET6, STM32H562AGI6, STM32H562AII6, STM32H562IGK6, STM32H562IGT6, STM32H562IIK6, STM32H562IIT6, STM32H562RGT6, STM32H562RGV6, STM32H562RIT6, STM32H562RIV6, STM32H562VGT6, STM32H562VIT6, STM32H562ZGT6, STM32H562ZIT6, STM32H563AGI6, STM32H563AII3Q, STM32H563AII6, STM32H563IGK6, STM32H563IGT6, STM32H563IIK3Q, STM32H563IIK6, STM32H563IIT3Q, STM32H563IIT6, STM32H563MIY3QTR, STM32H563RGT6, STM32H563RGV6, STM32H563RIT6, STM32H563RIV6, STM32H563VGT6, STM32H563VIT3Q, STM32H563VIT6, STM32H563ZGT6, STM32H563ZIT3Q, STM32H563ZIT6, STM32H573AII3Q, STM32H573AII6, STM32H573I-DK, STM32H573IIK3Q, STM32H573IIK6, STM32H573IIT3Q, STM32H573IIT6, STM32H573MIY3QTR, STM32H573RIT6, STM32H573RIV6, STM32H573VIT3Q, STM32H573VIT6, STM32H573ZIT3Q, STM32H573ZIT6, STM32H7R3A8I6, STM32H7R3I8K6, STM32H7R3I8T6, STM32H7R3L8H6, STM32H7R3L8H6H, STM32H7R3R8V6, STM32H7R3V8H6, STM32H7R3V8T6, STM32H7R3V8Y6TR, STM32H7R3Z8J6, STM32H7R3Z8T6, STM32H7R7A8I6, STM32H7R7I8K6, STM32H7R7I8T6, STM32H7R7L8H6, STM32H7R7L8H6H, STM32H7R7Z8J6, STM32H7S3A8I6, STM32H7S3I8K6, STM32H7S3I8T6, STM32H7S3L8H6, STM32H7S3L8H6H, STM32H7S3R8V6, STM32H7S3V8H6, STM32H7S3V8T6, STM32H7S3V8Y6TR, STM32H7S3Z8J6, STM32H7S3Z8T6, STM32H7S78-DK, STM32H7S7A8I6, STM32H7S7I8K6, STM32H7S7I8T6, STM32H7S7L8H6, STM32H7S7L8H6H, STM32H7S7Z8J6, STM32L4R5QGI6STR, STM32MP131AAE3, STM32MP131AAF3, STM32MP131AAG3, STM32MP131CAE3, STM32MP131CAF3, STM32MP131CAG3, STM32MP131DAE7, STM32MP131DAF7, STM32MP131DAG7, STM32MP131FAE7, STM32MP131FAF7, STM32MP131FAG7, STM32MP133AAE3, STM32MP133AAF3, STM32MP133AAG3, STM32MP133CAE3, STM32MP133CAF3, STM32MP133CAG3, STM32MP133DAE7, STM32MP133DAF7, STM32MP133DAG7, STM32MP133FAE7, STM32MP133FAF7, STM32MP133FAG7, STM32MP135AAE3, STM32MP135AAF3, STM32MP135AAG3, STM32MP135CAE3, STM32MP135CAF3, STM32MP135CAG3, STM32MP135DAE7, STM32MP135DAF7, STM32MP135DAG7, STM32MP135F-DK, STM32MP135FAE7, STM32MP135FAF7, STM32MP135FAF7T, STM32MP135FAF7U, STM32MP135FAG7, STM32MP211AAL3, STM32MP211AAM3, STM32MP211AAN3, STM32MP211AAO3, STM32MP211CAL3, STM32MP211CAM3, STM32MP211CAN3, STM32MP211CAO3, STM32MP211DAL3, STM32MP211DAM3, STM32MP211DAN3, STM32MP211DAO3, STM32MP211FAL3, STM32MP211FAM3, STM32MP211FAN3, STM32MP211FAO3, STM32MP213AAL3, STM32MP213AAM3, STM32MP213AAN3, STM32MP213AAO3, STM32MP213CAL3, STM32MP213CAM3, STM32MP213CAN3, STM32MP213CAO3, STM32MP213DAL3, STM32MP213DAM3, STM32MP213DAN3, STM32MP213DAO3, STM32MP213FAL3, STM32MP213FAM3, STM32MP213FAN3, STM32MP213FAO3, STM32MP215AAL3, STM32MP215AAM3, STM32MP215AAN3, STM32MP215AAO3, STM32MP215CAL3, STM32MP215CAM3, STM32MP215CAN3, STM32MP215CAO3, STM32MP215DAL3, STM32MP215DAM3, STM32MP215DAN3, STM32MP215DAO3, STM32MP215F-DK, STM32MP215FAL3, STM32MP215FAM3, STM32MP215FAN3, STM32MP215FAO3, STM32MP231AAJ3, STM32MP231AAK3, STM32MP231AAL3, STM32MP231CAJ3, STM32MP231CAK3, STM32MP231CAL3, STM32MP231DAJ3, STM32MP231DAK3, STM32MP231DAL3, STM32MP231FAJ3, STM32MP231FAK3, STM32MP231FAL3, STM32MP233AAJ3, STM32MP233AAK3, STM32MP233AAL3, STM32MP233CAJ3, STM32MP233CAK3, STM32MP233CAL3, STM32MP233DAJ3, STM32MP233DAK3, STM32MP233DAL3, STM32MP233FAJ3, STM32MP233FAK3, STM32MP233FAL3, STM32MP235AAJ3, STM32MP235AAK3, STM32MP235AAL3, STM32MP235CAJ3, STM32MP235CAK3, STM32MP235CAL3, STM32MP235DAJ3, STM32MP235DAK3, STM32MP235DAL3, STM32MP235FAJ3, STM32MP235FAK3, STM32MP235FAL3, STM32MP251AAI3, STM32MP251AAK3, STM32MP251AAL3, STM32MP251CAI3, STM32MP251CAK3, STM32MP251CAL3, STM32MP251DAI3, STM32MP251DAK3, STM32MP251DAL3, STM32MP251FAI3, STM32MP251FAK3, STM32MP251FAL3, STM32MP253AAI3, STM32MP253AAK3, STM32MP253AAL3, STM32MP253CAI3, STM32MP253CAK3, STM32MP253CAL3, STM32MP253DAI3, STM32MP253DAK3, STM32MP253DAL3, STM32MP253FAI3, STM32MP253FAK3, STM32MP253FAL3, STM32MP255AAI3, STM32MP255AAK3, STM32MP255AAL3, STM32MP255CAI3, STM32MP255CAK3, STM32MP255CAL3, STM32MP255DAI3, STM32MP255DAK3, STM32MP255DAL3, STM32MP255FAI3, STM32MP255FAK3, STM32MP255FAL3, STM32MP257AAI3, STM32MP257AAK3, STM32MP257AAL3, STM32MP257CAI3, STM32MP257CAK3, STM32MP257CAL3, STM32MP257DAI3, STM32MP257DAK3, STM32MP257DAL3, STM32MP257F-DK, STM32MP257F-EV1, STM32MP257FAI3, STM32MP257FAK3, STM32MP257FAL3, STM32N645A0H3Q, STM32N645B0H3Q, STM32N645I0H3Q, STM32N645L0H3Q, STM32N645X0H3Q, STM32N645Z0H3Q, STM32N647A0H3Q, STM32N647B0H3Q, STM32N647I0H3Q, STM32N647L0H3Q, STM32N647X0H3Q, STM32N647Z0H3Q, STM32N655A0H3Q, STM32N655B0H3Q, STM32N655I0H3Q, STM32N655L0H3Q, STM32N655X0H3Q, STM32N655Z0H3Q, STM32N6570-DK, STM32N657A0H3Q, STM32N657B0H3Q, STM32N657I0H3Q, STM32N657L0H3Q, STM32N657X0H3Q, STM32N657Z0H3Q, STM32U031C6T6, STM32U031C6U6, STM32U031C8T6, STM32U031C8U6, STM32U031F4P6, STM32U031F6P6, STM32U031F8P6, STM32U031G6Y6TR, STM32U031G8Y6TR, STM32U031K4U6, STM32U031K6U6, STM32U031K8U6, STM32U031R6I6, STM32U031R6T6, STM32U031R8I6, STM32U031R8T6, STM32U073C8T6, STM32U073C8U6, STM32U073CBT6, STM32U073CBU6, STM32U073CCT6, STM32U073CCU6, STM32U073H8Y6TR, STM32U073HBY6TR, STM32U073HCY6TR, STM32U073K8U6, STM32U073KBU6, STM32U073KCU6, STM32U073M8I6, STM32U073M8T6, STM32U073MBI6, STM32U073MBT6, STM32U073MCI6, STM32U073MCT6, STM32U073R8I6, STM32U073R8T6, STM32U073RBI6, STM32U073RBT6, STM32U073RCI6, STM32U073RCT6, STM32U083C-DK, STM32U083CCT6, STM32U083CCU6, STM32U083HCY6TR, STM32U083KCU6, STM32U083MCI6, STM32U083MCT6, STM32U083RCI6, STM32U083RCT6, STM32U375CET6, STM32U375CET6Q, STM32U375CEU6, STM32U375CEU6Q, STM32U375CEY6QTR, STM32U375CGT6, STM32U375CGT6Q, STM32U375CGU6, STM32U375CGU6Q, STM32U375CGY6QTR, STM32U375KEU6, STM32U375KGU6, STM32U375REI6, STM32U375REI6Q, STM32U375RET6, STM32U375RET6Q, STM32U375REY6GTR, STM32U375REY6QTR, STM32U375RGI6, STM32U375RGI6Q, STM32U375RGT6, STM32U375RGT6Q, STM32U375RGY6GTR, STM32U375RGY6QTR, STM32U375VEI6, STM32U375VEI6Q, STM32U375VET6, STM32U375VET6Q, STM32U375VGI6, STM32U375VGI6Q, STM32U375VGT6, STM32U375VGT6Q, STM32U385CGT6, STM32U385CGT6Q, STM32U385CGU6, STM32U385CGU6Q, STM32U385CGY6QTR, STM32U385KGU6, STM32U385RGI6, STM32U385RGI6Q, STM32U385RGT6, STM32U385RGT6Q, STM32U385RGY6GTR, STM32U385RGY6QTR, STM32U385VGI6, STM32U385VGI6Q, STM32U385VGT6, STM32U385VGT6Q, STM32U535CBT6, STM32U535CBT6Q, STM32U535CBU6, STM32U535CBU6Q, STM32U535CCT6, STM32U535CCT6Q, STM32U535CCU6, STM32U535CCU6Q, STM32U535CET6, STM32U535CET6Q, STM32U535CEU6, STM32U535CEU6Q, STM32U535JEY6QTR, STM32U535NCY6QTR, STM32U535NEY6QTR, STM32U535RBI6, STM32U535RBI6Q, STM32U535RBT6, STM32U535RBT6Q, STM32U535RCI6, STM32U535RCI6Q, STM32U535RCT6, STM32U535RCT6Q, STM32U535REI6, STM32U535REI6Q, STM32U535RET6, STM32U535RET6Q, STM32U535VCI6, STM32U535VCI6Q, STM32U535VCT6, STM32U535VCT6Q, STM32U535VEI6, STM32U535VEI6Q, STM32U535VET6, STM32U535VET6Q, STM32U545CET6, STM32U545CET6Q, STM32U545CEU6, STM32U545CEU6Q, STM32U545JEY6QTR, STM32U545NEY6QTR, STM32U545REI6, STM32U545REI6Q, STM32U545RET6, STM32U545RET6Q, STM32U545VEI6, STM32U545VEI6Q, STM32U545VET6, STM32U545VET6Q, STM32U595AIH6, STM32U595AIH6Q, STM32U595AJH6, STM32U595AJH6Q, STM32U595QII6, STM32U595QII6Q, STM32U595QJI6, STM32U595QJI6Q, STM32U595RIT6, STM32U595RIT6Q, STM32U595RJT6, STM32U595RJT6Q, STM32U595VIT6, STM32U595VIT6Q, STM32U595VJT6, STM32U595VJT6Q, STM32U595ZIT6, STM32U595ZIT6Q, STM32U595ZIY6QTR, STM32U595ZJT6, STM32U595ZJT6Q, STM32U595ZJY6QTR, STM32U599BJY6QTR, STM32U599NIH6Q, STM32U599NJH6Q, STM32U599VIT6Q, STM32U599VJT6, STM32U599VJT6Q, STM32U599ZIT6Q, STM32U599ZIY6QTR, STM32U599ZJT6Q, STM32U599ZJY6QTR, STM32U5A5AJH6, STM32U5A5AJH6Q, STM32U5A5QII3Q , STM32U5A5QJI6, STM32U5A5QJI6Q, STM32U5A5RJT6, STM32U5A5RJT6Q, STM32U5A5VJT6, STM32U5A5VJT6Q, STM32U5A5ZJT6, STM32U5A5ZJT6Q, STM32U5A5ZJY6QTR, STM32U5A9BJY6QTR, STM32U5A9J-DK, STM32U5A9NJH6Q, STM32U5A9VJT6Q, STM32U5A9ZJT6Q, STM32U5A9ZJY6QTR, STM32U5F7VIT6, STM32U5F7VIT6Q, STM32U5F7VJT6, STM32U5F7VJT6Q, STM32U5F9BJY6QTR, STM32U5F9NJH6Q, STM32U5F9VIT6Q, STM32U5F9VJT6Q, STM32U5F9ZIJ6QTR, STM32U5F9ZIT6Q, STM32U5F9ZJJ6QTR, STM32U5F9ZJT6Q, STM32U5G7VJT6, STM32U5G7VJT6Q, STM32U5G9BJY6QTR, STM32U5G9J-DK1, STM32U5G9J-DK2, STM32U5G9NJH6Q, STM32U5G9VJT6Q, STM32U5G9ZJJ6QTR, STM32U5G9ZJT6Q, STM32WB05KZV6TR, STM32WB05KZV7TR, STM32WB05TZF6TR, STM32WB05TZF7TR, STM32WB06CCF6TR, STM32WB06CCF7TR, STM32WB06CCV6TR, STM32WB06CCV7TR, STM32WB06KCV6TR, STM32WB06KCV7TR, STM32WB07CCF6TR, STM32WB07CCF7TR, STM32WB07CCV6TR, STM32WB07CCV7TR, STM32WB07KCV6TR, STM32WB07KCV7TR, STM32WB09KEV6TR, STM32WB09KEV7TR, STM32WB09TEF6TR, STM32WB09TEF7TR, STM32WB1MMCH6, STM32WBA50KGU6, STM32WBA50KGU6TR, STM32WBA52CEU6, STM32WBA52CEU6TR, STM32WBA52CEU7, STM32WBA52CEU7TR, STM32WBA52CGU6, STM32WBA52CGU6TR, STM32WBA52CGU6U, STM32WBA52CGU7, STM32WBA52CGU7TR, STM32WBA52KEU6, STM32WBA52KEU6TR, STM32WBA52KGU6, STM32WBA52KGU6TR, STM32WBA54CEU6, STM32WBA54CEU6TR, STM32WBA54CEU7, STM32WBA54CEU7TR, STM32WBA54CGU6, STM32WBA54CGU6TR, STM32WBA54CGU7, STM32WBA54CGU7TR, STM32WBA54KEU6, STM32WBA54KEU6TR, STM32WBA54KEU7, STM32WBA54KEU7TR, STM32WBA54KGU6, STM32WBA54KGU6TR, STM32WBA54KGU7, STM32WBA54KGU7TR, STM32WBA55CEU6, STM32WBA55CEU6TR, STM32WBA55CEU7, STM32WBA55CEU7TR, STM32WBA55CGU6, STM32WBA55CGU6TR, STM32WBA55CGU6U, STM32WBA55CGU7, STM32WBA55CGU7TR, STM32WBA55G-DK1, STM32WBA55HEF6, STM32WBA55HEF7, STM32WBA55HGF6, STM32WBA55HGF7, STM32WBA55UEI6, STM32WBA55UEI6TR, STM32WBA55UEI7, STM32WBA55UEI7TR, STM32WBA55UGI6, STM32WBA55UGI6TR, STM32WBA55UGI7, STM32WBA55UGI7TR, STM32WBA5MMGH6TR, STM32WBA62MGF6, STM32WBA62MIF6, STM32WBA65MGF7, STM32WBA65MIF6, STM32WBA65MIF7, STM32WL30K8V6, STM32WL30KBV6, STM32WL31C8V6, STM32WL31CBV6, STM32WL31K8V6, STM32WL31KBV6, STM32WL33C8V6, STM32WL33C8V6X, STM32WL33CBV6, STM32WL33CBV6X, STM32WL33CCV6, STM32WL33CCV6A, STM32WL33CCV6X, STM32WL33K8V7, STM32WL33K8V7X, STM32WL33KBV7 , STM32WL33KBV7X, STM32WL33KCV7, STM32WL33KCV7X, STM32WL5MOCH6, STM32WL5MOCH6TR]
+2025-10-13 15:08:44,114 [INFO] DbMcus:218 - Found 4801 MCUs, 4801 are supported
+2025-10-13 15:08:44,114 [INFO] ApiDb:423 - Load user favorites file /home/ja/.stm32cubeide/favorites.mcus.txt: 0 item(s)
+2025-10-13 15:08:44,114 [INFO] ApiDb:427 - User favorites MCUs=[]
+2025-10-13 15:08:44,114 [INFO] DbMcus:224 - Set 0 / 0 favorites MCUs
+2025-10-13 15:08:45,697 [INFO] ApiDb:448 - Save user favorites file /home/ja/.stm32cubeide/favorites.boards.txt: 1 item(s)
+2025-10-13 15:08:45,697 [INFO] ApiDb:452 - User favorites Boards=[STM32F429I-DISC1]
+2025-10-13 15:08:45,698 [INFO] ApiDb:581 - Connected to CubeFinder SQLite database (/home/ja/.stmcufinder/plugins/mcufinder/mcu/cube-finder-db.db)
+2025-10-13 15:08:45,748 [INFO] ApiDb:668 - CubeFinder database Data Model version=2.1
+2025-10-13 15:08:45,748 [INFO] ApiDb:669 - CubeFinder database Configuration version=3.0.39
+2025-10-13 15:08:45,748 [INFO] ApiDb:670 - CubeFinder database generation date=2025-08-25 (1756130511)
+2025-10-13 15:08:45,748 [INFO] ApiDb:671 - CubeFinder database FW Pack versions=[FP-ATR-ASTRA1_V2.0.0, FP-SNS-FLIGHT1_V5.1.0, FP-SNS-MOTENV1_V5.0.0, FP-SNS-MOTENVWB1_V1.4.0, FP-SNS-SMARTAG2_V1.2.0, FP-SNS-STBOX1_V2.1.0, STM32Cube_FW_C0_V1.4.0, STM32Cube_FW_F4_V1.28.3, STM32Cube_FW_F7_V1.17.4, STM32Cube_FW_G0_V1.6.2, STM32Cube_FW_G4_V1.6.1, STM32Cube_FW_H5_V1.5.0, STM32Cube_FW_H7RS_V1.2.0, STM32Cube_FW_H7_V1.12.1, STM32Cube_FW_L0_V1.12.2, STM32Cube_FW_L4_V1.18.1, STM32Cube_FW_L5_V1.5.1, STM32Cube_FW_N6_V1.2.0, STM32Cube_FW_U0_V1.3.0, STM32Cube_FW_U3_V1.2.0, STM32Cube_FW_U5_V1.8.0, STM32Cube_FW_WB0_V1.3.0, STM32Cube_FW_WBA_V1.7.0, STM32Cube_FW_WB_V1.23.0, STM32Cube_FW_WL3_V1.2.0, STM32Cube_FW_WL_V1.3.1, X-CUBE-ALGOBUILD_V1.4.0, X-CUBE-ALS_V1.0.2, X-CUBE-AZRTOS-F4_V1.1.0, X-CUBE-AZRTOS-F7_V1.1.0, X-CUBE-AZRTOS-G0_V1.1.0, X-CUBE-AZRTOS-G4_V2.0.0, X-CUBE-AZRTOS-H7RS_V1.1.0, X-CUBE-AZRTOS-H7_V3.4.0, X-CUBE-AZRTOS-L4_V2.0.0, X-CUBE-AZRTOS-L5_V2.0.0, X-CUBE-AZRTOS-WB_V2.0.0, X-CUBE-AZRTOS-WL_V2.0.0, X-CUBE-BLE1_V7.1.0, X-CUBE-BLE2_V3.3.0, X-CUBE-BLEMGR_V4.1.0, X-CUBE-EEPRMA1_V5.2.0, X-CUBE-FREERTOS_V1.3.1, X-CUBE-GNSS1_V6.0.0, X-CUBE-MEMS1_V11.3.0, X-CUBE-NFC4_V3.0.0, X-CUBE-NFC7_V2.0.0, X-CUBE-SFXS2LP1_V4.0.0, X-CUBE-ST67W61_V1.0.0, X-CUBE-SUBG2_V5.0.0, X-CUBE-TOF1_V3.4.3]
+2025-10-13 15:08:45,798 [INFO] DbBoardsSqlite:226 - include board P-NUCLEO-WB55-NUCLEO as a kit item of type 'Nucleo-64'
+2025-10-13 15:08:45,798 [INFO] DbBoardsSqlite:226 - include board P-NUCLEO-WB55-USBDONGLE as a kit item of type 'Nucleo USB Dongle'
+2025-10-13 15:08:45,799 [INFO] DbBoardsSqlite:226 - include board STEVAL-IDP005V1 as a kit item of type 'Evaluation Board'
+2025-10-13 15:08:45,799 [INFO] DbBoardsSqlite:226 - include board STEVAL-IDP005V2 as a kit item of type 'Evaluation Board'
+2025-10-13 15:08:45,839 [INFO] ApiDb:240 - Found 880 in-development CPN: [B-G473E-ZEST1S, B-WB1M-WPAN1, B-WBA5M-WPAN, B-WL5M-SUBG1, NUCLEO-C031C6, NUCLEO-C051C8, NUCLEO-C071RB, NUCLEO-C092RC, NUCLEO-H503RB, NUCLEO-H533RE, NUCLEO-H563ZI, NUCLEO-H7S3L8, NUCLEO-N657X0-Q, NUCLEO-U031R8, NUCLEO-U083RC, NUCLEO-U385RG-Q, NUCLEO-U545RE-Q, NUCLEO-U5A5ZJ-Q, NUCLEO-WB05KZ, NUCLEO-WB07CC, NUCLEO-WB09KE, NUCLEO-WBA52CG, NUCLEO-WBA55CG, NUCLEO-WL33CC1, NUCLEO-WL33CC2, STEVAL-PROTEUS1, STEVAL-SMARTAG2, STEVAL-STWINBX1, STM320518-EVAL, STM32C0116-DK, STM32C011D6Y3TR, STM32C011D6Y6TR, STM32C011F4P3, STM32C011F4P6, STM32C011F4U3, STM32C011F4U6TR, STM32C011F6P3, STM32C011F6P6, STM32C011F6U3, STM32C011F6U6TR, STM32C011J4M3, STM32C011J4M6, STM32C011J6M3, STM32C011J6M6, STM32C0316-DK, STM32C031C4T3, STM32C031C4T6, STM32C031C4U3, STM32C031C4U6, STM32C031C6T3, STM32C031C6T6, STM32C031C6U3, STM32C031C6U6, STM32C031F4P3, STM32C031F4P6, STM32C031F6P3, STM32C031F6P6, STM32C031G4U3, STM32C031G4U6, STM32C031G6U3, STM32C031G6U6, STM32C031K4T3, STM32C031K4T6, STM32C031K4U3, STM32C031K4U6, STM32C031K6T3, STM32C031K6T6, STM32C031K6U3, STM32C031K6U6, STM32C051C6T6, STM32C051C6U6, STM32C051C8T6, STM32C051C8U6, STM32C051D8Y6TR, STM32C051F6P6, STM32C051F8P6, STM32C051G6U6, STM32C051G8U6, STM32C051K6T6, STM32C051K6U6, STM32C051K8T6, STM32C071C8T6, STM32C071C8T6N, STM32C071C8U6, STM32C071C8U6N, STM32C071CBT6, STM32C071CBT6N, STM32C071CBU6, STM32C071CBU6N, STM32C071F8P6, STM32C071F8P6N, STM32C071FBP6, STM32C071FBP6N, STM32C071FBY6TR, STM32C071G8U6, STM32C071G8U6N, STM32C071GBU6, STM32C071GBU6N, STM32C071K8T6, STM32C071K8T6N, STM32C071K8U6, STM32C071K8U6N, STM32C071KBT6, STM32C071KBT6N, STM32C071KBU6, STM32C071KBU6N, STM32C071R8T6, STM32C071R8T6N, STM32C071RBI6N, STM32C071RBT6, STM32C071RBT6N, STM32C091CBT6, STM32C091CBU6, STM32C091CCT6, STM32C091CCU6, STM32C091ECY6TR, STM32C091FBP6, STM32C091FCP6, STM32C091GBU6, STM32C091GCU6, STM32C091KBT6, STM32C091KBU6, STM32C091KCT6, STM32C091KCU6, STM32C091RBT6, STM32C091RCI6, STM32C091RCT6, STM32C092CBT6, STM32C092CBU6, STM32C092CCT6, STM32C092CCU6, STM32C092ECY6TR, STM32C092FBP6, STM32C092FCP6, STM32C092GBU6, STM32C092GCU6, STM32C092KBT6, STM32C092KBU6, STM32C092KCT6, STM32C092KCU6, STM32C092RBT6, STM32C092RCI6, STM32C092RCT6, STM32G071K8TXN, STM32G071K8UXN, STM32G081GBU6N, STM32G081KBT6N, STM32G081KBUXN, STM32G0B1CCT6N, STM32G0B1KCT6, STM32G0B1NEY6TR, STM32G0B1RCT6N, STM32G0C1CCT6, STM32G0C1CCT6N, STM32G0C1CCU6N, STM32G0C1CET6N, STM32G0C1CEU6N, STM32G0C1KCT6, STM32G0C1NEY6TR, STM32G0C1RCI6N, STM32G0C1RCT6N, STM32G0C1REI6N, STM32G0C1RET6N, STM32G0C1VCI6, STM32G0C1VEI6, STM32G411C6T3, STM32G411C6T6, STM32G411C6U3, STM32G411C6U6, STM32G411C8T3, STM32G411C8T6, STM32G411C8U3, STM32G411C8U6, STM32G411CBT3, STM32G411CBT6, STM32G411CBU3, STM32G411CBU6, STM32G411K6T3, STM32G411K6T6, STM32G411K6U3, STM32G411K6U6, STM32G411K8T3, STM32G411K8T6, STM32G411K8U3, STM32G411K8U6, STM32G411KBT3, STM32G411KBT6, STM32G411KBU3, STM32G411KBU6, STM32G411M6T3, STM32G411M6T6, STM32G411M8T3, STM32G411M8T6, STM32G411MBT3, STM32G411MBT6, STM32G411R6T3, STM32G411R6T6, STM32G411R8T3, STM32G411R8T6, STM32G411RBT3, STM32G411RBT6, STM32G414CBT3, STM32G414CBT6, STM32G414CBU3, STM32G414CBU6, STM32G414CCT3, STM32G414CCT6, STM32G414CCU3, STM32G414CCU6, STM32G414MBT3, STM32G414MBT6, STM32G414MCT3, STM32G414MCT6, STM32G414RBT3, STM32G414RBT6, STM32G414RCT3, STM32G414RCT6, STM32G414VBT3, STM32G414VBT6, STM32G414VCT3, STM32G414VCT6, STM32G431CBT3Z, STM32G431RBT3Z, STM32G471CCT6, STM32G471CCU6, STM32G471CET3, STM32G471CET6, STM32G471CEU3, STM32G471CEU6, STM32G471MCT6, STM32G471MET3, STM32G471MET6, STM32G471MEY6TR, STM32G471QCT6, STM32G471QET3, STM32G471RCT6, STM32G471RET3, STM32G471RET6, STM32G471VCH6, STM32G471VCI6, STM32G471VCT6, STM32G471VEH3, STM32G471VEH6, STM32G471VEI3, STM32G471VEI6, STM32G471VET3, STM32G471VET6, STM32G473QET3Z, STM32G473RET3Z, STM32G474CCT6, STM32G491RET3Z, STM32H503CBT6, STM32H503CBU6, STM32H503EBY6TR, STM32H503KBU6, STM32H503RBT6, STM32H523CCT6, STM32H523CCU6, STM32H523CET6, STM32H523CEU6, STM32H523HEY6TR, STM32H523RCT6, STM32H523RET6, STM32H523VCI6, STM32H523VCT6, STM32H523VEI6, STM32H523VET6, STM32H523ZCJ6, STM32H523ZCT6, STM32H523ZEJ6, STM32H523ZET6, STM32H533CET6, STM32H533CEU6, STM32H533HEY6TR, STM32H533RET6, STM32H533VEI6, STM32H533VET6, STM32H533ZEJ6, STM32H533ZET6, STM32H562AGI6, STM32H562AII6, STM32H562IGK6, STM32H562IGT6, STM32H562IIK6, STM32H562IIT6, STM32H562RGT6, STM32H562RGV6, STM32H562RIT6, STM32H562RIV6, STM32H562VGT6, STM32H562VIT6, STM32H562ZGT6, STM32H562ZIT6, STM32H563AGI6, STM32H563AII3Q, STM32H563AII6, STM32H563IGK6, STM32H563IGT6, STM32H563IIK3Q, STM32H563IIK6, STM32H563IIT3Q, STM32H563IIT6, STM32H563MIY3QTR, STM32H563RGT6, STM32H563RGV6, STM32H563RIT6, STM32H563RIV6, STM32H563VGT6, STM32H563VIT3Q, STM32H563VIT6, STM32H563ZGT6, STM32H563ZIT3Q, STM32H563ZIT6, STM32H573AII3Q, STM32H573AII6, STM32H573I-DK, STM32H573IIK3Q, STM32H573IIK6, STM32H573IIT3Q, STM32H573IIT6, STM32H573MIY3QTR, STM32H573RIT6, STM32H573RIV6, STM32H573VIT3Q, STM32H573VIT6, STM32H573ZIT3Q, STM32H573ZIT6, STM32H7R3A8I6, STM32H7R3I8K6, STM32H7R3I8T6, STM32H7R3L8H6, STM32H7R3L8H6H, STM32H7R3R8V6, STM32H7R3V8H6, STM32H7R3V8T6, STM32H7R3V8Y6TR, STM32H7R3Z8J6, STM32H7R3Z8T6, STM32H7R7A8I6, STM32H7R7I8K6, STM32H7R7I8T6, STM32H7R7L8H6, STM32H7R7L8H6H, STM32H7R7Z8J6, STM32H7S3A8I6, STM32H7S3I8K6, STM32H7S3I8T6, STM32H7S3L8H6, STM32H7S3L8H6H, STM32H7S3R8V6, STM32H7S3V8H6, STM32H7S3V8T6, STM32H7S3V8Y6TR, STM32H7S3Z8J6, STM32H7S3Z8T6, STM32H7S78-DK, STM32H7S7A8I6, STM32H7S7I8K6, STM32H7S7I8T6, STM32H7S7L8H6, STM32H7S7L8H6H, STM32H7S7Z8J6, STM32L4R5QGI6STR, STM32MP131AAE3, STM32MP131AAF3, STM32MP131AAG3, STM32MP131CAE3, STM32MP131CAF3, STM32MP131CAG3, STM32MP131DAE7, STM32MP131DAF7, STM32MP131DAG7, STM32MP131FAE7, STM32MP131FAF7, STM32MP131FAG7, STM32MP133AAE3, STM32MP133AAF3, STM32MP133AAG3, STM32MP133CAE3, STM32MP133CAF3, STM32MP133CAG3, STM32MP133DAE7, STM32MP133DAF7, STM32MP133DAG7, STM32MP133FAE7, STM32MP133FAF7, STM32MP133FAG7, STM32MP135AAE3, STM32MP135AAF3, STM32MP135AAG3, STM32MP135CAE3, STM32MP135CAF3, STM32MP135CAG3, STM32MP135DAE7, STM32MP135DAF7, STM32MP135DAG7, STM32MP135F-DK, STM32MP135FAE7, STM32MP135FAF7, STM32MP135FAF7T, STM32MP135FAF7U, STM32MP135FAG7, STM32MP211AAL3, STM32MP211AAM3, STM32MP211AAN3, STM32MP211AAO3, STM32MP211CAL3, STM32MP211CAM3, STM32MP211CAN3, STM32MP211CAO3, STM32MP211DAL3, STM32MP211DAM3, STM32MP211DAN3, STM32MP211DAO3, STM32MP211FAL3, STM32MP211FAM3, STM32MP211FAN3, STM32MP211FAO3, STM32MP213AAL3, STM32MP213AAM3, STM32MP213AAN3, STM32MP213AAO3, STM32MP213CAL3, STM32MP213CAM3, STM32MP213CAN3, STM32MP213CAO3, STM32MP213DAL3, STM32MP213DAM3, STM32MP213DAN3, STM32MP213DAO3, STM32MP213FAL3, STM32MP213FAM3, STM32MP213FAN3, STM32MP213FAO3, STM32MP215AAL3, STM32MP215AAM3, STM32MP215AAN3, STM32MP215AAO3, STM32MP215CAL3, STM32MP215CAM3, STM32MP215CAN3, STM32MP215CAO3, STM32MP215DAL3, STM32MP215DAM3, STM32MP215DAN3, STM32MP215DAO3, STM32MP215F-DK, STM32MP215FAL3, STM32MP215FAM3, STM32MP215FAN3, STM32MP215FAO3, STM32MP231AAJ3, STM32MP231AAK3, STM32MP231AAL3, STM32MP231CAJ3, STM32MP231CAK3, STM32MP231CAL3, STM32MP231DAJ3, STM32MP231DAK3, STM32MP231DAL3, STM32MP231FAJ3, STM32MP231FAK3, STM32MP231FAL3, STM32MP233AAJ3, STM32MP233AAK3, STM32MP233AAL3, STM32MP233CAJ3, STM32MP233CAK3, STM32MP233CAL3, STM32MP233DAJ3, STM32MP233DAK3, STM32MP233DAL3, STM32MP233FAJ3, STM32MP233FAK3, STM32MP233FAL3, STM32MP235AAJ3, STM32MP235AAK3, STM32MP235AAL3, STM32MP235CAJ3, STM32MP235CAK3, STM32MP235CAL3, STM32MP235DAJ3, STM32MP235DAK3, STM32MP235DAL3, STM32MP235FAJ3, STM32MP235FAK3, STM32MP235FAL3, STM32MP251AAI3, STM32MP251AAK3, STM32MP251AAL3, STM32MP251CAI3, STM32MP251CAK3, STM32MP251CAL3, STM32MP251DAI3, STM32MP251DAK3, STM32MP251DAL3, STM32MP251FAI3, STM32MP251FAK3, STM32MP251FAL3, STM32MP253AAI3, STM32MP253AAK3, STM32MP253AAL3, STM32MP253CAI3, STM32MP253CAK3, STM32MP253CAL3, STM32MP253DAI3, STM32MP253DAK3, STM32MP253DAL3, STM32MP253FAI3, STM32MP253FAK3, STM32MP253FAL3, STM32MP255AAI3, STM32MP255AAK3, STM32MP255AAL3, STM32MP255CAI3, STM32MP255CAK3, STM32MP255CAL3, STM32MP255DAI3, STM32MP255DAK3, STM32MP255DAL3, STM32MP255FAI3, STM32MP255FAK3, STM32MP255FAL3, STM32MP257AAI3, STM32MP257AAK3, STM32MP257AAL3, STM32MP257CAI3, STM32MP257CAK3, STM32MP257CAL3, STM32MP257DAI3, STM32MP257DAK3, STM32MP257DAL3, STM32MP257F-DK, STM32MP257F-EV1, STM32MP257FAI3, STM32MP257FAK3, STM32MP257FAL3, STM32N645A0H3Q, STM32N645B0H3Q, STM32N645I0H3Q, STM32N645L0H3Q, STM32N645X0H3Q, STM32N645Z0H3Q, STM32N647A0H3Q, STM32N647B0H3Q, STM32N647I0H3Q, STM32N647L0H3Q, STM32N647X0H3Q, STM32N647Z0H3Q, STM32N655A0H3Q, STM32N655B0H3Q, STM32N655I0H3Q, STM32N655L0H3Q, STM32N655X0H3Q, STM32N655Z0H3Q, STM32N6570-DK, STM32N657A0H3Q, STM32N657B0H3Q, STM32N657I0H3Q, STM32N657L0H3Q, STM32N657X0H3Q, STM32N657Z0H3Q, STM32U031C6T6, STM32U031C6U6, STM32U031C8T6, STM32U031C8U6, STM32U031F4P6, STM32U031F6P6, STM32U031F8P6, STM32U031G6Y6TR, STM32U031G8Y6TR, STM32U031K4U6, STM32U031K6U6, STM32U031K8U6, STM32U031R6I6, STM32U031R6T6, STM32U031R8I6, STM32U031R8T6, STM32U073C8T6, STM32U073C8U6, STM32U073CBT6, STM32U073CBU6, STM32U073CCT6, STM32U073CCU6, STM32U073H8Y6TR, STM32U073HBY6TR, STM32U073HCY6TR, STM32U073K8U6, STM32U073KBU6, STM32U073KCU6, STM32U073M8I6, STM32U073M8T6, STM32U073MBI6, STM32U073MBT6, STM32U073MCI6, STM32U073MCT6, STM32U073R8I6, STM32U073R8T6, STM32U073RBI6, STM32U073RBT6, STM32U073RCI6, STM32U073RCT6, STM32U083C-DK, STM32U083CCT6, STM32U083CCU6, STM32U083HCY6TR, STM32U083KCU6, STM32U083MCI6, STM32U083MCT6, STM32U083RCI6, STM32U083RCT6, STM32U375CET6, STM32U375CET6Q, STM32U375CEU6, STM32U375CEU6Q, STM32U375CEY6QTR, STM32U375CGT6, STM32U375CGT6Q, STM32U375CGU6, STM32U375CGU6Q, STM32U375CGY6QTR, STM32U375KEU6, STM32U375KGU6, STM32U375REI6, STM32U375REI6Q, STM32U375RET6, STM32U375RET6Q, STM32U375REY6GTR, STM32U375REY6QTR, STM32U375RGI6, STM32U375RGI6Q, STM32U375RGT6, STM32U375RGT6Q, STM32U375RGY6GTR, STM32U375RGY6QTR, STM32U375VEI6, STM32U375VEI6Q, STM32U375VET6, STM32U375VET6Q, STM32U375VGI6, STM32U375VGI6Q, STM32U375VGT6, STM32U375VGT6Q, STM32U385CGT6, STM32U385CGT6Q, STM32U385CGU6, STM32U385CGU6Q, STM32U385CGY6QTR, STM32U385KGU6, STM32U385RGI6, STM32U385RGI6Q, STM32U385RGT6, STM32U385RGT6Q, STM32U385RGY6GTR, STM32U385RGY6QTR, STM32U385VGI6, STM32U385VGI6Q, STM32U385VGT6, STM32U385VGT6Q, STM32U535CBT6, STM32U535CBT6Q, STM32U535CBU6, STM32U535CBU6Q, STM32U535CCT6, STM32U535CCT6Q, STM32U535CCU6, STM32U535CCU6Q, STM32U535CET6, STM32U535CET6Q, STM32U535CEU6, STM32U535CEU6Q, STM32U535JEY6QTR, STM32U535NCY6QTR, STM32U535NEY6QTR, STM32U535RBI6, STM32U535RBI6Q, STM32U535RBT6, STM32U535RBT6Q, STM32U535RCI6, STM32U535RCI6Q, STM32U535RCT6, STM32U535RCT6Q, STM32U535REI6, STM32U535REI6Q, STM32U535RET6, STM32U535RET6Q, STM32U535VCI6, STM32U535VCI6Q, STM32U535VCT6, STM32U535VCT6Q, STM32U535VEI6, STM32U535VEI6Q, STM32U535VET6, STM32U535VET6Q, STM32U545CET6, STM32U545CET6Q, STM32U545CEU6, STM32U545CEU6Q, STM32U545JEY6QTR, STM32U545NEY6QTR, STM32U545REI6, STM32U545REI6Q, STM32U545RET6, STM32U545RET6Q, STM32U545VEI6, STM32U545VEI6Q, STM32U545VET6, STM32U545VET6Q, STM32U595AIH6, STM32U595AIH6Q, STM32U595AJH6, STM32U595AJH6Q, STM32U595QII6, STM32U595QII6Q, STM32U595QJI6, STM32U595QJI6Q, STM32U595RIT6, STM32U595RIT6Q, STM32U595RJT6, STM32U595RJT6Q, STM32U595VIT6, STM32U595VIT6Q, STM32U595VJT6, STM32U595VJT6Q, STM32U595ZIT6, STM32U595ZIT6Q, STM32U595ZIY6QTR, STM32U595ZJT6, STM32U595ZJT6Q, STM32U595ZJY6QTR, STM32U599BJY6QTR, STM32U599NIH6Q, STM32U599NJH6Q, STM32U599VIT6Q, STM32U599VJT6, STM32U599VJT6Q, STM32U599ZIT6Q, STM32U599ZIY6QTR, STM32U599ZJT6Q, STM32U599ZJY6QTR, STM32U5A5AJH6, STM32U5A5AJH6Q, STM32U5A5QII3Q , STM32U5A5QJI6, STM32U5A5QJI6Q, STM32U5A5RJT6, STM32U5A5RJT6Q, STM32U5A5VJT6, STM32U5A5VJT6Q, STM32U5A5ZJT6, STM32U5A5ZJT6Q, STM32U5A5ZJY6QTR, STM32U5A9BJY6QTR, STM32U5A9J-DK, STM32U5A9NJH6Q, STM32U5A9VJT6Q, STM32U5A9ZJT6Q, STM32U5A9ZJY6QTR, STM32U5F7VIT6, STM32U5F7VIT6Q, STM32U5F7VJT6, STM32U5F7VJT6Q, STM32U5F9BJY6QTR, STM32U5F9NJH6Q, STM32U5F9VIT6Q, STM32U5F9VJT6Q, STM32U5F9ZIJ6QTR, STM32U5F9ZIT6Q, STM32U5F9ZJJ6QTR, STM32U5F9ZJT6Q, STM32U5G7VJT6, STM32U5G7VJT6Q, STM32U5G9BJY6QTR, STM32U5G9J-DK1, STM32U5G9J-DK2, STM32U5G9NJH6Q, STM32U5G9VJT6Q, STM32U5G9ZJJ6QTR, STM32U5G9ZJT6Q, STM32WB05KZV6TR, STM32WB05KZV7TR, STM32WB05TZF6TR, STM32WB05TZF7TR, STM32WB06CCF6TR, STM32WB06CCF7TR, STM32WB06CCV6TR, STM32WB06CCV7TR, STM32WB06KCV6TR, STM32WB06KCV7TR, STM32WB07CCF6TR, STM32WB07CCF7TR, STM32WB07CCV6TR, STM32WB07CCV7TR, STM32WB07KCV6TR, STM32WB07KCV7TR, STM32WB09KEV6TR, STM32WB09KEV7TR, STM32WB09TEF6TR, STM32WB09TEF7TR, STM32WB1MMCH6, STM32WBA50KGU6, STM32WBA50KGU6TR, STM32WBA52CEU6, STM32WBA52CEU6TR, STM32WBA52CEU7, STM32WBA52CEU7TR, STM32WBA52CGU6, STM32WBA52CGU6TR, STM32WBA52CGU6U, STM32WBA52CGU7, STM32WBA52CGU7TR, STM32WBA52KEU6, STM32WBA52KEU6TR, STM32WBA52KGU6, STM32WBA52KGU6TR, STM32WBA54CEU6, STM32WBA54CEU6TR, STM32WBA54CEU7, STM32WBA54CEU7TR, STM32WBA54CGU6, STM32WBA54CGU6TR, STM32WBA54CGU7, STM32WBA54CGU7TR, STM32WBA54KEU6, STM32WBA54KEU6TR, STM32WBA54KEU7, STM32WBA54KEU7TR, STM32WBA54KGU6, STM32WBA54KGU6TR, STM32WBA54KGU7, STM32WBA54KGU7TR, STM32WBA55CEU6, STM32WBA55CEU6TR, STM32WBA55CEU7, STM32WBA55CEU7TR, STM32WBA55CGU6, STM32WBA55CGU6TR, STM32WBA55CGU6U, STM32WBA55CGU7, STM32WBA55CGU7TR, STM32WBA55G-DK1, STM32WBA55HEF6, STM32WBA55HEF7, STM32WBA55HGF6, STM32WBA55HGF7, STM32WBA55UEI6, STM32WBA55UEI6TR, STM32WBA55UEI7, STM32WBA55UEI7TR, STM32WBA55UGI6, STM32WBA55UGI6TR, STM32WBA55UGI7, STM32WBA55UGI7TR, STM32WBA5MMGH6TR, STM32WBA62MGF6, STM32WBA62MIF6, STM32WBA65MGF7, STM32WBA65MIF6, STM32WBA65MIF7, STM32WL30K8V6, STM32WL30KBV6, STM32WL31C8V6, STM32WL31CBV6, STM32WL31K8V6, STM32WL31KBV6, STM32WL33C8V6, STM32WL33C8V6X, STM32WL33CBV6, STM32WL33CBV6X, STM32WL33CCV6, STM32WL33CCV6A, STM32WL33CCV6X, STM32WL33K8V7, STM32WL33K8V7X, STM32WL33KBV7 , STM32WL33KBV7X, STM32WL33KCV7, STM32WL33KCV7X, STM32WL5MOCH6, STM32WL5MOCH6TR]
+2025-10-13 15:08:45,989 [INFO] BoardInfo:889 - No configuration file found for board P-NUCLEO-WB55
+2025-10-13 15:08:45,989 [INFO] DbBoards:161 - Kit is not supported: P-NUCLEO-WB55
+2025-10-13 15:08:45,993 [INFO] BoardInfo:889 - No configuration file found for board STEVAL-BFA001V1B
+2025-10-13 15:08:45,993 [INFO] DbBoards:161 - Kit is not supported: STEVAL-BFA001V1B
+2025-10-13 15:08:45,994 [INFO] BoardInfo:889 - No configuration file found for board STEVAL-BFA001V2B
+2025-10-13 15:08:45,994 [INFO] DbBoards:161 - Kit is not supported: STEVAL-BFA001V2B
+2025-10-13 15:08:46,106 [INFO] DbBoards:168 - Found 212 boards, 209 are supported
+2025-10-13 15:08:46,106 [INFO] DbBoards:169 - Found 212 boards, 43 of them is supported for  Bsp
+2025-10-13 15:08:46,109 [INFO] ApiDb:423 - Load user favorites file /home/ja/.stm32cubeide/favorites.boards.txt: 1 item(s)
+2025-10-13 15:08:46,109 [INFO] ApiDb:427 - User favorites Boards=[STM32F429I-DISC1]
+2025-10-13 15:08:46,109 [INFO] DbBoards:198 - Set 1 / 1 favorites Boards
+2025-10-13 15:08:47,408 [ERROR] TargetSelectorAdapter:267 - Unable to refresh data
+2025-10-13 15:08:47,452 [INFO] McuFinderGlobals:76 - Set McuFinderConnectedMode to true
+2025-10-13 15:08:47,454 [INFO] MultiScanPanel:200 - Auto-refresh data requested => check proxy status ongoing
+2025-10-13 15:08:47,454 [INFO] FinderPluginLoader:96 - Searching for filters in installed packs
+2025-10-13 15:08:48,666 [INFO] LoadUrlFilesThread:185 - End of LoadServerUrlFiles without Thread
+2025-10-13 15:08:48,666 [INFO] DetailPanel:341 - Set advertising image to /home/ja/STM32Cube/Repository//en.2400x1350px.jpeg
+2025-10-13 15:08:53,893 [INFO] MultiScanPanel:200 - Auto-refresh data requested => check proxy status ongoing
+2025-10-13 15:08:54,011 [INFO] LoadUrlFilesThread:185 - End of LoadServerUrlFiles without Thread
+2025-10-13 15:08:54,011 [INFO] DetailPanel:341 - Set advertising image to /home/ja/STM32Cube/Repository//en.2400x1350px.jpeg
+2025-10-13 15:08:54,021 [INFO] DbBoards:642 - Loading board mini-images...
+2025-10-13 15:08:56,318 [ERROR] DbBoards:659 - Image file not found for board STM32MP215F-DK: /home/ja/.stmcufinder/plugins/mcufinder//mcu//boards_images/STM32MP215F-DK.jpg
+2025-10-13 15:08:56,446 [INFO] DbBoards:665 - Loaded 211 board mini-images
+2025-10-13 15:08:59,381 [INFO] MultiScanPanel:200 - Auto-refresh data requested => check proxy status ongoing
+2025-10-13 15:08:59,384 [INFO] ApiDb:668 - CubeFinder database Data Model version=2.1
+2025-10-13 15:08:59,392 [INFO] ApiDb:669 - CubeFinder database Configuration version=3.0.39
+2025-10-13 15:08:59,392 [INFO] ApiDb:670 - CubeFinder database generation date=2025-08-25 (1756130511)
+2025-10-13 15:08:59,392 [INFO] ApiDb:671 - CubeFinder database FW Pack versions=[FP-ATR-ASTRA1_V2.0.0, FP-SNS-FLIGHT1_V5.1.0, FP-SNS-MOTENV1_V5.0.0, FP-SNS-MOTENVWB1_V1.4.0, FP-SNS-SMARTAG2_V1.2.0, FP-SNS-STBOX1_V2.1.0, STM32Cube_FW_C0_V1.4.0, STM32Cube_FW_F4_V1.28.3, STM32Cube_FW_F7_V1.17.4, STM32Cube_FW_G0_V1.6.2, STM32Cube_FW_G4_V1.6.1, STM32Cube_FW_H5_V1.5.0, STM32Cube_FW_H7RS_V1.2.0, STM32Cube_FW_H7_V1.12.1, STM32Cube_FW_L0_V1.12.2, STM32Cube_FW_L4_V1.18.1, STM32Cube_FW_L5_V1.5.1, STM32Cube_FW_N6_V1.2.0, STM32Cube_FW_U0_V1.3.0, STM32Cube_FW_U3_V1.2.0, STM32Cube_FW_U5_V1.8.0, STM32Cube_FW_WB0_V1.3.0, STM32Cube_FW_WBA_V1.7.0, STM32Cube_FW_WB_V1.23.0, STM32Cube_FW_WL3_V1.2.0, STM32Cube_FW_WL_V1.3.1, X-CUBE-ALGOBUILD_V1.4.0, X-CUBE-ALS_V1.0.2, X-CUBE-AZRTOS-F4_V1.1.0, X-CUBE-AZRTOS-F7_V1.1.0, X-CUBE-AZRTOS-G0_V1.1.0, X-CUBE-AZRTOS-G4_V2.0.0, X-CUBE-AZRTOS-H7RS_V1.1.0, X-CUBE-AZRTOS-H7_V3.4.0, X-CUBE-AZRTOS-L4_V2.0.0, X-CUBE-AZRTOS-L5_V2.0.0, X-CUBE-AZRTOS-WB_V2.0.0, X-CUBE-AZRTOS-WL_V2.0.0, X-CUBE-BLE1_V7.1.0, X-CUBE-BLE2_V3.3.0, X-CUBE-BLEMGR_V4.1.0, X-CUBE-EEPRMA1_V5.2.0, X-CUBE-FREERTOS_V1.3.1, X-CUBE-GNSS1_V6.0.0, X-CUBE-MEMS1_V11.3.0, X-CUBE-NFC4_V3.0.0, X-CUBE-NFC7_V2.0.0, X-CUBE-SFXS2LP1_V4.0.0, X-CUBE-ST67W61_V1.0.0, X-CUBE-SUBG2_V5.0.0, X-CUBE-TOF1_V3.4.3]
+2025-10-13 15:09:00,057 [ERROR] DbExamplesSqlite:437 - Missing JSON key: board_cpn
+2025-10-13 15:09:00,057 [ERROR] DbExamplesSqlite:437 - Missing JSON key: board_cpn
+2025-10-13 15:09:00,057 [ERROR] DbExamplesSqlite:437 - Missing JSON key: board_cpn
+2025-10-13 15:09:00,057 [ERROR] DbExamplesSqlite:437 - Missing JSON key: board_cpn
+2025-10-13 15:09:00,420 [ERROR] DbExamplesSqlite:437 - Missing JSON key: board_cpn
+2025-10-13 15:09:00,420 [ERROR] DbExamplesSqlite:437 - Missing JSON key: board_cpn
+2025-10-13 15:09:00,423 [INFO] DbExamplesSqlite:395 - Ignored 33 examples not supported by CubeIDE
+2025-10-13 15:09:00,423 [INFO] DbExamplesSqlite:396 - Found 10871 examples active
+2025-10-13 15:09:00,423 [INFO] DbExamplesSqlite:397 - Found 0 examples obsolete
+2025-10-13 15:09:00,424 [INFO] DbExamplesSqlite:398 - Found 0 examples under development
+2025-10-13 15:09:00,424 [INFO] DbExamplesSqlite:399 - Found 65 examples not building
+2025-10-13 15:09:00,426 [INFO] DbExamples:125 - Found 10903 examples
+2025-10-13 15:09:00,444 [INFO] DbExamples:222 - Found 134 boards with related examples
+2025-10-13 15:09:00,446 [INFO] DbExamples:235 - Found 111 MCUs with related examples
+2025-10-13 15:09:00,475 [INFO] ApiDb:414 - User favorites file not found: /home/ja/.stm32cubeide/favorites.examples.txt
+2025-10-13 15:09:00,475 [INFO] DbExamples:250 - Set 0 / 0 favorites Examples
+2025-10-13 15:09:01,678 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'FP-ATR-ASTRA1_V2.0.0'
+2025-10-13 15:09:01,678 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'FP-SNS-FLIGHT1_V5.1.0'
+2025-10-13 15:09:01,679 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'FP-SNS-MOTENV1_V5.0.0'
+2025-10-13 15:09:01,679 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'FP-SNS-MOTENVWB1_V1.4.0'
+2025-10-13 15:09:01,679 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'FP-SNS-SMARTAG2_V1.2.0'
+2025-10-13 15:09:01,679 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'FP-SNS-STBOX1_V2.1.0'
+2025-10-13 15:09:01,684 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_C0_V1.4.0'
+2025-10-13 15:09:01,686 [INFO] SoftwarePacks:131 - Found SW pack 'STM32Cube_FW_F4_V1.28.3' up-to-date on disk.
+2025-10-13 15:09:01,689 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_F7_V1.17.4'
+2025-10-13 15:09:01,691 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_G0_V1.6.2'
+2025-10-13 15:09:01,693 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_G4_V1.6.1'
+2025-10-13 15:09:01,695 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_H5_V1.5.0'
+2025-10-13 15:09:01,698 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_H7RS_V1.2.0'
+2025-10-13 15:09:01,700 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_H7_V1.12.1'
+2025-10-13 15:09:01,702 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_L0_V1.12.2'
+2025-10-13 15:09:01,704 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_L4_V1.18.1'
+2025-10-13 15:09:01,706 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_L5_V1.5.1'
+2025-10-13 15:09:01,708 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_N6_V1.2.0'
+2025-10-13 15:09:01,711 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_U0_V1.3.0'
+2025-10-13 15:09:01,714 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_U3_V1.2.0'
+2025-10-13 15:09:01,716 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_U5_V1.8.0'
+2025-10-13 15:09:01,718 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_WB0_V1.3.0'
+2025-10-13 15:09:01,720 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_WBA_V1.7.0'
+2025-10-13 15:09:01,722 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_WB_V1.23.0'
+2025-10-13 15:09:01,724 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_WL3_V1.2.0'
+2025-10-13 15:09:01,726 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'STM32Cube_FW_WL_V1.3.1'
+2025-10-13 15:09:01,726 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-ALGOBUILD_V1.4.0'
+2025-10-13 15:09:01,726 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-ALS_V1.0.2'
+2025-10-13 15:09:01,726 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-AZRTOS-F4_V1.1.0'
+2025-10-13 15:09:01,726 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-AZRTOS-F7_V1.1.0'
+2025-10-13 15:09:01,726 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-AZRTOS-G0_V1.1.0'
+2025-10-13 15:09:01,726 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-AZRTOS-G4_V2.0.0'
+2025-10-13 15:09:01,727 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-AZRTOS-H7RS_V1.1.0'
+2025-10-13 15:09:01,727 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-AZRTOS-H7_V3.4.0'
+2025-10-13 15:09:01,727 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-AZRTOS-L4_V2.0.0'
+2025-10-13 15:09:01,727 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-AZRTOS-L5_V2.0.0'
+2025-10-13 15:09:01,727 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-AZRTOS-WB_V2.0.0'
+2025-10-13 15:09:01,727 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-AZRTOS-WL_V2.0.0'
+2025-10-13 15:09:01,727 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-BLE1_V7.1.0'
+2025-10-13 15:09:01,727 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-BLE2_V3.3.0'
+2025-10-13 15:09:01,727 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-BLEMGR_V4.1.0'
+2025-10-13 15:09:01,727 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-EEPRMA1_V5.2.0'
+2025-10-13 15:09:01,727 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-FREERTOS_V1.3.1'
+2025-10-13 15:09:01,727 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-GNSS1_V6.0.0'
+2025-10-13 15:09:01,727 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-MEMS1_V11.3.0'
+2025-10-13 15:09:01,727 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-NFC4_V3.0.0'
+2025-10-13 15:09:01,728 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-NFC7_V2.0.0'
+2025-10-13 15:09:01,728 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-SFXS2LP1_V4.0.0'
+2025-10-13 15:09:01,728 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-ST67W61_V1.0.0'
+2025-10-13 15:09:01,728 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-SUBG2_V5.0.0'
+2025-10-13 15:09:01,728 [INFO] SoftwarePacks:127 - Download is needed for SW pack 'X-CUBE-TOF1_V3.4.3'
+2025-10-13 15:09:03,403 [INFO] LoadUrlFilesThread:185 - End of LoadServerUrlFiles without Thread
+2025-10-13 15:09:03,404 [INFO] DetailPanel:341 - Set advertising image to /home/ja/STM32Cube/Repository//en.2400x1350px.jpeg
+2025-10-13 15:09:04,643 [ERROR] AppliInfo:139 - Unknown STM32CubeMX version: 6.12.1
+2025-10-13 15:11:09,060 [INFO] BoardResultTable:719 - Unmark Board STM32F429I-DISC1 as favorite
+2025-10-13 15:11:43,410 [INFO] McuFinderGlobals:76 - Set McuFinderConnectedMode to true
+2025-10-13 15:11:49,563 [INFO] ApiDb:448 - Save user favorites file /home/ja/.stm32cubeide/favorites.mcus.txt: 0 item(s)
+2025-10-13 15:11:49,563 [INFO] ApiDb:452 - User favorites MCUs=[]
+2025-10-13 15:11:49,563 [INFO] ApiDb:448 - Save user favorites file /home/ja/.stm32cubeide/favorites.boards.txt: 0 item(s)
+2025-10-13 15:11:49,564 [INFO] ApiDb:452 - User favorites Boards=[]
+2025-10-13 15:11:49,565 [INFO] ApiDb:448 - Save user favorites file /home/ja/.stm32cubeide/favorites.examples.txt: 0 item(s)
+2025-10-13 15:11:49,566 [INFO] ApiDb:452 - User favorites Examples=[]
+2025-10-13 15:11:49,743 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] Exception in thread "AWT-EventQueue-0" java.lang.NullPointerException: Cannot invoke "com.st.stm32cube.common.mx.targetselector.IdeMcuFinder.cleanUp(boolean)" because "this.this$0.mcuFinder" is null
+2025-10-13 15:11:49,743 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at com.st.stm32cube.common.mx.targetselector.TargetSelectorAdapter$7.run(TargetSelectorAdapter.java:353)
+2025-10-13 15:11:49,743 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.AwtEnvironment$2.run(AwtEnvironment.java:166)
+2025-10-13 15:11:49,743 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.event.InvocationEvent.dispatch(InvocationEvent.java:318)
+2025-10-13 15:11:49,744 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventQueue.dispatchEventImpl(EventQueue.java:773)
+2025-10-13 15:11:49,744 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventQueue$4.run(EventQueue.java:720)
+2025-10-13 15:11:49,744 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventQueue$4.run(EventQueue.java:714)
+2025-10-13 15:11:49,744 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.base/java.security.AccessController.doPrivileged(AccessController.java:400)
+2025-10-13 15:11:49,744 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.base/java.security.ProtectionDomain$JavaSecurityAccessImpl.doIntersectionPrivilege(ProtectionDomain.java:87)
+2025-10-13 15:11:49,744 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventQueue.dispatchEvent(EventQueue.java:742)
+2025-10-13 15:11:49,745 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventDispatchThread.pumpOneEventForFilters(EventDispatchThread.java:203)
+2025-10-13 15:11:49,745 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventDispatchThread.pumpEventsForFilter(EventDispatchThread.java:124)
+2025-10-13 15:11:49,745 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventDispatchThread.pumpEventsForHierarchy(EventDispatchThread.java:113)
+2025-10-13 15:11:49,745 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:109)
+2025-10-13 15:11:49,745 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:101)
+2025-10-13 15:11:49,745 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventDispatchThread.run(EventDispatchThread.java:90)
+2025-10-13 15:12:18,806 [INFO] MainUpdater:2872 - connection check result : 10
+2025-10-13 15:12:18,806 [INFO] MainUpdater:2872 - connection check result : 10
+2025-10-13 15:12:19,788 [INFO] MicroXplorer:468 - Change Database Path : 
+2025-10-13 15:12:19,788 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-10-13 15:12:19,801 [ERROR] ProjectManagerView:395 - 
+java.lang.NullPointerException: Cannot invoke "javax.swing.JTextField.getText()" because the return value of "java.util.List.get(int)" is null
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab$9.caretUpdate(ProjectChoiceTab.java:2706) ~[filemanager.jar:?]
+	at javax.swing.text.JTextComponent.fireCaretUpdate(JTextComponent.java:408) ~[?:?]
+	at javax.swing.text.JTextComponent$MutableCaretEvent.fire(JTextComponent.java:4484) ~[?:?]
+	at javax.swing.text.JTextComponent$MutableCaretEvent.stateChanged(JTextComponent.java:4506) ~[?:?]
+	at javax.swing.text.DefaultCaret.fireStateChanged(DefaultCaret.java:857) ~[?:?]
+	at javax.swing.text.DefaultCaret.changeCaretPosition(DefaultCaret.java:1343) ~[?:?]
+	at javax.swing.text.DefaultCaret.handleSetDot(DefaultCaret.java:1242) ~[?:?]
+	at javax.swing.text.DefaultCaret.setDot(DefaultCaret.java:1223) ~[?:?]
+	at javax.swing.text.DefaultCaret$Handler.insertUpdate(DefaultCaret.java:1819) ~[?:?]
+	at javax.swing.text.AbstractDocument.fireInsertUpdate(AbstractDocument.java:227) ~[?:?]
+	at javax.swing.text.AbstractDocument.handleInsertString(AbstractDocument.java:781) ~[?:?]
+	at javax.swing.text.AbstractDocument.insertString(AbstractDocument.java:740) ~[?:?]
+	at javax.swing.text.PlainDocument.insertString(PlainDocument.java:131) ~[?:?]
+	at javax.swing.text.AbstractDocument.replace(AbstractDocument.java:699) ~[?:?]
+	at javax.swing.text.JTextComponent.setText(JTextComponent.java:1725) ~[?:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.createHeapStackFields(ProjectChoiceTab.java:993) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.buildLinkSettingsPanel(ProjectChoiceTab.java:3813) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.defineWindowsFields(ProjectChoiceTab.java:1987) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectChoiceTab.updateSettings(ProjectChoiceTab.java:558) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.gui.ProjectSettingsPanel.UpdateDialog(ProjectSettingsPanel.java:247) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.projectmanager.ProjectManagerView.propertyChange(ProjectManagerView.java:392) ~[filemanager.jar:?]
+	at java.beans.PropertyChangeSupport.fire(PropertyChangeSupport.java:343) ~[?:?]
+	at java.beans.PropertyChangeSupport.firePropertyChange(PropertyChangeSupport.java:335) ~[?:?]
+	at java.beans.PropertyChangeSupport.firePropertyChange(PropertyChangeSupport.java:268) ~[?:?]
+	at com.st.microxplorer.util.MXPropertyChangeSupport.firePropertyChange(MXPropertyChangeSupport.java:54) ~[STM32CubeMX.jar:?]
+	at com.st.microxplorer.mxsystem.MxSystem.closeConfig(MxSystem.java:899) ~[STM32CubeMX.jar:?]
+	at com.st.microxplorer.maingui.MainPanel.closeConfig(MainPanel.java:792) ~[STM32CubeMX.jar:?]
+	at com.st.microxplorer.plugins.filemanager.engine.OpenFileManager.loadConfigurationFile(OpenFileManager.java:288) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.filemanager.engine.MainFileManager.userLoadConfig(MainFileManager.java:364) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.filemanager.engine.MainFileManager.userLoadConfig(MainFileManager.java:342) ~[filemanager.jar:?]
+	at com.st.microxplorer.plugins.filemanager.FileManagerView.getSpecificTask(FileManagerView.java:264) ~[filemanager.jar:?]
+	at com.st.stm32cube.common.mx.editor.CubeMxEditor.getMxTabbedPaneInstance(CubeMxEditor.java:1198) ~[com.st.stm32cube.common.mx_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.editor.CubeMxEditor$12$1.createSwingComponent(CubeMxEditor.java:1068) ~[com.st.stm32cube.common.mx_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.EmbeddedSwingComposite.doComponentCreation(EmbeddedSwingComposite.java:492) ~[com.st.stm32cube.common.mx.oss_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.EmbeddedSwingComposite$4.run(EmbeddedSwingComposite.java:291) ~[com.st.stm32cube.common.mx.oss_6.15.0.202507011659/:?]
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.AwtEnvironment$2.run(AwtEnvironment.java:166) ~[com.st.stm32cube.common.mx.oss_6.15.0.202507011659/:?]
+	at java.awt.event.InvocationEvent.dispatch(InvocationEvent.java:318) ~[?:?]
+	at java.awt.EventQueue.dispatchEventImpl(EventQueue.java:773) ~[?:?]
+	at java.awt.EventQueue$4.run(EventQueue.java:720) ~[?:?]
+	at java.awt.EventQueue$4.run(EventQueue.java:714) ~[?:?]
+	at java.security.AccessController.doPrivileged(AccessController.java:400) ~[?:?]
+	at java.security.ProtectionDomain$JavaSecurityAccessImpl.doIntersectionPrivilege(ProtectionDomain.java:87) ~[?:?]
+	at java.awt.EventQueue.dispatchEvent(EventQueue.java:742) ~[?:?]
+	at java.awt.EventDispatchThread.pumpOneEventForFilters(EventDispatchThread.java:203) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEventsForFilter(EventDispatchThread.java:124) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEventsForHierarchy(EventDispatchThread.java:113) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:109) ~[?:?]
+	at java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:101) ~[?:?]
+	at java.awt.EventDispatchThread.run(EventDispatchThread.java:90) ~[?:?]
+2025-10-13 15:12:19,802 [WARN] ThirdParty:871 - waiting for thirdparty lock release [close project]
+2025-10-13 15:12:19,802 [INFO] ThirdParty:873 - entering critical section [close project]
+2025-10-13 15:12:19,802 [INFO] ThirdParty:883 - exiting critical section [close project]
+2025-10-13 15:12:19,804 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-10-13 15:12:19,810 [WARN] IpParametersView:155 - Warning: This peripheral hasn't parameters
+2025-10-13 15:12:19,816 [WARN] MainPanel:289 - <html><b><center>Warning: This peripheral has no parameters to be configured<br></b></html>
+2025-10-13 15:12:19,819 [INFO] UtilMem:75 - Begin LoadConfig() Used Memory: 660311592 Bytes (1073741824)
+2025-10-13 15:12:19,820 [INFO] MicroXplorer:468 - Change Database Path : 
+2025-10-13 15:12:19,820 [INFO] MicroXplorer:498 - Change Database Version : DB.6.0.150
+2025-10-13 15:12:19,820 [INFO] OpenFileManager:355 - Change cursor
+2025-10-13 15:12:19,846 [INFO] Mcu:2029 - Initializing MCU STM32F429ZITx STM32F429ZITx STM32F429ZIT6
+2025-10-13 15:12:21,213 [INFO] Context:786 - Trying to add GPIOservice into a context  which must be forbidden
+2025-10-13 15:12:21,983 [INFO] ImportTextPane:234 - (OptionalMessage_ERROR) Pin10 (VP_RIF_VS_RIF1) cannot be retrieved for this MCU
+2025-10-13 15:12:22,064 [INFO] RtosManager:558 - Registered RTOS mode: class=CMSIS, group=RTOS, mode=CMSIS_V1, owner=FREERTOS
+2025-10-13 15:12:22,064 [INFO] RtosManager:558 - Registered RTOS mode: class=CMSIS, group=RTOS2, mode=CMSIS_V2, owner=FREERTOS
+2025-10-13 15:12:22,064 [INFO] RtosManager:558 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V1, owner=FREERTOS
+2025-10-13 15:12:22,064 [INFO] RtosManager:558 - Registered RTOS mode: class=RTOS, group=Core, mode=CMSIS_V2, owner=FREERTOS
+2025-10-13 15:12:22,064 [WARN] ModelIntegratedComponent:184 - Missing modes for component STMicroelectronics:FreeRTOS:0.0.1:STMicroelectronics:RTOS:FreeRTOS:Core:::10.2.0:
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,085 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelIntegratedComponent:63 - No mode defined for component null
+2025-10-13 15:12:22,086 [WARN] ModelPack:524 - Component already loaded: STMicroelectronics:HAL Drivers:0.0.0:STMicroelectronics:Device:STMicro_Driver:XSPI:HAL::0.0.1:HAL_XSPI
+2025-10-13 15:12:22,281 [INFO] ThirdPartyModel:298 - Start build external matchings
+2025-10-13 15:12:22,708 [INFO] ThirdPartyModel:316 - End build external matchings
+2025-10-13 15:12:22,720 [INFO] RtosManager:1018 - Current active RTOS is FREERTOS [Cortex-M4NS]
+2025-10-13 15:12:22,974 [INFO] UtilMem:75 - End LoadConfig() Used Memory: 437010648 Bytes (1073741824)
+2025-10-13 15:12:22,996 [WARN] ThirdParty:833 - waiting for thirdparty lock release [change project]
+2025-10-13 15:12:22,996 [INFO] ThirdParty:835 - entering critical section [change project]
+2025-10-13 15:12:22,996 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-PM33A1 1.0.0
+2025-10-13 15:12:22,997 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USBPD 4.1
+2025-10-13 15:12:22,997 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-NFC9 1.0.0
+2025-10-13 15:12:22,997 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_HOST 2.0.0
+2025-10-13 15:12:22,997 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-MOTENVWB1 1.4.0
+2025-10-13 15:12:22,997 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-F4 1.1.0
+2025-10-13 15:12:22,997 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics LIBJPEG 8.0.0
+2025-10-13 15:12:22,997 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-ATR-ASTRA1 2.0.2
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+2025-10-13 15:12:23,000 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.3.0
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+2025-10-13 15:12:23,001 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics HAL Drivers 0.0.0
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+2025-10-13 15:12:23,001 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics MBEDTLS 2.14.1
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+2025-10-13 15:12:23,001 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ST67W61 1.0.0
+2025-10-13 15:12:23,001 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-STBOX1 2.1.0
+2025-10-13 15:12:23,001 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AI 10.2.0
+2025-10-13 15:12:23,001 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-STAIOTCFT 1.0.0
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+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-SMARTAG2 1.2.0
+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-FLIGHT1 5.1.0
+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-WL 2.0.0
+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :SEGGER I-CUBE-embOS 1.3.1
+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-ALGOBUILD 1.4.0
+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-DPower 1.3.0
+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-MEMS1 11.3.0
+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics FP-SNS-MOTENV1 5.0.0
+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics USB_DEVICE 1.0.0
+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-AZRTOS-L4 2.0.0
+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics ThreadX 0.0.2
+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics lwIP 2.1.2
+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-SFXS2LP1 4.0.0
+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-BLE2 3.3.0
+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics X-CUBE-TOF1 3.4.3
+2025-10-13 15:12:23,003 [INFO] ThirdParty:1030 - CMSIS Pack Vendor :STMicroelectronics PDM2PCM 3.2.0
+2025-10-13 15:12:23,004 [INFO] ThirdParty:841 - exiting critical section [change project]
+2025-10-13 15:12:23,323 [INFO] PinOutPanel:1589 - setPackage(No Configuration,No Configuration)
+2025-10-13 15:12:23,324 [INFO] PinOutPanel:1589 - setPackage(STM32F429ZITx,LQFP144)
+2025-10-13 15:12:23,683 [INFO] UtilMem:75 - Before build in PCC Used Memory: 660896064 Bytes (1073741824)
+2025-10-13 15:12:24,057 [INFO] UtilMem:75 - After build in PCC Used Memory: 711749952 Bytes (1073741824)
+2025-10-13 15:12:24,066 [INFO] ApiDbMcu:532 - Load IP Config File for FREERTOS
+2025-10-13 15:12:24,104 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,104 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,104 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,104 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,104 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,105 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,105 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,105 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,105 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,105 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,106 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,106 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,106 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,106 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,106 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,106 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,106 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,106 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,107 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,107 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,107 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,107 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,107 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,108 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,108 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,108 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,108 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,109 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,109 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,109 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,110 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,110 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,110 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,110 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,110 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,110 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,111 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,111 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,111 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,111 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,111 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,111 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,111 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,111 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,112 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,112 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,112 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,112 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,112 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,112 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,112 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,112 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,112 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,113 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,113 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,113 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,114 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,114 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,115 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,115 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,116 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,116 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,117 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,118 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,119 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,119 [INFO] IPUIPlugin:80 - create IPUIPlugin
+2025-10-13 15:12:24,122 [INFO] ApiDbMcu:532 - Load IP Config File for PDM2PCM
+2025-10-13 15:12:24,131 [WARN] FreeRTOS:1023 - Null or empty value: should not occur! (nothing added to the table)
+2025-10-13 15:12:24,192 [INFO] CADModel:165 - CPN selected for project levelSTM32F429ZIT6
+2025-10-13 15:12:24,192 [INFO] CADModel:114 - Register for checkConnection events
+2025-10-13 15:12:24,195 [INFO] RtosManager:728 - Active RTOS found at IOC load: FREERTOS [Cortex-M4NS]
+2025-10-13 15:12:24,238 [INFO] OpenFileManager:386 - Restore cursor
+2025-10-13 15:12:24,241 [INFO] ApiDb:581 - Connected to CubeFinder SQLite database (/home/ja/.stmcufinder/plugins/mcufinder/mcu/cube-finder-db.db)
+2025-10-13 15:12:43,605 [INFO] UtilMem:75 - End SaveConfig() Used Memory: 831287616 Bytes (1073741824)
+2025-10-13 15:12:44,938 [INFO] UtilMem:75 - End SaveConfig() Used Memory: 889485632 Bytes (1073741824)
+2025-10-13 15:12:46,868 [INFO] UtilMem:75 - End SaveConfig() Used Memory: 365503456 Bytes (1073741824)
+2025-10-13 15:12:48,288 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: FREERTOS
+2025-10-13 15:12:48,288 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: TIM1_8
+2025-10-13 15:12:48,289 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: SYS
+2025-10-13 15:12:48,289 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: RCC
+2025-10-13 15:12:48,289 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: CRC
+2025-10-13 15:12:48,289 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: NVIC
+2025-10-13 15:12:48,289 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: DMA2D
+2025-10-13 15:12:48,289 [INFO] BlockDiagram:2775 - set Specific Code input for plugin: GPIO
+2025-10-13 15:12:48,290 [INFO] CodeGenerator:892 - code generatio: config db path: /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.common.mx_6.15.0.202507011659//db/
+2025-10-13 15:12:48,455 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/license.tmp_save
+2025-10-13 15:12:48,815 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/license.tmp
+2025-10-13 15:12:48,865 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/gpio.tmp_save
+2025-10-13 15:12:49,002 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/gpio.tmp
+2025-10-13 15:12:49,164 [INFO] Middleware:1452 - No code input for Bsp Dependency
+2025-10-13 15:12:49,169 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_inc.tmp_save
+2025-10-13 15:12:49,274 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_inc.tmp
+2025-10-13 15:12:49,277 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_vars.tmp_save
+2025-10-13 15:12:49,382 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_vars.tmp
+2025-10-13 15:12:49,385 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_pfp.tmp_save
+2025-10-13 15:12:49,482 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_pfp.tmp
+2025-10-13 15:12:49,484 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_obj_creat.tmp_save
+2025-10-13 15:12:49,550 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_obj_creat.tmp
+2025-10-13 15:12:49,551 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_kernelStart.tmp_save
+2025-10-13 15:12:49,612 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_kernelStart.tmp
+2025-10-13 15:12:49,614 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_default_thread.tmp_save
+2025-10-13 15:12:49,695 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_default_thread.tmp
+2025-10-13 15:12:49,697 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_threads.tmp_save
+2025-10-13 15:12:49,753 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_threads.tmp
+2025-10-13 15:12:49,764 [INFO] Middleware:1452 - No code input for Bsp Dependency
+2025-10-13 15:12:49,767 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_inc.tmp_save
+2025-10-13 15:12:49,821 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_inc.tmp
+2025-10-13 15:12:49,822 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_vars.tmp_save
+2025-10-13 15:12:49,877 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_vars.tmp
+2025-10-13 15:12:49,878 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_pfp.tmp_save
+2025-10-13 15:12:49,937 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_pfp.tmp
+2025-10-13 15:12:49,938 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_obj_creat.tmp_save
+2025-10-13 15:12:50,013 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_obj_creat.tmp
+2025-10-13 15:12:50,014 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_kernelStart.tmp_save
+2025-10-13 15:12:50,066 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_kernelStart.tmp
+2025-10-13 15:12:50,067 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_default_thread.tmp_save
+2025-10-13 15:12:50,116 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_default_thread.tmp
+2025-10-13 15:12:50,117 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_threads.tmp_save
+2025-10-13 15:12:50,164 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/rtos_threads.tmp
+2025-10-13 15:12:50,166 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/Core/Inc/FreeRTOSConfig.h_save
+2025-10-13 15:12:50,243 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/Core/Inc/FreeRTOSConfig.h
+2025-10-13 15:12:50,245 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/Core/Src/freertos.c_save
+2025-10-13 15:12:50,312 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/Core/Src/freertos.c
+2025-10-13 15:12:50,322 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/Core/Src/stm32f4xx_it.c_save
+2025-10-13 15:12:50,450 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/Core/Src/stm32f4xx_it.c
+2025-10-13 15:12:50,451 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/Core/Inc/stm32f4xx_it.h_save
+2025-10-13 15:12:50,512 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/Core/Inc/stm32f4xx_it.h
+2025-10-13 15:12:50,518 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/Core/Src/stm32f4xx_hal_msp.c_save
+2025-10-13 15:12:50,661 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/Core/Src/stm32f4xx_hal_msp.c
+2025-10-13 15:12:50,663 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/system.tmp_save
+2025-10-13 15:12:50,734 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/MXTmpFiles/system.tmp
+2025-10-13 15:12:50,736 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/Core/Src/stm32f4xx_hal_timebase_tim.c_save
+2025-10-13 15:12:50,793 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/Core/Src/stm32f4xx_hal_timebase_tim.c
+2025-10-13 15:12:50,799 [INFO] CodeEngine:321 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/Core/Inc/stm32f4xx_hal_conf.h_save
+2025-10-13 15:12:50,859 [INFO] CodeEngine:345 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/Core/Inc/stm32f4xx_hal_conf.h
+2025-10-13 15:12:50,887 [INFO] ApiDbMcu:532 - Load IP Config File for CRC
+2025-10-13 15:12:50,891 [INFO] ApiDbMcu:532 - Load IP Config File for DMA2D
+2025-10-13 15:12:50,910 [INFO] ApiDbMcu:532 - Load IP Config File for TIM1
+2025-10-13 15:12:50,915 [INFO] ApiDbMcu:532 - Load IP Config File for RCC
+2025-10-13 15:12:50,920 [WARN] IPConfigManager:3811 - IP not found : TIM
+2025-10-13 15:12:50,920 [WARN] CodeGenerator:4259 - IP not found : null
+2025-10-13 15:12:50,924 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/Core/Inc/main.h_save
+2025-10-13 15:12:51,027 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/Core/Inc/main.h
+2025-10-13 15:12:51,029 [INFO] CodeEngine:265 - oldGeneratedFile, /home/ja/st/Home/TrafficLightsPlusPlus/Core/Src/main.c_save
+2025-10-13 15:12:51,186 [INFO] CodeEngine:289 - Generated code: /home/ja/st/Home/TrafficLightsPlusPlus/Core/Src/main.c
+2025-10-13 15:12:51,446 [INFO] ProjectBuilder:3606 - Time for Copy HAL[1] : 46mS.
+2025-10-13 15:12:51,452 [INFO] ProjectBuilder:5216 - Project Generator version: 4.7.0-B52
+2025-10-13 15:12:51,573 [INFO] ConfigFileManager:1595 - The Die is : DIE419
+2025-10-13 15:12:51,578 [INFO] ApiDbMcu:532 - Load IP Config File for FATFS
+2025-10-13 15:12:51,580 [INFO] ApiDbMcu:532 - Load IP Config File for LIBJPEG
+2025-10-13 15:12:51,585 [INFO] ApiDbMcu:532 - Load IP Config File for LWIP
+2025-10-13 15:12:51,591 [INFO] ApiDbMcu:532 - Load IP Config File for MBEDTLS
+2025-10-13 15:12:51,598 [INFO] ApiDbMcu:532 - Load IP Config File for USB_DEVICE
+2025-10-13 15:12:51,601 [INFO] ApiDbMcu:532 - Load IP Config File for USB_HOST
+2025-10-13 15:12:52,459 [INFO] LogOutputStream:77 - [STDOUT_REDIRECT] 
+2025-10-13 15:12:53,328 [INFO] ProjectBuilder:5496 - Time for Generating toolchain IDE Files: 1875mS.
+2025-10-13 15:12:53,329 [INFO] ProjectBuilder:3463 - Time for Copy CMSIS : 1mS.
+2025-10-13 15:12:53,330 [INFO] ProjectBuilder:3463 - Time for Copy CMSIS : 0mS.
+2025-10-13 15:15:26,912 [INFO] WebAppUi:305 - Path where cad_preferences.json is located /home/ja/.stm32cubeide/
+2025-10-13 15:15:26,912 [INFO] WebAppUi:306 - Updating consent from JSON file
+2025-10-13 15:15:26,915 [INFO] WebAppUi:305 - Path where cad_preferences.json is located /home/ja/.stm32cubeide/
+2025-10-13 15:15:26,915 [INFO] WebAppUi:306 - Updating consent from JSON file
+2025-10-13 15:15:27,011 [INFO] WebApp:403 - JxBrowser engine has been closed 
+2025-10-13 15:15:27,011 [INFO] WebAppUi:504 - JxBrowser engine has been closed 
+2025-10-13 15:15:27,011 [INFO] WebAppUi:541 - Close the Jxbrowser engine manually
+2025-10-13 15:15:27,922 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] Exception in thread "AWT-EventQueue-0" org.eclipse.swt.SWTException: Device is disposed
+2025-10-13 15:15:27,922 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at org.eclipse.swt.SWT.error(SWT.java:4922)
+2025-10-13 15:15:27,922 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at org.eclipse.swt.SWT.error(SWT.java:4837)
+2025-10-13 15:15:27,922 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at org.eclipse.swt.SWT.error(SWT.java:4808)
+2025-10-13 15:15:27,923 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at org.eclipse.swt.widgets.Display.error(Display.java:1551)
+2025-10-13 15:15:27,923 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at org.eclipse.swt.widgets.Display.asyncExec(Display.java:920)
+2025-10-13 15:15:27,923 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.AwtEnvironment$2.run(AwtEnvironment.java:168)
+2025-10-13 15:15:27,923 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.event.InvocationEvent.dispatch(InvocationEvent.java:318)
+2025-10-13 15:15:27,923 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventQueue.dispatchEventImpl(EventQueue.java:773)
+2025-10-13 15:15:27,923 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventQueue$4.run(EventQueue.java:720)
+2025-10-13 15:15:27,924 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventQueue$4.run(EventQueue.java:714)
+2025-10-13 15:15:27,924 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.base/java.security.AccessController.doPrivileged(AccessController.java:400)
+2025-10-13 15:15:27,924 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.base/java.security.ProtectionDomain$JavaSecurityAccessImpl.doIntersectionPrivilege(ProtectionDomain.java:87)
+2025-10-13 15:15:27,924 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventQueue.dispatchEvent(EventQueue.java:742)
+2025-10-13 15:15:27,925 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventDispatchThread.pumpOneEventForFilters(EventDispatchThread.java:203)
+2025-10-13 15:15:27,925 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventDispatchThread.pumpEventsForFilter(EventDispatchThread.java:124)
+2025-10-13 15:15:27,925 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventDispatchThread.pumpEventsForHierarchy(EventDispatchThread.java:113)
+2025-10-13 15:15:27,925 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:109)
+2025-10-13 15:15:27,925 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventDispatchThread.pumpEvents(EventDispatchThread.java:101)
+2025-10-13 15:15:27,926 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 	at java.desktop/java.awt.EventDispatchThread.run(EventDispatchThread.java:90)
+2025-10-13 15:15:28,006 [ERROR] LogOutputStream:75 - [STDERR_REDIRECT] 
diff --git a/.metadata/.log b/.metadata/.log
index bea58a8..a1d4060 100644
--- a/.metadata/.log
+++ b/.metadata/.log
@@ -890,3 +890,57 @@ Command-line arguments:  -os linux -ws gtk -arch x86_64
 
 !ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2025-10-13 14:21:59.450
 !MESSAGE Started RMI Server, listening on port 41337
+!SESSION 2025-10-13 14:55:51.990 -----------------------------------------------
+eclipse.buildId=Version 1.19.0
+java.version=21.0.3
+java.vendor=Eclipse Adoptium
+BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=en_US
+Command-line arguments:  -os linux -ws gtk -arch x86_64
+
+!ENTRY com.st.stm32cube.ide.mcu.informationcenter 4 4 2025-10-13 14:55:58.181
+!MESSAGE CubeMX plugin appears to be active, Log4j initialization might be too late.
+
+!ENTRY com.st.stm32cube.ide.mcu.informationcenter 1 1 2025-10-13 14:55:58.181
+!MESSAGE Log4j2 initialized with config file /home/ja/st/Home/.metadata/.log4j2.xml
+
+!ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2025-10-13 14:56:04.995
+!MESSAGE Started RMI Server, listening on port 41337
+
+!ENTRY org.eclipse.ui 4 0 2025-10-13 15:15:27.871
+!MESSAGE Unhandled event loop exception
+!STACK 0
+java.lang.NullPointerException: Cannot invoke "org.eclipse.ui.IWorkbenchWindow.getShell()" because the return value of "org.eclipse.ui.IWorkbench.getActiveWorkbenchWindow()" is null
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.AwtEnvironment.getShell(AwtEnvironment.java:281)
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.SwtInputBlocker.block(SwtInputBlocker.java:98)
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.AwtEnvironment.invokeAwt(AwtEnvironment.java:179)
+	at com.st.stm32cube.common.mx.oss.core.awtswtbridge.EmbeddedSwingComposite$3.widgetDisposed(EmbeddedSwingComposite.java:244)
+	at org.eclipse.swt.widgets.TypedListener.handleEvent(TypedListener.java:140)
+	at org.eclipse.swt.widgets.EventTable.sendEvent(EventTable.java:91)
+	at org.eclipse.swt.widgets.Display.sendEvent(Display.java:5855)
+	at org.eclipse.swt.widgets.Widget.sendEvent(Widget.java:1617)
+	at org.eclipse.swt.widgets.Widget.sendEvent(Widget.java:1643)
+	at org.eclipse.swt.widgets.Widget.sendEvent(Widget.java:1622)
+	at org.eclipse.swt.widgets.Widget.release(Widget.java:1394)
+	at org.eclipse.swt.widgets.Control.release(Control.java:4753)
+	at org.eclipse.swt.widgets.Composite.releaseChildren(Composite.java:1560)
+	at org.eclipse.swt.widgets.Canvas.releaseChildren(Canvas.java:279)
+	at org.eclipse.swt.widgets.Decorations.releaseChildren(Decorations.java:503)
+	at org.eclipse.swt.widgets.Shell.releaseChildren(Shell.java:3435)
+	at org.eclipse.swt.widgets.Widget.release(Widget.java:1401)
+	at org.eclipse.swt.widgets.Control.release(Control.java:4753)
+	at org.eclipse.swt.widgets.Widget.dispose(Widget.java:575)
+	at org.eclipse.swt.widgets.Shell.dispose(Shell.java:3352)
+	at org.eclipse.swt.widgets.Display.release(Display.java:4573)
+	at org.eclipse.swt.graphics.Device.dispose(Device.java:276)
+	at org.eclipse.ui.internal.ide.application.IDEApplication.start(IDEApplication.java:168)
+	at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:208)
+	at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:143)
+	at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:109)
+	at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:439)
+	at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:271)
+	at java.base/jdk.internal.reflect.DirectMethodHandleAccessor.invoke(DirectMethodHandleAccessor.java:103)
+	at java.base/java.lang.reflect.Method.invoke(Method.java:580)
+	at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:668)
+	at org.eclipse.equinox.launcher.Main.basicRun(Main.java:605)
+	at org.eclipse.equinox.launcher.Main.run(Main.java:1481)
+	at org.eclipse.equinox.launcher.Main.main(Main.java:1454)
diff --git a/.metadata/.plugins/org.eclipse.cdt.core/.log b/.metadata/.plugins/org.eclipse.cdt.core/.log
index 165dc1d..09fb57a 100644
--- a/.metadata/.plugins/org.eclipse.cdt.core/.log
+++ b/.metadata/.plugins/org.eclipse.cdt.core/.log
@@ -24,3 +24,4 @@
 *** SESSION Sep 30, 2025 16:10:38.815 ------------------------------------------
 *** SESSION Oct 06, 2025 14:00:17.912 ------------------------------------------
 *** SESSION Oct 13, 2025 14:21:51.496 ------------------------------------------
+*** SESSION Oct 13, 2025 14:55:57.07 -------------------------------------------
diff --git a/.metadata/.plugins/org.eclipse.cdt.core/TrafficLightsPlusPlus.1758569400646.pdom b/.metadata/.plugins/org.eclipse.cdt.core/TrafficLightsPlusPlus.1758569400646.pdom
index d12e199..957cbf6 100644
Binary files a/.metadata/.plugins/org.eclipse.cdt.core/TrafficLightsPlusPlus.1758569400646.pdom and b/.metadata/.plugins/org.eclipse.cdt.core/TrafficLightsPlusPlus.1758569400646.pdom differ
diff --git a/.metadata/.plugins/org.eclipse.cdt.ui/TrafficLightsPlusPlus.build.log b/.metadata/.plugins/org.eclipse.cdt.ui/TrafficLightsPlusPlus.build.log
index c030526..2bfe967 100644
--- a/.metadata/.plugins/org.eclipse.cdt.ui/TrafficLightsPlusPlus.build.log
+++ b/.metadata/.plugins/org.eclipse.cdt.ui/TrafficLightsPlusPlus.build.log
@@ -1,11 +1,17 @@
-14:52:33 **** Incremental Build of configuration Debug for project TrafficLightsPlusPlus ****
+15:13:41 **** Incremental Build of configuration Debug for project TrafficLightsPlusPlus ****
 make -j8 all 
+arm-none-eabi-g++ "../Core/Src/main.cpp" -mcpu=cortex-m4 -std=gnu++14 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-use-cxa-atexit -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o"
 arm-none-eabi-g++ -o "TrafficLightsPlusPlus.elf" @"objects.list"   -mcpu=cortex-m4 -T"/home/ja/st/Home/TrafficLightsPlusPlus/STM32F429ZITX_FLASH.ld" --specs=nosys.specs -Wl,-Map="TrafficLightsPlusPlus.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -lstdc++ -lsupc++ -Wl,--end-group
-/home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/bin/ld: ./Core/Src/stm32f4xx_it.o: in function `DMA2D_IRQHandler':
-/home/ja/st/Home/TrafficLightsPlusPlus/Debug/../Core/Src/stm32f4xx_it.c:203:(.text.DMA2D_IRQHandler+0x10): undefined reference to `hdma2d'
-collect2: error: ld returned 1 exit status
-make: *** [makefile:92: TrafficLightsPlusPlus.elf] Error 1
-"make -j8 all" terminated with exit code 2. Build might be incomplete.
+Finished building target: TrafficLightsPlusPlus.elf
+ 
+arm-none-eabi-size  TrafficLightsPlusPlus.elf 
+arm-none-eabi-objdump -h -S TrafficLightsPlusPlus.elf  > "TrafficLightsPlusPlus.list"
+   text	   data	    bss	    dec	    hex	filename
+   9328	      8	   1832	  11168	   2ba0	TrafficLightsPlusPlus.elf
+Finished building: default.size.stdout
+ 
+Finished building: TrafficLightsPlusPlus.list
+ 
 
-14:52:33 Build Failed. 2 errors, 0 warnings. (took 171ms)
+15:13:41 Build Finished. 0 errors, 0 warnings. (took 434ms)
 
diff --git a/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log b/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log
index e2354e9..ea5628d 100644
--- a/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log
+++ b/.metadata/.plugins/org.eclipse.cdt.ui/global-build.log
@@ -1,8 +1,14 @@
-14:52:33 **** Incremental Build of configuration Debug for project TrafficLightsPlusPlus ****
+15:13:41 **** Incremental Build of configuration Debug for project TrafficLightsPlusPlus ****
 make -j8 all 
+arm-none-eabi-g++ "../Core/Src/main.cpp" -mcpu=cortex-m4 -std=gnu++14 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Middlewares/Third_Party/FreeRTOS/Source/include -I../Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS -I../Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -fno-exceptions -fno-rtti -fno-use-cxa-atexit -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Core/Src/main.d" -MT"Core/Src/main.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Core/Src/main.o"
 arm-none-eabi-g++ -o "TrafficLightsPlusPlus.elf" @"objects.list"   -mcpu=cortex-m4 -T"/home/ja/st/Home/TrafficLightsPlusPlus/STM32F429ZITX_FLASH.ld" --specs=nosys.specs -Wl,-Map="TrafficLightsPlusPlus.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -lstdc++ -lsupc++ -Wl,--end-group
-/home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/bin/ld: ./Core/Src/stm32f4xx_it.o: in function `DMA2D_IRQHandler':
-/home/ja/st/Home/TrafficLightsPlusPlus/Debug/../Core/Src/stm32f4xx_it.c:203:(.text.DMA2D_IRQHandler+0x10): undefined reference to `hdma2d'
-collect2: error: ld returned 1 exit status
-make: *** [makefile:92: TrafficLightsPlusPlus.elf] Error 1
-"make -j8 all" terminated with exit code 2. Build might be incomplete.
+Finished building target: TrafficLightsPlusPlus.elf
+ 
+arm-none-eabi-size  TrafficLightsPlusPlus.elf 
+arm-none-eabi-objdump -h -S TrafficLightsPlusPlus.elf  > "TrafficLightsPlusPlus.list"
+   text	   data	    bss	    dec	    hex	filename
+   9328	      8	   1832	  11168	   2ba0	TrafficLightsPlusPlus.elf
+Finished building: default.size.stdout
+ 
+Finished building: TrafficLightsPlusPlus.list
+ 
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/7f/6024f71371a800101307d7e09c4a4be7 b/.metadata/.plugins/org.eclipse.core.resources/.history/7f/6024f71371a800101307d7e09c4a4be7
new file mode 100644
index 0000000..ea80735
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/7f/6024f71371a800101307d7e09c4a4be7
@@ -0,0 +1,337 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+// Feeling sneaky.
+extern "C" {
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+}
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+#include <stdbool.h>
+
+enum class TrafficState { GREEN, YELLOW, RED };
+void SetTrafficLights(TrafficState s);
+
+TrafficState currentState = TrafficState::GREEN;
+uint32_t stateStartTime = 0; //HAL_GetTick() at the start of this state
+bool buttonPressedThisCycle = false;
+bool pedestrianNextCycle = false;
+bool pedestrianThisCycle = false;
+
+const uint32_t DURATION_GREEN = 5000;
+const uint32_t DURATION_YELLOW = 3000;
+const uint32_t DURATION_RED_NOPED = 5000;
+const uint32_t DURATION_RED_PED = 7000;
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+
+void SetTrafficLights(TrafficState s)
+{
+	// reset all
+	HAL_GPIO_WritePin(GPIOD, Green_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GPIOD, Yellow_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GPIOD, Red_Pin, GPIO_PIN_SET);
+
+	switch (s)
+	{
+	case TrafficState::GREEN :
+		HAL_GPIO_WritePin(GPIOD, Green_Pin, GPIO_PIN_SET);
+		break;
+	case TrafficState::YELLOW :
+		HAL_GPIO_WritePin(GPIOD, Yellow_Pin, GPIO_PIN_SET);
+		break;
+	case TrafficState::RED:
+		HAL_GPIO_WritePin(GPIOD, Red_Pin, GPIO_PIN_SET);
+		break;
+	}
+}
+
+int main(void)
+{
+
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+  MX_GPIO_Init();
+  
+  stateStartTime = HAL_GetTick();
+  SetTrafficLights(currentState);
+  
+  while (1)
+  {
+    /* USER CODE END WHILE */
+	  uint32_t now = HAL_GetTick();
+	  uint32_t elapsed = now - stateStartTime;
+
+	  switch(currentState)
+	  {
+	  case TrafficState::GREEN:
+		  if (buttonPressedThisCycle)
+			  pedestrianThisCycle = true;
+
+		  /*
+		  if (buttonPressedThisCycle)
+		  {
+			  currentState = TrafficState::YELLOW;
+			  stateStartTime = now;
+			  buttonPressedThisCycle = false;
+			  SetTrafficLights(currentState);
+		  }
+		  else
+		  {
+			  pedestrianNextCycle = false;
+			  SetTrafficLights(currentState);
+		  }
+		  */
+
+		  else if (elapsed >= DURATION_GREEN)
+		  {
+			  currentState = TrafficState::YELLOW;
+			  stateStartTime = now;
+			  SetTrafficLights(currentState);
+		  }
+		  break;
+	  case TrafficState::YELLOW:
+		  if (buttonPressedThisCycle || pedestrianNextCycle)
+			  pedestrianThisCycle = true;
+
+		  if (elapsed >= DURATION_YELLOW)
+		  {
+			  currentState = TrafficState::RED;
+			  stateStartTime = now;
+			  buttonPressedThisCycle = false; //TODO add pressed pedestrian button in yellow
+			  SetTrafficLights(currentState);
+			  // If Ped Button was pressed during GREEN or YELLOW, we need to enable WHITE this cycle
+		  }
+		  break;
+	  case TrafficState::RED:
+		  /*
+		  if (pedestrianNextCycle)
+		  {
+			  HAL_GPIO_WritePin(GPIOD,White_Pin,GPIO_PIN_SET); // turn on Pedestrian LED
+			  if (elapsed >= DURATION_RED_PED)
+			  {
+				  HAL_GPIO_WritePin(GPIOD,White_Pin,GPIO_PIN_RESET);
+				  pedestrianNextCycle = false;
+				  currentState = TrafficState::GREEN;
+				  stateStartTime = now;
+				  SetTrafficLights(currentState);
+			  }
+		  }
+		  else
+		  {
+			  HAL_GPIO_WritePin(GPIOD,White_Pin,GPIO_PIN_RESET);
+			  if(elapsed >= DURATION_RED_PED)
+			  {
+				  currentState = TrafficState::GREEN;
+				  stateStartTime = now;
+				  SetTrafficLights(currentState);
+			  }
+		  }
+		  */
+
+		  if (buttonPressedThisCycle)
+			  pedestrianNextCycle = true;
+
+		  if (pedestrianThisCycle) {
+			  HAL_GPIO_WritePin(White_GPIO_Port, White_Pin, GPIO_PIN_RESET);
+			  pedestrianThisCycle = false;
+			  pedestrianNextCycle = false;
+			  currentState = TrafficState::GREEN;
+			  stateStartTime = now;
+			  SetTrafficLights(currentState);
+			  buttonPressedThisCycle = false;
+		  } else {
+			  HAL_GPIO_WritePin(White_GPIO_Port, White_Pin, GPIO_PIN_RESET);
+			  if (elapsed >= DURATION_RED_NOPED)
+			  {
+				  currentState = TrafficState::GREEN;
+				  stateStartTime = now;
+				  SetTrafficLights(currentState);
+				  buttonPressedThisCycle = false;
+			  }
+		  }
+		  break;
+	  }
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = 8;
+  RCC_OscInitStruct.PLL.PLLN = 50;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
+  RCC_OscInitStruct.PLL.PLLQ = 7;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV8;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV4;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  /* USER CODE BEGIN MX_GPIO_Init_1 */
+
+  /* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOD, White_Pin|Red_Pin|Yellow_Pin|Green_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin : PedButton_Pin */
+  GPIO_InitStruct.Pin = PedButton_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(PedButton_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : White_Pin Red_Pin Yellow_Pin Green_Pin */
+  GPIO_InitStruct.Pin = White_Pin|Red_Pin|Yellow_Pin|Green_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /* EXTI interrupt init*/
+  HAL_NVIC_SetPriority(EXTI15_10_IRQn, 15, 0);
+  HAL_NVIC_EnableIRQ(EXTI15_10_IRQn);
+
+  /* USER CODE BEGIN MX_GPIO_Init_2 */
+
+  /* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/*
+extern "C" void EXTI15_10_IRQHandler()
+{
+	HAL_GPIO_EXTI_IRQHandler(PedButton_Pin);
+}
+*/
+
+extern "C" void HAL_GPIO_EXTI_CallBack(uint16_t GPIO_Pin)
+{
+	static uint32_t lastInterruptTime = 0;
+	uint32_t now = HAL_GetTick();
+
+	// software debounce
+	if (now - lastInterruptTime < 100)
+		return;
+
+	lastInterruptTime = now;
+
+	if (GPIO_Pin == PedButton_Pin)
+		buttonPressedThisCycle = true;
+
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+#ifdef USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
+
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.history/be/a02be31771a800101307d7e09c4a4be7 b/.metadata/.plugins/org.eclipse.core.resources/.history/be/a02be31771a800101307d7e09c4a4be7
new file mode 100644
index 0000000..291d619
--- /dev/null
+++ b/.metadata/.plugins/org.eclipse.core.resources/.history/be/a02be31771a800101307d7e09c4a4be7
@@ -0,0 +1,312 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+// Feeling sneaky.
+extern "C" {
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+}
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+#include <stdbool.h>
+
+enum class TrafficState { GREEN, YELLOW, RED };
+void SetTrafficLights(TrafficState s);
+
+TrafficState currentState = TrafficState::GREEN;
+uint32_t stateStartTime = 0; //HAL_GetTick() at the start of this state
+bool buttonPressedThisCycle = false;
+bool pedestrianNextCycle = false;
+bool pedestrianThisCycle = false;
+
+const uint32_t DURATION_GREEN = 5000;
+const uint32_t DURATION_YELLOW = 3000;
+const uint32_t DURATION_RED_NOPED = 5000;
+const uint32_t DURATION_RED_PED = 7000;
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+
+void SetTrafficLights(TrafficState s)
+{
+	// reset all
+	HAL_GPIO_WritePin(GPIOD, Green_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GPIOD, Yellow_Pin, GPIO_PIN_RESET);
+	HAL_GPIO_WritePin(GPIOD, Red_Pin, GPIO_PIN_SET);
+
+	switch (s)
+	{
+	case TrafficState::GREEN :
+		HAL_GPIO_WritePin(GPIOD, Green_Pin, GPIO_PIN_SET);
+		break;
+	case TrafficState::YELLOW :
+		HAL_GPIO_WritePin(GPIOD, Yellow_Pin, GPIO_PIN_SET);
+		break;
+	case TrafficState::RED:
+		HAL_GPIO_WritePin(GPIOD, Red_Pin, GPIO_PIN_SET);
+		break;
+	}
+}
+
+int main(void)
+{
+
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+  MX_GPIO_Init();
+  
+  stateStartTime = HAL_GetTick();
+  SetTrafficLights(currentState);
+  
+  while (1)
+  {
+    /* USER CODE END WHILE */
+	  uint32_t now = HAL_GetTick();
+	  uint32_t elapsed = now - stateStartTime;
+
+	  switch(currentState)
+	  {
+	  case TrafficState::GREEN:
+		  if (buttonPressedThisCycle)
+			  pedestrianThisCycle = true;
+
+		  /*
+		  if (buttonPressedThisCycle)
+		  {
+			  currentState = TrafficState::YELLOW;
+			  stateStartTime = now;
+			  buttonPressedThisCycle = false;
+			  SetTrafficLights(currentState);
+		  }
+		  else
+		  {
+			  pedestrianNextCycle = false;
+			  SetTrafficLights(currentState);
+		  }
+		  */
+
+		  else if (elapsed >= DURATION_GREEN)
+		  {
+			  currentState = TrafficState::YELLOW;
+			  stateStartTime = now;
+			  SetTrafficLights(currentState);
+		  }
+		  break;
+	  case TrafficState::YELLOW:
+		  if (buttonPressedThisCycle || pedestrianNextCycle)
+			  pedestrianThisCycle = true;
+
+		  if (elapsed >= DURATION_YELLOW)
+		  {
+			  currentState = TrafficState::RED;
+			  stateStartTime = now;
+			  buttonPressedThisCycle = false; //TODO add pressed pedestrian button in yellow
+			  SetTrafficLights(currentState);
+			  // If Ped Button was pressed during GREEN or YELLOW, we need to enable WHITE this cycle
+		  }
+		  break;
+	  case TrafficState::RED:
+		  if (buttonPressedThisCycle)
+			  pedestrianNextCycle = true;
+
+		  if (pedestrianThisCycle) {
+			  HAL_GPIO_WritePin(White_GPIO_Port, White_Pin, GPIO_PIN_RESET);
+			  pedestrianThisCycle = false;
+			  pedestrianNextCycle = false;
+			  currentState = TrafficState::GREEN;
+			  stateStartTime = now;
+			  SetTrafficLights(currentState);
+			  buttonPressedThisCycle = false;
+		  } else {
+			  HAL_GPIO_WritePin(White_GPIO_Port, White_Pin, GPIO_PIN_RESET);
+			  if (elapsed >= DURATION_RED_NOPED)
+			  {
+				  currentState = TrafficState::GREEN;
+				  stateStartTime = now;
+				  SetTrafficLights(currentState);
+				  buttonPressedThisCycle = false;
+			  }
+		  }
+		  break;
+	  }
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = 8;
+  RCC_OscInitStruct.PLL.PLLN = 50;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
+  RCC_OscInitStruct.PLL.PLLQ = 7;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV8;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV4;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  /* USER CODE BEGIN MX_GPIO_Init_1 */
+
+  /* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOD, White_Pin|Red_Pin|Yellow_Pin|Green_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin : PedButton_Pin */
+  GPIO_InitStruct.Pin = PedButton_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(PedButton_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : White_Pin Red_Pin Yellow_Pin Green_Pin */
+  GPIO_InitStruct.Pin = White_Pin|Red_Pin|Yellow_Pin|Green_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /* EXTI interrupt init*/
+  HAL_NVIC_SetPriority(EXTI15_10_IRQn, 15, 0);
+  HAL_NVIC_EnableIRQ(EXTI15_10_IRQn);
+
+  /* USER CODE BEGIN MX_GPIO_Init_2 */
+
+  /* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/*
+extern "C" void EXTI15_10_IRQHandler()
+{
+	HAL_GPIO_EXTI_IRQHandler(PedButton_Pin);
+}
+*/
+
+extern "C" void HAL_GPIO_EXTI_CallBack(uint16_t GPIO_Pin)
+{
+	static uint32_t lastInterruptTime = 0;
+	uint32_t now = HAL_GetTick();
+
+	// software debounce
+	if (now - lastInterruptTime < 100)
+		return;
+
+	lastInterruptTime = now;
+
+	if (GPIO_Pin == PedButton_Pin)
+		buttonPressedThisCycle = true;
+
+}
+
+/* USER CODE END 4 */
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+#ifdef USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
+
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diff --git a/.metadata/.plugins/org.eclipse.core.resources/.root/26.tree b/.metadata/.plugins/org.eclipse.core.resources/.root/27.tree
similarity index 84%
rename from .metadata/.plugins/org.eclipse.core.resources/.root/26.tree
rename to .metadata/.plugins/org.eclipse.core.resources/.root/27.tree
index bbaa8de..611d3bc 100644
Binary files a/.metadata/.plugins/org.eclipse.core.resources/.root/26.tree and b/.metadata/.plugins/org.eclipse.core.resources/.root/27.tree differ
diff --git a/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources b/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources
index b4bfb89..8cc80a0 100644
Binary files a/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources and b/.metadata/.plugins/org.eclipse.core.resources/.safetable/org.eclipse.core.resources differ
diff --git a/.metadata/.plugins/org.eclipse.e4.workbench/workbench.xmi b/.metadata/.plugins/org.eclipse.e4.workbench/workbench.xmi
index 8ca935c..4548fee 100644
--- a/.metadata/.plugins/org.eclipse.e4.workbench/workbench.xmi
+++ b/.metadata/.plugins/org.eclipse.e4.workbench/workbench.xmi
@@ -1,6 +1,6 @@
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id=&quot;com.st.stm32cube.common.mx.startCubeMx&quot; name=&quot;MyNewProject.ioc&quot; tooltip=&quot;MyNewProject/MyNewProject.ioc&quot;>&#xA;&lt;persistable path=&quot;/MyNewProject/MyNewProject.ioc&quot;/>&#xA;&lt;/file>&#xA;&lt;file factoryID=&quot;org.eclipse.ui.part.FileEditorInputFactory&quot; id=&quot;org.eclipse.cdt.ui.editor.CEditor&quot; name=&quot;main.h&quot; tooltip=&quot;MyNewProject/Core/Inc/main.h&quot;>&#xA;&lt;persistable path=&quot;/MyNewProject/Core/Inc/main.h&quot;/>&#xA;&lt;/file>&#xA;&lt;/mruList>&#xA;&lt;/workbench>"/>
   <tags>activeSchemeId:org.eclipse.ui.defaultAcceleratorConfiguration</tags>
   <children xsi:type="basic:TrimmedWindow" xmi:id="_0XLTgZ8NEfCDuNgZVgbKNQ" elementId="IDEWindow" contributorURI="platform:/plugin/org.eclipse.ui.workbench" selectedElement="_0XLTgp8NEfCDuNgZVgbKNQ" x="962" y="32" width="950" height="1063">
     <persistedState key="coolBarVisible" value="true"/>
@@ -10,7 +10,6 @@
     <persistedState key="aggregateWorkingSetId" value="Aggregate for window 1756928609049"/>
     <persistedState key="show_in_time" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?>&#xA;&lt;show_in_time/>"/>
     <tags>topLevel</tags>
-    <tags>shellMaximized</tags>
     <children xsi:type="basic:PartSashContainer" xmi:id="_0XLTgp8NEfCDuNgZVgbKNQ" selectedElement="_0XLTg58NEfCDuNgZVgbKNQ" horizontal="true">
       <children xsi:type="advanced:PerspectiveStack" xmi:id="_0XLTg58NEfCDuNgZVgbKNQ" elementId="org.eclipse.ui.ide.perspectivestack" containerData="7500" selectedElement="_0XLThJ8NEfCDuNgZVgbKNQ">
         <children xsi:type="advanced:Perspective" xmi:id="_0XLThJ8NEfCDuNgZVgbKNQ" elementId="org.eclipse.cdt.ui.CPerspective" selectedElement="_0XLThZ8NEfCDuNgZVgbKNQ" label="C/C++" iconURI="platform:/plugin/org.eclipse.cdt.ui/icons/view16/c_pers.gif">
@@ -72,6 +71,8 @@
           <tags>persp.viewSC:com.st.stm32cube.ide.mcu.sfrview</tags>
           <children xsi:type="basic:PartSashContainer" xmi:id="_0XLThZ8NEfCDuNgZVgbKNQ" selectedElement="_0XLTip8NEfCDuNgZVgbKNQ" horizontal="true">
             <children xsi:type="basic:PartStack" xmi:id="_0XLThp8NEfCDuNgZVgbKNQ" elementId="topLeft" containerData="2500" selectedElement="_0XLTh58NEfCDuNgZVgbKNQ">
+              <tags>active</tags>
+              <tags>noFocus</tags>
               <children xsi:type="advanced:Placeholder" xmi:id="_0XLTh58NEfCDuNgZVgbKNQ" elementId="org.eclipse.ui.navigator.ProjectExplorer" ref="_0XLV758NEfCDuNgZVgbKNQ" closeable="true">
                 <tags>View</tags>
                 <tags>categoryTag:General</tags>
@@ -85,7 +86,7 @@
                 <tags>categoryTag:General</tags>
               </children>
             </children>
-            <children xsi:type="basic:PartSashContainer" xmi:id="_0XLTip8NEfCDuNgZVgbKNQ" containerData="7500" selectedElement="_0XLTi58NEfCDuNgZVgbKNQ">
+            <children xsi:type="basic:PartSashContainer" xmi:id="_0XLTip8NEfCDuNgZVgbKNQ" containerData="7500" selectedElement="_0XLTkZ8NEfCDuNgZVgbKNQ">
               <children xsi:type="basic:PartSashContainer" xmi:id="_0XLTi58NEfCDuNgZVgbKNQ" containerData="7500" selectedElement="_0XLTjJ8NEfCDuNgZVgbKNQ" horizontal="true">
                 <children xsi:type="advanced:Placeholder" xmi:id="_0XLTjJ8NEfCDuNgZVgbKNQ" elementId="org.eclipse.ui.editorss" containerData="7500" ref="_0XLVlZ8NEfCDuNgZVgbKNQ"/>
                 <children xsi:type="basic:PartStack" xmi:id="_0XLTjZ8NEfCDuNgZVgbKNQ" elementId="topRight" containerData="2500" selectedElement="_0XLTjp8NEfCDuNgZVgbKNQ">
@@ -160,7 +161,6 @@
           <tags>persp.newWizSC:com.st.stm32cube.ide.cmake.newwizard</tags>
           <children xsi:type="basic:PartSashContainer" xmi:id="_0XLTnJ8NEfCDuNgZVgbKNQ" selectedElement="_0XLTn58NEfCDuNgZVgbKNQ" horizontal="true">
             <children xsi:type="basic:PartStack" xmi:id="_0XLTnZ8NEfCDuNgZVgbKNQ" elementId="left" containerData="1825" selectedElement="_0XLTnp8NEfCDuNgZVgbKNQ">
-              <tags>noFocus</tags>
               <children xsi:type="advanced:Placeholder" xmi:id="_0XLTnp8NEfCDuNgZVgbKNQ" elementId="org.eclipse.ui.navigator.ProjectExplorer" ref="_0XLV758NEfCDuNgZVgbKNQ" closeable="true">
                 <tags>View</tags>
                 <tags>categoryTag:General</tags>
@@ -221,31 +221,15 @@
       <tags>categoryTag:Help</tags>
     </sharedElements>
     <sharedElements xsi:type="advanced:Area" xmi:id="_0XLVlZ8NEfCDuNgZVgbKNQ" elementId="org.eclipse.ui.editorss" selectedElement="_0XLVlp8NEfCDuNgZVgbKNQ">
-      <children xsi:type="basic:PartStack" xmi:id="_0XLVlp8NEfCDuNgZVgbKNQ" elementId="org.eclipse.e4.primaryDataStack" selectedElement="_Q0gOMKhuEfCkovSg1gr6mw">
+      <children xsi:type="basic:PartStack" xmi:id="_0XLVlp8NEfCDuNgZVgbKNQ" elementId="org.eclipse.e4.primaryDataStack" selectedElement="_--d5YKhwEfCMELkyTlt3Lw">
         <tags>EditorStack</tags>
         <tags>org.eclipse.e4.primaryDataStack</tags>
-        <tags>active</tags>
-        <tags>noFocus</tags>
-        <children xsi:type="basic:Part" xmi:id="_1f0HgKLnEfCgRf4LQxKG1w" elementId="org.eclipse.e4.ui.compatibility.editor" contributionURI="bundleclass://org.eclipse.ui.workbench/org.eclipse.ui.internal.e4.compatibility.CompatibilityEditor" label="main.cpp" iconURI="platform:/plugin/org.eclipse.cdt.ui/icons/obj16/c_file_obj.gif" closeable="true">
-          <persistedState key="memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?>&#xA;&lt;editor id=&quot;org.eclipse.cdt.ui.editor.CEditor&quot; name=&quot;main.cpp&quot; partName=&quot;main.cpp&quot; title=&quot;main.cpp&quot; tooltip=&quot;TrafficLightsPlusPlus/Core/Src/main.cpp&quot;>&#xA;&lt;input factoryID=&quot;org.eclipse.ui.part.FileEditorInputFactory&quot; path=&quot;/TrafficLightsPlusPlus/Core/Src/main.cpp&quot;/>&#xA;&lt;editorState selectionHorizontalPixel=&quot;0&quot; selectionLength=&quot;0&quot; selectionOffset=&quot;8036&quot; selectionTopPixel=&quot;4550&quot;/>&#xA;&lt;/editor>"/>
+        <children xsi:type="basic:Part" xmi:id="_--d5YKhwEfCMELkyTlt3Lw" elementId="org.eclipse.e4.ui.compatibility.editor" contributionURI="bundleclass://org.eclipse.ui.workbench/org.eclipse.ui.internal.e4.compatibility.CompatibilityEditor" label="main.cpp" iconURI="platform:/plugin/org.eclipse.cdt.ui/icons/obj16/c_file_obj.gif" closeable="true">
+          <persistedState key="memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?>&#xA;&lt;editor id=&quot;org.eclipse.cdt.ui.editor.CEditor&quot; name=&quot;main.cpp&quot; partName=&quot;main.cpp&quot; title=&quot;main.cpp&quot; tooltip=&quot;TrafficLightsPlusPlus/Core/Src/main.cpp&quot;>&#xA;&lt;input factoryID=&quot;org.eclipse.ui.part.FileEditorInputFactory&quot; path=&quot;/TrafficLightsPlusPlus/Core/Src/main.cpp&quot;/>&#xA;&lt;editorState selectionHorizontalPixel=&quot;0&quot; selectionLength=&quot;0&quot; selectionOffset=&quot;2738&quot; selectionTopPixel=&quot;0&quot;/>&#xA;&lt;/editor>"/>
           <tags>Editor</tags>
           <tags>removeOnHide</tags>
           <tags>org.eclipse.cdt.ui.editor.CEditor</tags>
         </children>
-        <children xsi:type="basic:Part" xmi:id="_dpiHQKhrEfCkovSg1gr6mw" elementId="org.eclipse.e4.ui.compatibility.editor" contributionURI="bundleclass://org.eclipse.ui.workbench/org.eclipse.ui.internal.e4.compatibility.CompatibilityEditor" label="main.h" iconURI="platform:/plugin/org.eclipse.cdt.ui/icons/obj16/c_file_obj.gif" closeable="true">
-          <persistedState key="memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?>&#xA;&lt;editor id=&quot;org.eclipse.cdt.ui.editor.CEditor&quot; name=&quot;main.h&quot; partName=&quot;main.h&quot; title=&quot;main.h&quot; tooltip=&quot;TrafficLightsPlusPlus/Core/Inc/main.h&quot;>&#xA;&lt;input factoryID=&quot;org.eclipse.ui.part.FileEditorInputFactory&quot; path=&quot;/TrafficLightsPlusPlus/Core/Inc/main.h&quot;/>&#xA;&lt;editorState selectionHorizontalPixel=&quot;0&quot; selectionLength=&quot;0&quot; selectionOffset=&quot;1455&quot; selectionTopPixel=&quot;748&quot;/>&#xA;&lt;/editor>"/>
-          <tags>Editor</tags>
-          <tags>removeOnHide</tags>
-          <tags>org.eclipse.cdt.ui.editor.CEditor</tags>
-        </children>
-        <children xsi:type="basic:Part" xmi:id="_Q0gOMKhuEfCkovSg1gr6mw" elementId="org.eclipse.e4.ui.compatibility.editor" contributionURI="bundleclass://org.eclipse.ui.workbench/org.eclipse.ui.internal.e4.compatibility.CompatibilityEditor" label="stm32f4xx_it.c" iconURI="platform:/plugin/org.eclipse.cdt.ui/icons/obj16/c_file_obj.gif" closeable="true">
-          <persistedState key="memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?>&#xA;&lt;editor id=&quot;org.eclipse.cdt.ui.editor.CEditor&quot; name=&quot;stm32f4xx_it.c&quot; partName=&quot;stm32f4xx_it.c&quot; title=&quot;stm32f4xx_it.c&quot; tooltip=&quot;TrafficLightsPlusPlus/Core/Src/stm32f4xx_it.c&quot;>&#xA;&lt;input factoryID=&quot;org.eclipse.ui.part.FileEditorInputFactory&quot; path=&quot;/TrafficLightsPlusPlus/Core/Src/stm32f4xx_it.c&quot;/>&#xA;&lt;editorState selectionHorizontalPixel=&quot;0&quot; selectionLength=&quot;6&quot; selectionOffset=&quot;5475&quot; selectionTopPixel=&quot;2873&quot;/>&#xA;&lt;/editor>"/>
-          <tags>Editor</tags>
-          <tags>removeOnHide</tags>
-          <tags>org.eclipse.cdt.ui.editor.CEditor</tags>
-          <tags>active</tags>
-          <tags>activeOnClose</tags>
-        </children>
       </children>
     </sharedElements>
     <sharedElements xsi:type="basic:Part" xmi:id="_0XLV758NEfCDuNgZVgbKNQ" elementId="org.eclipse.ui.navigator.ProjectExplorer" contributionURI="bundleclass://org.eclipse.ui.workbench/org.eclipse.ui.internal.e4.compatibility.CompatibilityView" label="Project Explorer" iconURI="platform:/plugin/org.eclipse.ui.navigator.resources/icons/full/eview16/resource_persp.png" tooltip="" closeable="true">
@@ -254,6 +238,8 @@
       <persistedState key="memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?>&#xA;&lt;view CommonNavigator.LINKING_ENABLED=&quot;0&quot; org.eclipse.cdt.ui.cview.groupincludes=&quot;false&quot; org.eclipse.cdt.ui.cview.groupmacros=&quot;false&quot; org.eclipse.cdt.ui.editor.CUChildren=&quot;true&quot; org.eclipse.ui.navigator.resources.workingSets.showTopLevelWorkingSets=&quot;0&quot;>&#xA;&lt;lastRecentlyUsedFilters/>&#xA;&lt;/view>"/>
       <tags>View</tags>
       <tags>categoryTag:General</tags>
+      <tags>active</tags>
+      <tags>activeOnClose</tags>
       <menus xmi:id="_0XLV8J8NEfCDuNgZVgbKNQ" elementId="org.eclipse.ui.navigator.ProjectExplorer">
         <tags>ViewMenu</tags>
         <tags>menuContribution:menu</tags>
@@ -275,7 +261,7 @@
     <sharedElements xsi:type="basic:Part" xmi:id="_0XLWC58NEfCDuNgZVgbKNQ" elementId="org.eclipse.ui.views.ProblemView" contributionURI="bundleclass://org.eclipse.ui.workbench/org.eclipse.ui.internal.e4.compatibility.CompatibilityView" label="Problems" iconURI="platform:/plugin/org.eclipse.ui.ide/icons/full/eview16/problems_view.png" tooltip="" closeable="true">
       <persistedState key="originalCompatibilityViewClass" value="org.eclipse.ui.internal.views.markers.ProblemsView"/>
       <persistedState key="originalCompatibilityViewBundle" value="org.eclipse.ui.ide"/>
-      <persistedState key="memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?>&#xA;&lt;view PRIMARY_SORT_FIELD=&quot;org.eclipse.ui.ide.severityAndDescriptionField&quot; categoryGroup=&quot;org.eclipse.ui.ide.severity&quot; markerContentGenerator=&quot;org.eclipse.ui.ide.problemsGenerator&quot;>&#xA;&lt;expanded>&#xA;&lt;category IMemento.internal.id=&quot;Errors&quot;/>&#xA;&lt;/expanded>&#xA;&lt;columnWidths org.eclipse.ui.ide.locationField=&quot;105&quot; org.eclipse.ui.ide.markerType=&quot;105&quot; org.eclipse.ui.ide.pathField=&quot;140&quot; org.eclipse.ui.ide.resourceField=&quot;105&quot; org.eclipse.ui.ide.severityAndDescriptionField=&quot;350&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.severityAndDescriptionField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.resourceField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.pathField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.locationField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.markerType&quot;/>&#xA;&lt;/view>"/>
+      <persistedState key="memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?>&#xA;&lt;view PRIMARY_SORT_FIELD=&quot;org.eclipse.ui.ide.severityAndDescriptionField&quot; categoryGroup=&quot;org.eclipse.ui.ide.severity&quot; markerContentGenerator=&quot;org.eclipse.ui.ide.problemsGenerator&quot;>&#xA;&lt;columnWidths org.eclipse.ui.ide.locationField=&quot;105&quot; org.eclipse.ui.ide.markerType=&quot;105&quot; org.eclipse.ui.ide.pathField=&quot;140&quot; org.eclipse.ui.ide.resourceField=&quot;105&quot; org.eclipse.ui.ide.severityAndDescriptionField=&quot;350&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.severityAndDescriptionField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.resourceField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.pathField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.locationField&quot;/>&#xA;&lt;visible IMemento.internal.id=&quot;org.eclipse.ui.ide.markerType&quot;/>&#xA;&lt;/view>"/>
       <tags>View</tags>
       <tags>categoryTag:General</tags>
       <menus xmi:id="_0XLWDJ8NEfCDuNgZVgbKNQ" elementId="org.eclipse.ui.views.ProblemView">
@@ -399,7 +385,7 @@
       </children>
       <children xsi:type="menu:ToolBar" xmi:id="_0XL6oJ8NEfCDuNgZVgbKNQ" elementId="org.eclipse.ui.workbench.file">
         <tags>Draggable</tags>
-        <children xsi:type="menu:HandledToolItem" xmi:id="_33TGkKhpEfCkovSg1gr6mw" elementId="print" visible="false" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/print_edit.png" tooltip="Print" command="_0XMkmp8NEfCDuNgZVgbKNQ"/>
+        <children xsi:type="menu:HandledToolItem" xmi:id="_op3g0KhuEfCMELkyTlt3Lw" elementId="print" visible="false" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/print_edit.png" tooltip="Print" command="_0XMkmp8NEfCDuNgZVgbKNQ"/>
       </children>
       <children xsi:type="menu:ToolBar" xmi:id="_0XL6sJ8NEfCDuNgZVgbKNQ" elementId="group.edit" toBeRendered="false">
         <tags>toolbarSeparator</tags>
@@ -407,8 +393,8 @@
       </children>
       <children xsi:type="menu:ToolBar" xmi:id="_0XL6sp8NEfCDuNgZVgbKNQ" elementId="org.eclipse.ui.workbench.edit">
         <tags>Draggable</tags>
-        <children xsi:type="menu:HandledToolItem" xmi:id="_33UUsKhpEfCkovSg1gr6mw" elementId="undo" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/undo_edit.png" tooltip="Undo" enabled="false" command="_0XMkiJ8NEfCDuNgZVgbKNQ"/>
-        <children xsi:type="menu:HandledToolItem" xmi:id="_33Vi0KhpEfCkovSg1gr6mw" elementId="redo" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/redo_edit.png" tooltip="Redo" command="_0XMlLJ8NEfCDuNgZVgbKNQ"/>
+        <children xsi:type="menu:HandledToolItem" xmi:id="_op4u8KhuEfCMELkyTlt3Lw" elementId="undo" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/undo_edit.png" tooltip="Undo" enabled="false" command="_0XMkiJ8NEfCDuNgZVgbKNQ"/>
+        <children xsi:type="menu:HandledToolItem" xmi:id="_op4u8ahuEfCMELkyTlt3Lw" elementId="redo" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/redo_edit.png" tooltip="Redo" enabled="false" command="_0XMlLJ8NEfCDuNgZVgbKNQ"/>
       </children>
       <children xsi:type="menu:ToolBar" xmi:id="_0XL6up8NEfCDuNgZVgbKNQ" elementId="additions" toBeRendered="false">
         <tags>toolbarSeparator</tags>
@@ -432,7 +418,7 @@
       </children>
       <children xsi:type="menu:ToolBar" xmi:id="_0XL6-J8NEfCDuNgZVgbKNQ" elementId="org.eclipse.ui.workbench.navigate">
         <tags>Draggable</tags>
-        <children xsi:type="menu:HandledToolItem" xmi:id="_33Ww8KhpEfCkovSg1gr6mw" elementId="org.eclipse.ui.window.pinEditor" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/pin_editor.png" tooltip="Pin Editor" type="Check" command="_0XMkPp8NEfCDuNgZVgbKNQ"/>
+        <children xsi:type="menu:HandledToolItem" xmi:id="_op59EKhuEfCMELkyTlt3Lw" elementId="org.eclipse.ui.window.pinEditor" iconURI="platform:/plugin/org.eclipse.ui/icons/full/etool16/pin_editor.png" tooltip="Pin Editor" enabled="false" type="Check" command="_0XMkPp8NEfCDuNgZVgbKNQ"/>
       </children>
       <children xsi:type="menu:ToolBar" xmi:id="_0XL7Bp8NEfCDuNgZVgbKNQ" elementId="group.editor" toBeRendered="false">
         <tags>toolbarSeparator</tags>
diff --git a/.metadata/version.ini b/.metadata/version.ini
index d59c7b9..daabbb1 100644
--- a/.metadata/version.ini
+++ b/.metadata/version.ini
@@ -1,3 +1,3 @@
-#Mon Oct 13 14:21:49 CDT 2025
+#Mon Oct 13 14:55:54 CDT 2025
 org.eclipse.core.runtime=2
 org.eclipse.platform=4.33.0.v20240903-0240
diff --git a/TrafficLightsPlusPlus/Core/Inc/stm32f4xx_it.h b/TrafficLightsPlusPlus/Core/Inc/stm32f4xx_it.h
index 1e6b173..38a4323 100644
--- a/TrafficLightsPlusPlus/Core/Inc/stm32f4xx_it.h
+++ b/TrafficLightsPlusPlus/Core/Inc/stm32f4xx_it.h
@@ -54,7 +54,6 @@ void UsageFault_Handler(void);
 void DebugMon_Handler(void);
 void EXTI15_10_IRQHandler(void);
 void TIM6_DAC_IRQHandler(void);
-void DMA2D_IRQHandler(void);
 /* USER CODE BEGIN EFP */
 
 /* USER CODE END EFP */
diff --git a/TrafficLightsPlusPlus/Core/Src/main.c b/TrafficLightsPlusPlus/Core/Src/main.c
new file mode 100644
index 0000000..be73478
--- /dev/null
+++ b/TrafficLightsPlusPlus/Core/Src/main.c
@@ -0,0 +1,418 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.c
+  * @brief          : Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+CRC_HandleTypeDef hcrc;
+
+DMA2D_HandleTypeDef hdma2d;
+
+TIM_HandleTypeDef htim1;
+
+osThreadId defaultTaskHandle;
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+void SystemClock_Config(void);
+static void MX_GPIO_Init(void);
+static void MX_CRC_Init(void);
+static void MX_DMA2D_Init(void);
+static void MX_TIM1_Init(void);
+void StartDefaultTask(void const * argument);
+
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+  * @brief  The application entry point.
+  * @retval int
+  */
+int main(void)
+{
+
+  /* USER CODE BEGIN 1 */
+
+  /* USER CODE END 1 */
+
+  /* MCU Configuration--------------------------------------------------------*/
+
+  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  HAL_Init();
+
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+
+  /* USER CODE BEGIN SysInit */
+
+  /* USER CODE END SysInit */
+
+  /* Initialize all configured peripherals */
+  MX_GPIO_Init();
+  MX_CRC_Init();
+  MX_DMA2D_Init();
+  MX_TIM1_Init();
+  /* USER CODE BEGIN 2 */
+
+  /* USER CODE END 2 */
+
+  /* USER CODE BEGIN RTOS_MUTEX */
+  /* add mutexes, ... */
+  /* USER CODE END RTOS_MUTEX */
+
+  /* USER CODE BEGIN RTOS_SEMAPHORES */
+  /* add semaphores, ... */
+  /* USER CODE END RTOS_SEMAPHORES */
+
+  /* USER CODE BEGIN RTOS_TIMERS */
+  /* start timers, add new ones, ... */
+  /* USER CODE END RTOS_TIMERS */
+
+  /* USER CODE BEGIN RTOS_QUEUES */
+  /* add queues, ... */
+  /* USER CODE END RTOS_QUEUES */
+
+  /* Create the thread(s) */
+  /* definition and creation of defaultTask */
+  osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 4096);
+  defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);
+
+  /* USER CODE BEGIN RTOS_THREADS */
+  /* add threads, ... */
+  /* USER CODE END RTOS_THREADS */
+
+  /* Start scheduler */
+  osKernelStart();
+
+  /* We should never get here as control is now taken by the scheduler */
+
+  /* Infinite loop */
+  /* USER CODE BEGIN WHILE */
+  while (1)
+  {
+    /* USER CODE END WHILE */
+
+    /* USER CODE BEGIN 3 */
+  }
+  /* USER CODE END 3 */
+}
+
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = 8;
+  RCC_OscInitStruct.PLL.PLLN = 72;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 3;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+}
+
+/**
+  * @brief CRC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_CRC_Init(void)
+{
+
+  /* USER CODE BEGIN CRC_Init 0 */
+
+  /* USER CODE END CRC_Init 0 */
+
+  /* USER CODE BEGIN CRC_Init 1 */
+
+  /* USER CODE END CRC_Init 1 */
+  hcrc.Instance = CRC;
+  if (HAL_CRC_Init(&hcrc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN CRC_Init 2 */
+
+  /* USER CODE END CRC_Init 2 */
+
+}
+
+/**
+  * @brief DMA2D Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DMA2D_Init(void)
+{
+
+  /* USER CODE BEGIN DMA2D_Init 0 */
+
+  /* USER CODE END DMA2D_Init 0 */
+
+  /* USER CODE BEGIN DMA2D_Init 1 */
+
+  /* USER CODE END DMA2D_Init 1 */
+  hdma2d.Instance = DMA2D;
+  hdma2d.Init.Mode = DMA2D_M2M;
+  hdma2d.Init.ColorMode = DMA2D_OUTPUT_ARGB8888;
+  hdma2d.Init.OutputOffset = 0;
+  hdma2d.LayerCfg[1].InputOffset = 0;
+  hdma2d.LayerCfg[1].InputColorMode = DMA2D_INPUT_ARGB8888;
+  hdma2d.LayerCfg[1].AlphaMode = DMA2D_NO_MODIF_ALPHA;
+  hdma2d.LayerCfg[1].InputAlpha = 0;
+  if (HAL_DMA2D_Init(&hdma2d) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  if (HAL_DMA2D_ConfigLayer(&hdma2d, 1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN DMA2D_Init 2 */
+
+  /* USER CODE END DMA2D_Init 2 */
+
+}
+
+/**
+  * @brief TIM1 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_TIM1_Init(void)
+{
+
+  /* USER CODE BEGIN TIM1_Init 0 */
+
+  /* USER CODE END TIM1_Init 0 */
+
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  TIM_MasterConfigTypeDef sMasterConfig = {0};
+
+  /* USER CODE BEGIN TIM1_Init 1 */
+
+  /* USER CODE END TIM1_Init 1 */
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 0;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 65535;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
+  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
+  if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN TIM1_Init 2 */
+
+  /* USER CODE END TIM1_Init 2 */
+
+}
+
+/**
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  /* USER CODE BEGIN MX_GPIO_Init_1 */
+
+  /* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOD, White_Pin|Red_Pin|Yellow_Pin|Green_Pin, GPIO_PIN_RESET);
+
+  /*Configure GPIO pin : PedButton_Pin */
+  GPIO_InitStruct.Pin = PedButton_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(PedButton_GPIO_Port, &GPIO_InitStruct);
+
+  /*Configure GPIO pins : White_Pin Red_Pin Yellow_Pin Green_Pin */
+  GPIO_InitStruct.Pin = White_Pin|Red_Pin|Yellow_Pin|Green_Pin;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /* EXTI interrupt init*/
+  HAL_NVIC_SetPriority(EXTI15_10_IRQn, 15, 0);
+  HAL_NVIC_EnableIRQ(EXTI15_10_IRQn);
+
+  /* USER CODE BEGIN MX_GPIO_Init_2 */
+
+  /* USER CODE END MX_GPIO_Init_2 */
+}
+
+/* USER CODE BEGIN 4 */
+
+/* USER CODE END 4 */
+
+/* USER CODE BEGIN Header_StartDefaultTask */
+/**
+  * @brief  Function implementing the defaultTask thread.
+  * @param  argument: Not used
+  * @retval None
+  */
+/* USER CODE END Header_StartDefaultTask */
+void StartDefaultTask(void const * argument)
+{
+  /* USER CODE BEGIN 5 */
+  /* Infinite loop */
+  for(;;)
+  {
+    osDelay(1);
+  }
+  /* USER CODE END 5 */
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM6 interrupt took place, inside
+  * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim : TIM handle
+  * @retval None
+  */
+void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* USER CODE BEGIN Callback 0 */
+
+  /* USER CODE END Callback 0 */
+  if (htim->Instance == TIM6)
+  {
+    HAL_IncTick();
+  }
+  /* USER CODE BEGIN Callback 1 */
+
+  /* USER CODE END Callback 1 */
+}
+
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+  {
+  }
+  /* USER CODE END Error_Handler_Debug */
+}
+#ifdef USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(uint8_t *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/TrafficLightsPlusPlus/Core/Src/main.cpp b/TrafficLightsPlusPlus/Core/Src/main.cpp
index ea80735..26c2157 100644
--- a/TrafficLightsPlusPlus/Core/Src/main.cpp
+++ b/TrafficLightsPlusPlus/Core/Src/main.cpp
@@ -100,21 +100,6 @@ int main(void)
 		  if (buttonPressedThisCycle)
 			  pedestrianThisCycle = true;
 
-		  /*
-		  if (buttonPressedThisCycle)
-		  {
-			  currentState = TrafficState::YELLOW;
-			  stateStartTime = now;
-			  buttonPressedThisCycle = false;
-			  SetTrafficLights(currentState);
-		  }
-		  else
-		  {
-			  pedestrianNextCycle = false;
-			  SetTrafficLights(currentState);
-		  }
-		  */
-
 		  else if (elapsed >= DURATION_GREEN)
 		  {
 			  currentState = TrafficState::YELLOW;
@@ -136,31 +121,6 @@ int main(void)
 		  }
 		  break;
 	  case TrafficState::RED:
-		  /*
-		  if (pedestrianNextCycle)
-		  {
-			  HAL_GPIO_WritePin(GPIOD,White_Pin,GPIO_PIN_SET); // turn on Pedestrian LED
-			  if (elapsed >= DURATION_RED_PED)
-			  {
-				  HAL_GPIO_WritePin(GPIOD,White_Pin,GPIO_PIN_RESET);
-				  pedestrianNextCycle = false;
-				  currentState = TrafficState::GREEN;
-				  stateStartTime = now;
-				  SetTrafficLights(currentState);
-			  }
-		  }
-		  else
-		  {
-			  HAL_GPIO_WritePin(GPIOD,White_Pin,GPIO_PIN_RESET);
-			  if(elapsed >= DURATION_RED_PED)
-			  {
-				  currentState = TrafficState::GREEN;
-				  stateStartTime = now;
-				  SetTrafficLights(currentState);
-			  }
-		  }
-		  */
-
 		  if (buttonPressedThisCycle)
 			  pedestrianNextCycle = true;
 
diff --git a/TrafficLightsPlusPlus/Core/Src/stm32f4xx_hal_msp.c b/TrafficLightsPlusPlus/Core/Src/stm32f4xx_hal_msp.c
index add2380..240df57 100644
--- a/TrafficLightsPlusPlus/Core/Src/stm32f4xx_hal_msp.c
+++ b/TrafficLightsPlusPlus/Core/Src/stm32f4xx_hal_msp.c
@@ -139,9 +139,6 @@ void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
     /* USER CODE END DMA2D_MspInit 0 */
     /* Peripheral clock enable */
     __HAL_RCC_DMA2D_CLK_ENABLE();
-    /* DMA2D interrupt Init */
-    HAL_NVIC_SetPriority(DMA2D_IRQn, 5, 0);
-    HAL_NVIC_EnableIRQ(DMA2D_IRQn);
     /* USER CODE BEGIN DMA2D_MspInit 1 */
 
     /* USER CODE END DMA2D_MspInit 1 */
@@ -165,9 +162,6 @@ void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
     /* USER CODE END DMA2D_MspDeInit 0 */
     /* Peripheral clock disable */
     __HAL_RCC_DMA2D_CLK_DISABLE();
-
-    /* DMA2D interrupt DeInit */
-    HAL_NVIC_DisableIRQ(DMA2D_IRQn);
     /* USER CODE BEGIN DMA2D_MspDeInit 1 */
 
     /* USER CODE END DMA2D_MspDeInit 1 */
diff --git a/TrafficLightsPlusPlus/Core/Src/stm32f4xx_it.c b/TrafficLightsPlusPlus/Core/Src/stm32f4xx_it.c
index afef388..da79254 100644
--- a/TrafficLightsPlusPlus/Core/Src/stm32f4xx_it.c
+++ b/TrafficLightsPlusPlus/Core/Src/stm32f4xx_it.c
@@ -55,7 +55,6 @@
 /* USER CODE END 0 */
 
 /* External variables --------------------------------------------------------*/
-extern DMA2D_HandleTypeDef hdma2d;
 extern TIM_HandleTypeDef htim6;
 
 /* USER CODE BEGIN EV */
@@ -188,20 +187,6 @@ void TIM6_DAC_IRQHandler(void)
   /* USER CODE END TIM6_DAC_IRQn 1 */
 }
 
-/**
-  * @brief This function handles DMA2D global interrupt.
-  */
-void DMA2D_IRQHandler(void)
-{
-  /* USER CODE BEGIN DMA2D_IRQn 0 */
-
-  /* USER CODE END DMA2D_IRQn 0 */
-  HAL_DMA2D_IRQHandler(&hdma2d);
-  /* USER CODE BEGIN DMA2D_IRQn 1 */
-
-  /* USER CODE END DMA2D_IRQn 1 */
-}
-
 /* USER CODE BEGIN 1 */
 
 /* USER CODE END 1 */
diff --git a/TrafficLightsPlusPlus/Debug/Core/Src/main.cyclo b/TrafficLightsPlusPlus/Debug/Core/Src/main.cyclo
index 22e38a7..33e5a8c 100644
--- a/TrafficLightsPlusPlus/Debug/Core/Src/main.cyclo
+++ b/TrafficLightsPlusPlus/Debug/Core/Src/main.cyclo
@@ -1,6 +1,6 @@
 ../Core/Src/main.cpp:54:6:void SetTrafficLights(TrafficState)	5
 ../Core/Src/main.cpp:75:5:int main()	13
-../Core/Src/main.cpp:197:6:void SystemClock_Config()	3
-../Core/Src/main.cpp:244:13:void MX_GPIO_Init()	1
-../Core/Src/main.cpp:289:17:void HAL_GPIO_EXTI_CallBack(uint16_t)	3
-../Core/Src/main.cpp:311:6:void Error_Handler()	1
+../Core/Src/main.cpp:157:6:void SystemClock_Config()	3
+../Core/Src/main.cpp:204:13:void MX_GPIO_Init()	1
+../Core/Src/main.cpp:249:17:void HAL_GPIO_EXTI_CallBack(uint16_t)	3
+../Core/Src/main.cpp:271:6:void Error_Handler()	1
diff --git a/TrafficLightsPlusPlus/Debug/Core/Src/main.o b/TrafficLightsPlusPlus/Debug/Core/Src/main.o
index d548d6a..c169e42 100644
Binary files a/TrafficLightsPlusPlus/Debug/Core/Src/main.o and b/TrafficLightsPlusPlus/Debug/Core/Src/main.o differ
diff --git a/TrafficLightsPlusPlus/Debug/Core/Src/main.su b/TrafficLightsPlusPlus/Debug/Core/Src/main.su
index 882ab6c..f9f802d 100644
--- a/TrafficLightsPlusPlus/Debug/Core/Src/main.su
+++ b/TrafficLightsPlusPlus/Debug/Core/Src/main.su
@@ -1,6 +1,6 @@
 ../Core/Src/main.cpp:54:6:void SetTrafficLights(TrafficState)	16	static
 ../Core/Src/main.cpp:75:5:int main()	16	static
-../Core/Src/main.cpp:197:6:void SystemClock_Config()	88	static
-../Core/Src/main.cpp:244:13:void MX_GPIO_Init()	40	static
-../Core/Src/main.cpp:289:17:void HAL_GPIO_EXTI_CallBack(uint16_t)	24	static
-../Core/Src/main.cpp:311:6:void Error_Handler()	4	static,ignoring_inline_asm
+../Core/Src/main.cpp:157:6:void SystemClock_Config()	88	static
+../Core/Src/main.cpp:204:13:void MX_GPIO_Init()	40	static
+../Core/Src/main.cpp:249:17:void HAL_GPIO_EXTI_CallBack(uint16_t)	24	static
+../Core/Src/main.cpp:271:6:void Error_Handler()	4	static,ignoring_inline_asm
diff --git a/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_hal_msp.cyclo b/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_hal_msp.cyclo
index 8cd3055..3113481 100644
--- a/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_hal_msp.cyclo
+++ b/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_hal_msp.cyclo
@@ -2,6 +2,6 @@
 ../Core/Src/stm32f4xx_hal_msp.c:88:6:HAL_CRC_MspInit	2
 ../Core/Src/stm32f4xx_hal_msp.c:111:6:HAL_CRC_MspDeInit	2
 ../Core/Src/stm32f4xx_hal_msp.c:133:6:HAL_DMA2D_MspInit	2
-../Core/Src/stm32f4xx_hal_msp.c:159:6:HAL_DMA2D_MspDeInit	2
-../Core/Src/stm32f4xx_hal_msp.c:184:6:HAL_TIM_Base_MspInit	2
-../Core/Src/stm32f4xx_hal_msp.c:207:6:HAL_TIM_Base_MspDeInit	2
+../Core/Src/stm32f4xx_hal_msp.c:156:6:HAL_DMA2D_MspDeInit	2
+../Core/Src/stm32f4xx_hal_msp.c:178:6:HAL_TIM_Base_MspInit	2
+../Core/Src/stm32f4xx_hal_msp.c:201:6:HAL_TIM_Base_MspDeInit	2
diff --git a/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_hal_msp.o b/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_hal_msp.o
index 9beb88a..4c2aa1e 100644
Binary files a/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_hal_msp.o and b/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_hal_msp.o differ
diff --git a/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_hal_msp.su b/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_hal_msp.su
index c316a00..bdfa4f5 100644
--- a/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_hal_msp.su
+++ b/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_hal_msp.su
@@ -2,6 +2,6 @@
 ../Core/Src/stm32f4xx_hal_msp.c:88:6:HAL_CRC_MspInit	24	static
 ../Core/Src/stm32f4xx_hal_msp.c:111:6:HAL_CRC_MspDeInit	16	static
 ../Core/Src/stm32f4xx_hal_msp.c:133:6:HAL_DMA2D_MspInit	24	static
-../Core/Src/stm32f4xx_hal_msp.c:159:6:HAL_DMA2D_MspDeInit	16	static
-../Core/Src/stm32f4xx_hal_msp.c:184:6:HAL_TIM_Base_MspInit	24	static
-../Core/Src/stm32f4xx_hal_msp.c:207:6:HAL_TIM_Base_MspDeInit	16	static
+../Core/Src/stm32f4xx_hal_msp.c:156:6:HAL_DMA2D_MspDeInit	16	static
+../Core/Src/stm32f4xx_hal_msp.c:178:6:HAL_TIM_Base_MspInit	24	static
+../Core/Src/stm32f4xx_hal_msp.c:201:6:HAL_TIM_Base_MspDeInit	16	static
diff --git a/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_it.cyclo b/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_it.cyclo
index 4f3b812..8edb1cc 100644
--- a/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_it.cyclo
+++ b/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_it.cyclo
@@ -1,9 +1,8 @@
-../Core/Src/stm32f4xx_it.c:71:6:NMI_Handler	1
-../Core/Src/stm32f4xx_it.c:86:6:HardFault_Handler	1
-../Core/Src/stm32f4xx_it.c:101:6:MemManage_Handler	1
-../Core/Src/stm32f4xx_it.c:116:6:BusFault_Handler	1
-../Core/Src/stm32f4xx_it.c:131:6:UsageFault_Handler	1
-../Core/Src/stm32f4xx_it.c:146:6:DebugMon_Handler	1
-../Core/Src/stm32f4xx_it.c:166:6:EXTI15_10_IRQHandler	1
-../Core/Src/stm32f4xx_it.c:180:6:TIM6_DAC_IRQHandler	1
-../Core/Src/stm32f4xx_it.c:194:6:DMA2D_IRQHandler	1
+../Core/Src/stm32f4xx_it.c:70:6:NMI_Handler	1
+../Core/Src/stm32f4xx_it.c:85:6:HardFault_Handler	1
+../Core/Src/stm32f4xx_it.c:100:6:MemManage_Handler	1
+../Core/Src/stm32f4xx_it.c:115:6:BusFault_Handler	1
+../Core/Src/stm32f4xx_it.c:130:6:UsageFault_Handler	1
+../Core/Src/stm32f4xx_it.c:145:6:DebugMon_Handler	1
+../Core/Src/stm32f4xx_it.c:165:6:EXTI15_10_IRQHandler	1
+../Core/Src/stm32f4xx_it.c:179:6:TIM6_DAC_IRQHandler	1
diff --git a/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_it.o b/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_it.o
index 0bc4250..0b9ab42 100644
Binary files a/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_it.o and b/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_it.o differ
diff --git a/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_it.su b/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_it.su
index 83c6fd7..a2f4311 100644
--- a/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_it.su
+++ b/TrafficLightsPlusPlus/Debug/Core/Src/stm32f4xx_it.su
@@ -1,9 +1,8 @@
-../Core/Src/stm32f4xx_it.c:71:6:NMI_Handler	4	static
-../Core/Src/stm32f4xx_it.c:86:6:HardFault_Handler	4	static
-../Core/Src/stm32f4xx_it.c:101:6:MemManage_Handler	4	static
-../Core/Src/stm32f4xx_it.c:116:6:BusFault_Handler	4	static
-../Core/Src/stm32f4xx_it.c:131:6:UsageFault_Handler	4	static
-../Core/Src/stm32f4xx_it.c:146:6:DebugMon_Handler	4	static
-../Core/Src/stm32f4xx_it.c:166:6:EXTI15_10_IRQHandler	8	static
-../Core/Src/stm32f4xx_it.c:180:6:TIM6_DAC_IRQHandler	8	static
-../Core/Src/stm32f4xx_it.c:194:6:DMA2D_IRQHandler	8	static
+../Core/Src/stm32f4xx_it.c:70:6:NMI_Handler	4	static
+../Core/Src/stm32f4xx_it.c:85:6:HardFault_Handler	4	static
+../Core/Src/stm32f4xx_it.c:100:6:MemManage_Handler	4	static
+../Core/Src/stm32f4xx_it.c:115:6:BusFault_Handler	4	static
+../Core/Src/stm32f4xx_it.c:130:6:UsageFault_Handler	4	static
+../Core/Src/stm32f4xx_it.c:145:6:DebugMon_Handler	4	static
+../Core/Src/stm32f4xx_it.c:165:6:EXTI15_10_IRQHandler	8	static
+../Core/Src/stm32f4xx_it.c:179:6:TIM6_DAC_IRQHandler	8	static
diff --git a/TrafficLightsPlusPlus/Debug/Core/Src/subdir.mk b/TrafficLightsPlusPlus/Debug/Core/Src/subdir.mk
index a7ccdf0..0be1ccb 100644
--- a/TrafficLightsPlusPlus/Debug/Core/Src/subdir.mk
+++ b/TrafficLightsPlusPlus/Debug/Core/Src/subdir.mk
@@ -10,6 +10,7 @@ CPP_SRCS += \
 
 C_SRCS += \
 ../Core/Src/freertos.c \
+../Core/Src/main.c \
 ../Core/Src/stm32f4xx_hal_msp.c \
 ../Core/Src/stm32f4xx_hal_timebase_tim.c \
 ../Core/Src/stm32f4xx_it.c \
@@ -19,6 +20,7 @@ C_SRCS += \
 
 C_DEPS += \
 ./Core/Src/freertos.d \
+./Core/Src/main.d \
 ./Core/Src/stm32f4xx_hal_msp.d \
 ./Core/Src/stm32f4xx_hal_timebase_tim.d \
 ./Core/Src/stm32f4xx_it.d \
diff --git a/TrafficLightsPlusPlus/Debug/TrafficLightsPlusPlus.elf b/TrafficLightsPlusPlus/Debug/TrafficLightsPlusPlus.elf
new file mode 100755
index 0000000..e5548f3
Binary files /dev/null and b/TrafficLightsPlusPlus/Debug/TrafficLightsPlusPlus.elf differ
diff --git a/TrafficLightsPlusPlus/Debug/TrafficLightsPlusPlus.list b/TrafficLightsPlusPlus/Debug/TrafficLightsPlusPlus.list
new file mode 100644
index 0000000..54648e8
--- /dev/null
+++ b/TrafficLightsPlusPlus/Debug/TrafficLightsPlusPlus.list
@@ -0,0 +1,5983 @@
+
+TrafficLightsPlusPlus.elf:     file format elf32-littlearm
+
+Sections:
+Idx Name          Size      VMA       LMA       File off  Algn
+  0 .isr_vector   000001ac  08000000  08000000  00001000  2**0
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  1 .text         0000229c  080001b0  080001b0  000011b0  2**4
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  2 .rodata       00000018  0800244c  0800244c  0000344c  2**2
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  3 .ARM.extab    00000000  08002464  08002464  00004008  2**0
+                  CONTENTS, READONLY
+  4 .ARM          00000008  08002464  08002464  00003464  2**2
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  5 .preinit_array 00000000  0800246c  0800246c  00004008  2**0
+                  CONTENTS, ALLOC, LOAD, DATA
+  6 .init_array   00000004  0800246c  0800246c  0000346c  2**2
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  7 .fini_array   00000004  08002470  08002470  00003470  2**2
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  8 .data         00000008  20000000  08002474  00004000  2**2
+                  CONTENTS, ALLOC, LOAD, DATA
+  9 .ccmram       00000000  10000000  10000000  00004008  2**0
+                  CONTENTS
+ 10 .bss          00000128  20000008  20000008  00004008  2**2
+                  ALLOC
+ 11 ._user_heap_stack 00000600  20000130  20000130  00004008  2**0
+                  ALLOC
+ 12 .ARM.attributes 00000030  00000000  00000000  00004008  2**0
+                  CONTENTS, READONLY
+ 13 .debug_info   0000c2af  00000000  00000000  00004038  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 14 .debug_abbrev 00001fa2  00000000  00000000  000102e7  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 15 .debug_aranges 00000c88  00000000  00000000  00012290  2**3
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 16 .debug_rnglists 0000099e  00000000  00000000  00012f18  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 17 .debug_macro  00024bc7  00000000  00000000  000138b6  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 18 .debug_line   0000d483  00000000  00000000  0003847d  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 19 .debug_str    000df3c5  00000000  00000000  00045900  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 20 .comment      00000043  00000000  00000000  00124cc5  2**0
+                  CONTENTS, READONLY
+ 21 .debug_frame  00003374  00000000  00000000  00124d08  2**2
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 22 .debug_line_str 00000055  00000000  00000000  0012807c  2**0
+                  CONTENTS, READONLY, DEBUGGING, OCTETS
+
+Disassembly of section .text:
+
+080001b0 <__do_global_dtors_aux>:
+ 80001b0:	b510      	push	{r4, lr}
+ 80001b2:	4c05      	ldr	r4, [pc, #20]	@ (80001c8 <__do_global_dtors_aux+0x18>)
+ 80001b4:	7823      	ldrb	r3, [r4, #0]
+ 80001b6:	b933      	cbnz	r3, 80001c6 <__do_global_dtors_aux+0x16>
+ 80001b8:	4b04      	ldr	r3, [pc, #16]	@ (80001cc <__do_global_dtors_aux+0x1c>)
+ 80001ba:	b113      	cbz	r3, 80001c2 <__do_global_dtors_aux+0x12>
+ 80001bc:	4804      	ldr	r0, [pc, #16]	@ (80001d0 <__do_global_dtors_aux+0x20>)
+ 80001be:	f3af 8000 	nop.w
+ 80001c2:	2301      	movs	r3, #1
+ 80001c4:	7023      	strb	r3, [r4, #0]
+ 80001c6:	bd10      	pop	{r4, pc}
+ 80001c8:	20000008 	.word	0x20000008
+ 80001cc:	00000000 	.word	0x00000000
+ 80001d0:	08002434 	.word	0x08002434
+
+080001d4 <frame_dummy>:
+ 80001d4:	b508      	push	{r3, lr}
+ 80001d6:	4b03      	ldr	r3, [pc, #12]	@ (80001e4 <frame_dummy+0x10>)
+ 80001d8:	b11b      	cbz	r3, 80001e2 <frame_dummy+0xe>
+ 80001da:	4903      	ldr	r1, [pc, #12]	@ (80001e8 <frame_dummy+0x14>)
+ 80001dc:	4803      	ldr	r0, [pc, #12]	@ (80001ec <frame_dummy+0x18>)
+ 80001de:	f3af 8000 	nop.w
+ 80001e2:	bd08      	pop	{r3, pc}
+ 80001e4:	00000000 	.word	0x00000000
+ 80001e8:	2000000c 	.word	0x2000000c
+ 80001ec:	08002434 	.word	0x08002434
+
+080001f0 <__aeabi_uldivmod>:
+ 80001f0:	b953      	cbnz	r3, 8000208 <__aeabi_uldivmod+0x18>
+ 80001f2:	b94a      	cbnz	r2, 8000208 <__aeabi_uldivmod+0x18>
+ 80001f4:	2900      	cmp	r1, #0
+ 80001f6:	bf08      	it	eq
+ 80001f8:	2800      	cmpeq	r0, #0
+ 80001fa:	bf1c      	itt	ne
+ 80001fc:	f04f 31ff 	movne.w	r1, #4294967295	@ 0xffffffff
+ 8000200:	f04f 30ff 	movne.w	r0, #4294967295	@ 0xffffffff
+ 8000204:	f000 b988 	b.w	8000518 <__aeabi_idiv0>
+ 8000208:	f1ad 0c08 	sub.w	ip, sp, #8
+ 800020c:	e96d ce04 	strd	ip, lr, [sp, #-16]!
+ 8000210:	f000 f806 	bl	8000220 <__udivmoddi4>
+ 8000214:	f8dd e004 	ldr.w	lr, [sp, #4]
+ 8000218:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
+ 800021c:	b004      	add	sp, #16
+ 800021e:	4770      	bx	lr
+
+08000220 <__udivmoddi4>:
+ 8000220:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
+ 8000224:	9d08      	ldr	r5, [sp, #32]
+ 8000226:	468e      	mov	lr, r1
+ 8000228:	4604      	mov	r4, r0
+ 800022a:	4688      	mov	r8, r1
+ 800022c:	2b00      	cmp	r3, #0
+ 800022e:	d14a      	bne.n	80002c6 <__udivmoddi4+0xa6>
+ 8000230:	428a      	cmp	r2, r1
+ 8000232:	4617      	mov	r7, r2
+ 8000234:	d962      	bls.n	80002fc <__udivmoddi4+0xdc>
+ 8000236:	fab2 f682 	clz	r6, r2
+ 800023a:	b14e      	cbz	r6, 8000250 <__udivmoddi4+0x30>
+ 800023c:	f1c6 0320 	rsb	r3, r6, #32
+ 8000240:	fa01 f806 	lsl.w	r8, r1, r6
+ 8000244:	fa20 f303 	lsr.w	r3, r0, r3
+ 8000248:	40b7      	lsls	r7, r6
+ 800024a:	ea43 0808 	orr.w	r8, r3, r8
+ 800024e:	40b4      	lsls	r4, r6
+ 8000250:	ea4f 4e17 	mov.w	lr, r7, lsr #16
+ 8000254:	fa1f fc87 	uxth.w	ip, r7
+ 8000258:	fbb8 f1fe 	udiv	r1, r8, lr
+ 800025c:	0c23      	lsrs	r3, r4, #16
+ 800025e:	fb0e 8811 	mls	r8, lr, r1, r8
+ 8000262:	ea43 4308 	orr.w	r3, r3, r8, lsl #16
+ 8000266:	fb01 f20c 	mul.w	r2, r1, ip
+ 800026a:	429a      	cmp	r2, r3
+ 800026c:	d909      	bls.n	8000282 <__udivmoddi4+0x62>
+ 800026e:	18fb      	adds	r3, r7, r3
+ 8000270:	f101 30ff 	add.w	r0, r1, #4294967295	@ 0xffffffff
+ 8000274:	f080 80ea 	bcs.w	800044c <__udivmoddi4+0x22c>
+ 8000278:	429a      	cmp	r2, r3
+ 800027a:	f240 80e7 	bls.w	800044c <__udivmoddi4+0x22c>
+ 800027e:	3902      	subs	r1, #2
+ 8000280:	443b      	add	r3, r7
+ 8000282:	1a9a      	subs	r2, r3, r2
+ 8000284:	b2a3      	uxth	r3, r4
+ 8000286:	fbb2 f0fe 	udiv	r0, r2, lr
+ 800028a:	fb0e 2210 	mls	r2, lr, r0, r2
+ 800028e:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
+ 8000292:	fb00 fc0c 	mul.w	ip, r0, ip
+ 8000296:	459c      	cmp	ip, r3
+ 8000298:	d909      	bls.n	80002ae <__udivmoddi4+0x8e>
+ 800029a:	18fb      	adds	r3, r7, r3
+ 800029c:	f100 32ff 	add.w	r2, r0, #4294967295	@ 0xffffffff
+ 80002a0:	f080 80d6 	bcs.w	8000450 <__udivmoddi4+0x230>
+ 80002a4:	459c      	cmp	ip, r3
+ 80002a6:	f240 80d3 	bls.w	8000450 <__udivmoddi4+0x230>
+ 80002aa:	443b      	add	r3, r7
+ 80002ac:	3802      	subs	r0, #2
+ 80002ae:	ea40 4001 	orr.w	r0, r0, r1, lsl #16
+ 80002b2:	eba3 030c 	sub.w	r3, r3, ip
+ 80002b6:	2100      	movs	r1, #0
+ 80002b8:	b11d      	cbz	r5, 80002c2 <__udivmoddi4+0xa2>
+ 80002ba:	40f3      	lsrs	r3, r6
+ 80002bc:	2200      	movs	r2, #0
+ 80002be:	e9c5 3200 	strd	r3, r2, [r5]
+ 80002c2:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 80002c6:	428b      	cmp	r3, r1
+ 80002c8:	d905      	bls.n	80002d6 <__udivmoddi4+0xb6>
+ 80002ca:	b10d      	cbz	r5, 80002d0 <__udivmoddi4+0xb0>
+ 80002cc:	e9c5 0100 	strd	r0, r1, [r5]
+ 80002d0:	2100      	movs	r1, #0
+ 80002d2:	4608      	mov	r0, r1
+ 80002d4:	e7f5      	b.n	80002c2 <__udivmoddi4+0xa2>
+ 80002d6:	fab3 f183 	clz	r1, r3
+ 80002da:	2900      	cmp	r1, #0
+ 80002dc:	d146      	bne.n	800036c <__udivmoddi4+0x14c>
+ 80002de:	4573      	cmp	r3, lr
+ 80002e0:	d302      	bcc.n	80002e8 <__udivmoddi4+0xc8>
+ 80002e2:	4282      	cmp	r2, r0
+ 80002e4:	f200 8105 	bhi.w	80004f2 <__udivmoddi4+0x2d2>
+ 80002e8:	1a84      	subs	r4, r0, r2
+ 80002ea:	eb6e 0203 	sbc.w	r2, lr, r3
+ 80002ee:	2001      	movs	r0, #1
+ 80002f0:	4690      	mov	r8, r2
+ 80002f2:	2d00      	cmp	r5, #0
+ 80002f4:	d0e5      	beq.n	80002c2 <__udivmoddi4+0xa2>
+ 80002f6:	e9c5 4800 	strd	r4, r8, [r5]
+ 80002fa:	e7e2      	b.n	80002c2 <__udivmoddi4+0xa2>
+ 80002fc:	2a00      	cmp	r2, #0
+ 80002fe:	f000 8090 	beq.w	8000422 <__udivmoddi4+0x202>
+ 8000302:	fab2 f682 	clz	r6, r2
+ 8000306:	2e00      	cmp	r6, #0
+ 8000308:	f040 80a4 	bne.w	8000454 <__udivmoddi4+0x234>
+ 800030c:	1a8a      	subs	r2, r1, r2
+ 800030e:	0c03      	lsrs	r3, r0, #16
+ 8000310:	ea4f 4e17 	mov.w	lr, r7, lsr #16
+ 8000314:	b280      	uxth	r0, r0
+ 8000316:	b2bc      	uxth	r4, r7
+ 8000318:	2101      	movs	r1, #1
+ 800031a:	fbb2 fcfe 	udiv	ip, r2, lr
+ 800031e:	fb0e 221c 	mls	r2, lr, ip, r2
+ 8000322:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
+ 8000326:	fb04 f20c 	mul.w	r2, r4, ip
+ 800032a:	429a      	cmp	r2, r3
+ 800032c:	d907      	bls.n	800033e <__udivmoddi4+0x11e>
+ 800032e:	18fb      	adds	r3, r7, r3
+ 8000330:	f10c 38ff 	add.w	r8, ip, #4294967295	@ 0xffffffff
+ 8000334:	d202      	bcs.n	800033c <__udivmoddi4+0x11c>
+ 8000336:	429a      	cmp	r2, r3
+ 8000338:	f200 80e0 	bhi.w	80004fc <__udivmoddi4+0x2dc>
+ 800033c:	46c4      	mov	ip, r8
+ 800033e:	1a9b      	subs	r3, r3, r2
+ 8000340:	fbb3 f2fe 	udiv	r2, r3, lr
+ 8000344:	fb0e 3312 	mls	r3, lr, r2, r3
+ 8000348:	ea40 4303 	orr.w	r3, r0, r3, lsl #16
+ 800034c:	fb02 f404 	mul.w	r4, r2, r4
+ 8000350:	429c      	cmp	r4, r3
+ 8000352:	d907      	bls.n	8000364 <__udivmoddi4+0x144>
+ 8000354:	18fb      	adds	r3, r7, r3
+ 8000356:	f102 30ff 	add.w	r0, r2, #4294967295	@ 0xffffffff
+ 800035a:	d202      	bcs.n	8000362 <__udivmoddi4+0x142>
+ 800035c:	429c      	cmp	r4, r3
+ 800035e:	f200 80ca 	bhi.w	80004f6 <__udivmoddi4+0x2d6>
+ 8000362:	4602      	mov	r2, r0
+ 8000364:	1b1b      	subs	r3, r3, r4
+ 8000366:	ea42 400c 	orr.w	r0, r2, ip, lsl #16
+ 800036a:	e7a5      	b.n	80002b8 <__udivmoddi4+0x98>
+ 800036c:	f1c1 0620 	rsb	r6, r1, #32
+ 8000370:	408b      	lsls	r3, r1
+ 8000372:	fa22 f706 	lsr.w	r7, r2, r6
+ 8000376:	431f      	orrs	r7, r3
+ 8000378:	fa0e f401 	lsl.w	r4, lr, r1
+ 800037c:	fa20 f306 	lsr.w	r3, r0, r6
+ 8000380:	fa2e fe06 	lsr.w	lr, lr, r6
+ 8000384:	ea4f 4917 	mov.w	r9, r7, lsr #16
+ 8000388:	4323      	orrs	r3, r4
+ 800038a:	fa00 f801 	lsl.w	r8, r0, r1
+ 800038e:	fa1f fc87 	uxth.w	ip, r7
+ 8000392:	fbbe f0f9 	udiv	r0, lr, r9
+ 8000396:	0c1c      	lsrs	r4, r3, #16
+ 8000398:	fb09 ee10 	mls	lr, r9, r0, lr
+ 800039c:	ea44 440e 	orr.w	r4, r4, lr, lsl #16
+ 80003a0:	fb00 fe0c 	mul.w	lr, r0, ip
+ 80003a4:	45a6      	cmp	lr, r4
+ 80003a6:	fa02 f201 	lsl.w	r2, r2, r1
+ 80003aa:	d909      	bls.n	80003c0 <__udivmoddi4+0x1a0>
+ 80003ac:	193c      	adds	r4, r7, r4
+ 80003ae:	f100 3aff 	add.w	sl, r0, #4294967295	@ 0xffffffff
+ 80003b2:	f080 809c 	bcs.w	80004ee <__udivmoddi4+0x2ce>
+ 80003b6:	45a6      	cmp	lr, r4
+ 80003b8:	f240 8099 	bls.w	80004ee <__udivmoddi4+0x2ce>
+ 80003bc:	3802      	subs	r0, #2
+ 80003be:	443c      	add	r4, r7
+ 80003c0:	eba4 040e 	sub.w	r4, r4, lr
+ 80003c4:	fa1f fe83 	uxth.w	lr, r3
+ 80003c8:	fbb4 f3f9 	udiv	r3, r4, r9
+ 80003cc:	fb09 4413 	mls	r4, r9, r3, r4
+ 80003d0:	ea4e 4404 	orr.w	r4, lr, r4, lsl #16
+ 80003d4:	fb03 fc0c 	mul.w	ip, r3, ip
+ 80003d8:	45a4      	cmp	ip, r4
+ 80003da:	d908      	bls.n	80003ee <__udivmoddi4+0x1ce>
+ 80003dc:	193c      	adds	r4, r7, r4
+ 80003de:	f103 3eff 	add.w	lr, r3, #4294967295	@ 0xffffffff
+ 80003e2:	f080 8082 	bcs.w	80004ea <__udivmoddi4+0x2ca>
+ 80003e6:	45a4      	cmp	ip, r4
+ 80003e8:	d97f      	bls.n	80004ea <__udivmoddi4+0x2ca>
+ 80003ea:	3b02      	subs	r3, #2
+ 80003ec:	443c      	add	r4, r7
+ 80003ee:	ea43 4000 	orr.w	r0, r3, r0, lsl #16
+ 80003f2:	eba4 040c 	sub.w	r4, r4, ip
+ 80003f6:	fba0 ec02 	umull	lr, ip, r0, r2
+ 80003fa:	4564      	cmp	r4, ip
+ 80003fc:	4673      	mov	r3, lr
+ 80003fe:	46e1      	mov	r9, ip
+ 8000400:	d362      	bcc.n	80004c8 <__udivmoddi4+0x2a8>
+ 8000402:	d05f      	beq.n	80004c4 <__udivmoddi4+0x2a4>
+ 8000404:	b15d      	cbz	r5, 800041e <__udivmoddi4+0x1fe>
+ 8000406:	ebb8 0203 	subs.w	r2, r8, r3
+ 800040a:	eb64 0409 	sbc.w	r4, r4, r9
+ 800040e:	fa04 f606 	lsl.w	r6, r4, r6
+ 8000412:	fa22 f301 	lsr.w	r3, r2, r1
+ 8000416:	431e      	orrs	r6, r3
+ 8000418:	40cc      	lsrs	r4, r1
+ 800041a:	e9c5 6400 	strd	r6, r4, [r5]
+ 800041e:	2100      	movs	r1, #0
+ 8000420:	e74f      	b.n	80002c2 <__udivmoddi4+0xa2>
+ 8000422:	fbb1 fcf2 	udiv	ip, r1, r2
+ 8000426:	0c01      	lsrs	r1, r0, #16
+ 8000428:	ea41 410e 	orr.w	r1, r1, lr, lsl #16
+ 800042c:	b280      	uxth	r0, r0
+ 800042e:	ea40 4201 	orr.w	r2, r0, r1, lsl #16
+ 8000432:	463b      	mov	r3, r7
+ 8000434:	4638      	mov	r0, r7
+ 8000436:	463c      	mov	r4, r7
+ 8000438:	46b8      	mov	r8, r7
+ 800043a:	46be      	mov	lr, r7
+ 800043c:	2620      	movs	r6, #32
+ 800043e:	fbb1 f1f7 	udiv	r1, r1, r7
+ 8000442:	eba2 0208 	sub.w	r2, r2, r8
+ 8000446:	ea41 410c 	orr.w	r1, r1, ip, lsl #16
+ 800044a:	e766      	b.n	800031a <__udivmoddi4+0xfa>
+ 800044c:	4601      	mov	r1, r0
+ 800044e:	e718      	b.n	8000282 <__udivmoddi4+0x62>
+ 8000450:	4610      	mov	r0, r2
+ 8000452:	e72c      	b.n	80002ae <__udivmoddi4+0x8e>
+ 8000454:	f1c6 0220 	rsb	r2, r6, #32
+ 8000458:	fa2e f302 	lsr.w	r3, lr, r2
+ 800045c:	40b7      	lsls	r7, r6
+ 800045e:	40b1      	lsls	r1, r6
+ 8000460:	fa20 f202 	lsr.w	r2, r0, r2
+ 8000464:	ea4f 4e17 	mov.w	lr, r7, lsr #16
+ 8000468:	430a      	orrs	r2, r1
+ 800046a:	fbb3 f8fe 	udiv	r8, r3, lr
+ 800046e:	b2bc      	uxth	r4, r7
+ 8000470:	fb0e 3318 	mls	r3, lr, r8, r3
+ 8000474:	0c11      	lsrs	r1, r2, #16
+ 8000476:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
+ 800047a:	fb08 f904 	mul.w	r9, r8, r4
+ 800047e:	40b0      	lsls	r0, r6
+ 8000480:	4589      	cmp	r9, r1
+ 8000482:	ea4f 4310 	mov.w	r3, r0, lsr #16
+ 8000486:	b280      	uxth	r0, r0
+ 8000488:	d93e      	bls.n	8000508 <__udivmoddi4+0x2e8>
+ 800048a:	1879      	adds	r1, r7, r1
+ 800048c:	f108 3cff 	add.w	ip, r8, #4294967295	@ 0xffffffff
+ 8000490:	d201      	bcs.n	8000496 <__udivmoddi4+0x276>
+ 8000492:	4589      	cmp	r9, r1
+ 8000494:	d81f      	bhi.n	80004d6 <__udivmoddi4+0x2b6>
+ 8000496:	eba1 0109 	sub.w	r1, r1, r9
+ 800049a:	fbb1 f9fe 	udiv	r9, r1, lr
+ 800049e:	fb09 f804 	mul.w	r8, r9, r4
+ 80004a2:	fb0e 1119 	mls	r1, lr, r9, r1
+ 80004a6:	b292      	uxth	r2, r2
+ 80004a8:	ea42 4201 	orr.w	r2, r2, r1, lsl #16
+ 80004ac:	4542      	cmp	r2, r8
+ 80004ae:	d229      	bcs.n	8000504 <__udivmoddi4+0x2e4>
+ 80004b0:	18ba      	adds	r2, r7, r2
+ 80004b2:	f109 31ff 	add.w	r1, r9, #4294967295	@ 0xffffffff
+ 80004b6:	d2c4      	bcs.n	8000442 <__udivmoddi4+0x222>
+ 80004b8:	4542      	cmp	r2, r8
+ 80004ba:	d2c2      	bcs.n	8000442 <__udivmoddi4+0x222>
+ 80004bc:	f1a9 0102 	sub.w	r1, r9, #2
+ 80004c0:	443a      	add	r2, r7
+ 80004c2:	e7be      	b.n	8000442 <__udivmoddi4+0x222>
+ 80004c4:	45f0      	cmp	r8, lr
+ 80004c6:	d29d      	bcs.n	8000404 <__udivmoddi4+0x1e4>
+ 80004c8:	ebbe 0302 	subs.w	r3, lr, r2
+ 80004cc:	eb6c 0c07 	sbc.w	ip, ip, r7
+ 80004d0:	3801      	subs	r0, #1
+ 80004d2:	46e1      	mov	r9, ip
+ 80004d4:	e796      	b.n	8000404 <__udivmoddi4+0x1e4>
+ 80004d6:	eba7 0909 	sub.w	r9, r7, r9
+ 80004da:	4449      	add	r1, r9
+ 80004dc:	f1a8 0c02 	sub.w	ip, r8, #2
+ 80004e0:	fbb1 f9fe 	udiv	r9, r1, lr
+ 80004e4:	fb09 f804 	mul.w	r8, r9, r4
+ 80004e8:	e7db      	b.n	80004a2 <__udivmoddi4+0x282>
+ 80004ea:	4673      	mov	r3, lr
+ 80004ec:	e77f      	b.n	80003ee <__udivmoddi4+0x1ce>
+ 80004ee:	4650      	mov	r0, sl
+ 80004f0:	e766      	b.n	80003c0 <__udivmoddi4+0x1a0>
+ 80004f2:	4608      	mov	r0, r1
+ 80004f4:	e6fd      	b.n	80002f2 <__udivmoddi4+0xd2>
+ 80004f6:	443b      	add	r3, r7
+ 80004f8:	3a02      	subs	r2, #2
+ 80004fa:	e733      	b.n	8000364 <__udivmoddi4+0x144>
+ 80004fc:	f1ac 0c02 	sub.w	ip, ip, #2
+ 8000500:	443b      	add	r3, r7
+ 8000502:	e71c      	b.n	800033e <__udivmoddi4+0x11e>
+ 8000504:	4649      	mov	r1, r9
+ 8000506:	e79c      	b.n	8000442 <__udivmoddi4+0x222>
+ 8000508:	eba1 0109 	sub.w	r1, r1, r9
+ 800050c:	46c4      	mov	ip, r8
+ 800050e:	fbb1 f9fe 	udiv	r9, r1, lr
+ 8000512:	fb09 f804 	mul.w	r8, r9, r4
+ 8000516:	e7c4      	b.n	80004a2 <__udivmoddi4+0x282>
+
+08000518 <__aeabi_idiv0>:
+ 8000518:	4770      	bx	lr
+ 800051a:	bf00      	nop
+
+0800051c <vApplicationStackOverflowHook>:
+}
+/* USER CODE END 2 */
+
+/* USER CODE BEGIN 4 */
+__weak void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName)
+{
+ 800051c:	b480      	push	{r7}
+ 800051e:	b083      	sub	sp, #12
+ 8000520:	af00      	add	r7, sp, #0
+ 8000522:	6078      	str	r0, [r7, #4]
+ 8000524:	6039      	str	r1, [r7, #0]
+   /* Run time stack overflow checking is performed if
+   configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is
+   called if a stack overflow is detected. */
+}
+ 8000526:	bf00      	nop
+ 8000528:	370c      	adds	r7, #12
+ 800052a:	46bd      	mov	sp, r7
+ 800052c:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000530:	4770      	bx	lr
+	...
+
+08000534 <_Z16SetTrafficLights12TrafficState>:
+  * @brief  The application entry point.
+  * @retval int
+  */
+
+void SetTrafficLights(TrafficState s)
+{
+ 8000534:	b580      	push	{r7, lr}
+ 8000536:	b082      	sub	sp, #8
+ 8000538:	af00      	add	r7, sp, #0
+ 800053a:	6078      	str	r0, [r7, #4]
+	// reset all
+	HAL_GPIO_WritePin(GPIOD, Green_Pin, GPIO_PIN_RESET);
+ 800053c:	2200      	movs	r2, #0
+ 800053e:	2180      	movs	r1, #128	@ 0x80
+ 8000540:	4817      	ldr	r0, [pc, #92]	@ (80005a0 <_Z16SetTrafficLights12TrafficState+0x6c>)
+ 8000542:	f000 fda3 	bl	800108c <HAL_GPIO_WritePin>
+	HAL_GPIO_WritePin(GPIOD, Yellow_Pin, GPIO_PIN_RESET);
+ 8000546:	2200      	movs	r2, #0
+ 8000548:	2120      	movs	r1, #32
+ 800054a:	4815      	ldr	r0, [pc, #84]	@ (80005a0 <_Z16SetTrafficLights12TrafficState+0x6c>)
+ 800054c:	f000 fd9e 	bl	800108c <HAL_GPIO_WritePin>
+	HAL_GPIO_WritePin(GPIOD, Red_Pin, GPIO_PIN_SET);
+ 8000550:	2201      	movs	r2, #1
+ 8000552:	2108      	movs	r1, #8
+ 8000554:	4812      	ldr	r0, [pc, #72]	@ (80005a0 <_Z16SetTrafficLights12TrafficState+0x6c>)
+ 8000556:	f000 fd99 	bl	800108c <HAL_GPIO_WritePin>
+
+	switch (s)
+ 800055a:	687b      	ldr	r3, [r7, #4]
+ 800055c:	2b02      	cmp	r3, #2
+ 800055e:	d015      	beq.n	800058c <_Z16SetTrafficLights12TrafficState+0x58>
+ 8000560:	687b      	ldr	r3, [r7, #4]
+ 8000562:	2b02      	cmp	r3, #2
+ 8000564:	dc18      	bgt.n	8000598 <_Z16SetTrafficLights12TrafficState+0x64>
+ 8000566:	687b      	ldr	r3, [r7, #4]
+ 8000568:	2b00      	cmp	r3, #0
+ 800056a:	d003      	beq.n	8000574 <_Z16SetTrafficLights12TrafficState+0x40>
+ 800056c:	687b      	ldr	r3, [r7, #4]
+ 800056e:	2b01      	cmp	r3, #1
+ 8000570:	d006      	beq.n	8000580 <_Z16SetTrafficLights12TrafficState+0x4c>
+		break;
+	case TrafficState::RED:
+		HAL_GPIO_WritePin(GPIOD, Red_Pin, GPIO_PIN_SET);
+		break;
+	}
+}
+ 8000572:	e011      	b.n	8000598 <_Z16SetTrafficLights12TrafficState+0x64>
+		HAL_GPIO_WritePin(GPIOD, Green_Pin, GPIO_PIN_SET);
+ 8000574:	2201      	movs	r2, #1
+ 8000576:	2180      	movs	r1, #128	@ 0x80
+ 8000578:	4809      	ldr	r0, [pc, #36]	@ (80005a0 <_Z16SetTrafficLights12TrafficState+0x6c>)
+ 800057a:	f000 fd87 	bl	800108c <HAL_GPIO_WritePin>
+		break;
+ 800057e:	e00b      	b.n	8000598 <_Z16SetTrafficLights12TrafficState+0x64>
+		HAL_GPIO_WritePin(GPIOD, Yellow_Pin, GPIO_PIN_SET);
+ 8000580:	2201      	movs	r2, #1
+ 8000582:	2120      	movs	r1, #32
+ 8000584:	4806      	ldr	r0, [pc, #24]	@ (80005a0 <_Z16SetTrafficLights12TrafficState+0x6c>)
+ 8000586:	f000 fd81 	bl	800108c <HAL_GPIO_WritePin>
+		break;
+ 800058a:	e005      	b.n	8000598 <_Z16SetTrafficLights12TrafficState+0x64>
+		HAL_GPIO_WritePin(GPIOD, Red_Pin, GPIO_PIN_SET);
+ 800058c:	2201      	movs	r2, #1
+ 800058e:	2108      	movs	r1, #8
+ 8000590:	4803      	ldr	r0, [pc, #12]	@ (80005a0 <_Z16SetTrafficLights12TrafficState+0x6c>)
+ 8000592:	f000 fd7b 	bl	800108c <HAL_GPIO_WritePin>
+		break;
+ 8000596:	bf00      	nop
+}
+ 8000598:	bf00      	nop
+ 800059a:	3708      	adds	r7, #8
+ 800059c:	46bd      	mov	sp, r7
+ 800059e:	bd80      	pop	{r7, pc}
+ 80005a0:	40020c00 	.word	0x40020c00
+
+080005a4 <main>:
+
+int main(void)
+{
+ 80005a4:	b580      	push	{r7, lr}
+ 80005a6:	b082      	sub	sp, #8
+ 80005a8:	af00      	add	r7, sp, #0
+
+  HAL_Init();
+ 80005aa:	f000 fab3 	bl	8000b14 <HAL_Init>
+  /* USER CODE BEGIN Init */
+
+  /* USER CODE END Init */
+
+  /* Configure the system clock */
+  SystemClock_Config();
+ 80005ae:	f000 f8a7 	bl	8000700 <SystemClock_Config>
+  MX_GPIO_Init();
+ 80005b2:	f000 f91b 	bl	80007ec <MX_GPIO_Init>
+  
+  stateStartTime = HAL_GetTick();
+ 80005b6:	f000 facf 	bl	8000b58 <HAL_GetTick>
+ 80005ba:	4603      	mov	r3, r0
+ 80005bc:	4a4a      	ldr	r2, [pc, #296]	@ (80006e8 <main+0x144>)
+ 80005be:	6013      	str	r3, [r2, #0]
+  SetTrafficLights(currentState);
+ 80005c0:	4b4a      	ldr	r3, [pc, #296]	@ (80006ec <main+0x148>)
+ 80005c2:	681b      	ldr	r3, [r3, #0]
+ 80005c4:	4618      	mov	r0, r3
+ 80005c6:	f7ff ffb5 	bl	8000534 <_Z16SetTrafficLights12TrafficState>
+  
+  while (1)
+  {
+    /* USER CODE END WHILE */
+	  uint32_t now = HAL_GetTick();
+ 80005ca:	f000 fac5 	bl	8000b58 <HAL_GetTick>
+ 80005ce:	6078      	str	r0, [r7, #4]
+	  uint32_t elapsed = now - stateStartTime;
+ 80005d0:	4b45      	ldr	r3, [pc, #276]	@ (80006e8 <main+0x144>)
+ 80005d2:	681b      	ldr	r3, [r3, #0]
+ 80005d4:	687a      	ldr	r2, [r7, #4]
+ 80005d6:	1ad3      	subs	r3, r2, r3
+ 80005d8:	603b      	str	r3, [r7, #0]
+
+	  switch(currentState)
+ 80005da:	4b44      	ldr	r3, [pc, #272]	@ (80006ec <main+0x148>)
+ 80005dc:	681b      	ldr	r3, [r3, #0]
+ 80005de:	2b02      	cmp	r3, #2
+ 80005e0:	d03e      	beq.n	8000660 <main+0xbc>
+ 80005e2:	2b02      	cmp	r3, #2
+ 80005e4:	dcf1      	bgt.n	80005ca <main+0x26>
+ 80005e6:	2b00      	cmp	r3, #0
+ 80005e8:	d002      	beq.n	80005f0 <main+0x4c>
+ 80005ea:	2b01      	cmp	r3, #1
+ 80005ec:	d019      	beq.n	8000622 <main+0x7e>
+ 80005ee:	e07a      	b.n	80006e6 <main+0x142>
+	  {
+	  case TrafficState::GREEN:
+		  if (buttonPressedThisCycle)
+ 80005f0:	4b3f      	ldr	r3, [pc, #252]	@ (80006f0 <main+0x14c>)
+ 80005f2:	781b      	ldrb	r3, [r3, #0]
+ 80005f4:	2b00      	cmp	r3, #0
+ 80005f6:	d003      	beq.n	8000600 <main+0x5c>
+			  pedestrianThisCycle = true;
+ 80005f8:	4b3e      	ldr	r3, [pc, #248]	@ (80006f4 <main+0x150>)
+ 80005fa:	2201      	movs	r2, #1
+ 80005fc:	701a      	strb	r2, [r3, #0]
+		  {
+			  currentState = TrafficState::YELLOW;
+			  stateStartTime = now;
+			  SetTrafficLights(currentState);
+		  }
+		  break;
+ 80005fe:	e06d      	b.n	80006dc <main+0x138>
+		  else if (elapsed >= DURATION_GREEN)
+ 8000600:	683b      	ldr	r3, [r7, #0]
+ 8000602:	f241 3287 	movw	r2, #4999	@ 0x1387
+ 8000606:	4293      	cmp	r3, r2
+ 8000608:	d968      	bls.n	80006dc <main+0x138>
+			  currentState = TrafficState::YELLOW;
+ 800060a:	4b38      	ldr	r3, [pc, #224]	@ (80006ec <main+0x148>)
+ 800060c:	2201      	movs	r2, #1
+ 800060e:	601a      	str	r2, [r3, #0]
+			  stateStartTime = now;
+ 8000610:	4a35      	ldr	r2, [pc, #212]	@ (80006e8 <main+0x144>)
+ 8000612:	687b      	ldr	r3, [r7, #4]
+ 8000614:	6013      	str	r3, [r2, #0]
+			  SetTrafficLights(currentState);
+ 8000616:	4b35      	ldr	r3, [pc, #212]	@ (80006ec <main+0x148>)
+ 8000618:	681b      	ldr	r3, [r3, #0]
+ 800061a:	4618      	mov	r0, r3
+ 800061c:	f7ff ff8a 	bl	8000534 <_Z16SetTrafficLights12TrafficState>
+		  break;
+ 8000620:	e05c      	b.n	80006dc <main+0x138>
+	  case TrafficState::YELLOW:
+		  if (buttonPressedThisCycle || pedestrianNextCycle)
+ 8000622:	4b33      	ldr	r3, [pc, #204]	@ (80006f0 <main+0x14c>)
+ 8000624:	781b      	ldrb	r3, [r3, #0]
+ 8000626:	2b00      	cmp	r3, #0
+ 8000628:	d103      	bne.n	8000632 <main+0x8e>
+ 800062a:	4b33      	ldr	r3, [pc, #204]	@ (80006f8 <main+0x154>)
+ 800062c:	781b      	ldrb	r3, [r3, #0]
+ 800062e:	2b00      	cmp	r3, #0
+ 8000630:	d002      	beq.n	8000638 <main+0x94>
+			  pedestrianThisCycle = true;
+ 8000632:	4b30      	ldr	r3, [pc, #192]	@ (80006f4 <main+0x150>)
+ 8000634:	2201      	movs	r2, #1
+ 8000636:	701a      	strb	r2, [r3, #0]
+
+		  if (elapsed >= DURATION_YELLOW)
+ 8000638:	683b      	ldr	r3, [r7, #0]
+ 800063a:	f640 32b7 	movw	r2, #2999	@ 0xbb7
+ 800063e:	4293      	cmp	r3, r2
+ 8000640:	d94e      	bls.n	80006e0 <main+0x13c>
+		  {
+			  currentState = TrafficState::RED;
+ 8000642:	4b2a      	ldr	r3, [pc, #168]	@ (80006ec <main+0x148>)
+ 8000644:	2202      	movs	r2, #2
+ 8000646:	601a      	str	r2, [r3, #0]
+			  stateStartTime = now;
+ 8000648:	4a27      	ldr	r2, [pc, #156]	@ (80006e8 <main+0x144>)
+ 800064a:	687b      	ldr	r3, [r7, #4]
+ 800064c:	6013      	str	r3, [r2, #0]
+			  buttonPressedThisCycle = false; //TODO add pressed pedestrian button in yellow
+ 800064e:	4b28      	ldr	r3, [pc, #160]	@ (80006f0 <main+0x14c>)
+ 8000650:	2200      	movs	r2, #0
+ 8000652:	701a      	strb	r2, [r3, #0]
+			  SetTrafficLights(currentState);
+ 8000654:	4b25      	ldr	r3, [pc, #148]	@ (80006ec <main+0x148>)
+ 8000656:	681b      	ldr	r3, [r3, #0]
+ 8000658:	4618      	mov	r0, r3
+ 800065a:	f7ff ff6b 	bl	8000534 <_Z16SetTrafficLights12TrafficState>
+			  // If Ped Button was pressed during GREEN or YELLOW, we need to enable WHITE this cycle
+		  }
+		  break;
+ 800065e:	e03f      	b.n	80006e0 <main+0x13c>
+	  case TrafficState::RED:
+		  if (buttonPressedThisCycle)
+ 8000660:	4b23      	ldr	r3, [pc, #140]	@ (80006f0 <main+0x14c>)
+ 8000662:	781b      	ldrb	r3, [r3, #0]
+ 8000664:	2b00      	cmp	r3, #0
+ 8000666:	d002      	beq.n	800066e <main+0xca>
+			  pedestrianNextCycle = true;
+ 8000668:	4b23      	ldr	r3, [pc, #140]	@ (80006f8 <main+0x154>)
+ 800066a:	2201      	movs	r2, #1
+ 800066c:	701a      	strb	r2, [r3, #0]
+
+		  if (pedestrianThisCycle) {
+ 800066e:	4b21      	ldr	r3, [pc, #132]	@ (80006f4 <main+0x150>)
+ 8000670:	781b      	ldrb	r3, [r3, #0]
+ 8000672:	2b00      	cmp	r3, #0
+ 8000674:	d019      	beq.n	80006aa <main+0x106>
+			  HAL_GPIO_WritePin(White_GPIO_Port, White_Pin, GPIO_PIN_RESET);
+ 8000676:	2200      	movs	r2, #0
+ 8000678:	2102      	movs	r1, #2
+ 800067a:	4820      	ldr	r0, [pc, #128]	@ (80006fc <main+0x158>)
+ 800067c:	f000 fd06 	bl	800108c <HAL_GPIO_WritePin>
+			  pedestrianThisCycle = false;
+ 8000680:	4b1c      	ldr	r3, [pc, #112]	@ (80006f4 <main+0x150>)
+ 8000682:	2200      	movs	r2, #0
+ 8000684:	701a      	strb	r2, [r3, #0]
+			  pedestrianNextCycle = false;
+ 8000686:	4b1c      	ldr	r3, [pc, #112]	@ (80006f8 <main+0x154>)
+ 8000688:	2200      	movs	r2, #0
+ 800068a:	701a      	strb	r2, [r3, #0]
+			  currentState = TrafficState::GREEN;
+ 800068c:	4b17      	ldr	r3, [pc, #92]	@ (80006ec <main+0x148>)
+ 800068e:	2200      	movs	r2, #0
+ 8000690:	601a      	str	r2, [r3, #0]
+			  stateStartTime = now;
+ 8000692:	4a15      	ldr	r2, [pc, #84]	@ (80006e8 <main+0x144>)
+ 8000694:	687b      	ldr	r3, [r7, #4]
+ 8000696:	6013      	str	r3, [r2, #0]
+			  SetTrafficLights(currentState);
+ 8000698:	4b14      	ldr	r3, [pc, #80]	@ (80006ec <main+0x148>)
+ 800069a:	681b      	ldr	r3, [r3, #0]
+ 800069c:	4618      	mov	r0, r3
+ 800069e:	f7ff ff49 	bl	8000534 <_Z16SetTrafficLights12TrafficState>
+			  buttonPressedThisCycle = false;
+ 80006a2:	4b13      	ldr	r3, [pc, #76]	@ (80006f0 <main+0x14c>)
+ 80006a4:	2200      	movs	r2, #0
+ 80006a6:	701a      	strb	r2, [r3, #0]
+				  stateStartTime = now;
+				  SetTrafficLights(currentState);
+				  buttonPressedThisCycle = false;
+			  }
+		  }
+		  break;
+ 80006a8:	e01c      	b.n	80006e4 <main+0x140>
+			  HAL_GPIO_WritePin(White_GPIO_Port, White_Pin, GPIO_PIN_RESET);
+ 80006aa:	2200      	movs	r2, #0
+ 80006ac:	2102      	movs	r1, #2
+ 80006ae:	4813      	ldr	r0, [pc, #76]	@ (80006fc <main+0x158>)
+ 80006b0:	f000 fcec 	bl	800108c <HAL_GPIO_WritePin>
+			  if (elapsed >= DURATION_RED_NOPED)
+ 80006b4:	683b      	ldr	r3, [r7, #0]
+ 80006b6:	f241 3287 	movw	r2, #4999	@ 0x1387
+ 80006ba:	4293      	cmp	r3, r2
+ 80006bc:	d912      	bls.n	80006e4 <main+0x140>
+				  currentState = TrafficState::GREEN;
+ 80006be:	4b0b      	ldr	r3, [pc, #44]	@ (80006ec <main+0x148>)
+ 80006c0:	2200      	movs	r2, #0
+ 80006c2:	601a      	str	r2, [r3, #0]
+				  stateStartTime = now;
+ 80006c4:	4a08      	ldr	r2, [pc, #32]	@ (80006e8 <main+0x144>)
+ 80006c6:	687b      	ldr	r3, [r7, #4]
+ 80006c8:	6013      	str	r3, [r2, #0]
+				  SetTrafficLights(currentState);
+ 80006ca:	4b08      	ldr	r3, [pc, #32]	@ (80006ec <main+0x148>)
+ 80006cc:	681b      	ldr	r3, [r3, #0]
+ 80006ce:	4618      	mov	r0, r3
+ 80006d0:	f7ff ff30 	bl	8000534 <_Z16SetTrafficLights12TrafficState>
+				  buttonPressedThisCycle = false;
+ 80006d4:	4b06      	ldr	r3, [pc, #24]	@ (80006f0 <main+0x14c>)
+ 80006d6:	2200      	movs	r2, #0
+ 80006d8:	701a      	strb	r2, [r3, #0]
+		  break;
+ 80006da:	e003      	b.n	80006e4 <main+0x140>
+		  break;
+ 80006dc:	bf00      	nop
+ 80006de:	e774      	b.n	80005ca <main+0x26>
+		  break;
+ 80006e0:	bf00      	nop
+ 80006e2:	e772      	b.n	80005ca <main+0x26>
+		  break;
+ 80006e4:	bf00      	nop
+	  }
+    /* USER CODE BEGIN 3 */
+  }
+ 80006e6:	e770      	b.n	80005ca <main+0x26>
+ 80006e8:	20000028 	.word	0x20000028
+ 80006ec:	20000024 	.word	0x20000024
+ 80006f0:	2000002c 	.word	0x2000002c
+ 80006f4:	2000002e 	.word	0x2000002e
+ 80006f8:	2000002d 	.word	0x2000002d
+ 80006fc:	40020c00 	.word	0x40020c00
+
+08000700 <SystemClock_Config>:
+  * @brief System Clock Configuration
+  * @retval None
+  */
+
+void SystemClock_Config(void)
+{
+ 8000700:	b580      	push	{r7, lr}
+ 8000702:	b094      	sub	sp, #80	@ 0x50
+ 8000704:	af00      	add	r7, sp, #0
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ 8000706:	f107 0320 	add.w	r3, r7, #32
+ 800070a:	2230      	movs	r2, #48	@ 0x30
+ 800070c:	2100      	movs	r1, #0
+ 800070e:	4618      	mov	r0, r3
+ 8000710:	f001 fe64 	bl	80023dc <memset>
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ 8000714:	f107 030c 	add.w	r3, r7, #12
+ 8000718:	2200      	movs	r2, #0
+ 800071a:	601a      	str	r2, [r3, #0]
+ 800071c:	605a      	str	r2, [r3, #4]
+ 800071e:	609a      	str	r2, [r3, #8]
+ 8000720:	60da      	str	r2, [r3, #12]
+ 8000722:	611a      	str	r2, [r3, #16]
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+ 8000724:	2300      	movs	r3, #0
+ 8000726:	60bb      	str	r3, [r7, #8]
+ 8000728:	4b2e      	ldr	r3, [pc, #184]	@ (80007e4 <SystemClock_Config+0xe4>)
+ 800072a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 800072c:	4a2d      	ldr	r2, [pc, #180]	@ (80007e4 <SystemClock_Config+0xe4>)
+ 800072e:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
+ 8000732:	6413      	str	r3, [r2, #64]	@ 0x40
+ 8000734:	4b2b      	ldr	r3, [pc, #172]	@ (80007e4 <SystemClock_Config+0xe4>)
+ 8000736:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8000738:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
+ 800073c:	60bb      	str	r3, [r7, #8]
+ 800073e:	68bb      	ldr	r3, [r7, #8]
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
+ 8000740:	2300      	movs	r3, #0
+ 8000742:	607b      	str	r3, [r7, #4]
+ 8000744:	4b28      	ldr	r3, [pc, #160]	@ (80007e8 <SystemClock_Config+0xe8>)
+ 8000746:	681b      	ldr	r3, [r3, #0]
+ 8000748:	f423 4340 	bic.w	r3, r3, #49152	@ 0xc000
+ 800074c:	4a26      	ldr	r2, [pc, #152]	@ (80007e8 <SystemClock_Config+0xe8>)
+ 800074e:	f443 4380 	orr.w	r3, r3, #16384	@ 0x4000
+ 8000752:	6013      	str	r3, [r2, #0]
+ 8000754:	4b24      	ldr	r3, [pc, #144]	@ (80007e8 <SystemClock_Config+0xe8>)
+ 8000756:	681b      	ldr	r3, [r3, #0]
+ 8000758:	f403 4340 	and.w	r3, r3, #49152	@ 0xc000
+ 800075c:	607b      	str	r3, [r7, #4]
+ 800075e:	687b      	ldr	r3, [r7, #4]
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ 8000760:	2302      	movs	r3, #2
+ 8000762:	623b      	str	r3, [r7, #32]
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ 8000764:	2301      	movs	r3, #1
+ 8000766:	62fb      	str	r3, [r7, #44]	@ 0x2c
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ 8000768:	2310      	movs	r3, #16
+ 800076a:	633b      	str	r3, [r7, #48]	@ 0x30
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ 800076c:	2302      	movs	r3, #2
+ 800076e:	63bb      	str	r3, [r7, #56]	@ 0x38
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ 8000770:	2300      	movs	r3, #0
+ 8000772:	63fb      	str	r3, [r7, #60]	@ 0x3c
+  RCC_OscInitStruct.PLL.PLLM = 8;
+ 8000774:	2308      	movs	r3, #8
+ 8000776:	643b      	str	r3, [r7, #64]	@ 0x40
+  RCC_OscInitStruct.PLL.PLLN = 50;
+ 8000778:	2332      	movs	r3, #50	@ 0x32
+ 800077a:	647b      	str	r3, [r7, #68]	@ 0x44
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
+ 800077c:	2304      	movs	r3, #4
+ 800077e:	64bb      	str	r3, [r7, #72]	@ 0x48
+  RCC_OscInitStruct.PLL.PLLQ = 7;
+ 8000780:	2307      	movs	r3, #7
+ 8000782:	64fb      	str	r3, [r7, #76]	@ 0x4c
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ 8000784:	f107 0320 	add.w	r3, r7, #32
+ 8000788:	4618      	mov	r0, r3
+ 800078a:	f000 fcbd 	bl	8001108 <HAL_RCC_OscConfig>
+ 800078e:	4603      	mov	r3, r0
+ 8000790:	2b00      	cmp	r3, #0
+ 8000792:	bf14      	ite	ne
+ 8000794:	2301      	movne	r3, #1
+ 8000796:	2300      	moveq	r3, #0
+ 8000798:	b2db      	uxtb	r3, r3
+ 800079a:	2b00      	cmp	r3, #0
+ 800079c:	d001      	beq.n	80007a2 <SystemClock_Config+0xa2>
+  {
+    Error_Handler();
+ 800079e:	f000 f87f 	bl	80008a0 <Error_Handler>
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ 80007a2:	230f      	movs	r3, #15
+ 80007a4:	60fb      	str	r3, [r7, #12]
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ 80007a6:	2302      	movs	r3, #2
+ 80007a8:	613b      	str	r3, [r7, #16]
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ 80007aa:	2300      	movs	r3, #0
+ 80007ac:	617b      	str	r3, [r7, #20]
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV8;
+ 80007ae:	f44f 53c0 	mov.w	r3, #6144	@ 0x1800
+ 80007b2:	61bb      	str	r3, [r7, #24]
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV4;
+ 80007b4:	f44f 53a0 	mov.w	r3, #5120	@ 0x1400
+ 80007b8:	61fb      	str	r3, [r7, #28]
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
+ 80007ba:	f107 030c 	add.w	r3, r7, #12
+ 80007be:	2100      	movs	r1, #0
+ 80007c0:	4618      	mov	r0, r3
+ 80007c2:	f000 ff19 	bl	80015f8 <HAL_RCC_ClockConfig>
+ 80007c6:	4603      	mov	r3, r0
+ 80007c8:	2b00      	cmp	r3, #0
+ 80007ca:	bf14      	ite	ne
+ 80007cc:	2301      	movne	r3, #1
+ 80007ce:	2300      	moveq	r3, #0
+ 80007d0:	b2db      	uxtb	r3, r3
+ 80007d2:	2b00      	cmp	r3, #0
+ 80007d4:	d001      	beq.n	80007da <SystemClock_Config+0xda>
+  {
+    Error_Handler();
+ 80007d6:	f000 f863 	bl	80008a0 <Error_Handler>
+  }
+}
+ 80007da:	bf00      	nop
+ 80007dc:	3750      	adds	r7, #80	@ 0x50
+ 80007de:	46bd      	mov	sp, r7
+ 80007e0:	bd80      	pop	{r7, pc}
+ 80007e2:	bf00      	nop
+ 80007e4:	40023800 	.word	0x40023800
+ 80007e8:	40007000 	.word	0x40007000
+
+080007ec <MX_GPIO_Init>:
+  * @brief GPIO Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_GPIO_Init(void)
+{
+ 80007ec:	b580      	push	{r7, lr}
+ 80007ee:	b088      	sub	sp, #32
+ 80007f0:	af00      	add	r7, sp, #0
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 80007f2:	f107 030c 	add.w	r3, r7, #12
+ 80007f6:	2200      	movs	r2, #0
+ 80007f8:	601a      	str	r2, [r3, #0]
+ 80007fa:	605a      	str	r2, [r3, #4]
+ 80007fc:	609a      	str	r2, [r3, #8]
+ 80007fe:	60da      	str	r2, [r3, #12]
+ 8000800:	611a      	str	r2, [r3, #16]
+  /* USER CODE BEGIN MX_GPIO_Init_1 */
+
+  /* USER CODE END MX_GPIO_Init_1 */
+
+  /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+ 8000802:	2300      	movs	r3, #0
+ 8000804:	60bb      	str	r3, [r7, #8]
+ 8000806:	4b23      	ldr	r3, [pc, #140]	@ (8000894 <MX_GPIO_Init+0xa8>)
+ 8000808:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 800080a:	4a22      	ldr	r2, [pc, #136]	@ (8000894 <MX_GPIO_Init+0xa8>)
+ 800080c:	f043 0301 	orr.w	r3, r3, #1
+ 8000810:	6313      	str	r3, [r2, #48]	@ 0x30
+ 8000812:	4b20      	ldr	r3, [pc, #128]	@ (8000894 <MX_GPIO_Init+0xa8>)
+ 8000814:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000816:	f003 0301 	and.w	r3, r3, #1
+ 800081a:	60bb      	str	r3, [r7, #8]
+ 800081c:	68bb      	ldr	r3, [r7, #8]
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+ 800081e:	2300      	movs	r3, #0
+ 8000820:	607b      	str	r3, [r7, #4]
+ 8000822:	4b1c      	ldr	r3, [pc, #112]	@ (8000894 <MX_GPIO_Init+0xa8>)
+ 8000824:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000826:	4a1b      	ldr	r2, [pc, #108]	@ (8000894 <MX_GPIO_Init+0xa8>)
+ 8000828:	f043 0308 	orr.w	r3, r3, #8
+ 800082c:	6313      	str	r3, [r2, #48]	@ 0x30
+ 800082e:	4b19      	ldr	r3, [pc, #100]	@ (8000894 <MX_GPIO_Init+0xa8>)
+ 8000830:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 8000832:	f003 0308 	and.w	r3, r3, #8
+ 8000836:	607b      	str	r3, [r7, #4]
+ 8000838:	687b      	ldr	r3, [r7, #4]
+
+  /*Configure GPIO pin Output Level */
+  HAL_GPIO_WritePin(GPIOD, White_Pin|Red_Pin|Yellow_Pin|Green_Pin, GPIO_PIN_RESET);
+ 800083a:	2200      	movs	r2, #0
+ 800083c:	21aa      	movs	r1, #170	@ 0xaa
+ 800083e:	4816      	ldr	r0, [pc, #88]	@ (8000898 <MX_GPIO_Init+0xac>)
+ 8000840:	f000 fc24 	bl	800108c <HAL_GPIO_WritePin>
+
+  /*Configure GPIO pin : PedButton_Pin */
+  GPIO_InitStruct.Pin = PedButton_Pin;
+ 8000844:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
+ 8000848:	60fb      	str	r3, [r7, #12]
+  GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
+ 800084a:	f44f 1388 	mov.w	r3, #1114112	@ 0x110000
+ 800084e:	613b      	str	r3, [r7, #16]
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8000850:	2300      	movs	r3, #0
+ 8000852:	617b      	str	r3, [r7, #20]
+  HAL_GPIO_Init(PedButton_GPIO_Port, &GPIO_InitStruct);
+ 8000854:	f107 030c 	add.w	r3, r7, #12
+ 8000858:	4619      	mov	r1, r3
+ 800085a:	4810      	ldr	r0, [pc, #64]	@ (800089c <MX_GPIO_Init+0xb0>)
+ 800085c:	f000 fa6a 	bl	8000d34 <HAL_GPIO_Init>
+
+  /*Configure GPIO pins : White_Pin Red_Pin Yellow_Pin Green_Pin */
+  GPIO_InitStruct.Pin = White_Pin|Red_Pin|Yellow_Pin|Green_Pin;
+ 8000860:	23aa      	movs	r3, #170	@ 0xaa
+ 8000862:	60fb      	str	r3, [r7, #12]
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 8000864:	2301      	movs	r3, #1
+ 8000866:	613b      	str	r3, [r7, #16]
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8000868:	2300      	movs	r3, #0
+ 800086a:	617b      	str	r3, [r7, #20]
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 800086c:	2300      	movs	r3, #0
+ 800086e:	61bb      	str	r3, [r7, #24]
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+ 8000870:	f107 030c 	add.w	r3, r7, #12
+ 8000874:	4619      	mov	r1, r3
+ 8000876:	4808      	ldr	r0, [pc, #32]	@ (8000898 <MX_GPIO_Init+0xac>)
+ 8000878:	f000 fa5c 	bl	8000d34 <HAL_GPIO_Init>
+
+  /* EXTI interrupt init*/
+  HAL_NVIC_SetPriority(EXTI15_10_IRQn, 15, 0);
+ 800087c:	2200      	movs	r2, #0
+ 800087e:	210f      	movs	r1, #15
+ 8000880:	2028      	movs	r0, #40	@ 0x28
+ 8000882:	f000 fa2d 	bl	8000ce0 <HAL_NVIC_SetPriority>
+  HAL_NVIC_EnableIRQ(EXTI15_10_IRQn);
+ 8000886:	2028      	movs	r0, #40	@ 0x28
+ 8000888:	f000 fa46 	bl	8000d18 <HAL_NVIC_EnableIRQ>
+
+  /* USER CODE BEGIN MX_GPIO_Init_2 */
+
+  /* USER CODE END MX_GPIO_Init_2 */
+}
+ 800088c:	bf00      	nop
+ 800088e:	3720      	adds	r7, #32
+ 8000890:	46bd      	mov	sp, r7
+ 8000892:	bd80      	pop	{r7, pc}
+ 8000894:	40023800 	.word	0x40023800
+ 8000898:	40020c00 	.word	0x40020c00
+ 800089c:	40020000 	.word	0x40020000
+
+080008a0 <Error_Handler>:
+/**
+  * @brief  This function is executed in case of error occurrence.
+  * @retval None
+  */
+void Error_Handler(void)
+{
+ 80008a0:	b480      	push	{r7}
+ 80008a2:	af00      	add	r7, sp, #0
+  \details Disables IRQ interrupts by setting special-purpose register PRIMASK.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __disable_irq(void)
+{
+  __ASM volatile ("cpsid i" : : : "memory");
+ 80008a4:	b672      	cpsid	i
+}
+ 80008a6:	bf00      	nop
+  /* USER CODE BEGIN Error_Handler_Debug */
+  /* User can add his own implementation to report the HAL error return state */
+  __disable_irq();
+  while (1)
+ 80008a8:	bf00      	nop
+ 80008aa:	e7fd      	b.n	80008a8 <Error_Handler+0x8>
+
+080008ac <HAL_MspInit>:
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+ 80008ac:	b580      	push	{r7, lr}
+ 80008ae:	b082      	sub	sp, #8
+ 80008b0:	af00      	add	r7, sp, #0
+
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  __HAL_RCC_SYSCFG_CLK_ENABLE();
+ 80008b2:	2300      	movs	r3, #0
+ 80008b4:	607b      	str	r3, [r7, #4]
+ 80008b6:	4b12      	ldr	r3, [pc, #72]	@ (8000900 <HAL_MspInit+0x54>)
+ 80008b8:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 80008ba:	4a11      	ldr	r2, [pc, #68]	@ (8000900 <HAL_MspInit+0x54>)
+ 80008bc:	f443 4380 	orr.w	r3, r3, #16384	@ 0x4000
+ 80008c0:	6453      	str	r3, [r2, #68]	@ 0x44
+ 80008c2:	4b0f      	ldr	r3, [pc, #60]	@ (8000900 <HAL_MspInit+0x54>)
+ 80008c4:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 80008c6:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
+ 80008ca:	607b      	str	r3, [r7, #4]
+ 80008cc:	687b      	ldr	r3, [r7, #4]
+  __HAL_RCC_PWR_CLK_ENABLE();
+ 80008ce:	2300      	movs	r3, #0
+ 80008d0:	603b      	str	r3, [r7, #0]
+ 80008d2:	4b0b      	ldr	r3, [pc, #44]	@ (8000900 <HAL_MspInit+0x54>)
+ 80008d4:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 80008d6:	4a0a      	ldr	r2, [pc, #40]	@ (8000900 <HAL_MspInit+0x54>)
+ 80008d8:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
+ 80008dc:	6413      	str	r3, [r2, #64]	@ 0x40
+ 80008de:	4b08      	ldr	r3, [pc, #32]	@ (8000900 <HAL_MspInit+0x54>)
+ 80008e0:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 80008e2:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
+ 80008e6:	603b      	str	r3, [r7, #0]
+ 80008e8:	683b      	ldr	r3, [r7, #0]
+
+  /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+ 80008ea:	2200      	movs	r2, #0
+ 80008ec:	210f      	movs	r1, #15
+ 80008ee:	f06f 0001 	mvn.w	r0, #1
+ 80008f2:	f000 f9f5 	bl	8000ce0 <HAL_NVIC_SetPriority>
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+ 80008f6:	bf00      	nop
+ 80008f8:	3708      	adds	r7, #8
+ 80008fa:	46bd      	mov	sp, r7
+ 80008fc:	bd80      	pop	{r7, pc}
+ 80008fe:	bf00      	nop
+ 8000900:	40023800 	.word	0x40023800
+
+08000904 <HAL_TIM_Base_MspInit>:
+  * This function configures the hardware resources used in this example
+  * @param htim_base: TIM_Base handle pointer
+  * @retval None
+  */
+void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
+{
+ 8000904:	b480      	push	{r7}
+ 8000906:	b085      	sub	sp, #20
+ 8000908:	af00      	add	r7, sp, #0
+ 800090a:	6078      	str	r0, [r7, #4]
+  if(htim_base->Instance==TIM1)
+ 800090c:	687b      	ldr	r3, [r7, #4]
+ 800090e:	681b      	ldr	r3, [r3, #0]
+ 8000910:	4a0b      	ldr	r2, [pc, #44]	@ (8000940 <HAL_TIM_Base_MspInit+0x3c>)
+ 8000912:	4293      	cmp	r3, r2
+ 8000914:	d10d      	bne.n	8000932 <HAL_TIM_Base_MspInit+0x2e>
+  {
+    /* USER CODE BEGIN TIM1_MspInit 0 */
+
+    /* USER CODE END TIM1_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_TIM1_CLK_ENABLE();
+ 8000916:	2300      	movs	r3, #0
+ 8000918:	60fb      	str	r3, [r7, #12]
+ 800091a:	4b0a      	ldr	r3, [pc, #40]	@ (8000944 <HAL_TIM_Base_MspInit+0x40>)
+ 800091c:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 800091e:	4a09      	ldr	r2, [pc, #36]	@ (8000944 <HAL_TIM_Base_MspInit+0x40>)
+ 8000920:	f043 0301 	orr.w	r3, r3, #1
+ 8000924:	6453      	str	r3, [r2, #68]	@ 0x44
+ 8000926:	4b07      	ldr	r3, [pc, #28]	@ (8000944 <HAL_TIM_Base_MspInit+0x40>)
+ 8000928:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 800092a:	f003 0301 	and.w	r3, r3, #1
+ 800092e:	60fb      	str	r3, [r7, #12]
+ 8000930:	68fb      	ldr	r3, [r7, #12]
+
+    /* USER CODE END TIM1_MspInit 1 */
+
+  }
+
+}
+ 8000932:	bf00      	nop
+ 8000934:	3714      	adds	r7, #20
+ 8000936:	46bd      	mov	sp, r7
+ 8000938:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 800093c:	4770      	bx	lr
+ 800093e:	bf00      	nop
+ 8000940:	40010000 	.word	0x40010000
+ 8000944:	40023800 	.word	0x40023800
+
+08000948 <HAL_InitTick>:
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority: Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+ 8000948:	b580      	push	{r7, lr}
+ 800094a:	b08e      	sub	sp, #56	@ 0x38
+ 800094c:	af00      	add	r7, sp, #0
+ 800094e:	6078      	str	r0, [r7, #4]
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock, uwAPB1Prescaler = 0U;
+ 8000950:	2300      	movs	r3, #0
+ 8000952:	62fb      	str	r3, [r7, #44]	@ 0x2c
+
+  uint32_t              uwPrescalerValue = 0U;
+ 8000954:	2300      	movs	r3, #0
+ 8000956:	62bb      	str	r3, [r7, #40]	@ 0x28
+  uint32_t              pFLatency;
+
+  HAL_StatusTypeDef     status;
+
+  /* Enable TIM6 clock */
+  __HAL_RCC_TIM6_CLK_ENABLE();
+ 8000958:	2300      	movs	r3, #0
+ 800095a:	60fb      	str	r3, [r7, #12]
+ 800095c:	4b33      	ldr	r3, [pc, #204]	@ (8000a2c <HAL_InitTick+0xe4>)
+ 800095e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8000960:	4a32      	ldr	r2, [pc, #200]	@ (8000a2c <HAL_InitTick+0xe4>)
+ 8000962:	f043 0310 	orr.w	r3, r3, #16
+ 8000966:	6413      	str	r3, [r2, #64]	@ 0x40
+ 8000968:	4b30      	ldr	r3, [pc, #192]	@ (8000a2c <HAL_InitTick+0xe4>)
+ 800096a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 800096c:	f003 0310 	and.w	r3, r3, #16
+ 8000970:	60fb      	str	r3, [r7, #12]
+ 8000972:	68fb      	ldr	r3, [r7, #12]
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+ 8000974:	f107 0210 	add.w	r2, r7, #16
+ 8000978:	f107 0314 	add.w	r3, r7, #20
+ 800097c:	4611      	mov	r1, r2
+ 800097e:	4618      	mov	r0, r3
+ 8000980:	f001 f846 	bl	8001a10 <HAL_RCC_GetClockConfig>
+
+  /* Get APB1 prescaler */
+  uwAPB1Prescaler = clkconfig.APB1CLKDivider;
+ 8000984:	6a3b      	ldr	r3, [r7, #32]
+ 8000986:	62fb      	str	r3, [r7, #44]	@ 0x2c
+  /* Compute TIM6 clock */
+  if (uwAPB1Prescaler == RCC_HCLK_DIV1)
+ 8000988:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
+ 800098a:	2b00      	cmp	r3, #0
+ 800098c:	d103      	bne.n	8000996 <HAL_InitTick+0x4e>
+  {
+    uwTimclock = HAL_RCC_GetPCLK1Freq();
+ 800098e:	f001 f82b 	bl	80019e8 <HAL_RCC_GetPCLK1Freq>
+ 8000992:	6378      	str	r0, [r7, #52]	@ 0x34
+ 8000994:	e004      	b.n	80009a0 <HAL_InitTick+0x58>
+  }
+  else
+  {
+    uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq();
+ 8000996:	f001 f827 	bl	80019e8 <HAL_RCC_GetPCLK1Freq>
+ 800099a:	4603      	mov	r3, r0
+ 800099c:	005b      	lsls	r3, r3, #1
+ 800099e:	637b      	str	r3, [r7, #52]	@ 0x34
+  }
+
+  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
+ 80009a0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
+ 80009a2:	4a23      	ldr	r2, [pc, #140]	@ (8000a30 <HAL_InitTick+0xe8>)
+ 80009a4:	fba2 2303 	umull	r2, r3, r2, r3
+ 80009a8:	0c9b      	lsrs	r3, r3, #18
+ 80009aa:	3b01      	subs	r3, #1
+ 80009ac:	62bb      	str	r3, [r7, #40]	@ 0x28
+
+  /* Initialize TIM6 */
+  htim6.Instance = TIM6;
+ 80009ae:	4b21      	ldr	r3, [pc, #132]	@ (8000a34 <HAL_InitTick+0xec>)
+ 80009b0:	4a21      	ldr	r2, [pc, #132]	@ (8000a38 <HAL_InitTick+0xf0>)
+ 80009b2:	601a      	str	r2, [r3, #0]
+   * Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+   * Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+   * ClockDivision = 0
+   * Counter direction = Up
+   */
+  htim6.Init.Period = (1000000U / 1000U) - 1U;
+ 80009b4:	4b1f      	ldr	r3, [pc, #124]	@ (8000a34 <HAL_InitTick+0xec>)
+ 80009b6:	f240 32e7 	movw	r2, #999	@ 0x3e7
+ 80009ba:	60da      	str	r2, [r3, #12]
+  htim6.Init.Prescaler = uwPrescalerValue;
+ 80009bc:	4a1d      	ldr	r2, [pc, #116]	@ (8000a34 <HAL_InitTick+0xec>)
+ 80009be:	6abb      	ldr	r3, [r7, #40]	@ 0x28
+ 80009c0:	6053      	str	r3, [r2, #4]
+  htim6.Init.ClockDivision = 0;
+ 80009c2:	4b1c      	ldr	r3, [pc, #112]	@ (8000a34 <HAL_InitTick+0xec>)
+ 80009c4:	2200      	movs	r2, #0
+ 80009c6:	611a      	str	r2, [r3, #16]
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 80009c8:	4b1a      	ldr	r3, [pc, #104]	@ (8000a34 <HAL_InitTick+0xec>)
+ 80009ca:	2200      	movs	r2, #0
+ 80009cc:	609a      	str	r2, [r3, #8]
+  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 80009ce:	4b19      	ldr	r3, [pc, #100]	@ (8000a34 <HAL_InitTick+0xec>)
+ 80009d0:	2200      	movs	r2, #0
+ 80009d2:	619a      	str	r2, [r3, #24]
+
+  status = HAL_TIM_Base_Init(&htim6);
+ 80009d4:	4817      	ldr	r0, [pc, #92]	@ (8000a34 <HAL_InitTick+0xec>)
+ 80009d6:	f001 f84d 	bl	8001a74 <HAL_TIM_Base_Init>
+ 80009da:	4603      	mov	r3, r0
+ 80009dc:	f887 3033 	strb.w	r3, [r7, #51]	@ 0x33
+  if (status == HAL_OK)
+ 80009e0:	f897 3033 	ldrb.w	r3, [r7, #51]	@ 0x33
+ 80009e4:	2b00      	cmp	r3, #0
+ 80009e6:	d11b      	bne.n	8000a20 <HAL_InitTick+0xd8>
+  {
+    /* Start the TIM time Base generation in interrupt mode */
+    status = HAL_TIM_Base_Start_IT(&htim6);
+ 80009e8:	4812      	ldr	r0, [pc, #72]	@ (8000a34 <HAL_InitTick+0xec>)
+ 80009ea:	f001 f893 	bl	8001b14 <HAL_TIM_Base_Start_IT>
+ 80009ee:	4603      	mov	r3, r0
+ 80009f0:	f887 3033 	strb.w	r3, [r7, #51]	@ 0x33
+    if (status == HAL_OK)
+ 80009f4:	f897 3033 	ldrb.w	r3, [r7, #51]	@ 0x33
+ 80009f8:	2b00      	cmp	r3, #0
+ 80009fa:	d111      	bne.n	8000a20 <HAL_InitTick+0xd8>
+    {
+    /* Enable the TIM6 global Interrupt */
+        HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ 80009fc:	2036      	movs	r0, #54	@ 0x36
+ 80009fe:	f000 f98b 	bl	8000d18 <HAL_NVIC_EnableIRQ>
+      /* Configure the SysTick IRQ priority */
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+ 8000a02:	687b      	ldr	r3, [r7, #4]
+ 8000a04:	2b0f      	cmp	r3, #15
+ 8000a06:	d808      	bhi.n	8000a1a <HAL_InitTick+0xd2>
+      {
+        /* Configure the TIM IRQ priority */
+        HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority, 0U);
+ 8000a08:	2200      	movs	r2, #0
+ 8000a0a:	6879      	ldr	r1, [r7, #4]
+ 8000a0c:	2036      	movs	r0, #54	@ 0x36
+ 8000a0e:	f000 f967 	bl	8000ce0 <HAL_NVIC_SetPriority>
+        uwTickPrio = TickPriority;
+ 8000a12:	4a0a      	ldr	r2, [pc, #40]	@ (8000a3c <HAL_InitTick+0xf4>)
+ 8000a14:	687b      	ldr	r3, [r7, #4]
+ 8000a16:	6013      	str	r3, [r2, #0]
+ 8000a18:	e002      	b.n	8000a20 <HAL_InitTick+0xd8>
+      }
+      else
+      {
+        status = HAL_ERROR;
+ 8000a1a:	2301      	movs	r3, #1
+ 8000a1c:	f887 3033 	strb.w	r3, [r7, #51]	@ 0x33
+      }
+    }
+  }
+
+ /* Return function status */
+  return status;
+ 8000a20:	f897 3033 	ldrb.w	r3, [r7, #51]	@ 0x33
+}
+ 8000a24:	4618      	mov	r0, r3
+ 8000a26:	3738      	adds	r7, #56	@ 0x38
+ 8000a28:	46bd      	mov	sp, r7
+ 8000a2a:	bd80      	pop	{r7, pc}
+ 8000a2c:	40023800 	.word	0x40023800
+ 8000a30:	431bde83 	.word	0x431bde83
+ 8000a34:	20000030 	.word	0x20000030
+ 8000a38:	40001000 	.word	0x40001000
+ 8000a3c:	20000004 	.word	0x20000004
+
+08000a40 <NMI_Handler>:
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+ 8000a40:	b480      	push	{r7}
+ 8000a42:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+   while (1)
+ 8000a44:	bf00      	nop
+ 8000a46:	e7fd      	b.n	8000a44 <NMI_Handler+0x4>
+
+08000a48 <HardFault_Handler>:
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+ 8000a48:	b480      	push	{r7}
+ 8000a4a:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+ 8000a4c:	bf00      	nop
+ 8000a4e:	e7fd      	b.n	8000a4c <HardFault_Handler+0x4>
+
+08000a50 <MemManage_Handler>:
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+ 8000a50:	b480      	push	{r7}
+ 8000a52:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+ 8000a54:	bf00      	nop
+ 8000a56:	e7fd      	b.n	8000a54 <MemManage_Handler+0x4>
+
+08000a58 <BusFault_Handler>:
+
+/**
+  * @brief This function handles Pre-fetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+ 8000a58:	b480      	push	{r7}
+ 8000a5a:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+ 8000a5c:	bf00      	nop
+ 8000a5e:	e7fd      	b.n	8000a5c <BusFault_Handler+0x4>
+
+08000a60 <UsageFault_Handler>:
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+ 8000a60:	b480      	push	{r7}
+ 8000a62:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+ 8000a64:	bf00      	nop
+ 8000a66:	e7fd      	b.n	8000a64 <UsageFault_Handler+0x4>
+
+08000a68 <DebugMon_Handler>:
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+ 8000a68:	b480      	push	{r7}
+ 8000a6a:	af00      	add	r7, sp, #0
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+ 8000a6c:	bf00      	nop
+ 8000a6e:	46bd      	mov	sp, r7
+ 8000a70:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000a74:	4770      	bx	lr
+
+08000a76 <EXTI15_10_IRQHandler>:
+
+/**
+  * @brief This function handles EXTI line[15:10] interrupts.
+  */
+void EXTI15_10_IRQHandler(void)
+{
+ 8000a76:	b580      	push	{r7, lr}
+ 8000a78:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN EXTI15_10_IRQn 0 */
+
+  /* USER CODE END EXTI15_10_IRQn 0 */
+  HAL_GPIO_EXTI_IRQHandler(PedButton_Pin);
+ 8000a7a:	f44f 4080 	mov.w	r0, #16384	@ 0x4000
+ 8000a7e:	f000 fb1f 	bl	80010c0 <HAL_GPIO_EXTI_IRQHandler>
+  /* USER CODE BEGIN EXTI15_10_IRQn 1 */
+
+  /* USER CODE END EXTI15_10_IRQn 1 */
+}
+ 8000a82:	bf00      	nop
+ 8000a84:	bd80      	pop	{r7, pc}
+	...
+
+08000a88 <TIM6_DAC_IRQHandler>:
+
+/**
+  * @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
+  */
+void TIM6_DAC_IRQHandler(void)
+{
+ 8000a88:	b580      	push	{r7, lr}
+ 8000a8a:	af00      	add	r7, sp, #0
+  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+
+  /* USER CODE END TIM6_DAC_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim6);
+ 8000a8c:	4802      	ldr	r0, [pc, #8]	@ (8000a98 <TIM6_DAC_IRQHandler+0x10>)
+ 8000a8e:	f001 f8b1 	bl	8001bf4 <HAL_TIM_IRQHandler>
+  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+
+  /* USER CODE END TIM6_DAC_IRQn 1 */
+}
+ 8000a92:	bf00      	nop
+ 8000a94:	bd80      	pop	{r7, pc}
+ 8000a96:	bf00      	nop
+ 8000a98:	20000030 	.word	0x20000030
+
+08000a9c <SystemInit>:
+  *         configuration.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+ 8000a9c:	b480      	push	{r7}
+ 8000a9e:	af00      	add	r7, sp, #0
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
+ 8000aa0:	4b06      	ldr	r3, [pc, #24]	@ (8000abc <SystemInit+0x20>)
+ 8000aa2:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
+ 8000aa6:	4a05      	ldr	r2, [pc, #20]	@ (8000abc <SystemInit+0x20>)
+ 8000aa8:	f443 0370 	orr.w	r3, r3, #15728640	@ 0xf00000
+ 8000aac:	f8c2 3088 	str.w	r3, [r2, #136]	@ 0x88
+
+  /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+}
+ 8000ab0:	bf00      	nop
+ 8000ab2:	46bd      	mov	sp, r7
+ 8000ab4:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000ab8:	4770      	bx	lr
+ 8000aba:	bf00      	nop
+ 8000abc:	e000ed00 	.word	0xe000ed00
+
+08000ac0 <Reset_Handler>:
+
+    .section  .text.Reset_Handler
+  .weak  Reset_Handler
+  .type  Reset_Handler, %function
+Reset_Handler: 
+  ldr   sp, =_estack       /* set stack pointer */
+ 8000ac0:	f8df d034 	ldr.w	sp, [pc, #52]	@ 8000af8 <LoopFillZerobss+0xe>
+
+/* Call the clock system initialization function.*/
+  bl  SystemInit   
+ 8000ac4:	f7ff ffea 	bl	8000a9c <SystemInit>
+ 
+/* Copy the data segment initializers from flash to SRAM */  
+  ldr r0, =_sdata
+ 8000ac8:	480c      	ldr	r0, [pc, #48]	@ (8000afc <LoopFillZerobss+0x12>)
+  ldr r1, =_edata
+ 8000aca:	490d      	ldr	r1, [pc, #52]	@ (8000b00 <LoopFillZerobss+0x16>)
+  ldr r2, =_sidata
+ 8000acc:	4a0d      	ldr	r2, [pc, #52]	@ (8000b04 <LoopFillZerobss+0x1a>)
+  movs r3, #0
+ 8000ace:	2300      	movs	r3, #0
+  b LoopCopyDataInit
+ 8000ad0:	e002      	b.n	8000ad8 <LoopCopyDataInit>
+
+08000ad2 <CopyDataInit>:
+
+CopyDataInit:
+  ldr r4, [r2, r3]
+ 8000ad2:	58d4      	ldr	r4, [r2, r3]
+  str r4, [r0, r3]
+ 8000ad4:	50c4      	str	r4, [r0, r3]
+  adds r3, r3, #4
+ 8000ad6:	3304      	adds	r3, #4
+
+08000ad8 <LoopCopyDataInit>:
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+ 8000ad8:	18c4      	adds	r4, r0, r3
+  cmp r4, r1
+ 8000ada:	428c      	cmp	r4, r1
+  bcc CopyDataInit
+ 8000adc:	d3f9      	bcc.n	8000ad2 <CopyDataInit>
+  
+/* Zero fill the bss segment. */
+  ldr r2, =_sbss
+ 8000ade:	4a0a      	ldr	r2, [pc, #40]	@ (8000b08 <LoopFillZerobss+0x1e>)
+  ldr r4, =_ebss
+ 8000ae0:	4c0a      	ldr	r4, [pc, #40]	@ (8000b0c <LoopFillZerobss+0x22>)
+  movs r3, #0
+ 8000ae2:	2300      	movs	r3, #0
+  b LoopFillZerobss
+ 8000ae4:	e001      	b.n	8000aea <LoopFillZerobss>
+
+08000ae6 <FillZerobss>:
+
+FillZerobss:
+  str  r3, [r2]
+ 8000ae6:	6013      	str	r3, [r2, #0]
+  adds r2, r2, #4
+ 8000ae8:	3204      	adds	r2, #4
+
+08000aea <LoopFillZerobss>:
+
+LoopFillZerobss:
+  cmp r2, r4
+ 8000aea:	42a2      	cmp	r2, r4
+  bcc FillZerobss
+ 8000aec:	d3fb      	bcc.n	8000ae6 <FillZerobss>
+  
+/* Call static constructors */
+    bl __libc_init_array
+ 8000aee:	f001 fc7d 	bl	80023ec <__libc_init_array>
+/* Call the application's entry point.*/
+  bl  main
+ 8000af2:	f7ff fd57 	bl	80005a4 <main>
+  bx  lr    
+ 8000af6:	4770      	bx	lr
+  ldr   sp, =_estack       /* set stack pointer */
+ 8000af8:	20030000 	.word	0x20030000
+  ldr r0, =_sdata
+ 8000afc:	20000000 	.word	0x20000000
+  ldr r1, =_edata
+ 8000b00:	20000008 	.word	0x20000008
+  ldr r2, =_sidata
+ 8000b04:	08002474 	.word	0x08002474
+  ldr r2, =_sbss
+ 8000b08:	20000008 	.word	0x20000008
+  ldr r4, =_ebss
+ 8000b0c:	20000130 	.word	0x20000130
+
+08000b10 <ADC_IRQHandler>:
+ * @retval None       
+*/
+    .section  .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+  b  Infinite_Loop
+ 8000b10:	e7fe      	b.n	8000b10 <ADC_IRQHandler>
+	...
+
+08000b14 <HAL_Init>:
+  *         need to ensure that the SysTick time base is always set to 1 millisecond
+  *         to have correct HAL operation.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_Init(void)
+{
+ 8000b14:	b580      	push	{r7, lr}
+ 8000b16:	af00      	add	r7, sp, #0
+  /* Configure Flash prefetch, Instruction cache, Data cache */ 
+#if (INSTRUCTION_CACHE_ENABLE != 0U)
+  __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
+ 8000b18:	4b0e      	ldr	r3, [pc, #56]	@ (8000b54 <HAL_Init+0x40>)
+ 8000b1a:	681b      	ldr	r3, [r3, #0]
+ 8000b1c:	4a0d      	ldr	r2, [pc, #52]	@ (8000b54 <HAL_Init+0x40>)
+ 8000b1e:	f443 7300 	orr.w	r3, r3, #512	@ 0x200
+ 8000b22:	6013      	str	r3, [r2, #0]
+#endif /* INSTRUCTION_CACHE_ENABLE */
+
+#if (DATA_CACHE_ENABLE != 0U)
+  __HAL_FLASH_DATA_CACHE_ENABLE();
+ 8000b24:	4b0b      	ldr	r3, [pc, #44]	@ (8000b54 <HAL_Init+0x40>)
+ 8000b26:	681b      	ldr	r3, [r3, #0]
+ 8000b28:	4a0a      	ldr	r2, [pc, #40]	@ (8000b54 <HAL_Init+0x40>)
+ 8000b2a:	f443 6380 	orr.w	r3, r3, #1024	@ 0x400
+ 8000b2e:	6013      	str	r3, [r2, #0]
+#endif /* DATA_CACHE_ENABLE */
+
+#if (PREFETCH_ENABLE != 0U)
+  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
+ 8000b30:	4b08      	ldr	r3, [pc, #32]	@ (8000b54 <HAL_Init+0x40>)
+ 8000b32:	681b      	ldr	r3, [r3, #0]
+ 8000b34:	4a07      	ldr	r2, [pc, #28]	@ (8000b54 <HAL_Init+0x40>)
+ 8000b36:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
+ 8000b3a:	6013      	str	r3, [r2, #0]
+#endif /* PREFETCH_ENABLE */
+
+  /* Set Interrupt Group Priority */
+  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
+ 8000b3c:	2003      	movs	r0, #3
+ 8000b3e:	f000 f8c4 	bl	8000cca <HAL_NVIC_SetPriorityGrouping>
+
+  /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
+  HAL_InitTick(TICK_INT_PRIORITY);
+ 8000b42:	200f      	movs	r0, #15
+ 8000b44:	f7ff ff00 	bl	8000948 <HAL_InitTick>
+
+  /* Init the low level hardware */
+  HAL_MspInit();
+ 8000b48:	f7ff feb0 	bl	80008ac <HAL_MspInit>
+
+  /* Return function status */
+  return HAL_OK;
+ 8000b4c:	2300      	movs	r3, #0
+}
+ 8000b4e:	4618      	mov	r0, r3
+ 8000b50:	bd80      	pop	{r7, pc}
+ 8000b52:	bf00      	nop
+ 8000b54:	40023c00 	.word	0x40023c00
+
+08000b58 <HAL_GetTick>:
+  * @note This function is declared as __weak to be overwritten in case of other 
+  *       implementations in user file.
+  * @retval tick value
+  */
+__weak uint32_t HAL_GetTick(void)
+{
+ 8000b58:	b480      	push	{r7}
+ 8000b5a:	af00      	add	r7, sp, #0
+  return uwTick;
+ 8000b5c:	4b03      	ldr	r3, [pc, #12]	@ (8000b6c <HAL_GetTick+0x14>)
+ 8000b5e:	681b      	ldr	r3, [r3, #0]
+}
+ 8000b60:	4618      	mov	r0, r3
+ 8000b62:	46bd      	mov	sp, r7
+ 8000b64:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000b68:	4770      	bx	lr
+ 8000b6a:	bf00      	nop
+ 8000b6c:	20000078 	.word	0x20000078
+
+08000b70 <__NVIC_SetPriorityGrouping>:
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ 8000b70:	b480      	push	{r7}
+ 8000b72:	b085      	sub	sp, #20
+ 8000b74:	af00      	add	r7, sp, #0
+ 8000b76:	6078      	str	r0, [r7, #4]
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+ 8000b78:	687b      	ldr	r3, [r7, #4]
+ 8000b7a:	f003 0307 	and.w	r3, r3, #7
+ 8000b7e:	60fb      	str	r3, [r7, #12]
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+ 8000b80:	4b0c      	ldr	r3, [pc, #48]	@ (8000bb4 <__NVIC_SetPriorityGrouping+0x44>)
+ 8000b82:	68db      	ldr	r3, [r3, #12]
+ 8000b84:	60bb      	str	r3, [r7, #8]
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+ 8000b86:	68ba      	ldr	r2, [r7, #8]
+ 8000b88:	f64f 03ff 	movw	r3, #63743	@ 0xf8ff
+ 8000b8c:	4013      	ands	r3, r2
+ 8000b8e:	60bb      	str	r3, [r7, #8]
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+ 8000b90:	68fb      	ldr	r3, [r7, #12]
+ 8000b92:	021a      	lsls	r2, r3, #8
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+ 8000b94:	68bb      	ldr	r3, [r7, #8]
+ 8000b96:	4313      	orrs	r3, r2
+  reg_value  =  (reg_value                                   |
+ 8000b98:	f043 63bf 	orr.w	r3, r3, #100139008	@ 0x5f80000
+ 8000b9c:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
+ 8000ba0:	60bb      	str	r3, [r7, #8]
+  SCB->AIRCR =  reg_value;
+ 8000ba2:	4a04      	ldr	r2, [pc, #16]	@ (8000bb4 <__NVIC_SetPriorityGrouping+0x44>)
+ 8000ba4:	68bb      	ldr	r3, [r7, #8]
+ 8000ba6:	60d3      	str	r3, [r2, #12]
+}
+ 8000ba8:	bf00      	nop
+ 8000baa:	3714      	adds	r7, #20
+ 8000bac:	46bd      	mov	sp, r7
+ 8000bae:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000bb2:	4770      	bx	lr
+ 8000bb4:	e000ed00 	.word	0xe000ed00
+
+08000bb8 <__NVIC_GetPriorityGrouping>:
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+ 8000bb8:	b480      	push	{r7}
+ 8000bba:	af00      	add	r7, sp, #0
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+ 8000bbc:	4b04      	ldr	r3, [pc, #16]	@ (8000bd0 <__NVIC_GetPriorityGrouping+0x18>)
+ 8000bbe:	68db      	ldr	r3, [r3, #12]
+ 8000bc0:	0a1b      	lsrs	r3, r3, #8
+ 8000bc2:	f003 0307 	and.w	r3, r3, #7
+}
+ 8000bc6:	4618      	mov	r0, r3
+ 8000bc8:	46bd      	mov	sp, r7
+ 8000bca:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000bce:	4770      	bx	lr
+ 8000bd0:	e000ed00 	.word	0xe000ed00
+
+08000bd4 <__NVIC_EnableIRQ>:
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ 8000bd4:	b480      	push	{r7}
+ 8000bd6:	b083      	sub	sp, #12
+ 8000bd8:	af00      	add	r7, sp, #0
+ 8000bda:	4603      	mov	r3, r0
+ 8000bdc:	71fb      	strb	r3, [r7, #7]
+  if ((int32_t)(IRQn) >= 0)
+ 8000bde:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 8000be2:	2b00      	cmp	r3, #0
+ 8000be4:	db0b      	blt.n	8000bfe <__NVIC_EnableIRQ+0x2a>
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+ 8000be6:	79fb      	ldrb	r3, [r7, #7]
+ 8000be8:	f003 021f 	and.w	r2, r3, #31
+ 8000bec:	4907      	ldr	r1, [pc, #28]	@ (8000c0c <__NVIC_EnableIRQ+0x38>)
+ 8000bee:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 8000bf2:	095b      	lsrs	r3, r3, #5
+ 8000bf4:	2001      	movs	r0, #1
+ 8000bf6:	fa00 f202 	lsl.w	r2, r0, r2
+ 8000bfa:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
+    __COMPILER_BARRIER();
+  }
+}
+ 8000bfe:	bf00      	nop
+ 8000c00:	370c      	adds	r7, #12
+ 8000c02:	46bd      	mov	sp, r7
+ 8000c04:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000c08:	4770      	bx	lr
+ 8000c0a:	bf00      	nop
+ 8000c0c:	e000e100 	.word	0xe000e100
+
+08000c10 <__NVIC_SetPriority>:
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+ 8000c10:	b480      	push	{r7}
+ 8000c12:	b083      	sub	sp, #12
+ 8000c14:	af00      	add	r7, sp, #0
+ 8000c16:	4603      	mov	r3, r0
+ 8000c18:	6039      	str	r1, [r7, #0]
+ 8000c1a:	71fb      	strb	r3, [r7, #7]
+  if ((int32_t)(IRQn) >= 0)
+ 8000c1c:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 8000c20:	2b00      	cmp	r3, #0
+ 8000c22:	db0a      	blt.n	8000c3a <__NVIC_SetPriority+0x2a>
+  {
+    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ 8000c24:	683b      	ldr	r3, [r7, #0]
+ 8000c26:	b2da      	uxtb	r2, r3
+ 8000c28:	490c      	ldr	r1, [pc, #48]	@ (8000c5c <__NVIC_SetPriority+0x4c>)
+ 8000c2a:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 8000c2e:	0112      	lsls	r2, r2, #4
+ 8000c30:	b2d2      	uxtb	r2, r2
+ 8000c32:	440b      	add	r3, r1
+ 8000c34:	f883 2300 	strb.w	r2, [r3, #768]	@ 0x300
+  }
+  else
+  {
+    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+ 8000c38:	e00a      	b.n	8000c50 <__NVIC_SetPriority+0x40>
+    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+ 8000c3a:	683b      	ldr	r3, [r7, #0]
+ 8000c3c:	b2da      	uxtb	r2, r3
+ 8000c3e:	4908      	ldr	r1, [pc, #32]	@ (8000c60 <__NVIC_SetPriority+0x50>)
+ 8000c40:	79fb      	ldrb	r3, [r7, #7]
+ 8000c42:	f003 030f 	and.w	r3, r3, #15
+ 8000c46:	3b04      	subs	r3, #4
+ 8000c48:	0112      	lsls	r2, r2, #4
+ 8000c4a:	b2d2      	uxtb	r2, r2
+ 8000c4c:	440b      	add	r3, r1
+ 8000c4e:	761a      	strb	r2, [r3, #24]
+}
+ 8000c50:	bf00      	nop
+ 8000c52:	370c      	adds	r7, #12
+ 8000c54:	46bd      	mov	sp, r7
+ 8000c56:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000c5a:	4770      	bx	lr
+ 8000c5c:	e000e100 	.word	0xe000e100
+ 8000c60:	e000ed00 	.word	0xe000ed00
+
+08000c64 <NVIC_EncodePriority>:
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+ 8000c64:	b480      	push	{r7}
+ 8000c66:	b089      	sub	sp, #36	@ 0x24
+ 8000c68:	af00      	add	r7, sp, #0
+ 8000c6a:	60f8      	str	r0, [r7, #12]
+ 8000c6c:	60b9      	str	r1, [r7, #8]
+ 8000c6e:	607a      	str	r2, [r7, #4]
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+ 8000c70:	68fb      	ldr	r3, [r7, #12]
+ 8000c72:	f003 0307 	and.w	r3, r3, #7
+ 8000c76:	61fb      	str	r3, [r7, #28]
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+ 8000c78:	69fb      	ldr	r3, [r7, #28]
+ 8000c7a:	f1c3 0307 	rsb	r3, r3, #7
+ 8000c7e:	2b04      	cmp	r3, #4
+ 8000c80:	bf28      	it	cs
+ 8000c82:	2304      	movcs	r3, #4
+ 8000c84:	61bb      	str	r3, [r7, #24]
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+ 8000c86:	69fb      	ldr	r3, [r7, #28]
+ 8000c88:	3304      	adds	r3, #4
+ 8000c8a:	2b06      	cmp	r3, #6
+ 8000c8c:	d902      	bls.n	8000c94 <NVIC_EncodePriority+0x30>
+ 8000c8e:	69fb      	ldr	r3, [r7, #28]
+ 8000c90:	3b03      	subs	r3, #3
+ 8000c92:	e000      	b.n	8000c96 <NVIC_EncodePriority+0x32>
+ 8000c94:	2300      	movs	r3, #0
+ 8000c96:	617b      	str	r3, [r7, #20]
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ 8000c98:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
+ 8000c9c:	69bb      	ldr	r3, [r7, #24]
+ 8000c9e:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000ca2:	43da      	mvns	r2, r3
+ 8000ca4:	68bb      	ldr	r3, [r7, #8]
+ 8000ca6:	401a      	ands	r2, r3
+ 8000ca8:	697b      	ldr	r3, [r7, #20]
+ 8000caa:	409a      	lsls	r2, r3
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+ 8000cac:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
+ 8000cb0:	697b      	ldr	r3, [r7, #20]
+ 8000cb2:	fa01 f303 	lsl.w	r3, r1, r3
+ 8000cb6:	43d9      	mvns	r1, r3
+ 8000cb8:	687b      	ldr	r3, [r7, #4]
+ 8000cba:	400b      	ands	r3, r1
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+ 8000cbc:	4313      	orrs	r3, r2
+         );
+}
+ 8000cbe:	4618      	mov	r0, r3
+ 8000cc0:	3724      	adds	r7, #36	@ 0x24
+ 8000cc2:	46bd      	mov	sp, r7
+ 8000cc4:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8000cc8:	4770      	bx	lr
+
+08000cca <HAL_NVIC_SetPriorityGrouping>:
+  * @note   When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. 
+  *         The pending IRQ priority will be managed only by the subpriority. 
+  * @retval None
+  */
+void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+ 8000cca:	b580      	push	{r7, lr}
+ 8000ccc:	b082      	sub	sp, #8
+ 8000cce:	af00      	add	r7, sp, #0
+ 8000cd0:	6078      	str	r0, [r7, #4]
+  /* Check the parameters */
+  assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
+  
+  /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
+  NVIC_SetPriorityGrouping(PriorityGroup);
+ 8000cd2:	6878      	ldr	r0, [r7, #4]
+ 8000cd4:	f7ff ff4c 	bl	8000b70 <__NVIC_SetPriorityGrouping>
+}
+ 8000cd8:	bf00      	nop
+ 8000cda:	3708      	adds	r7, #8
+ 8000cdc:	46bd      	mov	sp, r7
+ 8000cde:	bd80      	pop	{r7, pc}
+
+08000ce0 <HAL_NVIC_SetPriority>:
+  *         This parameter can be a value between 0 and 15
+  *         A lower priority value indicates a higher priority.          
+  * @retval None
+  */
+void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
+{ 
+ 8000ce0:	b580      	push	{r7, lr}
+ 8000ce2:	b086      	sub	sp, #24
+ 8000ce4:	af00      	add	r7, sp, #0
+ 8000ce6:	4603      	mov	r3, r0
+ 8000ce8:	60b9      	str	r1, [r7, #8]
+ 8000cea:	607a      	str	r2, [r7, #4]
+ 8000cec:	73fb      	strb	r3, [r7, #15]
+  uint32_t prioritygroup = 0x00U;
+ 8000cee:	2300      	movs	r3, #0
+ 8000cf0:	617b      	str	r3, [r7, #20]
+  
+  /* Check the parameters */
+  assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
+  assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
+  
+  prioritygroup = NVIC_GetPriorityGrouping();
+ 8000cf2:	f7ff ff61 	bl	8000bb8 <__NVIC_GetPriorityGrouping>
+ 8000cf6:	6178      	str	r0, [r7, #20]
+  
+  NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
+ 8000cf8:	687a      	ldr	r2, [r7, #4]
+ 8000cfa:	68b9      	ldr	r1, [r7, #8]
+ 8000cfc:	6978      	ldr	r0, [r7, #20]
+ 8000cfe:	f7ff ffb1 	bl	8000c64 <NVIC_EncodePriority>
+ 8000d02:	4602      	mov	r2, r0
+ 8000d04:	f997 300f 	ldrsb.w	r3, [r7, #15]
+ 8000d08:	4611      	mov	r1, r2
+ 8000d0a:	4618      	mov	r0, r3
+ 8000d0c:	f7ff ff80 	bl	8000c10 <__NVIC_SetPriority>
+}
+ 8000d10:	bf00      	nop
+ 8000d12:	3718      	adds	r7, #24
+ 8000d14:	46bd      	mov	sp, r7
+ 8000d16:	bd80      	pop	{r7, pc}
+
+08000d18 <HAL_NVIC_EnableIRQ>:
+  *         This parameter can be an enumerator of IRQn_Type enumeration
+  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
+  * @retval None
+  */
+void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+ 8000d18:	b580      	push	{r7, lr}
+ 8000d1a:	b082      	sub	sp, #8
+ 8000d1c:	af00      	add	r7, sp, #0
+ 8000d1e:	4603      	mov	r3, r0
+ 8000d20:	71fb      	strb	r3, [r7, #7]
+  /* Check the parameters */
+  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
+  
+  /* Enable interrupt */
+  NVIC_EnableIRQ(IRQn);
+ 8000d22:	f997 3007 	ldrsb.w	r3, [r7, #7]
+ 8000d26:	4618      	mov	r0, r3
+ 8000d28:	f7ff ff54 	bl	8000bd4 <__NVIC_EnableIRQ>
+}
+ 8000d2c:	bf00      	nop
+ 8000d2e:	3708      	adds	r7, #8
+ 8000d30:	46bd      	mov	sp, r7
+ 8000d32:	bd80      	pop	{r7, pc}
+
+08000d34 <HAL_GPIO_Init>:
+  * @param  GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
+  *         the configuration information for the specified GPIO peripheral.
+  * @retval None
+  */
+void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
+{
+ 8000d34:	b480      	push	{r7}
+ 8000d36:	b089      	sub	sp, #36	@ 0x24
+ 8000d38:	af00      	add	r7, sp, #0
+ 8000d3a:	6078      	str	r0, [r7, #4]
+ 8000d3c:	6039      	str	r1, [r7, #0]
+  uint32_t position;
+  uint32_t ioposition = 0x00U;
+ 8000d3e:	2300      	movs	r3, #0
+ 8000d40:	617b      	str	r3, [r7, #20]
+  uint32_t iocurrent = 0x00U;
+ 8000d42:	2300      	movs	r3, #0
+ 8000d44:	613b      	str	r3, [r7, #16]
+  uint32_t temp = 0x00U;
+ 8000d46:	2300      	movs	r3, #0
+ 8000d48:	61bb      	str	r3, [r7, #24]
+  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
+  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
+  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
+
+  /* Configure the port pins */
+  for(position = 0U; position < GPIO_NUMBER; position++)
+ 8000d4a:	2300      	movs	r3, #0
+ 8000d4c:	61fb      	str	r3, [r7, #28]
+ 8000d4e:	e177      	b.n	8001040 <HAL_GPIO_Init+0x30c>
+  {
+    /* Get the IO position */
+    ioposition = 0x01U << position;
+ 8000d50:	2201      	movs	r2, #1
+ 8000d52:	69fb      	ldr	r3, [r7, #28]
+ 8000d54:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000d58:	617b      	str	r3, [r7, #20]
+    /* Get the current IO position */
+    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
+ 8000d5a:	683b      	ldr	r3, [r7, #0]
+ 8000d5c:	681b      	ldr	r3, [r3, #0]
+ 8000d5e:	697a      	ldr	r2, [r7, #20]
+ 8000d60:	4013      	ands	r3, r2
+ 8000d62:	613b      	str	r3, [r7, #16]
+
+    if(iocurrent == ioposition)
+ 8000d64:	693a      	ldr	r2, [r7, #16]
+ 8000d66:	697b      	ldr	r3, [r7, #20]
+ 8000d68:	429a      	cmp	r2, r3
+ 8000d6a:	f040 8166 	bne.w	800103a <HAL_GPIO_Init+0x306>
+    {
+      /*--------------------- GPIO Mode Configuration ------------------------*/
+      /* In case of Output or Alternate function mode selection */
+      if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \
+ 8000d6e:	683b      	ldr	r3, [r7, #0]
+ 8000d70:	685b      	ldr	r3, [r3, #4]
+ 8000d72:	f003 0303 	and.w	r3, r3, #3
+ 8000d76:	2b01      	cmp	r3, #1
+ 8000d78:	d005      	beq.n	8000d86 <HAL_GPIO_Init+0x52>
+          (GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
+ 8000d7a:	683b      	ldr	r3, [r7, #0]
+ 8000d7c:	685b      	ldr	r3, [r3, #4]
+ 8000d7e:	f003 0303 	and.w	r3, r3, #3
+      if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \
+ 8000d82:	2b02      	cmp	r3, #2
+ 8000d84:	d130      	bne.n	8000de8 <HAL_GPIO_Init+0xb4>
+      {
+        /* Check the Speed parameter */
+        assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
+        /* Configure the IO Speed */
+        temp = GPIOx->OSPEEDR; 
+ 8000d86:	687b      	ldr	r3, [r7, #4]
+ 8000d88:	689b      	ldr	r3, [r3, #8]
+ 8000d8a:	61bb      	str	r3, [r7, #24]
+        temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
+ 8000d8c:	69fb      	ldr	r3, [r7, #28]
+ 8000d8e:	005b      	lsls	r3, r3, #1
+ 8000d90:	2203      	movs	r2, #3
+ 8000d92:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000d96:	43db      	mvns	r3, r3
+ 8000d98:	69ba      	ldr	r2, [r7, #24]
+ 8000d9a:	4013      	ands	r3, r2
+ 8000d9c:	61bb      	str	r3, [r7, #24]
+        temp |= (GPIO_Init->Speed << (position * 2U));
+ 8000d9e:	683b      	ldr	r3, [r7, #0]
+ 8000da0:	68da      	ldr	r2, [r3, #12]
+ 8000da2:	69fb      	ldr	r3, [r7, #28]
+ 8000da4:	005b      	lsls	r3, r3, #1
+ 8000da6:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000daa:	69ba      	ldr	r2, [r7, #24]
+ 8000dac:	4313      	orrs	r3, r2
+ 8000dae:	61bb      	str	r3, [r7, #24]
+        GPIOx->OSPEEDR = temp;
+ 8000db0:	687b      	ldr	r3, [r7, #4]
+ 8000db2:	69ba      	ldr	r2, [r7, #24]
+ 8000db4:	609a      	str	r2, [r3, #8]
+
+        /* Configure the IO Output Type */
+        temp = GPIOx->OTYPER;
+ 8000db6:	687b      	ldr	r3, [r7, #4]
+ 8000db8:	685b      	ldr	r3, [r3, #4]
+ 8000dba:	61bb      	str	r3, [r7, #24]
+        temp &= ~(GPIO_OTYPER_OT_0 << position) ;
+ 8000dbc:	2201      	movs	r2, #1
+ 8000dbe:	69fb      	ldr	r3, [r7, #28]
+ 8000dc0:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000dc4:	43db      	mvns	r3, r3
+ 8000dc6:	69ba      	ldr	r2, [r7, #24]
+ 8000dc8:	4013      	ands	r3, r2
+ 8000dca:	61bb      	str	r3, [r7, #24]
+        temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
+ 8000dcc:	683b      	ldr	r3, [r7, #0]
+ 8000dce:	685b      	ldr	r3, [r3, #4]
+ 8000dd0:	091b      	lsrs	r3, r3, #4
+ 8000dd2:	f003 0201 	and.w	r2, r3, #1
+ 8000dd6:	69fb      	ldr	r3, [r7, #28]
+ 8000dd8:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000ddc:	69ba      	ldr	r2, [r7, #24]
+ 8000dde:	4313      	orrs	r3, r2
+ 8000de0:	61bb      	str	r3, [r7, #24]
+        GPIOx->OTYPER = temp;
+ 8000de2:	687b      	ldr	r3, [r7, #4]
+ 8000de4:	69ba      	ldr	r2, [r7, #24]
+ 8000de6:	605a      	str	r2, [r3, #4]
+       }
+
+      if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
+ 8000de8:	683b      	ldr	r3, [r7, #0]
+ 8000dea:	685b      	ldr	r3, [r3, #4]
+ 8000dec:	f003 0303 	and.w	r3, r3, #3
+ 8000df0:	2b03      	cmp	r3, #3
+ 8000df2:	d017      	beq.n	8000e24 <HAL_GPIO_Init+0xf0>
+      {
+        /* Check the parameters */
+        assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
+        
+        /* Activate the Pull-up or Pull down resistor for the current IO */
+        temp = GPIOx->PUPDR;
+ 8000df4:	687b      	ldr	r3, [r7, #4]
+ 8000df6:	68db      	ldr	r3, [r3, #12]
+ 8000df8:	61bb      	str	r3, [r7, #24]
+        temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
+ 8000dfa:	69fb      	ldr	r3, [r7, #28]
+ 8000dfc:	005b      	lsls	r3, r3, #1
+ 8000dfe:	2203      	movs	r2, #3
+ 8000e00:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000e04:	43db      	mvns	r3, r3
+ 8000e06:	69ba      	ldr	r2, [r7, #24]
+ 8000e08:	4013      	ands	r3, r2
+ 8000e0a:	61bb      	str	r3, [r7, #24]
+        temp |= ((GPIO_Init->Pull) << (position * 2U));
+ 8000e0c:	683b      	ldr	r3, [r7, #0]
+ 8000e0e:	689a      	ldr	r2, [r3, #8]
+ 8000e10:	69fb      	ldr	r3, [r7, #28]
+ 8000e12:	005b      	lsls	r3, r3, #1
+ 8000e14:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000e18:	69ba      	ldr	r2, [r7, #24]
+ 8000e1a:	4313      	orrs	r3, r2
+ 8000e1c:	61bb      	str	r3, [r7, #24]
+        GPIOx->PUPDR = temp;
+ 8000e1e:	687b      	ldr	r3, [r7, #4]
+ 8000e20:	69ba      	ldr	r2, [r7, #24]
+ 8000e22:	60da      	str	r2, [r3, #12]
+      }
+
+      /* In case of Alternate function mode selection */
+      if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
+ 8000e24:	683b      	ldr	r3, [r7, #0]
+ 8000e26:	685b      	ldr	r3, [r3, #4]
+ 8000e28:	f003 0303 	and.w	r3, r3, #3
+ 8000e2c:	2b02      	cmp	r3, #2
+ 8000e2e:	d123      	bne.n	8000e78 <HAL_GPIO_Init+0x144>
+      {
+        /* Check the Alternate function parameter */
+        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
+        /* Configure Alternate function mapped with the current IO */
+        temp = GPIOx->AFR[position >> 3U];
+ 8000e30:	69fb      	ldr	r3, [r7, #28]
+ 8000e32:	08da      	lsrs	r2, r3, #3
+ 8000e34:	687b      	ldr	r3, [r7, #4]
+ 8000e36:	3208      	adds	r2, #8
+ 8000e38:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
+ 8000e3c:	61bb      	str	r3, [r7, #24]
+        temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
+ 8000e3e:	69fb      	ldr	r3, [r7, #28]
+ 8000e40:	f003 0307 	and.w	r3, r3, #7
+ 8000e44:	009b      	lsls	r3, r3, #2
+ 8000e46:	220f      	movs	r2, #15
+ 8000e48:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000e4c:	43db      	mvns	r3, r3
+ 8000e4e:	69ba      	ldr	r2, [r7, #24]
+ 8000e50:	4013      	ands	r3, r2
+ 8000e52:	61bb      	str	r3, [r7, #24]
+        temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
+ 8000e54:	683b      	ldr	r3, [r7, #0]
+ 8000e56:	691a      	ldr	r2, [r3, #16]
+ 8000e58:	69fb      	ldr	r3, [r7, #28]
+ 8000e5a:	f003 0307 	and.w	r3, r3, #7
+ 8000e5e:	009b      	lsls	r3, r3, #2
+ 8000e60:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000e64:	69ba      	ldr	r2, [r7, #24]
+ 8000e66:	4313      	orrs	r3, r2
+ 8000e68:	61bb      	str	r3, [r7, #24]
+        GPIOx->AFR[position >> 3U] = temp;
+ 8000e6a:	69fb      	ldr	r3, [r7, #28]
+ 8000e6c:	08da      	lsrs	r2, r3, #3
+ 8000e6e:	687b      	ldr	r3, [r7, #4]
+ 8000e70:	3208      	adds	r2, #8
+ 8000e72:	69b9      	ldr	r1, [r7, #24]
+ 8000e74:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
+      }
+
+      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
+      temp = GPIOx->MODER;
+ 8000e78:	687b      	ldr	r3, [r7, #4]
+ 8000e7a:	681b      	ldr	r3, [r3, #0]
+ 8000e7c:	61bb      	str	r3, [r7, #24]
+      temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
+ 8000e7e:	69fb      	ldr	r3, [r7, #28]
+ 8000e80:	005b      	lsls	r3, r3, #1
+ 8000e82:	2203      	movs	r2, #3
+ 8000e84:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000e88:	43db      	mvns	r3, r3
+ 8000e8a:	69ba      	ldr	r2, [r7, #24]
+ 8000e8c:	4013      	ands	r3, r2
+ 8000e8e:	61bb      	str	r3, [r7, #24]
+      temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
+ 8000e90:	683b      	ldr	r3, [r7, #0]
+ 8000e92:	685b      	ldr	r3, [r3, #4]
+ 8000e94:	f003 0203 	and.w	r2, r3, #3
+ 8000e98:	69fb      	ldr	r3, [r7, #28]
+ 8000e9a:	005b      	lsls	r3, r3, #1
+ 8000e9c:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000ea0:	69ba      	ldr	r2, [r7, #24]
+ 8000ea2:	4313      	orrs	r3, r2
+ 8000ea4:	61bb      	str	r3, [r7, #24]
+      GPIOx->MODER = temp;
+ 8000ea6:	687b      	ldr	r3, [r7, #4]
+ 8000ea8:	69ba      	ldr	r2, [r7, #24]
+ 8000eaa:	601a      	str	r2, [r3, #0]
+
+      /*--------------------- EXTI Mode Configuration ------------------------*/
+      /* Configure the External Interrupt or event for the current IO */
+      if((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
+ 8000eac:	683b      	ldr	r3, [r7, #0]
+ 8000eae:	685b      	ldr	r3, [r3, #4]
+ 8000eb0:	f403 3340 	and.w	r3, r3, #196608	@ 0x30000
+ 8000eb4:	2b00      	cmp	r3, #0
+ 8000eb6:	f000 80c0 	beq.w	800103a <HAL_GPIO_Init+0x306>
+      {
+        /* Enable SYSCFG Clock */
+        __HAL_RCC_SYSCFG_CLK_ENABLE();
+ 8000eba:	2300      	movs	r3, #0
+ 8000ebc:	60fb      	str	r3, [r7, #12]
+ 8000ebe:	4b66      	ldr	r3, [pc, #408]	@ (8001058 <HAL_GPIO_Init+0x324>)
+ 8000ec0:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 8000ec2:	4a65      	ldr	r2, [pc, #404]	@ (8001058 <HAL_GPIO_Init+0x324>)
+ 8000ec4:	f443 4380 	orr.w	r3, r3, #16384	@ 0x4000
+ 8000ec8:	6453      	str	r3, [r2, #68]	@ 0x44
+ 8000eca:	4b63      	ldr	r3, [pc, #396]	@ (8001058 <HAL_GPIO_Init+0x324>)
+ 8000ecc:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
+ 8000ece:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
+ 8000ed2:	60fb      	str	r3, [r7, #12]
+ 8000ed4:	68fb      	ldr	r3, [r7, #12]
+
+        temp = SYSCFG->EXTICR[position >> 2U];
+ 8000ed6:	4a61      	ldr	r2, [pc, #388]	@ (800105c <HAL_GPIO_Init+0x328>)
+ 8000ed8:	69fb      	ldr	r3, [r7, #28]
+ 8000eda:	089b      	lsrs	r3, r3, #2
+ 8000edc:	3302      	adds	r3, #2
+ 8000ede:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
+ 8000ee2:	61bb      	str	r3, [r7, #24]
+        temp &= ~(0x0FU << (4U * (position & 0x03U)));
+ 8000ee4:	69fb      	ldr	r3, [r7, #28]
+ 8000ee6:	f003 0303 	and.w	r3, r3, #3
+ 8000eea:	009b      	lsls	r3, r3, #2
+ 8000eec:	220f      	movs	r2, #15
+ 8000eee:	fa02 f303 	lsl.w	r3, r2, r3
+ 8000ef2:	43db      	mvns	r3, r3
+ 8000ef4:	69ba      	ldr	r2, [r7, #24]
+ 8000ef6:	4013      	ands	r3, r2
+ 8000ef8:	61bb      	str	r3, [r7, #24]
+        temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
+ 8000efa:	687b      	ldr	r3, [r7, #4]
+ 8000efc:	4a58      	ldr	r2, [pc, #352]	@ (8001060 <HAL_GPIO_Init+0x32c>)
+ 8000efe:	4293      	cmp	r3, r2
+ 8000f00:	d037      	beq.n	8000f72 <HAL_GPIO_Init+0x23e>
+ 8000f02:	687b      	ldr	r3, [r7, #4]
+ 8000f04:	4a57      	ldr	r2, [pc, #348]	@ (8001064 <HAL_GPIO_Init+0x330>)
+ 8000f06:	4293      	cmp	r3, r2
+ 8000f08:	d031      	beq.n	8000f6e <HAL_GPIO_Init+0x23a>
+ 8000f0a:	687b      	ldr	r3, [r7, #4]
+ 8000f0c:	4a56      	ldr	r2, [pc, #344]	@ (8001068 <HAL_GPIO_Init+0x334>)
+ 8000f0e:	4293      	cmp	r3, r2
+ 8000f10:	d02b      	beq.n	8000f6a <HAL_GPIO_Init+0x236>
+ 8000f12:	687b      	ldr	r3, [r7, #4]
+ 8000f14:	4a55      	ldr	r2, [pc, #340]	@ (800106c <HAL_GPIO_Init+0x338>)
+ 8000f16:	4293      	cmp	r3, r2
+ 8000f18:	d025      	beq.n	8000f66 <HAL_GPIO_Init+0x232>
+ 8000f1a:	687b      	ldr	r3, [r7, #4]
+ 8000f1c:	4a54      	ldr	r2, [pc, #336]	@ (8001070 <HAL_GPIO_Init+0x33c>)
+ 8000f1e:	4293      	cmp	r3, r2
+ 8000f20:	d01f      	beq.n	8000f62 <HAL_GPIO_Init+0x22e>
+ 8000f22:	687b      	ldr	r3, [r7, #4]
+ 8000f24:	4a53      	ldr	r2, [pc, #332]	@ (8001074 <HAL_GPIO_Init+0x340>)
+ 8000f26:	4293      	cmp	r3, r2
+ 8000f28:	d019      	beq.n	8000f5e <HAL_GPIO_Init+0x22a>
+ 8000f2a:	687b      	ldr	r3, [r7, #4]
+ 8000f2c:	4a52      	ldr	r2, [pc, #328]	@ (8001078 <HAL_GPIO_Init+0x344>)
+ 8000f2e:	4293      	cmp	r3, r2
+ 8000f30:	d013      	beq.n	8000f5a <HAL_GPIO_Init+0x226>
+ 8000f32:	687b      	ldr	r3, [r7, #4]
+ 8000f34:	4a51      	ldr	r2, [pc, #324]	@ (800107c <HAL_GPIO_Init+0x348>)
+ 8000f36:	4293      	cmp	r3, r2
+ 8000f38:	d00d      	beq.n	8000f56 <HAL_GPIO_Init+0x222>
+ 8000f3a:	687b      	ldr	r3, [r7, #4]
+ 8000f3c:	4a50      	ldr	r2, [pc, #320]	@ (8001080 <HAL_GPIO_Init+0x34c>)
+ 8000f3e:	4293      	cmp	r3, r2
+ 8000f40:	d007      	beq.n	8000f52 <HAL_GPIO_Init+0x21e>
+ 8000f42:	687b      	ldr	r3, [r7, #4]
+ 8000f44:	4a4f      	ldr	r2, [pc, #316]	@ (8001084 <HAL_GPIO_Init+0x350>)
+ 8000f46:	4293      	cmp	r3, r2
+ 8000f48:	d101      	bne.n	8000f4e <HAL_GPIO_Init+0x21a>
+ 8000f4a:	2309      	movs	r3, #9
+ 8000f4c:	e012      	b.n	8000f74 <HAL_GPIO_Init+0x240>
+ 8000f4e:	230a      	movs	r3, #10
+ 8000f50:	e010      	b.n	8000f74 <HAL_GPIO_Init+0x240>
+ 8000f52:	2308      	movs	r3, #8
+ 8000f54:	e00e      	b.n	8000f74 <HAL_GPIO_Init+0x240>
+ 8000f56:	2307      	movs	r3, #7
+ 8000f58:	e00c      	b.n	8000f74 <HAL_GPIO_Init+0x240>
+ 8000f5a:	2306      	movs	r3, #6
+ 8000f5c:	e00a      	b.n	8000f74 <HAL_GPIO_Init+0x240>
+ 8000f5e:	2305      	movs	r3, #5
+ 8000f60:	e008      	b.n	8000f74 <HAL_GPIO_Init+0x240>
+ 8000f62:	2304      	movs	r3, #4
+ 8000f64:	e006      	b.n	8000f74 <HAL_GPIO_Init+0x240>
+ 8000f66:	2303      	movs	r3, #3
+ 8000f68:	e004      	b.n	8000f74 <HAL_GPIO_Init+0x240>
+ 8000f6a:	2302      	movs	r3, #2
+ 8000f6c:	e002      	b.n	8000f74 <HAL_GPIO_Init+0x240>
+ 8000f6e:	2301      	movs	r3, #1
+ 8000f70:	e000      	b.n	8000f74 <HAL_GPIO_Init+0x240>
+ 8000f72:	2300      	movs	r3, #0
+ 8000f74:	69fa      	ldr	r2, [r7, #28]
+ 8000f76:	f002 0203 	and.w	r2, r2, #3
+ 8000f7a:	0092      	lsls	r2, r2, #2
+ 8000f7c:	4093      	lsls	r3, r2
+ 8000f7e:	69ba      	ldr	r2, [r7, #24]
+ 8000f80:	4313      	orrs	r3, r2
+ 8000f82:	61bb      	str	r3, [r7, #24]
+        SYSCFG->EXTICR[position >> 2U] = temp;
+ 8000f84:	4935      	ldr	r1, [pc, #212]	@ (800105c <HAL_GPIO_Init+0x328>)
+ 8000f86:	69fb      	ldr	r3, [r7, #28]
+ 8000f88:	089b      	lsrs	r3, r3, #2
+ 8000f8a:	3302      	adds	r3, #2
+ 8000f8c:	69ba      	ldr	r2, [r7, #24]
+ 8000f8e:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
+
+        /* Clear Rising Falling edge configuration */
+        temp = EXTI->RTSR;
+ 8000f92:	4b3d      	ldr	r3, [pc, #244]	@ (8001088 <HAL_GPIO_Init+0x354>)
+ 8000f94:	689b      	ldr	r3, [r3, #8]
+ 8000f96:	61bb      	str	r3, [r7, #24]
+        temp &= ~((uint32_t)iocurrent);
+ 8000f98:	693b      	ldr	r3, [r7, #16]
+ 8000f9a:	43db      	mvns	r3, r3
+ 8000f9c:	69ba      	ldr	r2, [r7, #24]
+ 8000f9e:	4013      	ands	r3, r2
+ 8000fa0:	61bb      	str	r3, [r7, #24]
+        if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
+ 8000fa2:	683b      	ldr	r3, [r7, #0]
+ 8000fa4:	685b      	ldr	r3, [r3, #4]
+ 8000fa6:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
+ 8000faa:	2b00      	cmp	r3, #0
+ 8000fac:	d003      	beq.n	8000fb6 <HAL_GPIO_Init+0x282>
+        {
+          temp |= iocurrent;
+ 8000fae:	69ba      	ldr	r2, [r7, #24]
+ 8000fb0:	693b      	ldr	r3, [r7, #16]
+ 8000fb2:	4313      	orrs	r3, r2
+ 8000fb4:	61bb      	str	r3, [r7, #24]
+        }
+        EXTI->RTSR = temp;
+ 8000fb6:	4a34      	ldr	r2, [pc, #208]	@ (8001088 <HAL_GPIO_Init+0x354>)
+ 8000fb8:	69bb      	ldr	r3, [r7, #24]
+ 8000fba:	6093      	str	r3, [r2, #8]
+
+        temp = EXTI->FTSR;
+ 8000fbc:	4b32      	ldr	r3, [pc, #200]	@ (8001088 <HAL_GPIO_Init+0x354>)
+ 8000fbe:	68db      	ldr	r3, [r3, #12]
+ 8000fc0:	61bb      	str	r3, [r7, #24]
+        temp &= ~((uint32_t)iocurrent);
+ 8000fc2:	693b      	ldr	r3, [r7, #16]
+ 8000fc4:	43db      	mvns	r3, r3
+ 8000fc6:	69ba      	ldr	r2, [r7, #24]
+ 8000fc8:	4013      	ands	r3, r2
+ 8000fca:	61bb      	str	r3, [r7, #24]
+        if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
+ 8000fcc:	683b      	ldr	r3, [r7, #0]
+ 8000fce:	685b      	ldr	r3, [r3, #4]
+ 8000fd0:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
+ 8000fd4:	2b00      	cmp	r3, #0
+ 8000fd6:	d003      	beq.n	8000fe0 <HAL_GPIO_Init+0x2ac>
+        {
+          temp |= iocurrent;
+ 8000fd8:	69ba      	ldr	r2, [r7, #24]
+ 8000fda:	693b      	ldr	r3, [r7, #16]
+ 8000fdc:	4313      	orrs	r3, r2
+ 8000fde:	61bb      	str	r3, [r7, #24]
+        }
+        EXTI->FTSR = temp;
+ 8000fe0:	4a29      	ldr	r2, [pc, #164]	@ (8001088 <HAL_GPIO_Init+0x354>)
+ 8000fe2:	69bb      	ldr	r3, [r7, #24]
+ 8000fe4:	60d3      	str	r3, [r2, #12]
+
+        temp = EXTI->EMR;
+ 8000fe6:	4b28      	ldr	r3, [pc, #160]	@ (8001088 <HAL_GPIO_Init+0x354>)
+ 8000fe8:	685b      	ldr	r3, [r3, #4]
+ 8000fea:	61bb      	str	r3, [r7, #24]
+        temp &= ~((uint32_t)iocurrent);
+ 8000fec:	693b      	ldr	r3, [r7, #16]
+ 8000fee:	43db      	mvns	r3, r3
+ 8000ff0:	69ba      	ldr	r2, [r7, #24]
+ 8000ff2:	4013      	ands	r3, r2
+ 8000ff4:	61bb      	str	r3, [r7, #24]
+        if((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
+ 8000ff6:	683b      	ldr	r3, [r7, #0]
+ 8000ff8:	685b      	ldr	r3, [r3, #4]
+ 8000ffa:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
+ 8000ffe:	2b00      	cmp	r3, #0
+ 8001000:	d003      	beq.n	800100a <HAL_GPIO_Init+0x2d6>
+        {
+          temp |= iocurrent;
+ 8001002:	69ba      	ldr	r2, [r7, #24]
+ 8001004:	693b      	ldr	r3, [r7, #16]
+ 8001006:	4313      	orrs	r3, r2
+ 8001008:	61bb      	str	r3, [r7, #24]
+        }
+        EXTI->EMR = temp;
+ 800100a:	4a1f      	ldr	r2, [pc, #124]	@ (8001088 <HAL_GPIO_Init+0x354>)
+ 800100c:	69bb      	ldr	r3, [r7, #24]
+ 800100e:	6053      	str	r3, [r2, #4]
+
+        /* Clear EXTI line configuration */
+        temp = EXTI->IMR;
+ 8001010:	4b1d      	ldr	r3, [pc, #116]	@ (8001088 <HAL_GPIO_Init+0x354>)
+ 8001012:	681b      	ldr	r3, [r3, #0]
+ 8001014:	61bb      	str	r3, [r7, #24]
+        temp &= ~((uint32_t)iocurrent);
+ 8001016:	693b      	ldr	r3, [r7, #16]
+ 8001018:	43db      	mvns	r3, r3
+ 800101a:	69ba      	ldr	r2, [r7, #24]
+ 800101c:	4013      	ands	r3, r2
+ 800101e:	61bb      	str	r3, [r7, #24]
+        if((GPIO_Init->Mode & EXTI_IT) != 0x00U)
+ 8001020:	683b      	ldr	r3, [r7, #0]
+ 8001022:	685b      	ldr	r3, [r3, #4]
+ 8001024:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
+ 8001028:	2b00      	cmp	r3, #0
+ 800102a:	d003      	beq.n	8001034 <HAL_GPIO_Init+0x300>
+        {
+          temp |= iocurrent;
+ 800102c:	69ba      	ldr	r2, [r7, #24]
+ 800102e:	693b      	ldr	r3, [r7, #16]
+ 8001030:	4313      	orrs	r3, r2
+ 8001032:	61bb      	str	r3, [r7, #24]
+        }
+        EXTI->IMR = temp;
+ 8001034:	4a14      	ldr	r2, [pc, #80]	@ (8001088 <HAL_GPIO_Init+0x354>)
+ 8001036:	69bb      	ldr	r3, [r7, #24]
+ 8001038:	6013      	str	r3, [r2, #0]
+  for(position = 0U; position < GPIO_NUMBER; position++)
+ 800103a:	69fb      	ldr	r3, [r7, #28]
+ 800103c:	3301      	adds	r3, #1
+ 800103e:	61fb      	str	r3, [r7, #28]
+ 8001040:	69fb      	ldr	r3, [r7, #28]
+ 8001042:	2b0f      	cmp	r3, #15
+ 8001044:	f67f ae84 	bls.w	8000d50 <HAL_GPIO_Init+0x1c>
+      }
+    }
+  }
+}
+ 8001048:	bf00      	nop
+ 800104a:	bf00      	nop
+ 800104c:	3724      	adds	r7, #36	@ 0x24
+ 800104e:	46bd      	mov	sp, r7
+ 8001050:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001054:	4770      	bx	lr
+ 8001056:	bf00      	nop
+ 8001058:	40023800 	.word	0x40023800
+ 800105c:	40013800 	.word	0x40013800
+ 8001060:	40020000 	.word	0x40020000
+ 8001064:	40020400 	.word	0x40020400
+ 8001068:	40020800 	.word	0x40020800
+ 800106c:	40020c00 	.word	0x40020c00
+ 8001070:	40021000 	.word	0x40021000
+ 8001074:	40021400 	.word	0x40021400
+ 8001078:	40021800 	.word	0x40021800
+ 800107c:	40021c00 	.word	0x40021c00
+ 8001080:	40022000 	.word	0x40022000
+ 8001084:	40022400 	.word	0x40022400
+ 8001088:	40013c00 	.word	0x40013c00
+
+0800108c <HAL_GPIO_WritePin>:
+  *            @arg GPIO_PIN_RESET: to clear the port pin
+  *            @arg GPIO_PIN_SET: to set the port pin
+  * @retval None
+  */
+void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
+{
+ 800108c:	b480      	push	{r7}
+ 800108e:	b083      	sub	sp, #12
+ 8001090:	af00      	add	r7, sp, #0
+ 8001092:	6078      	str	r0, [r7, #4]
+ 8001094:	460b      	mov	r3, r1
+ 8001096:	807b      	strh	r3, [r7, #2]
+ 8001098:	4613      	mov	r3, r2
+ 800109a:	707b      	strb	r3, [r7, #1]
+  /* Check the parameters */
+  assert_param(IS_GPIO_PIN(GPIO_Pin));
+  assert_param(IS_GPIO_PIN_ACTION(PinState));
+
+  if(PinState != GPIO_PIN_RESET)
+ 800109c:	787b      	ldrb	r3, [r7, #1]
+ 800109e:	2b00      	cmp	r3, #0
+ 80010a0:	d003      	beq.n	80010aa <HAL_GPIO_WritePin+0x1e>
+  {
+    GPIOx->BSRR = GPIO_Pin;
+ 80010a2:	887a      	ldrh	r2, [r7, #2]
+ 80010a4:	687b      	ldr	r3, [r7, #4]
+ 80010a6:	619a      	str	r2, [r3, #24]
+  }
+  else
+  {
+    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
+  }
+}
+ 80010a8:	e003      	b.n	80010b2 <HAL_GPIO_WritePin+0x26>
+    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
+ 80010aa:	887b      	ldrh	r3, [r7, #2]
+ 80010ac:	041a      	lsls	r2, r3, #16
+ 80010ae:	687b      	ldr	r3, [r7, #4]
+ 80010b0:	619a      	str	r2, [r3, #24]
+}
+ 80010b2:	bf00      	nop
+ 80010b4:	370c      	adds	r7, #12
+ 80010b6:	46bd      	mov	sp, r7
+ 80010b8:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80010bc:	4770      	bx	lr
+	...
+
+080010c0 <HAL_GPIO_EXTI_IRQHandler>:
+  * @brief  This function handles EXTI interrupt request.
+  * @param  GPIO_Pin Specifies the pins connected EXTI line
+  * @retval None
+  */
+void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
+{
+ 80010c0:	b580      	push	{r7, lr}
+ 80010c2:	b082      	sub	sp, #8
+ 80010c4:	af00      	add	r7, sp, #0
+ 80010c6:	4603      	mov	r3, r0
+ 80010c8:	80fb      	strh	r3, [r7, #6]
+  /* EXTI line interrupt detected */
+  if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
+ 80010ca:	4b08      	ldr	r3, [pc, #32]	@ (80010ec <HAL_GPIO_EXTI_IRQHandler+0x2c>)
+ 80010cc:	695a      	ldr	r2, [r3, #20]
+ 80010ce:	88fb      	ldrh	r3, [r7, #6]
+ 80010d0:	4013      	ands	r3, r2
+ 80010d2:	2b00      	cmp	r3, #0
+ 80010d4:	d006      	beq.n	80010e4 <HAL_GPIO_EXTI_IRQHandler+0x24>
+  {
+    __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
+ 80010d6:	4a05      	ldr	r2, [pc, #20]	@ (80010ec <HAL_GPIO_EXTI_IRQHandler+0x2c>)
+ 80010d8:	88fb      	ldrh	r3, [r7, #6]
+ 80010da:	6153      	str	r3, [r2, #20]
+    HAL_GPIO_EXTI_Callback(GPIO_Pin);
+ 80010dc:	88fb      	ldrh	r3, [r7, #6]
+ 80010de:	4618      	mov	r0, r3
+ 80010e0:	f000 f806 	bl	80010f0 <HAL_GPIO_EXTI_Callback>
+  }
+}
+ 80010e4:	bf00      	nop
+ 80010e6:	3708      	adds	r7, #8
+ 80010e8:	46bd      	mov	sp, r7
+ 80010ea:	bd80      	pop	{r7, pc}
+ 80010ec:	40013c00 	.word	0x40013c00
+
+080010f0 <HAL_GPIO_EXTI_Callback>:
+  * @brief  EXTI line detection callbacks.
+  * @param  GPIO_Pin Specifies the pins connected EXTI line
+  * @retval None
+  */
+__weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
+{
+ 80010f0:	b480      	push	{r7}
+ 80010f2:	b083      	sub	sp, #12
+ 80010f4:	af00      	add	r7, sp, #0
+ 80010f6:	4603      	mov	r3, r0
+ 80010f8:	80fb      	strh	r3, [r7, #6]
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(GPIO_Pin);
+  /* NOTE: This function Should not be modified, when the callback is needed,
+           the HAL_GPIO_EXTI_Callback could be implemented in the user file
+   */
+}
+ 80010fa:	bf00      	nop
+ 80010fc:	370c      	adds	r7, #12
+ 80010fe:	46bd      	mov	sp, r7
+ 8001100:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001104:	4770      	bx	lr
+	...
+
+08001108 <HAL_RCC_OscConfig>:
+  *         supported by this API. User should request a transition to HSE Off
+  *         first and then HSE On or HSE Bypass.
+  * @retval HAL status
+  */
+__weak HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef  *RCC_OscInitStruct)
+{
+ 8001108:	b580      	push	{r7, lr}
+ 800110a:	b086      	sub	sp, #24
+ 800110c:	af00      	add	r7, sp, #0
+ 800110e:	6078      	str	r0, [r7, #4]
+  uint32_t tickstart;
+  uint32_t pll_config;
+  /* Check Null pointer */
+  if (RCC_OscInitStruct == NULL)
+ 8001110:	687b      	ldr	r3, [r7, #4]
+ 8001112:	2b00      	cmp	r3, #0
+ 8001114:	d101      	bne.n	800111a <HAL_RCC_OscConfig+0x12>
+  {
+    return HAL_ERROR;
+ 8001116:	2301      	movs	r3, #1
+ 8001118:	e267      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+  }
+
+  /* Check the parameters */
+  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
+  /*------------------------------- HSE Configuration ------------------------*/
+  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
+ 800111a:	687b      	ldr	r3, [r7, #4]
+ 800111c:	681b      	ldr	r3, [r3, #0]
+ 800111e:	f003 0301 	and.w	r3, r3, #1
+ 8001122:	2b00      	cmp	r3, #0
+ 8001124:	d075      	beq.n	8001212 <HAL_RCC_OscConfig+0x10a>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
+    /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
+    if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || \
+ 8001126:	4b88      	ldr	r3, [pc, #544]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 8001128:	689b      	ldr	r3, [r3, #8]
+ 800112a:	f003 030c 	and.w	r3, r3, #12
+ 800112e:	2b04      	cmp	r3, #4
+ 8001130:	d00c      	beq.n	800114c <HAL_RCC_OscConfig+0x44>
+        ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
+ 8001132:	4b85      	ldr	r3, [pc, #532]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 8001134:	689b      	ldr	r3, [r3, #8]
+ 8001136:	f003 030c 	and.w	r3, r3, #12
+    if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || \
+ 800113a:	2b08      	cmp	r3, #8
+ 800113c:	d112      	bne.n	8001164 <HAL_RCC_OscConfig+0x5c>
+        ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
+ 800113e:	4b82      	ldr	r3, [pc, #520]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 8001140:	685b      	ldr	r3, [r3, #4]
+ 8001142:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
+ 8001146:	f5b3 0f80 	cmp.w	r3, #4194304	@ 0x400000
+ 800114a:	d10b      	bne.n	8001164 <HAL_RCC_OscConfig+0x5c>
+    {
+      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
+ 800114c:	4b7e      	ldr	r3, [pc, #504]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 800114e:	681b      	ldr	r3, [r3, #0]
+ 8001150:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
+ 8001154:	2b00      	cmp	r3, #0
+ 8001156:	d05b      	beq.n	8001210 <HAL_RCC_OscConfig+0x108>
+ 8001158:	687b      	ldr	r3, [r7, #4]
+ 800115a:	685b      	ldr	r3, [r3, #4]
+ 800115c:	2b00      	cmp	r3, #0
+ 800115e:	d157      	bne.n	8001210 <HAL_RCC_OscConfig+0x108>
+      {
+        return HAL_ERROR;
+ 8001160:	2301      	movs	r3, #1
+ 8001162:	e242      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+      }
+    }
+    else
+    {
+      /* Set the new HSE configuration ---------------------------------------*/
+      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
+ 8001164:	687b      	ldr	r3, [r7, #4]
+ 8001166:	685b      	ldr	r3, [r3, #4]
+ 8001168:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
+ 800116c:	d106      	bne.n	800117c <HAL_RCC_OscConfig+0x74>
+ 800116e:	4b76      	ldr	r3, [pc, #472]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 8001170:	681b      	ldr	r3, [r3, #0]
+ 8001172:	4a75      	ldr	r2, [pc, #468]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 8001174:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
+ 8001178:	6013      	str	r3, [r2, #0]
+ 800117a:	e01d      	b.n	80011b8 <HAL_RCC_OscConfig+0xb0>
+ 800117c:	687b      	ldr	r3, [r7, #4]
+ 800117e:	685b      	ldr	r3, [r3, #4]
+ 8001180:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
+ 8001184:	d10c      	bne.n	80011a0 <HAL_RCC_OscConfig+0x98>
+ 8001186:	4b70      	ldr	r3, [pc, #448]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 8001188:	681b      	ldr	r3, [r3, #0]
+ 800118a:	4a6f      	ldr	r2, [pc, #444]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 800118c:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
+ 8001190:	6013      	str	r3, [r2, #0]
+ 8001192:	4b6d      	ldr	r3, [pc, #436]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 8001194:	681b      	ldr	r3, [r3, #0]
+ 8001196:	4a6c      	ldr	r2, [pc, #432]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 8001198:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
+ 800119c:	6013      	str	r3, [r2, #0]
+ 800119e:	e00b      	b.n	80011b8 <HAL_RCC_OscConfig+0xb0>
+ 80011a0:	4b69      	ldr	r3, [pc, #420]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 80011a2:	681b      	ldr	r3, [r3, #0]
+ 80011a4:	4a68      	ldr	r2, [pc, #416]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 80011a6:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
+ 80011aa:	6013      	str	r3, [r2, #0]
+ 80011ac:	4b66      	ldr	r3, [pc, #408]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 80011ae:	681b      	ldr	r3, [r3, #0]
+ 80011b0:	4a65      	ldr	r2, [pc, #404]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 80011b2:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
+ 80011b6:	6013      	str	r3, [r2, #0]
+
+      /* Check the HSE State */
+      if ((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
+ 80011b8:	687b      	ldr	r3, [r7, #4]
+ 80011ba:	685b      	ldr	r3, [r3, #4]
+ 80011bc:	2b00      	cmp	r3, #0
+ 80011be:	d013      	beq.n	80011e8 <HAL_RCC_OscConfig+0xe0>
+      {
+        /* Get Start Tick */
+        tickstart = HAL_GetTick();
+ 80011c0:	f7ff fcca 	bl	8000b58 <HAL_GetTick>
+ 80011c4:	6138      	str	r0, [r7, #16]
+
+        /* Wait till HSE is ready */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+ 80011c6:	e008      	b.n	80011da <HAL_RCC_OscConfig+0xd2>
+        {
+          if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
+ 80011c8:	f7ff fcc6 	bl	8000b58 <HAL_GetTick>
+ 80011cc:	4602      	mov	r2, r0
+ 80011ce:	693b      	ldr	r3, [r7, #16]
+ 80011d0:	1ad3      	subs	r3, r2, r3
+ 80011d2:	2b64      	cmp	r3, #100	@ 0x64
+ 80011d4:	d901      	bls.n	80011da <HAL_RCC_OscConfig+0xd2>
+          {
+            return HAL_TIMEOUT;
+ 80011d6:	2303      	movs	r3, #3
+ 80011d8:	e207      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+ 80011da:	4b5b      	ldr	r3, [pc, #364]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 80011dc:	681b      	ldr	r3, [r3, #0]
+ 80011de:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
+ 80011e2:	2b00      	cmp	r3, #0
+ 80011e4:	d0f0      	beq.n	80011c8 <HAL_RCC_OscConfig+0xc0>
+ 80011e6:	e014      	b.n	8001212 <HAL_RCC_OscConfig+0x10a>
+        }
+      }
+      else
+      {
+        /* Get Start Tick */
+        tickstart = HAL_GetTick();
+ 80011e8:	f7ff fcb6 	bl	8000b58 <HAL_GetTick>
+ 80011ec:	6138      	str	r0, [r7, #16]
+
+        /* Wait till HSE is bypassed or disabled */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
+ 80011ee:	e008      	b.n	8001202 <HAL_RCC_OscConfig+0xfa>
+        {
+          if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
+ 80011f0:	f7ff fcb2 	bl	8000b58 <HAL_GetTick>
+ 80011f4:	4602      	mov	r2, r0
+ 80011f6:	693b      	ldr	r3, [r7, #16]
+ 80011f8:	1ad3      	subs	r3, r2, r3
+ 80011fa:	2b64      	cmp	r3, #100	@ 0x64
+ 80011fc:	d901      	bls.n	8001202 <HAL_RCC_OscConfig+0xfa>
+          {
+            return HAL_TIMEOUT;
+ 80011fe:	2303      	movs	r3, #3
+ 8001200:	e1f3      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
+ 8001202:	4b51      	ldr	r3, [pc, #324]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 8001204:	681b      	ldr	r3, [r3, #0]
+ 8001206:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
+ 800120a:	2b00      	cmp	r3, #0
+ 800120c:	d1f0      	bne.n	80011f0 <HAL_RCC_OscConfig+0xe8>
+ 800120e:	e000      	b.n	8001212 <HAL_RCC_OscConfig+0x10a>
+      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
+ 8001210:	bf00      	nop
+        }
+      }
+    }
+  }
+  /*----------------------------- HSI Configuration --------------------------*/
+  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
+ 8001212:	687b      	ldr	r3, [r7, #4]
+ 8001214:	681b      	ldr	r3, [r3, #0]
+ 8001216:	f003 0302 	and.w	r3, r3, #2
+ 800121a:	2b00      	cmp	r3, #0
+ 800121c:	d063      	beq.n	80012e6 <HAL_RCC_OscConfig+0x1de>
+    /* Check the parameters */
+    assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
+    assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
+
+    /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
+    if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || \
+ 800121e:	4b4a      	ldr	r3, [pc, #296]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 8001220:	689b      	ldr	r3, [r3, #8]
+ 8001222:	f003 030c 	and.w	r3, r3, #12
+ 8001226:	2b00      	cmp	r3, #0
+ 8001228:	d00b      	beq.n	8001242 <HAL_RCC_OscConfig+0x13a>
+        ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
+ 800122a:	4b47      	ldr	r3, [pc, #284]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 800122c:	689b      	ldr	r3, [r3, #8]
+ 800122e:	f003 030c 	and.w	r3, r3, #12
+    if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || \
+ 8001232:	2b08      	cmp	r3, #8
+ 8001234:	d11c      	bne.n	8001270 <HAL_RCC_OscConfig+0x168>
+        ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
+ 8001236:	4b44      	ldr	r3, [pc, #272]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 8001238:	685b      	ldr	r3, [r3, #4]
+ 800123a:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
+ 800123e:	2b00      	cmp	r3, #0
+ 8001240:	d116      	bne.n	8001270 <HAL_RCC_OscConfig+0x168>
+    {
+      /* When HSI is used as system clock it will not disabled */
+      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
+ 8001242:	4b41      	ldr	r3, [pc, #260]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 8001244:	681b      	ldr	r3, [r3, #0]
+ 8001246:	f003 0302 	and.w	r3, r3, #2
+ 800124a:	2b00      	cmp	r3, #0
+ 800124c:	d005      	beq.n	800125a <HAL_RCC_OscConfig+0x152>
+ 800124e:	687b      	ldr	r3, [r7, #4]
+ 8001250:	68db      	ldr	r3, [r3, #12]
+ 8001252:	2b01      	cmp	r3, #1
+ 8001254:	d001      	beq.n	800125a <HAL_RCC_OscConfig+0x152>
+      {
+        return HAL_ERROR;
+ 8001256:	2301      	movs	r3, #1
+ 8001258:	e1c7      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+      }
+      /* Otherwise, just the calibration is allowed */
+      else
+      {
+        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
+        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
+ 800125a:	4b3b      	ldr	r3, [pc, #236]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 800125c:	681b      	ldr	r3, [r3, #0]
+ 800125e:	f023 02f8 	bic.w	r2, r3, #248	@ 0xf8
+ 8001262:	687b      	ldr	r3, [r7, #4]
+ 8001264:	691b      	ldr	r3, [r3, #16]
+ 8001266:	00db      	lsls	r3, r3, #3
+ 8001268:	4937      	ldr	r1, [pc, #220]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 800126a:	4313      	orrs	r3, r2
+ 800126c:	600b      	str	r3, [r1, #0]
+      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
+ 800126e:	e03a      	b.n	80012e6 <HAL_RCC_OscConfig+0x1de>
+      }
+    }
+    else
+    {
+      /* Check the HSI State */
+      if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF)
+ 8001270:	687b      	ldr	r3, [r7, #4]
+ 8001272:	68db      	ldr	r3, [r3, #12]
+ 8001274:	2b00      	cmp	r3, #0
+ 8001276:	d020      	beq.n	80012ba <HAL_RCC_OscConfig+0x1b2>
+      {
+        /* Enable the Internal High Speed oscillator (HSI). */
+        __HAL_RCC_HSI_ENABLE();
+ 8001278:	4b34      	ldr	r3, [pc, #208]	@ (800134c <HAL_RCC_OscConfig+0x244>)
+ 800127a:	2201      	movs	r2, #1
+ 800127c:	601a      	str	r2, [r3, #0]
+
+        /* Get Start Tick*/
+        tickstart = HAL_GetTick();
+ 800127e:	f7ff fc6b 	bl	8000b58 <HAL_GetTick>
+ 8001282:	6138      	str	r0, [r7, #16]
+
+        /* Wait till HSI is ready */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+ 8001284:	e008      	b.n	8001298 <HAL_RCC_OscConfig+0x190>
+        {
+          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
+ 8001286:	f7ff fc67 	bl	8000b58 <HAL_GetTick>
+ 800128a:	4602      	mov	r2, r0
+ 800128c:	693b      	ldr	r3, [r7, #16]
+ 800128e:	1ad3      	subs	r3, r2, r3
+ 8001290:	2b02      	cmp	r3, #2
+ 8001292:	d901      	bls.n	8001298 <HAL_RCC_OscConfig+0x190>
+          {
+            return HAL_TIMEOUT;
+ 8001294:	2303      	movs	r3, #3
+ 8001296:	e1a8      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+ 8001298:	4b2b      	ldr	r3, [pc, #172]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 800129a:	681b      	ldr	r3, [r3, #0]
+ 800129c:	f003 0302 	and.w	r3, r3, #2
+ 80012a0:	2b00      	cmp	r3, #0
+ 80012a2:	d0f0      	beq.n	8001286 <HAL_RCC_OscConfig+0x17e>
+          }
+        }
+
+        /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */
+        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
+ 80012a4:	4b28      	ldr	r3, [pc, #160]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 80012a6:	681b      	ldr	r3, [r3, #0]
+ 80012a8:	f023 02f8 	bic.w	r2, r3, #248	@ 0xf8
+ 80012ac:	687b      	ldr	r3, [r7, #4]
+ 80012ae:	691b      	ldr	r3, [r3, #16]
+ 80012b0:	00db      	lsls	r3, r3, #3
+ 80012b2:	4925      	ldr	r1, [pc, #148]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 80012b4:	4313      	orrs	r3, r2
+ 80012b6:	600b      	str	r3, [r1, #0]
+ 80012b8:	e015      	b.n	80012e6 <HAL_RCC_OscConfig+0x1de>
+      }
+      else
+      {
+        /* Disable the Internal High Speed oscillator (HSI). */
+        __HAL_RCC_HSI_DISABLE();
+ 80012ba:	4b24      	ldr	r3, [pc, #144]	@ (800134c <HAL_RCC_OscConfig+0x244>)
+ 80012bc:	2200      	movs	r2, #0
+ 80012be:	601a      	str	r2, [r3, #0]
+
+        /* Get Start Tick*/
+        tickstart = HAL_GetTick();
+ 80012c0:	f7ff fc4a 	bl	8000b58 <HAL_GetTick>
+ 80012c4:	6138      	str	r0, [r7, #16]
+
+        /* Wait till HSI is ready */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
+ 80012c6:	e008      	b.n	80012da <HAL_RCC_OscConfig+0x1d2>
+        {
+          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
+ 80012c8:	f7ff fc46 	bl	8000b58 <HAL_GetTick>
+ 80012cc:	4602      	mov	r2, r0
+ 80012ce:	693b      	ldr	r3, [r7, #16]
+ 80012d0:	1ad3      	subs	r3, r2, r3
+ 80012d2:	2b02      	cmp	r3, #2
+ 80012d4:	d901      	bls.n	80012da <HAL_RCC_OscConfig+0x1d2>
+          {
+            return HAL_TIMEOUT;
+ 80012d6:	2303      	movs	r3, #3
+ 80012d8:	e187      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
+ 80012da:	4b1b      	ldr	r3, [pc, #108]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 80012dc:	681b      	ldr	r3, [r3, #0]
+ 80012de:	f003 0302 	and.w	r3, r3, #2
+ 80012e2:	2b00      	cmp	r3, #0
+ 80012e4:	d1f0      	bne.n	80012c8 <HAL_RCC_OscConfig+0x1c0>
+        }
+      }
+    }
+  }
+  /*------------------------------ LSI Configuration -------------------------*/
+  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
+ 80012e6:	687b      	ldr	r3, [r7, #4]
+ 80012e8:	681b      	ldr	r3, [r3, #0]
+ 80012ea:	f003 0308 	and.w	r3, r3, #8
+ 80012ee:	2b00      	cmp	r3, #0
+ 80012f0:	d036      	beq.n	8001360 <HAL_RCC_OscConfig+0x258>
+  {
+    /* Check the parameters */
+    assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
+
+    /* Check the LSI State */
+    if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF)
+ 80012f2:	687b      	ldr	r3, [r7, #4]
+ 80012f4:	695b      	ldr	r3, [r3, #20]
+ 80012f6:	2b00      	cmp	r3, #0
+ 80012f8:	d016      	beq.n	8001328 <HAL_RCC_OscConfig+0x220>
+    {
+      /* Enable the Internal Low Speed oscillator (LSI). */
+      __HAL_RCC_LSI_ENABLE();
+ 80012fa:	4b15      	ldr	r3, [pc, #84]	@ (8001350 <HAL_RCC_OscConfig+0x248>)
+ 80012fc:	2201      	movs	r2, #1
+ 80012fe:	601a      	str	r2, [r3, #0]
+
+      /* Get Start Tick*/
+      tickstart = HAL_GetTick();
+ 8001300:	f7ff fc2a 	bl	8000b58 <HAL_GetTick>
+ 8001304:	6138      	str	r0, [r7, #16]
+
+      /* Wait till LSI is ready */
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
+ 8001306:	e008      	b.n	800131a <HAL_RCC_OscConfig+0x212>
+      {
+        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
+ 8001308:	f7ff fc26 	bl	8000b58 <HAL_GetTick>
+ 800130c:	4602      	mov	r2, r0
+ 800130e:	693b      	ldr	r3, [r7, #16]
+ 8001310:	1ad3      	subs	r3, r2, r3
+ 8001312:	2b02      	cmp	r3, #2
+ 8001314:	d901      	bls.n	800131a <HAL_RCC_OscConfig+0x212>
+        {
+          return HAL_TIMEOUT;
+ 8001316:	2303      	movs	r3, #3
+ 8001318:	e167      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
+ 800131a:	4b0b      	ldr	r3, [pc, #44]	@ (8001348 <HAL_RCC_OscConfig+0x240>)
+ 800131c:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
+ 800131e:	f003 0302 	and.w	r3, r3, #2
+ 8001322:	2b00      	cmp	r3, #0
+ 8001324:	d0f0      	beq.n	8001308 <HAL_RCC_OscConfig+0x200>
+ 8001326:	e01b      	b.n	8001360 <HAL_RCC_OscConfig+0x258>
+      }
+    }
+    else
+    {
+      /* Disable the Internal Low Speed oscillator (LSI). */
+      __HAL_RCC_LSI_DISABLE();
+ 8001328:	4b09      	ldr	r3, [pc, #36]	@ (8001350 <HAL_RCC_OscConfig+0x248>)
+ 800132a:	2200      	movs	r2, #0
+ 800132c:	601a      	str	r2, [r3, #0]
+
+      /* Get Start Tick */
+      tickstart = HAL_GetTick();
+ 800132e:	f7ff fc13 	bl	8000b58 <HAL_GetTick>
+ 8001332:	6138      	str	r0, [r7, #16]
+
+      /* Wait till LSI is ready */
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
+ 8001334:	e00e      	b.n	8001354 <HAL_RCC_OscConfig+0x24c>
+      {
+        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
+ 8001336:	f7ff fc0f 	bl	8000b58 <HAL_GetTick>
+ 800133a:	4602      	mov	r2, r0
+ 800133c:	693b      	ldr	r3, [r7, #16]
+ 800133e:	1ad3      	subs	r3, r2, r3
+ 8001340:	2b02      	cmp	r3, #2
+ 8001342:	d907      	bls.n	8001354 <HAL_RCC_OscConfig+0x24c>
+        {
+          return HAL_TIMEOUT;
+ 8001344:	2303      	movs	r3, #3
+ 8001346:	e150      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+ 8001348:	40023800 	.word	0x40023800
+ 800134c:	42470000 	.word	0x42470000
+ 8001350:	42470e80 	.word	0x42470e80
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
+ 8001354:	4b88      	ldr	r3, [pc, #544]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001356:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
+ 8001358:	f003 0302 	and.w	r3, r3, #2
+ 800135c:	2b00      	cmp	r3, #0
+ 800135e:	d1ea      	bne.n	8001336 <HAL_RCC_OscConfig+0x22e>
+        }
+      }
+    }
+  }
+  /*------------------------------ LSE Configuration -------------------------*/
+  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
+ 8001360:	687b      	ldr	r3, [r7, #4]
+ 8001362:	681b      	ldr	r3, [r3, #0]
+ 8001364:	f003 0304 	and.w	r3, r3, #4
+ 8001368:	2b00      	cmp	r3, #0
+ 800136a:	f000 8097 	beq.w	800149c <HAL_RCC_OscConfig+0x394>
+  {
+    FlagStatus       pwrclkchanged = RESET;
+ 800136e:	2300      	movs	r3, #0
+ 8001370:	75fb      	strb	r3, [r7, #23]
+    /* Check the parameters */
+    assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
+
+    /* Update LSE configuration in Backup Domain control register    */
+    /* Requires to enable write access to Backup Domain of necessary */
+    if (__HAL_RCC_PWR_IS_CLK_DISABLED())
+ 8001372:	4b81      	ldr	r3, [pc, #516]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001374:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8001376:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
+ 800137a:	2b00      	cmp	r3, #0
+ 800137c:	d10f      	bne.n	800139e <HAL_RCC_OscConfig+0x296>
+    {
+      __HAL_RCC_PWR_CLK_ENABLE();
+ 800137e:	2300      	movs	r3, #0
+ 8001380:	60bb      	str	r3, [r7, #8]
+ 8001382:	4b7d      	ldr	r3, [pc, #500]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001384:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8001386:	4a7c      	ldr	r2, [pc, #496]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001388:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
+ 800138c:	6413      	str	r3, [r2, #64]	@ 0x40
+ 800138e:	4b7a      	ldr	r3, [pc, #488]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001390:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8001392:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
+ 8001396:	60bb      	str	r3, [r7, #8]
+ 8001398:	68bb      	ldr	r3, [r7, #8]
+      pwrclkchanged = SET;
+ 800139a:	2301      	movs	r3, #1
+ 800139c:	75fb      	strb	r3, [r7, #23]
+    }
+
+    if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
+ 800139e:	4b77      	ldr	r3, [pc, #476]	@ (800157c <HAL_RCC_OscConfig+0x474>)
+ 80013a0:	681b      	ldr	r3, [r3, #0]
+ 80013a2:	f403 7380 	and.w	r3, r3, #256	@ 0x100
+ 80013a6:	2b00      	cmp	r3, #0
+ 80013a8:	d118      	bne.n	80013dc <HAL_RCC_OscConfig+0x2d4>
+    {
+      /* Enable write access to Backup domain */
+      SET_BIT(PWR->CR, PWR_CR_DBP);
+ 80013aa:	4b74      	ldr	r3, [pc, #464]	@ (800157c <HAL_RCC_OscConfig+0x474>)
+ 80013ac:	681b      	ldr	r3, [r3, #0]
+ 80013ae:	4a73      	ldr	r2, [pc, #460]	@ (800157c <HAL_RCC_OscConfig+0x474>)
+ 80013b0:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
+ 80013b4:	6013      	str	r3, [r2, #0]
+
+      /* Wait for Backup domain Write protection disable */
+      tickstart = HAL_GetTick();
+ 80013b6:	f7ff fbcf 	bl	8000b58 <HAL_GetTick>
+ 80013ba:	6138      	str	r0, [r7, #16]
+
+      while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
+ 80013bc:	e008      	b.n	80013d0 <HAL_RCC_OscConfig+0x2c8>
+      {
+        if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
+ 80013be:	f7ff fbcb 	bl	8000b58 <HAL_GetTick>
+ 80013c2:	4602      	mov	r2, r0
+ 80013c4:	693b      	ldr	r3, [r7, #16]
+ 80013c6:	1ad3      	subs	r3, r2, r3
+ 80013c8:	2b02      	cmp	r3, #2
+ 80013ca:	d901      	bls.n	80013d0 <HAL_RCC_OscConfig+0x2c8>
+        {
+          return HAL_TIMEOUT;
+ 80013cc:	2303      	movs	r3, #3
+ 80013ce:	e10c      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+      while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
+ 80013d0:	4b6a      	ldr	r3, [pc, #424]	@ (800157c <HAL_RCC_OscConfig+0x474>)
+ 80013d2:	681b      	ldr	r3, [r3, #0]
+ 80013d4:	f403 7380 	and.w	r3, r3, #256	@ 0x100
+ 80013d8:	2b00      	cmp	r3, #0
+ 80013da:	d0f0      	beq.n	80013be <HAL_RCC_OscConfig+0x2b6>
+        }
+      }
+    }
+
+    /* Set the new LSE configuration -----------------------------------------*/
+    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
+ 80013dc:	687b      	ldr	r3, [r7, #4]
+ 80013de:	689b      	ldr	r3, [r3, #8]
+ 80013e0:	2b01      	cmp	r3, #1
+ 80013e2:	d106      	bne.n	80013f2 <HAL_RCC_OscConfig+0x2ea>
+ 80013e4:	4b64      	ldr	r3, [pc, #400]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 80013e6:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 80013e8:	4a63      	ldr	r2, [pc, #396]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 80013ea:	f043 0301 	orr.w	r3, r3, #1
+ 80013ee:	6713      	str	r3, [r2, #112]	@ 0x70
+ 80013f0:	e01c      	b.n	800142c <HAL_RCC_OscConfig+0x324>
+ 80013f2:	687b      	ldr	r3, [r7, #4]
+ 80013f4:	689b      	ldr	r3, [r3, #8]
+ 80013f6:	2b05      	cmp	r3, #5
+ 80013f8:	d10c      	bne.n	8001414 <HAL_RCC_OscConfig+0x30c>
+ 80013fa:	4b5f      	ldr	r3, [pc, #380]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 80013fc:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 80013fe:	4a5e      	ldr	r2, [pc, #376]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001400:	f043 0304 	orr.w	r3, r3, #4
+ 8001404:	6713      	str	r3, [r2, #112]	@ 0x70
+ 8001406:	4b5c      	ldr	r3, [pc, #368]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001408:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 800140a:	4a5b      	ldr	r2, [pc, #364]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 800140c:	f043 0301 	orr.w	r3, r3, #1
+ 8001410:	6713      	str	r3, [r2, #112]	@ 0x70
+ 8001412:	e00b      	b.n	800142c <HAL_RCC_OscConfig+0x324>
+ 8001414:	4b58      	ldr	r3, [pc, #352]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001416:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 8001418:	4a57      	ldr	r2, [pc, #348]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 800141a:	f023 0301 	bic.w	r3, r3, #1
+ 800141e:	6713      	str	r3, [r2, #112]	@ 0x70
+ 8001420:	4b55      	ldr	r3, [pc, #340]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001422:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 8001424:	4a54      	ldr	r2, [pc, #336]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001426:	f023 0304 	bic.w	r3, r3, #4
+ 800142a:	6713      	str	r3, [r2, #112]	@ 0x70
+    /* Check the LSE State */
+    if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
+ 800142c:	687b      	ldr	r3, [r7, #4]
+ 800142e:	689b      	ldr	r3, [r3, #8]
+ 8001430:	2b00      	cmp	r3, #0
+ 8001432:	d015      	beq.n	8001460 <HAL_RCC_OscConfig+0x358>
+    {
+      /* Get Start Tick*/
+      tickstart = HAL_GetTick();
+ 8001434:	f7ff fb90 	bl	8000b58 <HAL_GetTick>
+ 8001438:	6138      	str	r0, [r7, #16]
+
+      /* Wait till LSE is ready */
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+ 800143a:	e00a      	b.n	8001452 <HAL_RCC_OscConfig+0x34a>
+      {
+        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
+ 800143c:	f7ff fb8c 	bl	8000b58 <HAL_GetTick>
+ 8001440:	4602      	mov	r2, r0
+ 8001442:	693b      	ldr	r3, [r7, #16]
+ 8001444:	1ad3      	subs	r3, r2, r3
+ 8001446:	f241 3288 	movw	r2, #5000	@ 0x1388
+ 800144a:	4293      	cmp	r3, r2
+ 800144c:	d901      	bls.n	8001452 <HAL_RCC_OscConfig+0x34a>
+        {
+          return HAL_TIMEOUT;
+ 800144e:	2303      	movs	r3, #3
+ 8001450:	e0cb      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+ 8001452:	4b49      	ldr	r3, [pc, #292]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001454:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 8001456:	f003 0302 	and.w	r3, r3, #2
+ 800145a:	2b00      	cmp	r3, #0
+ 800145c:	d0ee      	beq.n	800143c <HAL_RCC_OscConfig+0x334>
+ 800145e:	e014      	b.n	800148a <HAL_RCC_OscConfig+0x382>
+      }
+    }
+    else
+    {
+      /* Get Start Tick */
+      tickstart = HAL_GetTick();
+ 8001460:	f7ff fb7a 	bl	8000b58 <HAL_GetTick>
+ 8001464:	6138      	str	r0, [r7, #16]
+
+      /* Wait till LSE is ready */
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
+ 8001466:	e00a      	b.n	800147e <HAL_RCC_OscConfig+0x376>
+      {
+        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
+ 8001468:	f7ff fb76 	bl	8000b58 <HAL_GetTick>
+ 800146c:	4602      	mov	r2, r0
+ 800146e:	693b      	ldr	r3, [r7, #16]
+ 8001470:	1ad3      	subs	r3, r2, r3
+ 8001472:	f241 3288 	movw	r2, #5000	@ 0x1388
+ 8001476:	4293      	cmp	r3, r2
+ 8001478:	d901      	bls.n	800147e <HAL_RCC_OscConfig+0x376>
+        {
+          return HAL_TIMEOUT;
+ 800147a:	2303      	movs	r3, #3
+ 800147c:	e0b5      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
+ 800147e:	4b3e      	ldr	r3, [pc, #248]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001480:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
+ 8001482:	f003 0302 	and.w	r3, r3, #2
+ 8001486:	2b00      	cmp	r3, #0
+ 8001488:	d1ee      	bne.n	8001468 <HAL_RCC_OscConfig+0x360>
+        }
+      }
+    }
+
+    /* Restore clock configuration if changed */
+    if (pwrclkchanged == SET)
+ 800148a:	7dfb      	ldrb	r3, [r7, #23]
+ 800148c:	2b01      	cmp	r3, #1
+ 800148e:	d105      	bne.n	800149c <HAL_RCC_OscConfig+0x394>
+    {
+      __HAL_RCC_PWR_CLK_DISABLE();
+ 8001490:	4b39      	ldr	r3, [pc, #228]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001492:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
+ 8001494:	4a38      	ldr	r2, [pc, #224]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001496:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
+ 800149a:	6413      	str	r3, [r2, #64]	@ 0x40
+    }
+  }
+  /*-------------------------------- PLL Configuration -----------------------*/
+  /* Check the parameters */
+  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
+  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
+ 800149c:	687b      	ldr	r3, [r7, #4]
+ 800149e:	699b      	ldr	r3, [r3, #24]
+ 80014a0:	2b00      	cmp	r3, #0
+ 80014a2:	f000 80a1 	beq.w	80015e8 <HAL_RCC_OscConfig+0x4e0>
+  {
+    /* Check if the PLL is used as system clock or not */
+    if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
+ 80014a6:	4b34      	ldr	r3, [pc, #208]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 80014a8:	689b      	ldr	r3, [r3, #8]
+ 80014aa:	f003 030c 	and.w	r3, r3, #12
+ 80014ae:	2b08      	cmp	r3, #8
+ 80014b0:	d05c      	beq.n	800156c <HAL_RCC_OscConfig+0x464>
+    {
+      if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
+ 80014b2:	687b      	ldr	r3, [r7, #4]
+ 80014b4:	699b      	ldr	r3, [r3, #24]
+ 80014b6:	2b02      	cmp	r3, #2
+ 80014b8:	d141      	bne.n	800153e <HAL_RCC_OscConfig+0x436>
+        assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
+        assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
+        assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
+
+        /* Disable the main PLL. */
+        __HAL_RCC_PLL_DISABLE();
+ 80014ba:	4b31      	ldr	r3, [pc, #196]	@ (8001580 <HAL_RCC_OscConfig+0x478>)
+ 80014bc:	2200      	movs	r2, #0
+ 80014be:	601a      	str	r2, [r3, #0]
+
+        /* Get Start Tick */
+        tickstart = HAL_GetTick();
+ 80014c0:	f7ff fb4a 	bl	8000b58 <HAL_GetTick>
+ 80014c4:	6138      	str	r0, [r7, #16]
+
+        /* Wait till PLL is disabled */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 80014c6:	e008      	b.n	80014da <HAL_RCC_OscConfig+0x3d2>
+        {
+          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
+ 80014c8:	f7ff fb46 	bl	8000b58 <HAL_GetTick>
+ 80014cc:	4602      	mov	r2, r0
+ 80014ce:	693b      	ldr	r3, [r7, #16]
+ 80014d0:	1ad3      	subs	r3, r2, r3
+ 80014d2:	2b02      	cmp	r3, #2
+ 80014d4:	d901      	bls.n	80014da <HAL_RCC_OscConfig+0x3d2>
+          {
+            return HAL_TIMEOUT;
+ 80014d6:	2303      	movs	r3, #3
+ 80014d8:	e087      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 80014da:	4b27      	ldr	r3, [pc, #156]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 80014dc:	681b      	ldr	r3, [r3, #0]
+ 80014de:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
+ 80014e2:	2b00      	cmp	r3, #0
+ 80014e4:	d1f0      	bne.n	80014c8 <HAL_RCC_OscConfig+0x3c0>
+          }
+        }
+
+        /* Configure the main PLL clock source, multiplication and division factors. */
+        WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource                                            | \
+ 80014e6:	687b      	ldr	r3, [r7, #4]
+ 80014e8:	69da      	ldr	r2, [r3, #28]
+ 80014ea:	687b      	ldr	r3, [r7, #4]
+ 80014ec:	6a1b      	ldr	r3, [r3, #32]
+ 80014ee:	431a      	orrs	r2, r3
+ 80014f0:	687b      	ldr	r3, [r7, #4]
+ 80014f2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
+ 80014f4:	019b      	lsls	r3, r3, #6
+ 80014f6:	431a      	orrs	r2, r3
+ 80014f8:	687b      	ldr	r3, [r7, #4]
+ 80014fa:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
+ 80014fc:	085b      	lsrs	r3, r3, #1
+ 80014fe:	3b01      	subs	r3, #1
+ 8001500:	041b      	lsls	r3, r3, #16
+ 8001502:	431a      	orrs	r2, r3
+ 8001504:	687b      	ldr	r3, [r7, #4]
+ 8001506:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 8001508:	061b      	lsls	r3, r3, #24
+ 800150a:	491b      	ldr	r1, [pc, #108]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 800150c:	4313      	orrs	r3, r2
+ 800150e:	604b      	str	r3, [r1, #4]
+                                 RCC_OscInitStruct->PLL.PLLM                                                 | \
+                                 (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)             | \
+                                 (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \
+                                 (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)));
+        /* Enable the main PLL. */
+        __HAL_RCC_PLL_ENABLE();
+ 8001510:	4b1b      	ldr	r3, [pc, #108]	@ (8001580 <HAL_RCC_OscConfig+0x478>)
+ 8001512:	2201      	movs	r2, #1
+ 8001514:	601a      	str	r2, [r3, #0]
+
+        /* Get Start Tick */
+        tickstart = HAL_GetTick();
+ 8001516:	f7ff fb1f 	bl	8000b58 <HAL_GetTick>
+ 800151a:	6138      	str	r0, [r7, #16]
+
+        /* Wait till PLL is ready */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
+ 800151c:	e008      	b.n	8001530 <HAL_RCC_OscConfig+0x428>
+        {
+          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
+ 800151e:	f7ff fb1b 	bl	8000b58 <HAL_GetTick>
+ 8001522:	4602      	mov	r2, r0
+ 8001524:	693b      	ldr	r3, [r7, #16]
+ 8001526:	1ad3      	subs	r3, r2, r3
+ 8001528:	2b02      	cmp	r3, #2
+ 800152a:	d901      	bls.n	8001530 <HAL_RCC_OscConfig+0x428>
+          {
+            return HAL_TIMEOUT;
+ 800152c:	2303      	movs	r3, #3
+ 800152e:	e05c      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
+ 8001530:	4b11      	ldr	r3, [pc, #68]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001532:	681b      	ldr	r3, [r3, #0]
+ 8001534:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
+ 8001538:	2b00      	cmp	r3, #0
+ 800153a:	d0f0      	beq.n	800151e <HAL_RCC_OscConfig+0x416>
+ 800153c:	e054      	b.n	80015e8 <HAL_RCC_OscConfig+0x4e0>
+        }
+      }
+      else
+      {
+        /* Disable the main PLL. */
+        __HAL_RCC_PLL_DISABLE();
+ 800153e:	4b10      	ldr	r3, [pc, #64]	@ (8001580 <HAL_RCC_OscConfig+0x478>)
+ 8001540:	2200      	movs	r2, #0
+ 8001542:	601a      	str	r2, [r3, #0]
+
+        /* Get Start Tick */
+        tickstart = HAL_GetTick();
+ 8001544:	f7ff fb08 	bl	8000b58 <HAL_GetTick>
+ 8001548:	6138      	str	r0, [r7, #16]
+
+        /* Wait till PLL is disabled */
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 800154a:	e008      	b.n	800155e <HAL_RCC_OscConfig+0x456>
+        {
+          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
+ 800154c:	f7ff fb04 	bl	8000b58 <HAL_GetTick>
+ 8001550:	4602      	mov	r2, r0
+ 8001552:	693b      	ldr	r3, [r7, #16]
+ 8001554:	1ad3      	subs	r3, r2, r3
+ 8001556:	2b02      	cmp	r3, #2
+ 8001558:	d901      	bls.n	800155e <HAL_RCC_OscConfig+0x456>
+          {
+            return HAL_TIMEOUT;
+ 800155a:	2303      	movs	r3, #3
+ 800155c:	e045      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
+ 800155e:	4b06      	ldr	r3, [pc, #24]	@ (8001578 <HAL_RCC_OscConfig+0x470>)
+ 8001560:	681b      	ldr	r3, [r3, #0]
+ 8001562:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
+ 8001566:	2b00      	cmp	r3, #0
+ 8001568:	d1f0      	bne.n	800154c <HAL_RCC_OscConfig+0x444>
+ 800156a:	e03d      	b.n	80015e8 <HAL_RCC_OscConfig+0x4e0>
+      }
+    }
+    else
+    {
+      /* Check if there is a request to disable the PLL used as System clock source */
+      if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
+ 800156c:	687b      	ldr	r3, [r7, #4]
+ 800156e:	699b      	ldr	r3, [r3, #24]
+ 8001570:	2b01      	cmp	r3, #1
+ 8001572:	d107      	bne.n	8001584 <HAL_RCC_OscConfig+0x47c>
+      {
+        return HAL_ERROR;
+ 8001574:	2301      	movs	r3, #1
+ 8001576:	e038      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+ 8001578:	40023800 	.word	0x40023800
+ 800157c:	40007000 	.word	0x40007000
+ 8001580:	42470060 	.word	0x42470060
+      }
+      else
+      {
+        /* Do not return HAL_ERROR if request repeats the current configuration */
+        pll_config = RCC->PLLCFGR;
+ 8001584:	4b1b      	ldr	r3, [pc, #108]	@ (80015f4 <HAL_RCC_OscConfig+0x4ec>)
+ 8001586:	685b      	ldr	r3, [r3, #4]
+ 8001588:	60fb      	str	r3, [r7, #12]
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) ||
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos)))
+#else
+        if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
+ 800158a:	687b      	ldr	r3, [r7, #4]
+ 800158c:	699b      	ldr	r3, [r3, #24]
+ 800158e:	2b01      	cmp	r3, #1
+ 8001590:	d028      	beq.n	80015e4 <HAL_RCC_OscConfig+0x4dc>
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
+ 8001592:	68fb      	ldr	r3, [r7, #12]
+ 8001594:	f403 0280 	and.w	r2, r3, #4194304	@ 0x400000
+ 8001598:	687b      	ldr	r3, [r7, #4]
+ 800159a:	69db      	ldr	r3, [r3, #28]
+        if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
+ 800159c:	429a      	cmp	r2, r3
+ 800159e:	d121      	bne.n	80015e4 <HAL_RCC_OscConfig+0x4dc>
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) ||
+ 80015a0:	68fb      	ldr	r3, [r7, #12]
+ 80015a2:	f003 023f 	and.w	r2, r3, #63	@ 0x3f
+ 80015a6:	687b      	ldr	r3, [r7, #4]
+ 80015a8:	6a1b      	ldr	r3, [r3, #32]
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
+ 80015aa:	429a      	cmp	r2, r3
+ 80015ac:	d11a      	bne.n	80015e4 <HAL_RCC_OscConfig+0x4dc>
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
+ 80015ae:	68fa      	ldr	r2, [r7, #12]
+ 80015b0:	f647 73c0 	movw	r3, #32704	@ 0x7fc0
+ 80015b4:	4013      	ands	r3, r2
+ 80015b6:	687a      	ldr	r2, [r7, #4]
+ 80015b8:	6a52      	ldr	r2, [r2, #36]	@ 0x24
+ 80015ba:	0192      	lsls	r2, r2, #6
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) ||
+ 80015bc:	4293      	cmp	r3, r2
+ 80015be:	d111      	bne.n	80015e4 <HAL_RCC_OscConfig+0x4dc>
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
+ 80015c0:	68fb      	ldr	r3, [r7, #12]
+ 80015c2:	f403 3240 	and.w	r2, r3, #196608	@ 0x30000
+ 80015c6:	687b      	ldr	r3, [r7, #4]
+ 80015c8:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
+ 80015ca:	085b      	lsrs	r3, r3, #1
+ 80015cc:	3b01      	subs	r3, #1
+ 80015ce:	041b      	lsls	r3, r3, #16
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
+ 80015d0:	429a      	cmp	r2, r3
+ 80015d2:	d107      	bne.n	80015e4 <HAL_RCC_OscConfig+0x4dc>
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)))
+ 80015d4:	68fb      	ldr	r3, [r7, #12]
+ 80015d6:	f003 6270 	and.w	r2, r3, #251658240	@ 0xf000000
+ 80015da:	687b      	ldr	r3, [r7, #4]
+ 80015dc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 80015de:	061b      	lsls	r3, r3, #24
+            (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
+ 80015e0:	429a      	cmp	r2, r3
+ 80015e2:	d001      	beq.n	80015e8 <HAL_RCC_OscConfig+0x4e0>
+#endif /* RCC_PLLCFGR_PLLR */
+        {
+          return HAL_ERROR;
+ 80015e4:	2301      	movs	r3, #1
+ 80015e6:	e000      	b.n	80015ea <HAL_RCC_OscConfig+0x4e2>
+        }
+      }
+    }
+  }
+  return HAL_OK;
+ 80015e8:	2300      	movs	r3, #0
+}
+ 80015ea:	4618      	mov	r0, r3
+ 80015ec:	3718      	adds	r7, #24
+ 80015ee:	46bd      	mov	sp, r7
+ 80015f0:	bd80      	pop	{r7, pc}
+ 80015f2:	bf00      	nop
+ 80015f4:	40023800 	.word	0x40023800
+
+080015f8 <HAL_RCC_ClockConfig>:
+  *         HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
+  *         (for more details refer to section above "Initialization/de-initialization functions")
+  * @retval None
+  */
+HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
+{
+ 80015f8:	b580      	push	{r7, lr}
+ 80015fa:	b084      	sub	sp, #16
+ 80015fc:	af00      	add	r7, sp, #0
+ 80015fe:	6078      	str	r0, [r7, #4]
+ 8001600:	6039      	str	r1, [r7, #0]
+  uint32_t tickstart;
+
+  /* Check Null pointer */
+  if (RCC_ClkInitStruct == NULL)
+ 8001602:	687b      	ldr	r3, [r7, #4]
+ 8001604:	2b00      	cmp	r3, #0
+ 8001606:	d101      	bne.n	800160c <HAL_RCC_ClockConfig+0x14>
+  {
+    return HAL_ERROR;
+ 8001608:	2301      	movs	r3, #1
+ 800160a:	e0cc      	b.n	80017a6 <HAL_RCC_ClockConfig+0x1ae>
+  /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
+    must be correctly programmed according to the frequency of the CPU clock
+    (HCLK) and the supply voltage of the device. */
+
+  /* Increasing the number of wait states because of higher CPU frequency */
+  if (FLatency > __HAL_FLASH_GET_LATENCY())
+ 800160c:	4b68      	ldr	r3, [pc, #416]	@ (80017b0 <HAL_RCC_ClockConfig+0x1b8>)
+ 800160e:	681b      	ldr	r3, [r3, #0]
+ 8001610:	f003 030f 	and.w	r3, r3, #15
+ 8001614:	683a      	ldr	r2, [r7, #0]
+ 8001616:	429a      	cmp	r2, r3
+ 8001618:	d90c      	bls.n	8001634 <HAL_RCC_ClockConfig+0x3c>
+  {
+    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
+    __HAL_FLASH_SET_LATENCY(FLatency);
+ 800161a:	4b65      	ldr	r3, [pc, #404]	@ (80017b0 <HAL_RCC_ClockConfig+0x1b8>)
+ 800161c:	683a      	ldr	r2, [r7, #0]
+ 800161e:	b2d2      	uxtb	r2, r2
+ 8001620:	701a      	strb	r2, [r3, #0]
+
+    /* Check that the new number of wait states is taken into account to access the Flash
+    memory by reading the FLASH_ACR register */
+    if (__HAL_FLASH_GET_LATENCY() != FLatency)
+ 8001622:	4b63      	ldr	r3, [pc, #396]	@ (80017b0 <HAL_RCC_ClockConfig+0x1b8>)
+ 8001624:	681b      	ldr	r3, [r3, #0]
+ 8001626:	f003 030f 	and.w	r3, r3, #15
+ 800162a:	683a      	ldr	r2, [r7, #0]
+ 800162c:	429a      	cmp	r2, r3
+ 800162e:	d001      	beq.n	8001634 <HAL_RCC_ClockConfig+0x3c>
+    {
+      return HAL_ERROR;
+ 8001630:	2301      	movs	r3, #1
+ 8001632:	e0b8      	b.n	80017a6 <HAL_RCC_ClockConfig+0x1ae>
+    }
+  }
+
+  /*-------------------------- HCLK Configuration --------------------------*/
+  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
+ 8001634:	687b      	ldr	r3, [r7, #4]
+ 8001636:	681b      	ldr	r3, [r3, #0]
+ 8001638:	f003 0302 	and.w	r3, r3, #2
+ 800163c:	2b00      	cmp	r3, #0
+ 800163e:	d020      	beq.n	8001682 <HAL_RCC_ClockConfig+0x8a>
+  {
+    /* Set the highest APBx dividers in order to ensure that we do not go through
+       a non-spec phase whatever we decrease or increase HCLK. */
+    if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
+ 8001640:	687b      	ldr	r3, [r7, #4]
+ 8001642:	681b      	ldr	r3, [r3, #0]
+ 8001644:	f003 0304 	and.w	r3, r3, #4
+ 8001648:	2b00      	cmp	r3, #0
+ 800164a:	d005      	beq.n	8001658 <HAL_RCC_ClockConfig+0x60>
+    {
+      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
+ 800164c:	4b59      	ldr	r3, [pc, #356]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 800164e:	689b      	ldr	r3, [r3, #8]
+ 8001650:	4a58      	ldr	r2, [pc, #352]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8001652:	f443 53e0 	orr.w	r3, r3, #7168	@ 0x1c00
+ 8001656:	6093      	str	r3, [r2, #8]
+    }
+
+    if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
+ 8001658:	687b      	ldr	r3, [r7, #4]
+ 800165a:	681b      	ldr	r3, [r3, #0]
+ 800165c:	f003 0308 	and.w	r3, r3, #8
+ 8001660:	2b00      	cmp	r3, #0
+ 8001662:	d005      	beq.n	8001670 <HAL_RCC_ClockConfig+0x78>
+    {
+      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
+ 8001664:	4b53      	ldr	r3, [pc, #332]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8001666:	689b      	ldr	r3, [r3, #8]
+ 8001668:	4a52      	ldr	r2, [pc, #328]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 800166a:	f443 4360 	orr.w	r3, r3, #57344	@ 0xe000
+ 800166e:	6093      	str	r3, [r2, #8]
+    }
+
+    assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
+    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
+ 8001670:	4b50      	ldr	r3, [pc, #320]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8001672:	689b      	ldr	r3, [r3, #8]
+ 8001674:	f023 02f0 	bic.w	r2, r3, #240	@ 0xf0
+ 8001678:	687b      	ldr	r3, [r7, #4]
+ 800167a:	689b      	ldr	r3, [r3, #8]
+ 800167c:	494d      	ldr	r1, [pc, #308]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 800167e:	4313      	orrs	r3, r2
+ 8001680:	608b      	str	r3, [r1, #8]
+  }
+
+  /*------------------------- SYSCLK Configuration ---------------------------*/
+  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
+ 8001682:	687b      	ldr	r3, [r7, #4]
+ 8001684:	681b      	ldr	r3, [r3, #0]
+ 8001686:	f003 0301 	and.w	r3, r3, #1
+ 800168a:	2b00      	cmp	r3, #0
+ 800168c:	d044      	beq.n	8001718 <HAL_RCC_ClockConfig+0x120>
+  {
+    assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
+
+    /* HSE is selected as System Clock Source */
+    if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
+ 800168e:	687b      	ldr	r3, [r7, #4]
+ 8001690:	685b      	ldr	r3, [r3, #4]
+ 8001692:	2b01      	cmp	r3, #1
+ 8001694:	d107      	bne.n	80016a6 <HAL_RCC_ClockConfig+0xae>
+    {
+      /* Check the HSE ready flag */
+      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
+ 8001696:	4b47      	ldr	r3, [pc, #284]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8001698:	681b      	ldr	r3, [r3, #0]
+ 800169a:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
+ 800169e:	2b00      	cmp	r3, #0
+ 80016a0:	d119      	bne.n	80016d6 <HAL_RCC_ClockConfig+0xde>
+      {
+        return HAL_ERROR;
+ 80016a2:	2301      	movs	r3, #1
+ 80016a4:	e07f      	b.n	80017a6 <HAL_RCC_ClockConfig+0x1ae>
+      }
+    }
+    /* PLL is selected as System Clock Source */
+    else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)   ||
+ 80016a6:	687b      	ldr	r3, [r7, #4]
+ 80016a8:	685b      	ldr	r3, [r3, #4]
+ 80016aa:	2b02      	cmp	r3, #2
+ 80016ac:	d003      	beq.n	80016b6 <HAL_RCC_ClockConfig+0xbe>
+             (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
+ 80016ae:	687b      	ldr	r3, [r7, #4]
+ 80016b0:	685b      	ldr	r3, [r3, #4]
+    else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)   ||
+ 80016b2:	2b03      	cmp	r3, #3
+ 80016b4:	d107      	bne.n	80016c6 <HAL_RCC_ClockConfig+0xce>
+    {
+      /* Check the PLL ready flag */
+      if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
+ 80016b6:	4b3f      	ldr	r3, [pc, #252]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 80016b8:	681b      	ldr	r3, [r3, #0]
+ 80016ba:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
+ 80016be:	2b00      	cmp	r3, #0
+ 80016c0:	d109      	bne.n	80016d6 <HAL_RCC_ClockConfig+0xde>
+      {
+        return HAL_ERROR;
+ 80016c2:	2301      	movs	r3, #1
+ 80016c4:	e06f      	b.n	80017a6 <HAL_RCC_ClockConfig+0x1ae>
+    }
+    /* HSI is selected as System Clock Source */
+    else
+    {
+      /* Check the HSI ready flag */
+      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
+ 80016c6:	4b3b      	ldr	r3, [pc, #236]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 80016c8:	681b      	ldr	r3, [r3, #0]
+ 80016ca:	f003 0302 	and.w	r3, r3, #2
+ 80016ce:	2b00      	cmp	r3, #0
+ 80016d0:	d101      	bne.n	80016d6 <HAL_RCC_ClockConfig+0xde>
+      {
+        return HAL_ERROR;
+ 80016d2:	2301      	movs	r3, #1
+ 80016d4:	e067      	b.n	80017a6 <HAL_RCC_ClockConfig+0x1ae>
+      }
+    }
+
+    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
+ 80016d6:	4b37      	ldr	r3, [pc, #220]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 80016d8:	689b      	ldr	r3, [r3, #8]
+ 80016da:	f023 0203 	bic.w	r2, r3, #3
+ 80016de:	687b      	ldr	r3, [r7, #4]
+ 80016e0:	685b      	ldr	r3, [r3, #4]
+ 80016e2:	4934      	ldr	r1, [pc, #208]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 80016e4:	4313      	orrs	r3, r2
+ 80016e6:	608b      	str	r3, [r1, #8]
+
+    /* Get Start Tick */
+    tickstart = HAL_GetTick();
+ 80016e8:	f7ff fa36 	bl	8000b58 <HAL_GetTick>
+ 80016ec:	60f8      	str	r0, [r7, #12]
+
+    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
+ 80016ee:	e00a      	b.n	8001706 <HAL_RCC_ClockConfig+0x10e>
+    {
+      if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
+ 80016f0:	f7ff fa32 	bl	8000b58 <HAL_GetTick>
+ 80016f4:	4602      	mov	r2, r0
+ 80016f6:	68fb      	ldr	r3, [r7, #12]
+ 80016f8:	1ad3      	subs	r3, r2, r3
+ 80016fa:	f241 3288 	movw	r2, #5000	@ 0x1388
+ 80016fe:	4293      	cmp	r3, r2
+ 8001700:	d901      	bls.n	8001706 <HAL_RCC_ClockConfig+0x10e>
+      {
+        return HAL_TIMEOUT;
+ 8001702:	2303      	movs	r3, #3
+ 8001704:	e04f      	b.n	80017a6 <HAL_RCC_ClockConfig+0x1ae>
+    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
+ 8001706:	4b2b      	ldr	r3, [pc, #172]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8001708:	689b      	ldr	r3, [r3, #8]
+ 800170a:	f003 020c 	and.w	r2, r3, #12
+ 800170e:	687b      	ldr	r3, [r7, #4]
+ 8001710:	685b      	ldr	r3, [r3, #4]
+ 8001712:	009b      	lsls	r3, r3, #2
+ 8001714:	429a      	cmp	r2, r3
+ 8001716:	d1eb      	bne.n	80016f0 <HAL_RCC_ClockConfig+0xf8>
+      }
+    }
+  }
+
+  /* Decreasing the number of wait states because of lower CPU frequency */
+  if (FLatency < __HAL_FLASH_GET_LATENCY())
+ 8001718:	4b25      	ldr	r3, [pc, #148]	@ (80017b0 <HAL_RCC_ClockConfig+0x1b8>)
+ 800171a:	681b      	ldr	r3, [r3, #0]
+ 800171c:	f003 030f 	and.w	r3, r3, #15
+ 8001720:	683a      	ldr	r2, [r7, #0]
+ 8001722:	429a      	cmp	r2, r3
+ 8001724:	d20c      	bcs.n	8001740 <HAL_RCC_ClockConfig+0x148>
+  {
+    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
+    __HAL_FLASH_SET_LATENCY(FLatency);
+ 8001726:	4b22      	ldr	r3, [pc, #136]	@ (80017b0 <HAL_RCC_ClockConfig+0x1b8>)
+ 8001728:	683a      	ldr	r2, [r7, #0]
+ 800172a:	b2d2      	uxtb	r2, r2
+ 800172c:	701a      	strb	r2, [r3, #0]
+
+    /* Check that the new number of wait states is taken into account to access the Flash
+    memory by reading the FLASH_ACR register */
+    if (__HAL_FLASH_GET_LATENCY() != FLatency)
+ 800172e:	4b20      	ldr	r3, [pc, #128]	@ (80017b0 <HAL_RCC_ClockConfig+0x1b8>)
+ 8001730:	681b      	ldr	r3, [r3, #0]
+ 8001732:	f003 030f 	and.w	r3, r3, #15
+ 8001736:	683a      	ldr	r2, [r7, #0]
+ 8001738:	429a      	cmp	r2, r3
+ 800173a:	d001      	beq.n	8001740 <HAL_RCC_ClockConfig+0x148>
+    {
+      return HAL_ERROR;
+ 800173c:	2301      	movs	r3, #1
+ 800173e:	e032      	b.n	80017a6 <HAL_RCC_ClockConfig+0x1ae>
+    }
+  }
+
+  /*-------------------------- PCLK1 Configuration ---------------------------*/
+  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
+ 8001740:	687b      	ldr	r3, [r7, #4]
+ 8001742:	681b      	ldr	r3, [r3, #0]
+ 8001744:	f003 0304 	and.w	r3, r3, #4
+ 8001748:	2b00      	cmp	r3, #0
+ 800174a:	d008      	beq.n	800175e <HAL_RCC_ClockConfig+0x166>
+  {
+    assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
+    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
+ 800174c:	4b19      	ldr	r3, [pc, #100]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 800174e:	689b      	ldr	r3, [r3, #8]
+ 8001750:	f423 52e0 	bic.w	r2, r3, #7168	@ 0x1c00
+ 8001754:	687b      	ldr	r3, [r7, #4]
+ 8001756:	68db      	ldr	r3, [r3, #12]
+ 8001758:	4916      	ldr	r1, [pc, #88]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 800175a:	4313      	orrs	r3, r2
+ 800175c:	608b      	str	r3, [r1, #8]
+  }
+
+  /*-------------------------- PCLK2 Configuration ---------------------------*/
+  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
+ 800175e:	687b      	ldr	r3, [r7, #4]
+ 8001760:	681b      	ldr	r3, [r3, #0]
+ 8001762:	f003 0308 	and.w	r3, r3, #8
+ 8001766:	2b00      	cmp	r3, #0
+ 8001768:	d009      	beq.n	800177e <HAL_RCC_ClockConfig+0x186>
+  {
+    assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
+    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
+ 800176a:	4b12      	ldr	r3, [pc, #72]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 800176c:	689b      	ldr	r3, [r3, #8]
+ 800176e:	f423 4260 	bic.w	r2, r3, #57344	@ 0xe000
+ 8001772:	687b      	ldr	r3, [r7, #4]
+ 8001774:	691b      	ldr	r3, [r3, #16]
+ 8001776:	00db      	lsls	r3, r3, #3
+ 8001778:	490e      	ldr	r1, [pc, #56]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 800177a:	4313      	orrs	r3, r2
+ 800177c:	608b      	str	r3, [r1, #8]
+  }
+
+  /* Update the SystemCoreClock global variable */
+  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
+ 800177e:	f000 f821 	bl	80017c4 <HAL_RCC_GetSysClockFreq>
+ 8001782:	4602      	mov	r2, r0
+ 8001784:	4b0b      	ldr	r3, [pc, #44]	@ (80017b4 <HAL_RCC_ClockConfig+0x1bc>)
+ 8001786:	689b      	ldr	r3, [r3, #8]
+ 8001788:	091b      	lsrs	r3, r3, #4
+ 800178a:	f003 030f 	and.w	r3, r3, #15
+ 800178e:	490a      	ldr	r1, [pc, #40]	@ (80017b8 <HAL_RCC_ClockConfig+0x1c0>)
+ 8001790:	5ccb      	ldrb	r3, [r1, r3]
+ 8001792:	fa22 f303 	lsr.w	r3, r2, r3
+ 8001796:	4a09      	ldr	r2, [pc, #36]	@ (80017bc <HAL_RCC_ClockConfig+0x1c4>)
+ 8001798:	6013      	str	r3, [r2, #0]
+
+  /* Configure the source of time base considering new system clocks settings */
+  HAL_InitTick(uwTickPrio);
+ 800179a:	4b09      	ldr	r3, [pc, #36]	@ (80017c0 <HAL_RCC_ClockConfig+0x1c8>)
+ 800179c:	681b      	ldr	r3, [r3, #0]
+ 800179e:	4618      	mov	r0, r3
+ 80017a0:	f7ff f8d2 	bl	8000948 <HAL_InitTick>
+
+  return HAL_OK;
+ 80017a4:	2300      	movs	r3, #0
+}
+ 80017a6:	4618      	mov	r0, r3
+ 80017a8:	3710      	adds	r7, #16
+ 80017aa:	46bd      	mov	sp, r7
+ 80017ac:	bd80      	pop	{r7, pc}
+ 80017ae:	bf00      	nop
+ 80017b0:	40023c00 	.word	0x40023c00
+ 80017b4:	40023800 	.word	0x40023800
+ 80017b8:	0800244c 	.word	0x0800244c
+ 80017bc:	20000000 	.word	0x20000000
+ 80017c0:	20000004 	.word	0x20000004
+
+080017c4 <HAL_RCC_GetSysClockFreq>:
+  *
+  *
+  * @retval SYSCLK frequency
+  */
+__weak uint32_t HAL_RCC_GetSysClockFreq(void)
+{
+ 80017c4:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
+ 80017c8:	b094      	sub	sp, #80	@ 0x50
+ 80017ca:	af00      	add	r7, sp, #0
+  uint32_t pllm = 0U;
+ 80017cc:	2300      	movs	r3, #0
+ 80017ce:	647b      	str	r3, [r7, #68]	@ 0x44
+  uint32_t pllvco = 0U;
+ 80017d0:	2300      	movs	r3, #0
+ 80017d2:	64fb      	str	r3, [r7, #76]	@ 0x4c
+  uint32_t pllp = 0U;
+ 80017d4:	2300      	movs	r3, #0
+ 80017d6:	643b      	str	r3, [r7, #64]	@ 0x40
+  uint32_t sysclockfreq = 0U;
+ 80017d8:	2300      	movs	r3, #0
+ 80017da:	64bb      	str	r3, [r7, #72]	@ 0x48
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+ 80017dc:	4b79      	ldr	r3, [pc, #484]	@ (80019c4 <HAL_RCC_GetSysClockFreq+0x200>)
+ 80017de:	689b      	ldr	r3, [r3, #8]
+ 80017e0:	f003 030c 	and.w	r3, r3, #12
+ 80017e4:	2b08      	cmp	r3, #8
+ 80017e6:	d00d      	beq.n	8001804 <HAL_RCC_GetSysClockFreq+0x40>
+ 80017e8:	2b08      	cmp	r3, #8
+ 80017ea:	f200 80e1 	bhi.w	80019b0 <HAL_RCC_GetSysClockFreq+0x1ec>
+ 80017ee:	2b00      	cmp	r3, #0
+ 80017f0:	d002      	beq.n	80017f8 <HAL_RCC_GetSysClockFreq+0x34>
+ 80017f2:	2b04      	cmp	r3, #4
+ 80017f4:	d003      	beq.n	80017fe <HAL_RCC_GetSysClockFreq+0x3a>
+ 80017f6:	e0db      	b.n	80019b0 <HAL_RCC_GetSysClockFreq+0x1ec>
+  {
+    case RCC_CFGR_SWS_HSI:  /* HSI used as system clock source */
+    {
+      sysclockfreq = HSI_VALUE;
+ 80017f8:	4b73      	ldr	r3, [pc, #460]	@ (80019c8 <HAL_RCC_GetSysClockFreq+0x204>)
+ 80017fa:	64bb      	str	r3, [r7, #72]	@ 0x48
+      break;
+ 80017fc:	e0db      	b.n	80019b6 <HAL_RCC_GetSysClockFreq+0x1f2>
+    }
+    case RCC_CFGR_SWS_HSE:  /* HSE used as system clock  source */
+    {
+      sysclockfreq = HSE_VALUE;
+ 80017fe:	4b73      	ldr	r3, [pc, #460]	@ (80019cc <HAL_RCC_GetSysClockFreq+0x208>)
+ 8001800:	64bb      	str	r3, [r7, #72]	@ 0x48
+      break;
+ 8001802:	e0d8      	b.n	80019b6 <HAL_RCC_GetSysClockFreq+0x1f2>
+    }
+    case RCC_CFGR_SWS_PLL:  /* PLL used as system clock  source */
+    {
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
+      SYSCLK = PLL_VCO / PLLP */
+      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+ 8001804:	4b6f      	ldr	r3, [pc, #444]	@ (80019c4 <HAL_RCC_GetSysClockFreq+0x200>)
+ 8001806:	685b      	ldr	r3, [r3, #4]
+ 8001808:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
+ 800180c:	647b      	str	r3, [r7, #68]	@ 0x44
+      if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
+ 800180e:	4b6d      	ldr	r3, [pc, #436]	@ (80019c4 <HAL_RCC_GetSysClockFreq+0x200>)
+ 8001810:	685b      	ldr	r3, [r3, #4]
+ 8001812:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
+ 8001816:	2b00      	cmp	r3, #0
+ 8001818:	d063      	beq.n	80018e2 <HAL_RCC_GetSysClockFreq+0x11e>
+      {
+        /* HSE used as PLL clock source */
+        pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
+ 800181a:	4b6a      	ldr	r3, [pc, #424]	@ (80019c4 <HAL_RCC_GetSysClockFreq+0x200>)
+ 800181c:	685b      	ldr	r3, [r3, #4]
+ 800181e:	099b      	lsrs	r3, r3, #6
+ 8001820:	2200      	movs	r2, #0
+ 8001822:	63bb      	str	r3, [r7, #56]	@ 0x38
+ 8001824:	63fa      	str	r2, [r7, #60]	@ 0x3c
+ 8001826:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
+ 8001828:	f3c3 0308 	ubfx	r3, r3, #0, #9
+ 800182c:	633b      	str	r3, [r7, #48]	@ 0x30
+ 800182e:	2300      	movs	r3, #0
+ 8001830:	637b      	str	r3, [r7, #52]	@ 0x34
+ 8001832:	e9d7 450c 	ldrd	r4, r5, [r7, #48]	@ 0x30
+ 8001836:	4622      	mov	r2, r4
+ 8001838:	462b      	mov	r3, r5
+ 800183a:	f04f 0000 	mov.w	r0, #0
+ 800183e:	f04f 0100 	mov.w	r1, #0
+ 8001842:	0159      	lsls	r1, r3, #5
+ 8001844:	ea41 61d2 	orr.w	r1, r1, r2, lsr #27
+ 8001848:	0150      	lsls	r0, r2, #5
+ 800184a:	4602      	mov	r2, r0
+ 800184c:	460b      	mov	r3, r1
+ 800184e:	4621      	mov	r1, r4
+ 8001850:	1a51      	subs	r1, r2, r1
+ 8001852:	6139      	str	r1, [r7, #16]
+ 8001854:	4629      	mov	r1, r5
+ 8001856:	eb63 0301 	sbc.w	r3, r3, r1
+ 800185a:	617b      	str	r3, [r7, #20]
+ 800185c:	f04f 0200 	mov.w	r2, #0
+ 8001860:	f04f 0300 	mov.w	r3, #0
+ 8001864:	e9d7 ab04 	ldrd	sl, fp, [r7, #16]
+ 8001868:	4659      	mov	r1, fp
+ 800186a:	018b      	lsls	r3, r1, #6
+ 800186c:	4651      	mov	r1, sl
+ 800186e:	ea43 6391 	orr.w	r3, r3, r1, lsr #26
+ 8001872:	4651      	mov	r1, sl
+ 8001874:	018a      	lsls	r2, r1, #6
+ 8001876:	4651      	mov	r1, sl
+ 8001878:	ebb2 0801 	subs.w	r8, r2, r1
+ 800187c:	4659      	mov	r1, fp
+ 800187e:	eb63 0901 	sbc.w	r9, r3, r1
+ 8001882:	f04f 0200 	mov.w	r2, #0
+ 8001886:	f04f 0300 	mov.w	r3, #0
+ 800188a:	ea4f 03c9 	mov.w	r3, r9, lsl #3
+ 800188e:	ea43 7358 	orr.w	r3, r3, r8, lsr #29
+ 8001892:	ea4f 02c8 	mov.w	r2, r8, lsl #3
+ 8001896:	4690      	mov	r8, r2
+ 8001898:	4699      	mov	r9, r3
+ 800189a:	4623      	mov	r3, r4
+ 800189c:	eb18 0303 	adds.w	r3, r8, r3
+ 80018a0:	60bb      	str	r3, [r7, #8]
+ 80018a2:	462b      	mov	r3, r5
+ 80018a4:	eb49 0303 	adc.w	r3, r9, r3
+ 80018a8:	60fb      	str	r3, [r7, #12]
+ 80018aa:	f04f 0200 	mov.w	r2, #0
+ 80018ae:	f04f 0300 	mov.w	r3, #0
+ 80018b2:	e9d7 4502 	ldrd	r4, r5, [r7, #8]
+ 80018b6:	4629      	mov	r1, r5
+ 80018b8:	024b      	lsls	r3, r1, #9
+ 80018ba:	4621      	mov	r1, r4
+ 80018bc:	ea43 53d1 	orr.w	r3, r3, r1, lsr #23
+ 80018c0:	4621      	mov	r1, r4
+ 80018c2:	024a      	lsls	r2, r1, #9
+ 80018c4:	4610      	mov	r0, r2
+ 80018c6:	4619      	mov	r1, r3
+ 80018c8:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
+ 80018ca:	2200      	movs	r2, #0
+ 80018cc:	62bb      	str	r3, [r7, #40]	@ 0x28
+ 80018ce:	62fa      	str	r2, [r7, #44]	@ 0x2c
+ 80018d0:	e9d7 230a 	ldrd	r2, r3, [r7, #40]	@ 0x28
+ 80018d4:	f7fe fc8c 	bl	80001f0 <__aeabi_uldivmod>
+ 80018d8:	4602      	mov	r2, r0
+ 80018da:	460b      	mov	r3, r1
+ 80018dc:	4613      	mov	r3, r2
+ 80018de:	64fb      	str	r3, [r7, #76]	@ 0x4c
+ 80018e0:	e058      	b.n	8001994 <HAL_RCC_GetSysClockFreq+0x1d0>
+      }
+      else
+      {
+        /* HSI used as PLL clock source */
+        pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
+ 80018e2:	4b38      	ldr	r3, [pc, #224]	@ (80019c4 <HAL_RCC_GetSysClockFreq+0x200>)
+ 80018e4:	685b      	ldr	r3, [r3, #4]
+ 80018e6:	099b      	lsrs	r3, r3, #6
+ 80018e8:	2200      	movs	r2, #0
+ 80018ea:	4618      	mov	r0, r3
+ 80018ec:	4611      	mov	r1, r2
+ 80018ee:	f3c0 0308 	ubfx	r3, r0, #0, #9
+ 80018f2:	623b      	str	r3, [r7, #32]
+ 80018f4:	2300      	movs	r3, #0
+ 80018f6:	627b      	str	r3, [r7, #36]	@ 0x24
+ 80018f8:	e9d7 8908 	ldrd	r8, r9, [r7, #32]
+ 80018fc:	4642      	mov	r2, r8
+ 80018fe:	464b      	mov	r3, r9
+ 8001900:	f04f 0000 	mov.w	r0, #0
+ 8001904:	f04f 0100 	mov.w	r1, #0
+ 8001908:	0159      	lsls	r1, r3, #5
+ 800190a:	ea41 61d2 	orr.w	r1, r1, r2, lsr #27
+ 800190e:	0150      	lsls	r0, r2, #5
+ 8001910:	4602      	mov	r2, r0
+ 8001912:	460b      	mov	r3, r1
+ 8001914:	4641      	mov	r1, r8
+ 8001916:	ebb2 0a01 	subs.w	sl, r2, r1
+ 800191a:	4649      	mov	r1, r9
+ 800191c:	eb63 0b01 	sbc.w	fp, r3, r1
+ 8001920:	f04f 0200 	mov.w	r2, #0
+ 8001924:	f04f 0300 	mov.w	r3, #0
+ 8001928:	ea4f 138b 	mov.w	r3, fp, lsl #6
+ 800192c:	ea43 639a 	orr.w	r3, r3, sl, lsr #26
+ 8001930:	ea4f 128a 	mov.w	r2, sl, lsl #6
+ 8001934:	ebb2 040a 	subs.w	r4, r2, sl
+ 8001938:	eb63 050b 	sbc.w	r5, r3, fp
+ 800193c:	f04f 0200 	mov.w	r2, #0
+ 8001940:	f04f 0300 	mov.w	r3, #0
+ 8001944:	00eb      	lsls	r3, r5, #3
+ 8001946:	ea43 7354 	orr.w	r3, r3, r4, lsr #29
+ 800194a:	00e2      	lsls	r2, r4, #3
+ 800194c:	4614      	mov	r4, r2
+ 800194e:	461d      	mov	r5, r3
+ 8001950:	4643      	mov	r3, r8
+ 8001952:	18e3      	adds	r3, r4, r3
+ 8001954:	603b      	str	r3, [r7, #0]
+ 8001956:	464b      	mov	r3, r9
+ 8001958:	eb45 0303 	adc.w	r3, r5, r3
+ 800195c:	607b      	str	r3, [r7, #4]
+ 800195e:	f04f 0200 	mov.w	r2, #0
+ 8001962:	f04f 0300 	mov.w	r3, #0
+ 8001966:	e9d7 4500 	ldrd	r4, r5, [r7]
+ 800196a:	4629      	mov	r1, r5
+ 800196c:	028b      	lsls	r3, r1, #10
+ 800196e:	4621      	mov	r1, r4
+ 8001970:	ea43 5391 	orr.w	r3, r3, r1, lsr #22
+ 8001974:	4621      	mov	r1, r4
+ 8001976:	028a      	lsls	r2, r1, #10
+ 8001978:	4610      	mov	r0, r2
+ 800197a:	4619      	mov	r1, r3
+ 800197c:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
+ 800197e:	2200      	movs	r2, #0
+ 8001980:	61bb      	str	r3, [r7, #24]
+ 8001982:	61fa      	str	r2, [r7, #28]
+ 8001984:	e9d7 2306 	ldrd	r2, r3, [r7, #24]
+ 8001988:	f7fe fc32 	bl	80001f0 <__aeabi_uldivmod>
+ 800198c:	4602      	mov	r2, r0
+ 800198e:	460b      	mov	r3, r1
+ 8001990:	4613      	mov	r3, r2
+ 8001992:	64fb      	str	r3, [r7, #76]	@ 0x4c
+      }
+      pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) * 2U);
+ 8001994:	4b0b      	ldr	r3, [pc, #44]	@ (80019c4 <HAL_RCC_GetSysClockFreq+0x200>)
+ 8001996:	685b      	ldr	r3, [r3, #4]
+ 8001998:	0c1b      	lsrs	r3, r3, #16
+ 800199a:	f003 0303 	and.w	r3, r3, #3
+ 800199e:	3301      	adds	r3, #1
+ 80019a0:	005b      	lsls	r3, r3, #1
+ 80019a2:	643b      	str	r3, [r7, #64]	@ 0x40
+
+      sysclockfreq = pllvco / pllp;
+ 80019a4:	6cfa      	ldr	r2, [r7, #76]	@ 0x4c
+ 80019a6:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
+ 80019a8:	fbb2 f3f3 	udiv	r3, r2, r3
+ 80019ac:	64bb      	str	r3, [r7, #72]	@ 0x48
+      break;
+ 80019ae:	e002      	b.n	80019b6 <HAL_RCC_GetSysClockFreq+0x1f2>
+    }
+    default:
+    {
+      sysclockfreq = HSI_VALUE;
+ 80019b0:	4b05      	ldr	r3, [pc, #20]	@ (80019c8 <HAL_RCC_GetSysClockFreq+0x204>)
+ 80019b2:	64bb      	str	r3, [r7, #72]	@ 0x48
+      break;
+ 80019b4:	bf00      	nop
+    }
+  }
+  return sysclockfreq;
+ 80019b6:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
+}
+ 80019b8:	4618      	mov	r0, r3
+ 80019ba:	3750      	adds	r7, #80	@ 0x50
+ 80019bc:	46bd      	mov	sp, r7
+ 80019be:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
+ 80019c2:	bf00      	nop
+ 80019c4:	40023800 	.word	0x40023800
+ 80019c8:	00f42400 	.word	0x00f42400
+ 80019cc:	007a1200 	.word	0x007a1200
+
+080019d0 <HAL_RCC_GetHCLKFreq>:
+  * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency
+  *         and updated within this function
+  * @retval HCLK frequency
+  */
+uint32_t HAL_RCC_GetHCLKFreq(void)
+{
+ 80019d0:	b480      	push	{r7}
+ 80019d2:	af00      	add	r7, sp, #0
+  return SystemCoreClock;
+ 80019d4:	4b03      	ldr	r3, [pc, #12]	@ (80019e4 <HAL_RCC_GetHCLKFreq+0x14>)
+ 80019d6:	681b      	ldr	r3, [r3, #0]
+}
+ 80019d8:	4618      	mov	r0, r3
+ 80019da:	46bd      	mov	sp, r7
+ 80019dc:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80019e0:	4770      	bx	lr
+ 80019e2:	bf00      	nop
+ 80019e4:	20000000 	.word	0x20000000
+
+080019e8 <HAL_RCC_GetPCLK1Freq>:
+  * @note   Each time PCLK1 changes, this function must be called to update the
+  *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
+  * @retval PCLK1 frequency
+  */
+uint32_t HAL_RCC_GetPCLK1Freq(void)
+{
+ 80019e8:	b580      	push	{r7, lr}
+ 80019ea:	af00      	add	r7, sp, #0
+  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
+  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
+ 80019ec:	f7ff fff0 	bl	80019d0 <HAL_RCC_GetHCLKFreq>
+ 80019f0:	4602      	mov	r2, r0
+ 80019f2:	4b05      	ldr	r3, [pc, #20]	@ (8001a08 <HAL_RCC_GetPCLK1Freq+0x20>)
+ 80019f4:	689b      	ldr	r3, [r3, #8]
+ 80019f6:	0a9b      	lsrs	r3, r3, #10
+ 80019f8:	f003 0307 	and.w	r3, r3, #7
+ 80019fc:	4903      	ldr	r1, [pc, #12]	@ (8001a0c <HAL_RCC_GetPCLK1Freq+0x24>)
+ 80019fe:	5ccb      	ldrb	r3, [r1, r3]
+ 8001a00:	fa22 f303 	lsr.w	r3, r2, r3
+}
+ 8001a04:	4618      	mov	r0, r3
+ 8001a06:	bd80      	pop	{r7, pc}
+ 8001a08:	40023800 	.word	0x40023800
+ 8001a0c:	0800245c 	.word	0x0800245c
+
+08001a10 <HAL_RCC_GetClockConfig>:
+  * will be configured.
+  * @param  pFLatency Pointer on the Flash Latency.
+  * @retval None
+  */
+void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
+{
+ 8001a10:	b480      	push	{r7}
+ 8001a12:	b083      	sub	sp, #12
+ 8001a14:	af00      	add	r7, sp, #0
+ 8001a16:	6078      	str	r0, [r7, #4]
+ 8001a18:	6039      	str	r1, [r7, #0]
+  /* Set all possible values for the Clock type parameter --------------------*/
+  RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ 8001a1a:	687b      	ldr	r3, [r7, #4]
+ 8001a1c:	220f      	movs	r2, #15
+ 8001a1e:	601a      	str	r2, [r3, #0]
+
+  /* Get the SYSCLK configuration --------------------------------------------*/
+  RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
+ 8001a20:	4b12      	ldr	r3, [pc, #72]	@ (8001a6c <HAL_RCC_GetClockConfig+0x5c>)
+ 8001a22:	689b      	ldr	r3, [r3, #8]
+ 8001a24:	f003 0203 	and.w	r2, r3, #3
+ 8001a28:	687b      	ldr	r3, [r7, #4]
+ 8001a2a:	605a      	str	r2, [r3, #4]
+
+  /* Get the HCLK configuration ----------------------------------------------*/
+  RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
+ 8001a2c:	4b0f      	ldr	r3, [pc, #60]	@ (8001a6c <HAL_RCC_GetClockConfig+0x5c>)
+ 8001a2e:	689b      	ldr	r3, [r3, #8]
+ 8001a30:	f003 02f0 	and.w	r2, r3, #240	@ 0xf0
+ 8001a34:	687b      	ldr	r3, [r7, #4]
+ 8001a36:	609a      	str	r2, [r3, #8]
+
+  /* Get the APB1 configuration ----------------------------------------------*/
+  RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1);
+ 8001a38:	4b0c      	ldr	r3, [pc, #48]	@ (8001a6c <HAL_RCC_GetClockConfig+0x5c>)
+ 8001a3a:	689b      	ldr	r3, [r3, #8]
+ 8001a3c:	f403 52e0 	and.w	r2, r3, #7168	@ 0x1c00
+ 8001a40:	687b      	ldr	r3, [r7, #4]
+ 8001a42:	60da      	str	r2, [r3, #12]
+
+  /* Get the APB2 configuration ----------------------------------------------*/
+  RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U);
+ 8001a44:	4b09      	ldr	r3, [pc, #36]	@ (8001a6c <HAL_RCC_GetClockConfig+0x5c>)
+ 8001a46:	689b      	ldr	r3, [r3, #8]
+ 8001a48:	08db      	lsrs	r3, r3, #3
+ 8001a4a:	f403 52e0 	and.w	r2, r3, #7168	@ 0x1c00
+ 8001a4e:	687b      	ldr	r3, [r7, #4]
+ 8001a50:	611a      	str	r2, [r3, #16]
+
+  /* Get the Flash Wait State (Latency) configuration ------------------------*/
+  *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
+ 8001a52:	4b07      	ldr	r3, [pc, #28]	@ (8001a70 <HAL_RCC_GetClockConfig+0x60>)
+ 8001a54:	681b      	ldr	r3, [r3, #0]
+ 8001a56:	f003 020f 	and.w	r2, r3, #15
+ 8001a5a:	683b      	ldr	r3, [r7, #0]
+ 8001a5c:	601a      	str	r2, [r3, #0]
+}
+ 8001a5e:	bf00      	nop
+ 8001a60:	370c      	adds	r7, #12
+ 8001a62:	46bd      	mov	sp, r7
+ 8001a64:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001a68:	4770      	bx	lr
+ 8001a6a:	bf00      	nop
+ 8001a6c:	40023800 	.word	0x40023800
+ 8001a70:	40023c00 	.word	0x40023c00
+
+08001a74 <HAL_TIM_Base_Init>:
+  *         Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
+  * @param  htim TIM Base handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
+{
+ 8001a74:	b580      	push	{r7, lr}
+ 8001a76:	b082      	sub	sp, #8
+ 8001a78:	af00      	add	r7, sp, #0
+ 8001a7a:	6078      	str	r0, [r7, #4]
+  /* Check the TIM handle allocation */
+  if (htim == NULL)
+ 8001a7c:	687b      	ldr	r3, [r7, #4]
+ 8001a7e:	2b00      	cmp	r3, #0
+ 8001a80:	d101      	bne.n	8001a86 <HAL_TIM_Base_Init+0x12>
+  {
+    return HAL_ERROR;
+ 8001a82:	2301      	movs	r3, #1
+ 8001a84:	e041      	b.n	8001b0a <HAL_TIM_Base_Init+0x96>
+  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
+  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
+  assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
+  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
+
+  if (htim->State == HAL_TIM_STATE_RESET)
+ 8001a86:	687b      	ldr	r3, [r7, #4]
+ 8001a88:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
+ 8001a8c:	b2db      	uxtb	r3, r3
+ 8001a8e:	2b00      	cmp	r3, #0
+ 8001a90:	d106      	bne.n	8001aa0 <HAL_TIM_Base_Init+0x2c>
+  {
+    /* Allocate lock resource and initialize it */
+    htim->Lock = HAL_UNLOCKED;
+ 8001a92:	687b      	ldr	r3, [r7, #4]
+ 8001a94:	2200      	movs	r2, #0
+ 8001a96:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
+    }
+    /* Init the low level hardware : GPIO, CLOCK, NVIC */
+    htim->Base_MspInitCallback(htim);
+#else
+    /* Init the low level hardware : GPIO, CLOCK, NVIC */
+    HAL_TIM_Base_MspInit(htim);
+ 8001a9a:	6878      	ldr	r0, [r7, #4]
+ 8001a9c:	f7fe ff32 	bl	8000904 <HAL_TIM_Base_MspInit>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+  }
+
+  /* Set the TIM state */
+  htim->State = HAL_TIM_STATE_BUSY;
+ 8001aa0:	687b      	ldr	r3, [r7, #4]
+ 8001aa2:	2202      	movs	r2, #2
+ 8001aa4:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+
+  /* Set the Time Base configuration */
+  TIM_Base_SetConfig(htim->Instance, &htim->Init);
+ 8001aa8:	687b      	ldr	r3, [r7, #4]
+ 8001aaa:	681a      	ldr	r2, [r3, #0]
+ 8001aac:	687b      	ldr	r3, [r7, #4]
+ 8001aae:	3304      	adds	r3, #4
+ 8001ab0:	4619      	mov	r1, r3
+ 8001ab2:	4610      	mov	r0, r2
+ 8001ab4:	f000 f9c0 	bl	8001e38 <TIM_Base_SetConfig>
+
+  /* Initialize the DMA burst operation state */
+  htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
+ 8001ab8:	687b      	ldr	r3, [r7, #4]
+ 8001aba:	2201      	movs	r2, #1
+ 8001abc:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
+
+  /* Initialize the TIM channels state */
+  TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
+ 8001ac0:	687b      	ldr	r3, [r7, #4]
+ 8001ac2:	2201      	movs	r2, #1
+ 8001ac4:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
+ 8001ac8:	687b      	ldr	r3, [r7, #4]
+ 8001aca:	2201      	movs	r2, #1
+ 8001acc:	f883 203f 	strb.w	r2, [r3, #63]	@ 0x3f
+ 8001ad0:	687b      	ldr	r3, [r7, #4]
+ 8001ad2:	2201      	movs	r2, #1
+ 8001ad4:	f883 2040 	strb.w	r2, [r3, #64]	@ 0x40
+ 8001ad8:	687b      	ldr	r3, [r7, #4]
+ 8001ada:	2201      	movs	r2, #1
+ 8001adc:	f883 2041 	strb.w	r2, [r3, #65]	@ 0x41
+  TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
+ 8001ae0:	687b      	ldr	r3, [r7, #4]
+ 8001ae2:	2201      	movs	r2, #1
+ 8001ae4:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
+ 8001ae8:	687b      	ldr	r3, [r7, #4]
+ 8001aea:	2201      	movs	r2, #1
+ 8001aec:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
+ 8001af0:	687b      	ldr	r3, [r7, #4]
+ 8001af2:	2201      	movs	r2, #1
+ 8001af4:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
+ 8001af8:	687b      	ldr	r3, [r7, #4]
+ 8001afa:	2201      	movs	r2, #1
+ 8001afc:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
+
+  /* Initialize the TIM state*/
+  htim->State = HAL_TIM_STATE_READY;
+ 8001b00:	687b      	ldr	r3, [r7, #4]
+ 8001b02:	2201      	movs	r2, #1
+ 8001b04:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+
+  return HAL_OK;
+ 8001b08:	2300      	movs	r3, #0
+}
+ 8001b0a:	4618      	mov	r0, r3
+ 8001b0c:	3708      	adds	r7, #8
+ 8001b0e:	46bd      	mov	sp, r7
+ 8001b10:	bd80      	pop	{r7, pc}
+	...
+
+08001b14 <HAL_TIM_Base_Start_IT>:
+  * @brief  Starts the TIM Base generation in interrupt mode.
+  * @param  htim TIM Base handle
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
+{
+ 8001b14:	b480      	push	{r7}
+ 8001b16:	b085      	sub	sp, #20
+ 8001b18:	af00      	add	r7, sp, #0
+ 8001b1a:	6078      	str	r0, [r7, #4]
+
+  /* Check the parameters */
+  assert_param(IS_TIM_INSTANCE(htim->Instance));
+
+  /* Check the TIM state */
+  if (htim->State != HAL_TIM_STATE_READY)
+ 8001b1c:	687b      	ldr	r3, [r7, #4]
+ 8001b1e:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
+ 8001b22:	b2db      	uxtb	r3, r3
+ 8001b24:	2b01      	cmp	r3, #1
+ 8001b26:	d001      	beq.n	8001b2c <HAL_TIM_Base_Start_IT+0x18>
+  {
+    return HAL_ERROR;
+ 8001b28:	2301      	movs	r3, #1
+ 8001b2a:	e04e      	b.n	8001bca <HAL_TIM_Base_Start_IT+0xb6>
+  }
+
+  /* Set the TIM state */
+  htim->State = HAL_TIM_STATE_BUSY;
+ 8001b2c:	687b      	ldr	r3, [r7, #4]
+ 8001b2e:	2202      	movs	r2, #2
+ 8001b30:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d
+
+  /* Enable the TIM Update interrupt */
+  __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
+ 8001b34:	687b      	ldr	r3, [r7, #4]
+ 8001b36:	681b      	ldr	r3, [r3, #0]
+ 8001b38:	68da      	ldr	r2, [r3, #12]
+ 8001b3a:	687b      	ldr	r3, [r7, #4]
+ 8001b3c:	681b      	ldr	r3, [r3, #0]
+ 8001b3e:	f042 0201 	orr.w	r2, r2, #1
+ 8001b42:	60da      	str	r2, [r3, #12]
+
+  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
+  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
+ 8001b44:	687b      	ldr	r3, [r7, #4]
+ 8001b46:	681b      	ldr	r3, [r3, #0]
+ 8001b48:	4a23      	ldr	r2, [pc, #140]	@ (8001bd8 <HAL_TIM_Base_Start_IT+0xc4>)
+ 8001b4a:	4293      	cmp	r3, r2
+ 8001b4c:	d022      	beq.n	8001b94 <HAL_TIM_Base_Start_IT+0x80>
+ 8001b4e:	687b      	ldr	r3, [r7, #4]
+ 8001b50:	681b      	ldr	r3, [r3, #0]
+ 8001b52:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
+ 8001b56:	d01d      	beq.n	8001b94 <HAL_TIM_Base_Start_IT+0x80>
+ 8001b58:	687b      	ldr	r3, [r7, #4]
+ 8001b5a:	681b      	ldr	r3, [r3, #0]
+ 8001b5c:	4a1f      	ldr	r2, [pc, #124]	@ (8001bdc <HAL_TIM_Base_Start_IT+0xc8>)
+ 8001b5e:	4293      	cmp	r3, r2
+ 8001b60:	d018      	beq.n	8001b94 <HAL_TIM_Base_Start_IT+0x80>
+ 8001b62:	687b      	ldr	r3, [r7, #4]
+ 8001b64:	681b      	ldr	r3, [r3, #0]
+ 8001b66:	4a1e      	ldr	r2, [pc, #120]	@ (8001be0 <HAL_TIM_Base_Start_IT+0xcc>)
+ 8001b68:	4293      	cmp	r3, r2
+ 8001b6a:	d013      	beq.n	8001b94 <HAL_TIM_Base_Start_IT+0x80>
+ 8001b6c:	687b      	ldr	r3, [r7, #4]
+ 8001b6e:	681b      	ldr	r3, [r3, #0]
+ 8001b70:	4a1c      	ldr	r2, [pc, #112]	@ (8001be4 <HAL_TIM_Base_Start_IT+0xd0>)
+ 8001b72:	4293      	cmp	r3, r2
+ 8001b74:	d00e      	beq.n	8001b94 <HAL_TIM_Base_Start_IT+0x80>
+ 8001b76:	687b      	ldr	r3, [r7, #4]
+ 8001b78:	681b      	ldr	r3, [r3, #0]
+ 8001b7a:	4a1b      	ldr	r2, [pc, #108]	@ (8001be8 <HAL_TIM_Base_Start_IT+0xd4>)
+ 8001b7c:	4293      	cmp	r3, r2
+ 8001b7e:	d009      	beq.n	8001b94 <HAL_TIM_Base_Start_IT+0x80>
+ 8001b80:	687b      	ldr	r3, [r7, #4]
+ 8001b82:	681b      	ldr	r3, [r3, #0]
+ 8001b84:	4a19      	ldr	r2, [pc, #100]	@ (8001bec <HAL_TIM_Base_Start_IT+0xd8>)
+ 8001b86:	4293      	cmp	r3, r2
+ 8001b88:	d004      	beq.n	8001b94 <HAL_TIM_Base_Start_IT+0x80>
+ 8001b8a:	687b      	ldr	r3, [r7, #4]
+ 8001b8c:	681b      	ldr	r3, [r3, #0]
+ 8001b8e:	4a18      	ldr	r2, [pc, #96]	@ (8001bf0 <HAL_TIM_Base_Start_IT+0xdc>)
+ 8001b90:	4293      	cmp	r3, r2
+ 8001b92:	d111      	bne.n	8001bb8 <HAL_TIM_Base_Start_IT+0xa4>
+  {
+    tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
+ 8001b94:	687b      	ldr	r3, [r7, #4]
+ 8001b96:	681b      	ldr	r3, [r3, #0]
+ 8001b98:	689b      	ldr	r3, [r3, #8]
+ 8001b9a:	f003 0307 	and.w	r3, r3, #7
+ 8001b9e:	60fb      	str	r3, [r7, #12]
+    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ 8001ba0:	68fb      	ldr	r3, [r7, #12]
+ 8001ba2:	2b06      	cmp	r3, #6
+ 8001ba4:	d010      	beq.n	8001bc8 <HAL_TIM_Base_Start_IT+0xb4>
+    {
+      __HAL_TIM_ENABLE(htim);
+ 8001ba6:	687b      	ldr	r3, [r7, #4]
+ 8001ba8:	681b      	ldr	r3, [r3, #0]
+ 8001baa:	681a      	ldr	r2, [r3, #0]
+ 8001bac:	687b      	ldr	r3, [r7, #4]
+ 8001bae:	681b      	ldr	r3, [r3, #0]
+ 8001bb0:	f042 0201 	orr.w	r2, r2, #1
+ 8001bb4:	601a      	str	r2, [r3, #0]
+    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
+ 8001bb6:	e007      	b.n	8001bc8 <HAL_TIM_Base_Start_IT+0xb4>
+    }
+  }
+  else
+  {
+    __HAL_TIM_ENABLE(htim);
+ 8001bb8:	687b      	ldr	r3, [r7, #4]
+ 8001bba:	681b      	ldr	r3, [r3, #0]
+ 8001bbc:	681a      	ldr	r2, [r3, #0]
+ 8001bbe:	687b      	ldr	r3, [r7, #4]
+ 8001bc0:	681b      	ldr	r3, [r3, #0]
+ 8001bc2:	f042 0201 	orr.w	r2, r2, #1
+ 8001bc6:	601a      	str	r2, [r3, #0]
+  }
+
+  /* Return function status */
+  return HAL_OK;
+ 8001bc8:	2300      	movs	r3, #0
+}
+ 8001bca:	4618      	mov	r0, r3
+ 8001bcc:	3714      	adds	r7, #20
+ 8001bce:	46bd      	mov	sp, r7
+ 8001bd0:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001bd4:	4770      	bx	lr
+ 8001bd6:	bf00      	nop
+ 8001bd8:	40010000 	.word	0x40010000
+ 8001bdc:	40000400 	.word	0x40000400
+ 8001be0:	40000800 	.word	0x40000800
+ 8001be4:	40000c00 	.word	0x40000c00
+ 8001be8:	40010400 	.word	0x40010400
+ 8001bec:	40014000 	.word	0x40014000
+ 8001bf0:	40001800 	.word	0x40001800
+
+08001bf4 <HAL_TIM_IRQHandler>:
+  * @brief  This function handles TIM interrupts requests.
+  * @param  htim TIM  handle
+  * @retval None
+  */
+void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
+{
+ 8001bf4:	b580      	push	{r7, lr}
+ 8001bf6:	b084      	sub	sp, #16
+ 8001bf8:	af00      	add	r7, sp, #0
+ 8001bfa:	6078      	str	r0, [r7, #4]
+  uint32_t itsource = htim->Instance->DIER;
+ 8001bfc:	687b      	ldr	r3, [r7, #4]
+ 8001bfe:	681b      	ldr	r3, [r3, #0]
+ 8001c00:	68db      	ldr	r3, [r3, #12]
+ 8001c02:	60fb      	str	r3, [r7, #12]
+  uint32_t itflag   = htim->Instance->SR;
+ 8001c04:	687b      	ldr	r3, [r7, #4]
+ 8001c06:	681b      	ldr	r3, [r3, #0]
+ 8001c08:	691b      	ldr	r3, [r3, #16]
+ 8001c0a:	60bb      	str	r3, [r7, #8]
+
+  /* Capture compare 1 event */
+  if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1))
+ 8001c0c:	68bb      	ldr	r3, [r7, #8]
+ 8001c0e:	f003 0302 	and.w	r3, r3, #2
+ 8001c12:	2b00      	cmp	r3, #0
+ 8001c14:	d020      	beq.n	8001c58 <HAL_TIM_IRQHandler+0x64>
+  {
+    if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1))
+ 8001c16:	68fb      	ldr	r3, [r7, #12]
+ 8001c18:	f003 0302 	and.w	r3, r3, #2
+ 8001c1c:	2b00      	cmp	r3, #0
+ 8001c1e:	d01b      	beq.n	8001c58 <HAL_TIM_IRQHandler+0x64>
+    {
+      {
+        __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1);
+ 8001c20:	687b      	ldr	r3, [r7, #4]
+ 8001c22:	681b      	ldr	r3, [r3, #0]
+ 8001c24:	f06f 0202 	mvn.w	r2, #2
+ 8001c28:	611a      	str	r2, [r3, #16]
+        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
+ 8001c2a:	687b      	ldr	r3, [r7, #4]
+ 8001c2c:	2201      	movs	r2, #1
+ 8001c2e:	771a      	strb	r2, [r3, #28]
+
+        /* Input capture event */
+        if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
+ 8001c30:	687b      	ldr	r3, [r7, #4]
+ 8001c32:	681b      	ldr	r3, [r3, #0]
+ 8001c34:	699b      	ldr	r3, [r3, #24]
+ 8001c36:	f003 0303 	and.w	r3, r3, #3
+ 8001c3a:	2b00      	cmp	r3, #0
+ 8001c3c:	d003      	beq.n	8001c46 <HAL_TIM_IRQHandler+0x52>
+        {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+          htim->IC_CaptureCallback(htim);
+#else
+          HAL_TIM_IC_CaptureCallback(htim);
+ 8001c3e:	6878      	ldr	r0, [r7, #4]
+ 8001c40:	f000 f8dc 	bl	8001dfc <HAL_TIM_IC_CaptureCallback>
+ 8001c44:	e005      	b.n	8001c52 <HAL_TIM_IRQHandler+0x5e>
+        {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+          htim->OC_DelayElapsedCallback(htim);
+          htim->PWM_PulseFinishedCallback(htim);
+#else
+          HAL_TIM_OC_DelayElapsedCallback(htim);
+ 8001c46:	6878      	ldr	r0, [r7, #4]
+ 8001c48:	f000 f8ce 	bl	8001de8 <HAL_TIM_OC_DelayElapsedCallback>
+          HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 8001c4c:	6878      	ldr	r0, [r7, #4]
+ 8001c4e:	f000 f8df 	bl	8001e10 <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+        }
+        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 8001c52:	687b      	ldr	r3, [r7, #4]
+ 8001c54:	2200      	movs	r2, #0
+ 8001c56:	771a      	strb	r2, [r3, #28]
+      }
+    }
+  }
+  /* Capture compare 2 event */
+  if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2))
+ 8001c58:	68bb      	ldr	r3, [r7, #8]
+ 8001c5a:	f003 0304 	and.w	r3, r3, #4
+ 8001c5e:	2b00      	cmp	r3, #0
+ 8001c60:	d020      	beq.n	8001ca4 <HAL_TIM_IRQHandler+0xb0>
+  {
+    if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2))
+ 8001c62:	68fb      	ldr	r3, [r7, #12]
+ 8001c64:	f003 0304 	and.w	r3, r3, #4
+ 8001c68:	2b00      	cmp	r3, #0
+ 8001c6a:	d01b      	beq.n	8001ca4 <HAL_TIM_IRQHandler+0xb0>
+    {
+      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2);
+ 8001c6c:	687b      	ldr	r3, [r7, #4]
+ 8001c6e:	681b      	ldr	r3, [r3, #0]
+ 8001c70:	f06f 0204 	mvn.w	r2, #4
+ 8001c74:	611a      	str	r2, [r3, #16]
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
+ 8001c76:	687b      	ldr	r3, [r7, #4]
+ 8001c78:	2202      	movs	r2, #2
+ 8001c7a:	771a      	strb	r2, [r3, #28]
+      /* Input capture event */
+      if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
+ 8001c7c:	687b      	ldr	r3, [r7, #4]
+ 8001c7e:	681b      	ldr	r3, [r3, #0]
+ 8001c80:	699b      	ldr	r3, [r3, #24]
+ 8001c82:	f403 7340 	and.w	r3, r3, #768	@ 0x300
+ 8001c86:	2b00      	cmp	r3, #0
+ 8001c88:	d003      	beq.n	8001c92 <HAL_TIM_IRQHandler+0x9e>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->IC_CaptureCallback(htim);
+#else
+        HAL_TIM_IC_CaptureCallback(htim);
+ 8001c8a:	6878      	ldr	r0, [r7, #4]
+ 8001c8c:	f000 f8b6 	bl	8001dfc <HAL_TIM_IC_CaptureCallback>
+ 8001c90:	e005      	b.n	8001c9e <HAL_TIM_IRQHandler+0xaa>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->OC_DelayElapsedCallback(htim);
+        htim->PWM_PulseFinishedCallback(htim);
+#else
+        HAL_TIM_OC_DelayElapsedCallback(htim);
+ 8001c92:	6878      	ldr	r0, [r7, #4]
+ 8001c94:	f000 f8a8 	bl	8001de8 <HAL_TIM_OC_DelayElapsedCallback>
+        HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 8001c98:	6878      	ldr	r0, [r7, #4]
+ 8001c9a:	f000 f8b9 	bl	8001e10 <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+      }
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 8001c9e:	687b      	ldr	r3, [r7, #4]
+ 8001ca0:	2200      	movs	r2, #0
+ 8001ca2:	771a      	strb	r2, [r3, #28]
+    }
+  }
+  /* Capture compare 3 event */
+  if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3))
+ 8001ca4:	68bb      	ldr	r3, [r7, #8]
+ 8001ca6:	f003 0308 	and.w	r3, r3, #8
+ 8001caa:	2b00      	cmp	r3, #0
+ 8001cac:	d020      	beq.n	8001cf0 <HAL_TIM_IRQHandler+0xfc>
+  {
+    if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3))
+ 8001cae:	68fb      	ldr	r3, [r7, #12]
+ 8001cb0:	f003 0308 	and.w	r3, r3, #8
+ 8001cb4:	2b00      	cmp	r3, #0
+ 8001cb6:	d01b      	beq.n	8001cf0 <HAL_TIM_IRQHandler+0xfc>
+    {
+      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3);
+ 8001cb8:	687b      	ldr	r3, [r7, #4]
+ 8001cba:	681b      	ldr	r3, [r3, #0]
+ 8001cbc:	f06f 0208 	mvn.w	r2, #8
+ 8001cc0:	611a      	str	r2, [r3, #16]
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
+ 8001cc2:	687b      	ldr	r3, [r7, #4]
+ 8001cc4:	2204      	movs	r2, #4
+ 8001cc6:	771a      	strb	r2, [r3, #28]
+      /* Input capture event */
+      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
+ 8001cc8:	687b      	ldr	r3, [r7, #4]
+ 8001cca:	681b      	ldr	r3, [r3, #0]
+ 8001ccc:	69db      	ldr	r3, [r3, #28]
+ 8001cce:	f003 0303 	and.w	r3, r3, #3
+ 8001cd2:	2b00      	cmp	r3, #0
+ 8001cd4:	d003      	beq.n	8001cde <HAL_TIM_IRQHandler+0xea>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->IC_CaptureCallback(htim);
+#else
+        HAL_TIM_IC_CaptureCallback(htim);
+ 8001cd6:	6878      	ldr	r0, [r7, #4]
+ 8001cd8:	f000 f890 	bl	8001dfc <HAL_TIM_IC_CaptureCallback>
+ 8001cdc:	e005      	b.n	8001cea <HAL_TIM_IRQHandler+0xf6>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->OC_DelayElapsedCallback(htim);
+        htim->PWM_PulseFinishedCallback(htim);
+#else
+        HAL_TIM_OC_DelayElapsedCallback(htim);
+ 8001cde:	6878      	ldr	r0, [r7, #4]
+ 8001ce0:	f000 f882 	bl	8001de8 <HAL_TIM_OC_DelayElapsedCallback>
+        HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 8001ce4:	6878      	ldr	r0, [r7, #4]
+ 8001ce6:	f000 f893 	bl	8001e10 <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+      }
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 8001cea:	687b      	ldr	r3, [r7, #4]
+ 8001cec:	2200      	movs	r2, #0
+ 8001cee:	771a      	strb	r2, [r3, #28]
+    }
+  }
+  /* Capture compare 4 event */
+  if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4))
+ 8001cf0:	68bb      	ldr	r3, [r7, #8]
+ 8001cf2:	f003 0310 	and.w	r3, r3, #16
+ 8001cf6:	2b00      	cmp	r3, #0
+ 8001cf8:	d020      	beq.n	8001d3c <HAL_TIM_IRQHandler+0x148>
+  {
+    if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4))
+ 8001cfa:	68fb      	ldr	r3, [r7, #12]
+ 8001cfc:	f003 0310 	and.w	r3, r3, #16
+ 8001d00:	2b00      	cmp	r3, #0
+ 8001d02:	d01b      	beq.n	8001d3c <HAL_TIM_IRQHandler+0x148>
+    {
+      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4);
+ 8001d04:	687b      	ldr	r3, [r7, #4]
+ 8001d06:	681b      	ldr	r3, [r3, #0]
+ 8001d08:	f06f 0210 	mvn.w	r2, #16
+ 8001d0c:	611a      	str	r2, [r3, #16]
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
+ 8001d0e:	687b      	ldr	r3, [r7, #4]
+ 8001d10:	2208      	movs	r2, #8
+ 8001d12:	771a      	strb	r2, [r3, #28]
+      /* Input capture event */
+      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
+ 8001d14:	687b      	ldr	r3, [r7, #4]
+ 8001d16:	681b      	ldr	r3, [r3, #0]
+ 8001d18:	69db      	ldr	r3, [r3, #28]
+ 8001d1a:	f403 7340 	and.w	r3, r3, #768	@ 0x300
+ 8001d1e:	2b00      	cmp	r3, #0
+ 8001d20:	d003      	beq.n	8001d2a <HAL_TIM_IRQHandler+0x136>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->IC_CaptureCallback(htim);
+#else
+        HAL_TIM_IC_CaptureCallback(htim);
+ 8001d22:	6878      	ldr	r0, [r7, #4]
+ 8001d24:	f000 f86a 	bl	8001dfc <HAL_TIM_IC_CaptureCallback>
+ 8001d28:	e005      	b.n	8001d36 <HAL_TIM_IRQHandler+0x142>
+      {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+        htim->OC_DelayElapsedCallback(htim);
+        htim->PWM_PulseFinishedCallback(htim);
+#else
+        HAL_TIM_OC_DelayElapsedCallback(htim);
+ 8001d2a:	6878      	ldr	r0, [r7, #4]
+ 8001d2c:	f000 f85c 	bl	8001de8 <HAL_TIM_OC_DelayElapsedCallback>
+        HAL_TIM_PWM_PulseFinishedCallback(htim);
+ 8001d30:	6878      	ldr	r0, [r7, #4]
+ 8001d32:	f000 f86d 	bl	8001e10 <HAL_TIM_PWM_PulseFinishedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+      }
+      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
+ 8001d36:	687b      	ldr	r3, [r7, #4]
+ 8001d38:	2200      	movs	r2, #0
+ 8001d3a:	771a      	strb	r2, [r3, #28]
+    }
+  }
+  /* TIM Update event */
+  if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE))
+ 8001d3c:	68bb      	ldr	r3, [r7, #8]
+ 8001d3e:	f003 0301 	and.w	r3, r3, #1
+ 8001d42:	2b00      	cmp	r3, #0
+ 8001d44:	d00c      	beq.n	8001d60 <HAL_TIM_IRQHandler+0x16c>
+  {
+    if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE))
+ 8001d46:	68fb      	ldr	r3, [r7, #12]
+ 8001d48:	f003 0301 	and.w	r3, r3, #1
+ 8001d4c:	2b00      	cmp	r3, #0
+ 8001d4e:	d007      	beq.n	8001d60 <HAL_TIM_IRQHandler+0x16c>
+    {
+      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
+ 8001d50:	687b      	ldr	r3, [r7, #4]
+ 8001d52:	681b      	ldr	r3, [r3, #0]
+ 8001d54:	f06f 0201 	mvn.w	r2, #1
+ 8001d58:	611a      	str	r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+      htim->PeriodElapsedCallback(htim);
+#else
+      HAL_TIM_PeriodElapsedCallback(htim);
+ 8001d5a:	6878      	ldr	r0, [r7, #4]
+ 8001d5c:	f000 f83a 	bl	8001dd4 <HAL_TIM_PeriodElapsedCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+    }
+  }
+  /* TIM Break input event */
+  if ((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK))
+ 8001d60:	68bb      	ldr	r3, [r7, #8]
+ 8001d62:	f003 0380 	and.w	r3, r3, #128	@ 0x80
+ 8001d66:	2b00      	cmp	r3, #0
+ 8001d68:	d00c      	beq.n	8001d84 <HAL_TIM_IRQHandler+0x190>
+  {
+    if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
+ 8001d6a:	68fb      	ldr	r3, [r7, #12]
+ 8001d6c:	f003 0380 	and.w	r3, r3, #128	@ 0x80
+ 8001d70:	2b00      	cmp	r3, #0
+ 8001d72:	d007      	beq.n	8001d84 <HAL_TIM_IRQHandler+0x190>
+    {
+      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK);
+ 8001d74:	687b      	ldr	r3, [r7, #4]
+ 8001d76:	681b      	ldr	r3, [r3, #0]
+ 8001d78:	f06f 0280 	mvn.w	r2, #128	@ 0x80
+ 8001d7c:	611a      	str	r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+      htim->BreakCallback(htim);
+#else
+      HAL_TIMEx_BreakCallback(htim);
+ 8001d7e:	6878      	ldr	r0, [r7, #4]
+ 8001d80:	f000 f90a 	bl	8001f98 <HAL_TIMEx_BreakCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+    }
+  }
+  /* TIM Trigger detection event */
+  if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER))
+ 8001d84:	68bb      	ldr	r3, [r7, #8]
+ 8001d86:	f003 0340 	and.w	r3, r3, #64	@ 0x40
+ 8001d8a:	2b00      	cmp	r3, #0
+ 8001d8c:	d00c      	beq.n	8001da8 <HAL_TIM_IRQHandler+0x1b4>
+  {
+    if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER))
+ 8001d8e:	68fb      	ldr	r3, [r7, #12]
+ 8001d90:	f003 0340 	and.w	r3, r3, #64	@ 0x40
+ 8001d94:	2b00      	cmp	r3, #0
+ 8001d96:	d007      	beq.n	8001da8 <HAL_TIM_IRQHandler+0x1b4>
+    {
+      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER);
+ 8001d98:	687b      	ldr	r3, [r7, #4]
+ 8001d9a:	681b      	ldr	r3, [r3, #0]
+ 8001d9c:	f06f 0240 	mvn.w	r2, #64	@ 0x40
+ 8001da0:	611a      	str	r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+      htim->TriggerCallback(htim);
+#else
+      HAL_TIM_TriggerCallback(htim);
+ 8001da2:	6878      	ldr	r0, [r7, #4]
+ 8001da4:	f000 f83e 	bl	8001e24 <HAL_TIM_TriggerCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+    }
+  }
+  /* TIM commutation event */
+  if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM))
+ 8001da8:	68bb      	ldr	r3, [r7, #8]
+ 8001daa:	f003 0320 	and.w	r3, r3, #32
+ 8001dae:	2b00      	cmp	r3, #0
+ 8001db0:	d00c      	beq.n	8001dcc <HAL_TIM_IRQHandler+0x1d8>
+  {
+    if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM))
+ 8001db2:	68fb      	ldr	r3, [r7, #12]
+ 8001db4:	f003 0320 	and.w	r3, r3, #32
+ 8001db8:	2b00      	cmp	r3, #0
+ 8001dba:	d007      	beq.n	8001dcc <HAL_TIM_IRQHandler+0x1d8>
+    {
+      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM);
+ 8001dbc:	687b      	ldr	r3, [r7, #4]
+ 8001dbe:	681b      	ldr	r3, [r3, #0]
+ 8001dc0:	f06f 0220 	mvn.w	r2, #32
+ 8001dc4:	611a      	str	r2, [r3, #16]
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
+      htim->CommutationCallback(htim);
+#else
+      HAL_TIMEx_CommutCallback(htim);
+ 8001dc6:	6878      	ldr	r0, [r7, #4]
+ 8001dc8:	f000 f8dc 	bl	8001f84 <HAL_TIMEx_CommutCallback>
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+    }
+  }
+}
+ 8001dcc:	bf00      	nop
+ 8001dce:	3710      	adds	r7, #16
+ 8001dd0:	46bd      	mov	sp, r7
+ 8001dd2:	bd80      	pop	{r7, pc}
+
+08001dd4 <HAL_TIM_PeriodElapsedCallback>:
+  * @brief  Period elapsed callback in non-blocking mode
+  * @param  htim TIM handle
+  * @retval None
+  */
+__weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ 8001dd4:	b480      	push	{r7}
+ 8001dd6:	b083      	sub	sp, #12
+ 8001dd8:	af00      	add	r7, sp, #0
+ 8001dda:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIM_PeriodElapsedCallback could be implemented in the user file
+   */
+}
+ 8001ddc:	bf00      	nop
+ 8001dde:	370c      	adds	r7, #12
+ 8001de0:	46bd      	mov	sp, r7
+ 8001de2:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001de6:	4770      	bx	lr
+
+08001de8 <HAL_TIM_OC_DelayElapsedCallback>:
+  * @brief  Output Compare callback in non-blocking mode
+  * @param  htim TIM OC handle
+  * @retval None
+  */
+__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
+{
+ 8001de8:	b480      	push	{r7}
+ 8001dea:	b083      	sub	sp, #12
+ 8001dec:	af00      	add	r7, sp, #0
+ 8001dee:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
+   */
+}
+ 8001df0:	bf00      	nop
+ 8001df2:	370c      	adds	r7, #12
+ 8001df4:	46bd      	mov	sp, r7
+ 8001df6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001dfa:	4770      	bx	lr
+
+08001dfc <HAL_TIM_IC_CaptureCallback>:
+  * @brief  Input Capture callback in non-blocking mode
+  * @param  htim TIM IC handle
+  * @retval None
+  */
+__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
+{
+ 8001dfc:	b480      	push	{r7}
+ 8001dfe:	b083      	sub	sp, #12
+ 8001e00:	af00      	add	r7, sp, #0
+ 8001e02:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIM_IC_CaptureCallback could be implemented in the user file
+   */
+}
+ 8001e04:	bf00      	nop
+ 8001e06:	370c      	adds	r7, #12
+ 8001e08:	46bd      	mov	sp, r7
+ 8001e0a:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001e0e:	4770      	bx	lr
+
+08001e10 <HAL_TIM_PWM_PulseFinishedCallback>:
+  * @brief  PWM Pulse finished callback in non-blocking mode
+  * @param  htim TIM handle
+  * @retval None
+  */
+__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
+{
+ 8001e10:	b480      	push	{r7}
+ 8001e12:	b083      	sub	sp, #12
+ 8001e14:	af00      	add	r7, sp, #0
+ 8001e16:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
+   */
+}
+ 8001e18:	bf00      	nop
+ 8001e1a:	370c      	adds	r7, #12
+ 8001e1c:	46bd      	mov	sp, r7
+ 8001e1e:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001e22:	4770      	bx	lr
+
+08001e24 <HAL_TIM_TriggerCallback>:
+  * @brief  Hall Trigger detection callback in non-blocking mode
+  * @param  htim TIM handle
+  * @retval None
+  */
+__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
+{
+ 8001e24:	b480      	push	{r7}
+ 8001e26:	b083      	sub	sp, #12
+ 8001e28:	af00      	add	r7, sp, #0
+ 8001e2a:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIM_TriggerCallback could be implemented in the user file
+   */
+}
+ 8001e2c:	bf00      	nop
+ 8001e2e:	370c      	adds	r7, #12
+ 8001e30:	46bd      	mov	sp, r7
+ 8001e32:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001e36:	4770      	bx	lr
+
+08001e38 <TIM_Base_SetConfig>:
+  * @param  TIMx TIM peripheral
+  * @param  Structure TIM Base configuration structure
+  * @retval None
+  */
+void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
+{
+ 8001e38:	b480      	push	{r7}
+ 8001e3a:	b085      	sub	sp, #20
+ 8001e3c:	af00      	add	r7, sp, #0
+ 8001e3e:	6078      	str	r0, [r7, #4]
+ 8001e40:	6039      	str	r1, [r7, #0]
+  uint32_t tmpcr1;
+  tmpcr1 = TIMx->CR1;
+ 8001e42:	687b      	ldr	r3, [r7, #4]
+ 8001e44:	681b      	ldr	r3, [r3, #0]
+ 8001e46:	60fb      	str	r3, [r7, #12]
+
+  /* Set TIM Time Base Unit parameters ---------------------------------------*/
+  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
+ 8001e48:	687b      	ldr	r3, [r7, #4]
+ 8001e4a:	4a43      	ldr	r2, [pc, #268]	@ (8001f58 <TIM_Base_SetConfig+0x120>)
+ 8001e4c:	4293      	cmp	r3, r2
+ 8001e4e:	d013      	beq.n	8001e78 <TIM_Base_SetConfig+0x40>
+ 8001e50:	687b      	ldr	r3, [r7, #4]
+ 8001e52:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
+ 8001e56:	d00f      	beq.n	8001e78 <TIM_Base_SetConfig+0x40>
+ 8001e58:	687b      	ldr	r3, [r7, #4]
+ 8001e5a:	4a40      	ldr	r2, [pc, #256]	@ (8001f5c <TIM_Base_SetConfig+0x124>)
+ 8001e5c:	4293      	cmp	r3, r2
+ 8001e5e:	d00b      	beq.n	8001e78 <TIM_Base_SetConfig+0x40>
+ 8001e60:	687b      	ldr	r3, [r7, #4]
+ 8001e62:	4a3f      	ldr	r2, [pc, #252]	@ (8001f60 <TIM_Base_SetConfig+0x128>)
+ 8001e64:	4293      	cmp	r3, r2
+ 8001e66:	d007      	beq.n	8001e78 <TIM_Base_SetConfig+0x40>
+ 8001e68:	687b      	ldr	r3, [r7, #4]
+ 8001e6a:	4a3e      	ldr	r2, [pc, #248]	@ (8001f64 <TIM_Base_SetConfig+0x12c>)
+ 8001e6c:	4293      	cmp	r3, r2
+ 8001e6e:	d003      	beq.n	8001e78 <TIM_Base_SetConfig+0x40>
+ 8001e70:	687b      	ldr	r3, [r7, #4]
+ 8001e72:	4a3d      	ldr	r2, [pc, #244]	@ (8001f68 <TIM_Base_SetConfig+0x130>)
+ 8001e74:	4293      	cmp	r3, r2
+ 8001e76:	d108      	bne.n	8001e8a <TIM_Base_SetConfig+0x52>
+  {
+    /* Select the Counter Mode */
+    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
+ 8001e78:	68fb      	ldr	r3, [r7, #12]
+ 8001e7a:	f023 0370 	bic.w	r3, r3, #112	@ 0x70
+ 8001e7e:	60fb      	str	r3, [r7, #12]
+    tmpcr1 |= Structure->CounterMode;
+ 8001e80:	683b      	ldr	r3, [r7, #0]
+ 8001e82:	685b      	ldr	r3, [r3, #4]
+ 8001e84:	68fa      	ldr	r2, [r7, #12]
+ 8001e86:	4313      	orrs	r3, r2
+ 8001e88:	60fb      	str	r3, [r7, #12]
+  }
+
+  if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
+ 8001e8a:	687b      	ldr	r3, [r7, #4]
+ 8001e8c:	4a32      	ldr	r2, [pc, #200]	@ (8001f58 <TIM_Base_SetConfig+0x120>)
+ 8001e8e:	4293      	cmp	r3, r2
+ 8001e90:	d02b      	beq.n	8001eea <TIM_Base_SetConfig+0xb2>
+ 8001e92:	687b      	ldr	r3, [r7, #4]
+ 8001e94:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
+ 8001e98:	d027      	beq.n	8001eea <TIM_Base_SetConfig+0xb2>
+ 8001e9a:	687b      	ldr	r3, [r7, #4]
+ 8001e9c:	4a2f      	ldr	r2, [pc, #188]	@ (8001f5c <TIM_Base_SetConfig+0x124>)
+ 8001e9e:	4293      	cmp	r3, r2
+ 8001ea0:	d023      	beq.n	8001eea <TIM_Base_SetConfig+0xb2>
+ 8001ea2:	687b      	ldr	r3, [r7, #4]
+ 8001ea4:	4a2e      	ldr	r2, [pc, #184]	@ (8001f60 <TIM_Base_SetConfig+0x128>)
+ 8001ea6:	4293      	cmp	r3, r2
+ 8001ea8:	d01f      	beq.n	8001eea <TIM_Base_SetConfig+0xb2>
+ 8001eaa:	687b      	ldr	r3, [r7, #4]
+ 8001eac:	4a2d      	ldr	r2, [pc, #180]	@ (8001f64 <TIM_Base_SetConfig+0x12c>)
+ 8001eae:	4293      	cmp	r3, r2
+ 8001eb0:	d01b      	beq.n	8001eea <TIM_Base_SetConfig+0xb2>
+ 8001eb2:	687b      	ldr	r3, [r7, #4]
+ 8001eb4:	4a2c      	ldr	r2, [pc, #176]	@ (8001f68 <TIM_Base_SetConfig+0x130>)
+ 8001eb6:	4293      	cmp	r3, r2
+ 8001eb8:	d017      	beq.n	8001eea <TIM_Base_SetConfig+0xb2>
+ 8001eba:	687b      	ldr	r3, [r7, #4]
+ 8001ebc:	4a2b      	ldr	r2, [pc, #172]	@ (8001f6c <TIM_Base_SetConfig+0x134>)
+ 8001ebe:	4293      	cmp	r3, r2
+ 8001ec0:	d013      	beq.n	8001eea <TIM_Base_SetConfig+0xb2>
+ 8001ec2:	687b      	ldr	r3, [r7, #4]
+ 8001ec4:	4a2a      	ldr	r2, [pc, #168]	@ (8001f70 <TIM_Base_SetConfig+0x138>)
+ 8001ec6:	4293      	cmp	r3, r2
+ 8001ec8:	d00f      	beq.n	8001eea <TIM_Base_SetConfig+0xb2>
+ 8001eca:	687b      	ldr	r3, [r7, #4]
+ 8001ecc:	4a29      	ldr	r2, [pc, #164]	@ (8001f74 <TIM_Base_SetConfig+0x13c>)
+ 8001ece:	4293      	cmp	r3, r2
+ 8001ed0:	d00b      	beq.n	8001eea <TIM_Base_SetConfig+0xb2>
+ 8001ed2:	687b      	ldr	r3, [r7, #4]
+ 8001ed4:	4a28      	ldr	r2, [pc, #160]	@ (8001f78 <TIM_Base_SetConfig+0x140>)
+ 8001ed6:	4293      	cmp	r3, r2
+ 8001ed8:	d007      	beq.n	8001eea <TIM_Base_SetConfig+0xb2>
+ 8001eda:	687b      	ldr	r3, [r7, #4]
+ 8001edc:	4a27      	ldr	r2, [pc, #156]	@ (8001f7c <TIM_Base_SetConfig+0x144>)
+ 8001ede:	4293      	cmp	r3, r2
+ 8001ee0:	d003      	beq.n	8001eea <TIM_Base_SetConfig+0xb2>
+ 8001ee2:	687b      	ldr	r3, [r7, #4]
+ 8001ee4:	4a26      	ldr	r2, [pc, #152]	@ (8001f80 <TIM_Base_SetConfig+0x148>)
+ 8001ee6:	4293      	cmp	r3, r2
+ 8001ee8:	d108      	bne.n	8001efc <TIM_Base_SetConfig+0xc4>
+  {
+    /* Set the clock division */
+    tmpcr1 &= ~TIM_CR1_CKD;
+ 8001eea:	68fb      	ldr	r3, [r7, #12]
+ 8001eec:	f423 7340 	bic.w	r3, r3, #768	@ 0x300
+ 8001ef0:	60fb      	str	r3, [r7, #12]
+    tmpcr1 |= (uint32_t)Structure->ClockDivision;
+ 8001ef2:	683b      	ldr	r3, [r7, #0]
+ 8001ef4:	68db      	ldr	r3, [r3, #12]
+ 8001ef6:	68fa      	ldr	r2, [r7, #12]
+ 8001ef8:	4313      	orrs	r3, r2
+ 8001efa:	60fb      	str	r3, [r7, #12]
+  }
+
+  /* Set the auto-reload preload */
+  MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
+ 8001efc:	68fb      	ldr	r3, [r7, #12]
+ 8001efe:	f023 0280 	bic.w	r2, r3, #128	@ 0x80
+ 8001f02:	683b      	ldr	r3, [r7, #0]
+ 8001f04:	695b      	ldr	r3, [r3, #20]
+ 8001f06:	4313      	orrs	r3, r2
+ 8001f08:	60fb      	str	r3, [r7, #12]
+
+  /* Set the Autoreload value */
+  TIMx->ARR = (uint32_t)Structure->Period ;
+ 8001f0a:	683b      	ldr	r3, [r7, #0]
+ 8001f0c:	689a      	ldr	r2, [r3, #8]
+ 8001f0e:	687b      	ldr	r3, [r7, #4]
+ 8001f10:	62da      	str	r2, [r3, #44]	@ 0x2c
+
+  /* Set the Prescaler value */
+  TIMx->PSC = Structure->Prescaler;
+ 8001f12:	683b      	ldr	r3, [r7, #0]
+ 8001f14:	681a      	ldr	r2, [r3, #0]
+ 8001f16:	687b      	ldr	r3, [r7, #4]
+ 8001f18:	629a      	str	r2, [r3, #40]	@ 0x28
+
+  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
+ 8001f1a:	687b      	ldr	r3, [r7, #4]
+ 8001f1c:	4a0e      	ldr	r2, [pc, #56]	@ (8001f58 <TIM_Base_SetConfig+0x120>)
+ 8001f1e:	4293      	cmp	r3, r2
+ 8001f20:	d003      	beq.n	8001f2a <TIM_Base_SetConfig+0xf2>
+ 8001f22:	687b      	ldr	r3, [r7, #4]
+ 8001f24:	4a10      	ldr	r2, [pc, #64]	@ (8001f68 <TIM_Base_SetConfig+0x130>)
+ 8001f26:	4293      	cmp	r3, r2
+ 8001f28:	d103      	bne.n	8001f32 <TIM_Base_SetConfig+0xfa>
+  {
+    /* Set the Repetition Counter value */
+    TIMx->RCR = Structure->RepetitionCounter;
+ 8001f2a:	683b      	ldr	r3, [r7, #0]
+ 8001f2c:	691a      	ldr	r2, [r3, #16]
+ 8001f2e:	687b      	ldr	r3, [r7, #4]
+ 8001f30:	631a      	str	r2, [r3, #48]	@ 0x30
+  }
+
+  /* Disable Update Event (UEV) with Update Generation (UG)
+     by changing Update Request Source (URS) to avoid Update flag (UIF) */
+  SET_BIT(TIMx->CR1, TIM_CR1_URS);
+ 8001f32:	687b      	ldr	r3, [r7, #4]
+ 8001f34:	681b      	ldr	r3, [r3, #0]
+ 8001f36:	f043 0204 	orr.w	r2, r3, #4
+ 8001f3a:	687b      	ldr	r3, [r7, #4]
+ 8001f3c:	601a      	str	r2, [r3, #0]
+
+  /* Generate an update event to reload the Prescaler
+     and the repetition counter (only for advanced timer) value immediately */
+  TIMx->EGR = TIM_EGR_UG;
+ 8001f3e:	687b      	ldr	r3, [r7, #4]
+ 8001f40:	2201      	movs	r2, #1
+ 8001f42:	615a      	str	r2, [r3, #20]
+
+  TIMx->CR1 = tmpcr1;
+ 8001f44:	687b      	ldr	r3, [r7, #4]
+ 8001f46:	68fa      	ldr	r2, [r7, #12]
+ 8001f48:	601a      	str	r2, [r3, #0]
+}
+ 8001f4a:	bf00      	nop
+ 8001f4c:	3714      	adds	r7, #20
+ 8001f4e:	46bd      	mov	sp, r7
+ 8001f50:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001f54:	4770      	bx	lr
+ 8001f56:	bf00      	nop
+ 8001f58:	40010000 	.word	0x40010000
+ 8001f5c:	40000400 	.word	0x40000400
+ 8001f60:	40000800 	.word	0x40000800
+ 8001f64:	40000c00 	.word	0x40000c00
+ 8001f68:	40010400 	.word	0x40010400
+ 8001f6c:	40014000 	.word	0x40014000
+ 8001f70:	40014400 	.word	0x40014400
+ 8001f74:	40014800 	.word	0x40014800
+ 8001f78:	40001800 	.word	0x40001800
+ 8001f7c:	40001c00 	.word	0x40001c00
+ 8001f80:	40002000 	.word	0x40002000
+
+08001f84 <HAL_TIMEx_CommutCallback>:
+  * @brief  Commutation callback in non-blocking mode
+  * @param  htim TIM handle
+  * @retval None
+  */
+__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
+{
+ 8001f84:	b480      	push	{r7}
+ 8001f86:	b083      	sub	sp, #12
+ 8001f88:	af00      	add	r7, sp, #0
+ 8001f8a:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIMEx_CommutCallback could be implemented in the user file
+   */
+}
+ 8001f8c:	bf00      	nop
+ 8001f8e:	370c      	adds	r7, #12
+ 8001f90:	46bd      	mov	sp, r7
+ 8001f92:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001f96:	4770      	bx	lr
+
+08001f98 <HAL_TIMEx_BreakCallback>:
+  * @brief  Break detection callback in non-blocking mode
+  * @param  htim TIM handle
+  * @retval None
+  */
+__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
+{
+ 8001f98:	b480      	push	{r7}
+ 8001f9a:	b083      	sub	sp, #12
+ 8001f9c:	af00      	add	r7, sp, #0
+ 8001f9e:	6078      	str	r0, [r7, #4]
+  UNUSED(htim);
+
+  /* NOTE : This function should not be modified, when the callback is needed,
+            the HAL_TIMEx_BreakCallback could be implemented in the user file
+   */
+}
+ 8001fa0:	bf00      	nop
+ 8001fa2:	370c      	adds	r7, #12
+ 8001fa4:	46bd      	mov	sp, r7
+ 8001fa6:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001faa:	4770      	bx	lr
+
+08001fac <vListInsertEnd>:
+	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+}
+/*-----------------------------------------------------------*/
+
+void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
+{
+ 8001fac:	b480      	push	{r7}
+ 8001fae:	b085      	sub	sp, #20
+ 8001fb0:	af00      	add	r7, sp, #0
+ 8001fb2:	6078      	str	r0, [r7, #4]
+ 8001fb4:	6039      	str	r1, [r7, #0]
+ListItem_t * const pxIndex = pxList->pxIndex;
+ 8001fb6:	687b      	ldr	r3, [r7, #4]
+ 8001fb8:	685b      	ldr	r3, [r3, #4]
+ 8001fba:	60fb      	str	r3, [r7, #12]
+	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
+
+	/* Insert a new list item into pxList, but rather than sort the list,
+	makes the new list item the last item to be removed by a call to
+	listGET_OWNER_OF_NEXT_ENTRY(). */
+	pxNewListItem->pxNext = pxIndex;
+ 8001fbc:	683b      	ldr	r3, [r7, #0]
+ 8001fbe:	68fa      	ldr	r2, [r7, #12]
+ 8001fc0:	605a      	str	r2, [r3, #4]
+	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
+ 8001fc2:	68fb      	ldr	r3, [r7, #12]
+ 8001fc4:	689a      	ldr	r2, [r3, #8]
+ 8001fc6:	683b      	ldr	r3, [r7, #0]
+ 8001fc8:	609a      	str	r2, [r3, #8]
+
+	/* Only used during decision coverage testing. */
+	mtCOVERAGE_TEST_DELAY();
+
+	pxIndex->pxPrevious->pxNext = pxNewListItem;
+ 8001fca:	68fb      	ldr	r3, [r7, #12]
+ 8001fcc:	689b      	ldr	r3, [r3, #8]
+ 8001fce:	683a      	ldr	r2, [r7, #0]
+ 8001fd0:	605a      	str	r2, [r3, #4]
+	pxIndex->pxPrevious = pxNewListItem;
+ 8001fd2:	68fb      	ldr	r3, [r7, #12]
+ 8001fd4:	683a      	ldr	r2, [r7, #0]
+ 8001fd6:	609a      	str	r2, [r3, #8]
+
+	/* Remember which list the item is in. */
+	pxNewListItem->pxContainer = pxList;
+ 8001fd8:	683b      	ldr	r3, [r7, #0]
+ 8001fda:	687a      	ldr	r2, [r7, #4]
+ 8001fdc:	611a      	str	r2, [r3, #16]
+
+	( pxList->uxNumberOfItems )++;
+ 8001fde:	687b      	ldr	r3, [r7, #4]
+ 8001fe0:	681b      	ldr	r3, [r3, #0]
+ 8001fe2:	1c5a      	adds	r2, r3, #1
+ 8001fe4:	687b      	ldr	r3, [r7, #4]
+ 8001fe6:	601a      	str	r2, [r3, #0]
+}
+ 8001fe8:	bf00      	nop
+ 8001fea:	3714      	adds	r7, #20
+ 8001fec:	46bd      	mov	sp, r7
+ 8001fee:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8001ff2:	4770      	bx	lr
+
+08001ff4 <uxListRemove>:
+	( pxList->uxNumberOfItems )++;
+}
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
+{
+ 8001ff4:	b480      	push	{r7}
+ 8001ff6:	b085      	sub	sp, #20
+ 8001ff8:	af00      	add	r7, sp, #0
+ 8001ffa:	6078      	str	r0, [r7, #4]
+/* The list item knows which list it is in.  Obtain the list from the list
+item. */
+List_t * const pxList = pxItemToRemove->pxContainer;
+ 8001ffc:	687b      	ldr	r3, [r7, #4]
+ 8001ffe:	691b      	ldr	r3, [r3, #16]
+ 8002000:	60fb      	str	r3, [r7, #12]
+
+	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
+ 8002002:	687b      	ldr	r3, [r7, #4]
+ 8002004:	685b      	ldr	r3, [r3, #4]
+ 8002006:	687a      	ldr	r2, [r7, #4]
+ 8002008:	6892      	ldr	r2, [r2, #8]
+ 800200a:	609a      	str	r2, [r3, #8]
+	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
+ 800200c:	687b      	ldr	r3, [r7, #4]
+ 800200e:	689b      	ldr	r3, [r3, #8]
+ 8002010:	687a      	ldr	r2, [r7, #4]
+ 8002012:	6852      	ldr	r2, [r2, #4]
+ 8002014:	605a      	str	r2, [r3, #4]
+
+	/* Only used during decision coverage testing. */
+	mtCOVERAGE_TEST_DELAY();
+
+	/* Make sure the index is left pointing to a valid item. */
+	if( pxList->pxIndex == pxItemToRemove )
+ 8002016:	68fb      	ldr	r3, [r7, #12]
+ 8002018:	685b      	ldr	r3, [r3, #4]
+ 800201a:	687a      	ldr	r2, [r7, #4]
+ 800201c:	429a      	cmp	r2, r3
+ 800201e:	d103      	bne.n	8002028 <uxListRemove+0x34>
+	{
+		pxList->pxIndex = pxItemToRemove->pxPrevious;
+ 8002020:	687b      	ldr	r3, [r7, #4]
+ 8002022:	689a      	ldr	r2, [r3, #8]
+ 8002024:	68fb      	ldr	r3, [r7, #12]
+ 8002026:	605a      	str	r2, [r3, #4]
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	pxItemToRemove->pxContainer = NULL;
+ 8002028:	687b      	ldr	r3, [r7, #4]
+ 800202a:	2200      	movs	r2, #0
+ 800202c:	611a      	str	r2, [r3, #16]
+	( pxList->uxNumberOfItems )--;
+ 800202e:	68fb      	ldr	r3, [r7, #12]
+ 8002030:	681b      	ldr	r3, [r3, #0]
+ 8002032:	1e5a      	subs	r2, r3, #1
+ 8002034:	68fb      	ldr	r3, [r7, #12]
+ 8002036:	601a      	str	r2, [r3, #0]
+
+	return pxList->uxNumberOfItems;
+ 8002038:	68fb      	ldr	r3, [r7, #12]
+ 800203a:	681b      	ldr	r3, [r3, #0]
+}
+ 800203c:	4618      	mov	r0, r3
+ 800203e:	3714      	adds	r7, #20
+ 8002040:	46bd      	mov	sp, r7
+ 8002042:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 8002046:	4770      	bx	lr
+
+08002048 <xTaskIncrementTick>:
+
+#endif /* INCLUDE_xTaskAbortDelay */
+/*----------------------------------------------------------*/
+
+BaseType_t xTaskIncrementTick( void )
+{
+ 8002048:	b580      	push	{r7, lr}
+ 800204a:	b086      	sub	sp, #24
+ 800204c:	af00      	add	r7, sp, #0
+TCB_t * pxTCB;
+TickType_t xItemValue;
+BaseType_t xSwitchRequired = pdFALSE;
+ 800204e:	2300      	movs	r3, #0
+ 8002050:	617b      	str	r3, [r7, #20]
+
+	/* Called by the portable layer each time a tick interrupt occurs.
+	Increments the tick then checks to see if the new tick value will cause any
+	tasks to be unblocked. */
+	traceTASK_INCREMENT_TICK( xTickCount );
+	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+ 8002052:	4b4f      	ldr	r3, [pc, #316]	@ (8002190 <xTaskIncrementTick+0x148>)
+ 8002054:	681b      	ldr	r3, [r3, #0]
+ 8002056:	2b00      	cmp	r3, #0
+ 8002058:	f040 808f 	bne.w	800217a <xTaskIncrementTick+0x132>
+	{
+		/* Minor optimisation.  The tick count cannot change in this
+		block. */
+		const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
+ 800205c:	4b4d      	ldr	r3, [pc, #308]	@ (8002194 <xTaskIncrementTick+0x14c>)
+ 800205e:	681b      	ldr	r3, [r3, #0]
+ 8002060:	3301      	adds	r3, #1
+ 8002062:	613b      	str	r3, [r7, #16]
+
+		/* Increment the RTOS tick, switching the delayed and overflowed
+		delayed lists if it wraps to 0. */
+		xTickCount = xConstTickCount;
+ 8002064:	4a4b      	ldr	r2, [pc, #300]	@ (8002194 <xTaskIncrementTick+0x14c>)
+ 8002066:	693b      	ldr	r3, [r7, #16]
+ 8002068:	6013      	str	r3, [r2, #0]
+
+		if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
+ 800206a:	693b      	ldr	r3, [r7, #16]
+ 800206c:	2b00      	cmp	r3, #0
+ 800206e:	d121      	bne.n	80020b4 <xTaskIncrementTick+0x6c>
+		{
+			taskSWITCH_DELAYED_LISTS();
+ 8002070:	4b49      	ldr	r3, [pc, #292]	@ (8002198 <xTaskIncrementTick+0x150>)
+ 8002072:	681b      	ldr	r3, [r3, #0]
+ 8002074:	681b      	ldr	r3, [r3, #0]
+ 8002076:	2b00      	cmp	r3, #0
+ 8002078:	d00b      	beq.n	8002092 <xTaskIncrementTick+0x4a>
+
+portFORCE_INLINE static void vPortRaiseBASEPRI( void )
+{
+uint32_t ulNewBASEPRI;
+
+	__asm volatile
+ 800207a:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 800207e:	f383 8811 	msr	BASEPRI, r3
+ 8002082:	f3bf 8f6f 	isb	sy
+ 8002086:	f3bf 8f4f 	dsb	sy
+ 800208a:	603b      	str	r3, [r7, #0]
+		"	msr basepri, %0											\n" \
+		"	isb														\n" \
+		"	dsb														\n" \
+		:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
+	);
+}
+ 800208c:	bf00      	nop
+ 800208e:	bf00      	nop
+ 8002090:	e7fd      	b.n	800208e <xTaskIncrementTick+0x46>
+ 8002092:	4b41      	ldr	r3, [pc, #260]	@ (8002198 <xTaskIncrementTick+0x150>)
+ 8002094:	681b      	ldr	r3, [r3, #0]
+ 8002096:	60fb      	str	r3, [r7, #12]
+ 8002098:	4b40      	ldr	r3, [pc, #256]	@ (800219c <xTaskIncrementTick+0x154>)
+ 800209a:	681b      	ldr	r3, [r3, #0]
+ 800209c:	4a3e      	ldr	r2, [pc, #248]	@ (8002198 <xTaskIncrementTick+0x150>)
+ 800209e:	6013      	str	r3, [r2, #0]
+ 80020a0:	4a3e      	ldr	r2, [pc, #248]	@ (800219c <xTaskIncrementTick+0x154>)
+ 80020a2:	68fb      	ldr	r3, [r7, #12]
+ 80020a4:	6013      	str	r3, [r2, #0]
+ 80020a6:	4b3e      	ldr	r3, [pc, #248]	@ (80021a0 <xTaskIncrementTick+0x158>)
+ 80020a8:	681b      	ldr	r3, [r3, #0]
+ 80020aa:	3301      	adds	r3, #1
+ 80020ac:	4a3c      	ldr	r2, [pc, #240]	@ (80021a0 <xTaskIncrementTick+0x158>)
+ 80020ae:	6013      	str	r3, [r2, #0]
+ 80020b0:	f000 f906 	bl	80022c0 <prvResetNextTaskUnblockTime>
+
+		/* See if this tick has made a timeout expire.  Tasks are stored in
+		the	queue in the order of their wake time - meaning once one task
+		has been found whose block time has not expired there is no need to
+		look any further down the list. */
+		if( xConstTickCount >= xNextTaskUnblockTime )
+ 80020b4:	4b3b      	ldr	r3, [pc, #236]	@ (80021a4 <xTaskIncrementTick+0x15c>)
+ 80020b6:	681b      	ldr	r3, [r3, #0]
+ 80020b8:	693a      	ldr	r2, [r7, #16]
+ 80020ba:	429a      	cmp	r2, r3
+ 80020bc:	d348      	bcc.n	8002150 <xTaskIncrementTick+0x108>
+		{
+			for( ;; )
+			{
+				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+ 80020be:	4b36      	ldr	r3, [pc, #216]	@ (8002198 <xTaskIncrementTick+0x150>)
+ 80020c0:	681b      	ldr	r3, [r3, #0]
+ 80020c2:	681b      	ldr	r3, [r3, #0]
+ 80020c4:	2b00      	cmp	r3, #0
+ 80020c6:	d104      	bne.n	80020d2 <xTaskIncrementTick+0x8a>
+					/* The delayed list is empty.  Set xNextTaskUnblockTime
+					to the maximum possible value so it is extremely
+					unlikely that the
+					if( xTickCount >= xNextTaskUnblockTime ) test will pass
+					next time through. */
+					xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+ 80020c8:	4b36      	ldr	r3, [pc, #216]	@ (80021a4 <xTaskIncrementTick+0x15c>)
+ 80020ca:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
+ 80020ce:	601a      	str	r2, [r3, #0]
+					break;
+ 80020d0:	e03e      	b.n	8002150 <xTaskIncrementTick+0x108>
+				{
+					/* The delayed list is not empty, get the value of the
+					item at the head of the delayed list.  This is the time
+					at which the task at the head of the delayed list must
+					be removed from the Blocked state. */
+					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+ 80020d2:	4b31      	ldr	r3, [pc, #196]	@ (8002198 <xTaskIncrementTick+0x150>)
+ 80020d4:	681b      	ldr	r3, [r3, #0]
+ 80020d6:	68db      	ldr	r3, [r3, #12]
+ 80020d8:	68db      	ldr	r3, [r3, #12]
+ 80020da:	60bb      	str	r3, [r7, #8]
+					xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
+ 80020dc:	68bb      	ldr	r3, [r7, #8]
+ 80020de:	685b      	ldr	r3, [r3, #4]
+ 80020e0:	607b      	str	r3, [r7, #4]
+
+					if( xConstTickCount < xItemValue )
+ 80020e2:	693a      	ldr	r2, [r7, #16]
+ 80020e4:	687b      	ldr	r3, [r7, #4]
+ 80020e6:	429a      	cmp	r2, r3
+ 80020e8:	d203      	bcs.n	80020f2 <xTaskIncrementTick+0xaa>
+						/* It is not time to unblock this item yet, but the
+						item value is the time at which the task at the head
+						of the blocked list must be removed from the Blocked
+						state -	so record the item value in
+						xNextTaskUnblockTime. */
+						xNextTaskUnblockTime = xItemValue;
+ 80020ea:	4a2e      	ldr	r2, [pc, #184]	@ (80021a4 <xTaskIncrementTick+0x15c>)
+ 80020ec:	687b      	ldr	r3, [r7, #4]
+ 80020ee:	6013      	str	r3, [r2, #0]
+						break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
+ 80020f0:	e02e      	b.n	8002150 <xTaskIncrementTick+0x108>
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* It is time to remove the item from the Blocked state. */
+					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+ 80020f2:	68bb      	ldr	r3, [r7, #8]
+ 80020f4:	3304      	adds	r3, #4
+ 80020f6:	4618      	mov	r0, r3
+ 80020f8:	f7ff ff7c 	bl	8001ff4 <uxListRemove>
+
+					/* Is the task waiting on an event also?  If so remove
+					it from the event list. */
+					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+ 80020fc:	68bb      	ldr	r3, [r7, #8]
+ 80020fe:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
+ 8002100:	2b00      	cmp	r3, #0
+ 8002102:	d004      	beq.n	800210e <xTaskIncrementTick+0xc6>
+					{
+						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
+ 8002104:	68bb      	ldr	r3, [r7, #8]
+ 8002106:	3318      	adds	r3, #24
+ 8002108:	4618      	mov	r0, r3
+ 800210a:	f7ff ff73 	bl	8001ff4 <uxListRemove>
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* Place the unblocked task into the appropriate ready
+					list. */
+					prvAddTaskToReadyList( pxTCB );
+ 800210e:	68bb      	ldr	r3, [r7, #8]
+ 8002110:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 8002112:	2201      	movs	r2, #1
+ 8002114:	409a      	lsls	r2, r3
+ 8002116:	4b24      	ldr	r3, [pc, #144]	@ (80021a8 <xTaskIncrementTick+0x160>)
+ 8002118:	681b      	ldr	r3, [r3, #0]
+ 800211a:	4313      	orrs	r3, r2
+ 800211c:	4a22      	ldr	r2, [pc, #136]	@ (80021a8 <xTaskIncrementTick+0x160>)
+ 800211e:	6013      	str	r3, [r2, #0]
+ 8002120:	68bb      	ldr	r3, [r7, #8]
+ 8002122:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
+ 8002124:	4613      	mov	r3, r2
+ 8002126:	009b      	lsls	r3, r3, #2
+ 8002128:	4413      	add	r3, r2
+ 800212a:	009b      	lsls	r3, r3, #2
+ 800212c:	4a1f      	ldr	r2, [pc, #124]	@ (80021ac <xTaskIncrementTick+0x164>)
+ 800212e:	441a      	add	r2, r3
+ 8002130:	68bb      	ldr	r3, [r7, #8]
+ 8002132:	3304      	adds	r3, #4
+ 8002134:	4619      	mov	r1, r3
+ 8002136:	4610      	mov	r0, r2
+ 8002138:	f7ff ff38 	bl	8001fac <vListInsertEnd>
+					{
+						/* Preemption is on, but a context switch should
+						only be performed if the unblocked task has a
+						priority that is equal to or higher than the
+						currently executing task. */
+						if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+ 800213c:	68bb      	ldr	r3, [r7, #8]
+ 800213e:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
+ 8002140:	4b1b      	ldr	r3, [pc, #108]	@ (80021b0 <xTaskIncrementTick+0x168>)
+ 8002142:	681b      	ldr	r3, [r3, #0]
+ 8002144:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
+ 8002146:	429a      	cmp	r2, r3
+ 8002148:	d3b9      	bcc.n	80020be <xTaskIncrementTick+0x76>
+						{
+							xSwitchRequired = pdTRUE;
+ 800214a:	2301      	movs	r3, #1
+ 800214c:	617b      	str	r3, [r7, #20]
+				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+ 800214e:	e7b6      	b.n	80020be <xTaskIncrementTick+0x76>
+		/* Tasks of equal priority to the currently running task will share
+		processing time (time slice) if preemption is on, and the application
+		writer has not explicitly turned time slicing off. */
+		#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
+		{
+			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
+ 8002150:	4b17      	ldr	r3, [pc, #92]	@ (80021b0 <xTaskIncrementTick+0x168>)
+ 8002152:	681b      	ldr	r3, [r3, #0]
+ 8002154:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
+ 8002156:	4915      	ldr	r1, [pc, #84]	@ (80021ac <xTaskIncrementTick+0x164>)
+ 8002158:	4613      	mov	r3, r2
+ 800215a:	009b      	lsls	r3, r3, #2
+ 800215c:	4413      	add	r3, r2
+ 800215e:	009b      	lsls	r3, r3, #2
+ 8002160:	440b      	add	r3, r1
+ 8002162:	681b      	ldr	r3, [r3, #0]
+ 8002164:	2b01      	cmp	r3, #1
+ 8002166:	d901      	bls.n	800216c <xTaskIncrementTick+0x124>
+			{
+				xSwitchRequired = pdTRUE;
+ 8002168:	2301      	movs	r3, #1
+ 800216a:	617b      	str	r3, [r7, #20]
+		}
+		#endif /* configUSE_TICK_HOOK */
+
+		#if ( configUSE_PREEMPTION == 1 )
+		{
+			if( xYieldPending != pdFALSE )
+ 800216c:	4b11      	ldr	r3, [pc, #68]	@ (80021b4 <xTaskIncrementTick+0x16c>)
+ 800216e:	681b      	ldr	r3, [r3, #0]
+ 8002170:	2b00      	cmp	r3, #0
+ 8002172:	d007      	beq.n	8002184 <xTaskIncrementTick+0x13c>
+			{
+				xSwitchRequired = pdTRUE;
+ 8002174:	2301      	movs	r3, #1
+ 8002176:	617b      	str	r3, [r7, #20]
+ 8002178:	e004      	b.n	8002184 <xTaskIncrementTick+0x13c>
+		}
+		#endif /* configUSE_PREEMPTION */
+	}
+	else
+	{
+		++xPendedTicks;
+ 800217a:	4b0f      	ldr	r3, [pc, #60]	@ (80021b8 <xTaskIncrementTick+0x170>)
+ 800217c:	681b      	ldr	r3, [r3, #0]
+ 800217e:	3301      	adds	r3, #1
+ 8002180:	4a0d      	ldr	r2, [pc, #52]	@ (80021b8 <xTaskIncrementTick+0x170>)
+ 8002182:	6013      	str	r3, [r2, #0]
+			vApplicationTickHook();
+		}
+		#endif
+	}
+
+	return xSwitchRequired;
+ 8002184:	697b      	ldr	r3, [r7, #20]
+}
+ 8002186:	4618      	mov	r0, r3
+ 8002188:	3718      	adds	r7, #24
+ 800218a:	46bd      	mov	sp, r7
+ 800218c:	bd80      	pop	{r7, pc}
+ 800218e:	bf00      	nop
+ 8002190:	2000012c 	.word	0x2000012c
+ 8002194:	20000114 	.word	0x20000114
+ 8002198:	2000010c 	.word	0x2000010c
+ 800219c:	20000110 	.word	0x20000110
+ 80021a0:	20000124 	.word	0x20000124
+ 80021a4:	20000128 	.word	0x20000128
+ 80021a8:	20000118 	.word	0x20000118
+ 80021ac:	20000080 	.word	0x20000080
+ 80021b0:	2000007c 	.word	0x2000007c
+ 80021b4:	20000120 	.word	0x20000120
+ 80021b8:	2000011c 	.word	0x2000011c
+
+080021bc <vTaskSwitchContext>:
+
+#endif /* configUSE_APPLICATION_TASK_TAG */
+/*-----------------------------------------------------------*/
+
+void vTaskSwitchContext( void )
+{
+ 80021bc:	b580      	push	{r7, lr}
+ 80021be:	b088      	sub	sp, #32
+ 80021c0:	af00      	add	r7, sp, #0
+	if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
+ 80021c2:	4b3a      	ldr	r3, [pc, #232]	@ (80022ac <vTaskSwitchContext+0xf0>)
+ 80021c4:	681b      	ldr	r3, [r3, #0]
+ 80021c6:	2b00      	cmp	r3, #0
+ 80021c8:	d003      	beq.n	80021d2 <vTaskSwitchContext+0x16>
+	{
+		/* The scheduler is currently suspended - do not allow a context
+		switch. */
+		xYieldPending = pdTRUE;
+ 80021ca:	4b39      	ldr	r3, [pc, #228]	@ (80022b0 <vTaskSwitchContext+0xf4>)
+ 80021cc:	2201      	movs	r2, #1
+ 80021ce:	601a      	str	r2, [r3, #0]
+			for additional information. */
+			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
+		}
+		#endif /* configUSE_NEWLIB_REENTRANT */
+	}
+}
+ 80021d0:	e067      	b.n	80022a2 <vTaskSwitchContext+0xe6>
+		xYieldPending = pdFALSE;
+ 80021d2:	4b37      	ldr	r3, [pc, #220]	@ (80022b0 <vTaskSwitchContext+0xf4>)
+ 80021d4:	2200      	movs	r2, #0
+ 80021d6:	601a      	str	r2, [r3, #0]
+		taskCHECK_FOR_STACK_OVERFLOW();
+ 80021d8:	4b36      	ldr	r3, [pc, #216]	@ (80022b4 <vTaskSwitchContext+0xf8>)
+ 80021da:	681b      	ldr	r3, [r3, #0]
+ 80021dc:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
+ 80021de:	61fb      	str	r3, [r7, #28]
+ 80021e0:	f04f 33a5 	mov.w	r3, #2779096485	@ 0xa5a5a5a5
+ 80021e4:	61bb      	str	r3, [r7, #24]
+ 80021e6:	69fb      	ldr	r3, [r7, #28]
+ 80021e8:	681b      	ldr	r3, [r3, #0]
+ 80021ea:	69ba      	ldr	r2, [r7, #24]
+ 80021ec:	429a      	cmp	r2, r3
+ 80021ee:	d111      	bne.n	8002214 <vTaskSwitchContext+0x58>
+ 80021f0:	69fb      	ldr	r3, [r7, #28]
+ 80021f2:	3304      	adds	r3, #4
+ 80021f4:	681b      	ldr	r3, [r3, #0]
+ 80021f6:	69ba      	ldr	r2, [r7, #24]
+ 80021f8:	429a      	cmp	r2, r3
+ 80021fa:	d10b      	bne.n	8002214 <vTaskSwitchContext+0x58>
+ 80021fc:	69fb      	ldr	r3, [r7, #28]
+ 80021fe:	3308      	adds	r3, #8
+ 8002200:	681b      	ldr	r3, [r3, #0]
+ 8002202:	69ba      	ldr	r2, [r7, #24]
+ 8002204:	429a      	cmp	r2, r3
+ 8002206:	d105      	bne.n	8002214 <vTaskSwitchContext+0x58>
+ 8002208:	69fb      	ldr	r3, [r7, #28]
+ 800220a:	330c      	adds	r3, #12
+ 800220c:	681b      	ldr	r3, [r3, #0]
+ 800220e:	69ba      	ldr	r2, [r7, #24]
+ 8002210:	429a      	cmp	r2, r3
+ 8002212:	d008      	beq.n	8002226 <vTaskSwitchContext+0x6a>
+ 8002214:	4b27      	ldr	r3, [pc, #156]	@ (80022b4 <vTaskSwitchContext+0xf8>)
+ 8002216:	681a      	ldr	r2, [r3, #0]
+ 8002218:	4b26      	ldr	r3, [pc, #152]	@ (80022b4 <vTaskSwitchContext+0xf8>)
+ 800221a:	681b      	ldr	r3, [r3, #0]
+ 800221c:	3334      	adds	r3, #52	@ 0x34
+ 800221e:	4619      	mov	r1, r3
+ 8002220:	4610      	mov	r0, r2
+ 8002222:	f7fe f97b 	bl	800051c <vApplicationStackOverflowHook>
+		taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+ 8002226:	4b24      	ldr	r3, [pc, #144]	@ (80022b8 <vTaskSwitchContext+0xfc>)
+ 8002228:	681b      	ldr	r3, [r3, #0]
+ 800222a:	60fb      	str	r3, [r7, #12]
+		__asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );
+ 800222c:	68fb      	ldr	r3, [r7, #12]
+ 800222e:	fab3 f383 	clz	r3, r3
+ 8002232:	72fb      	strb	r3, [r7, #11]
+		return ucReturn;
+ 8002234:	7afb      	ldrb	r3, [r7, #11]
+ 8002236:	f1c3 031f 	rsb	r3, r3, #31
+ 800223a:	617b      	str	r3, [r7, #20]
+ 800223c:	491f      	ldr	r1, [pc, #124]	@ (80022bc <vTaskSwitchContext+0x100>)
+ 800223e:	697a      	ldr	r2, [r7, #20]
+ 8002240:	4613      	mov	r3, r2
+ 8002242:	009b      	lsls	r3, r3, #2
+ 8002244:	4413      	add	r3, r2
+ 8002246:	009b      	lsls	r3, r3, #2
+ 8002248:	440b      	add	r3, r1
+ 800224a:	681b      	ldr	r3, [r3, #0]
+ 800224c:	2b00      	cmp	r3, #0
+ 800224e:	d10b      	bne.n	8002268 <vTaskSwitchContext+0xac>
+	__asm volatile
+ 8002250:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 8002254:	f383 8811 	msr	BASEPRI, r3
+ 8002258:	f3bf 8f6f 	isb	sy
+ 800225c:	f3bf 8f4f 	dsb	sy
+ 8002260:	607b      	str	r3, [r7, #4]
+}
+ 8002262:	bf00      	nop
+ 8002264:	bf00      	nop
+ 8002266:	e7fd      	b.n	8002264 <vTaskSwitchContext+0xa8>
+ 8002268:	697a      	ldr	r2, [r7, #20]
+ 800226a:	4613      	mov	r3, r2
+ 800226c:	009b      	lsls	r3, r3, #2
+ 800226e:	4413      	add	r3, r2
+ 8002270:	009b      	lsls	r3, r3, #2
+ 8002272:	4a12      	ldr	r2, [pc, #72]	@ (80022bc <vTaskSwitchContext+0x100>)
+ 8002274:	4413      	add	r3, r2
+ 8002276:	613b      	str	r3, [r7, #16]
+ 8002278:	693b      	ldr	r3, [r7, #16]
+ 800227a:	685b      	ldr	r3, [r3, #4]
+ 800227c:	685a      	ldr	r2, [r3, #4]
+ 800227e:	693b      	ldr	r3, [r7, #16]
+ 8002280:	605a      	str	r2, [r3, #4]
+ 8002282:	693b      	ldr	r3, [r7, #16]
+ 8002284:	685a      	ldr	r2, [r3, #4]
+ 8002286:	693b      	ldr	r3, [r7, #16]
+ 8002288:	3308      	adds	r3, #8
+ 800228a:	429a      	cmp	r2, r3
+ 800228c:	d104      	bne.n	8002298 <vTaskSwitchContext+0xdc>
+ 800228e:	693b      	ldr	r3, [r7, #16]
+ 8002290:	685b      	ldr	r3, [r3, #4]
+ 8002292:	685a      	ldr	r2, [r3, #4]
+ 8002294:	693b      	ldr	r3, [r7, #16]
+ 8002296:	605a      	str	r2, [r3, #4]
+ 8002298:	693b      	ldr	r3, [r7, #16]
+ 800229a:	685b      	ldr	r3, [r3, #4]
+ 800229c:	68db      	ldr	r3, [r3, #12]
+ 800229e:	4a05      	ldr	r2, [pc, #20]	@ (80022b4 <vTaskSwitchContext+0xf8>)
+ 80022a0:	6013      	str	r3, [r2, #0]
+}
+ 80022a2:	bf00      	nop
+ 80022a4:	3720      	adds	r7, #32
+ 80022a6:	46bd      	mov	sp, r7
+ 80022a8:	bd80      	pop	{r7, pc}
+ 80022aa:	bf00      	nop
+ 80022ac:	2000012c 	.word	0x2000012c
+ 80022b0:	20000120 	.word	0x20000120
+ 80022b4:	2000007c 	.word	0x2000007c
+ 80022b8:	20000118 	.word	0x20000118
+ 80022bc:	20000080 	.word	0x20000080
+
+080022c0 <prvResetNextTaskUnblockTime>:
+
+#endif /* INCLUDE_vTaskDelete */
+/*-----------------------------------------------------------*/
+
+static void prvResetNextTaskUnblockTime( void )
+{
+ 80022c0:	b480      	push	{r7}
+ 80022c2:	b083      	sub	sp, #12
+ 80022c4:	af00      	add	r7, sp, #0
+TCB_t *pxTCB;
+
+	if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+ 80022c6:	4b0c      	ldr	r3, [pc, #48]	@ (80022f8 <prvResetNextTaskUnblockTime+0x38>)
+ 80022c8:	681b      	ldr	r3, [r3, #0]
+ 80022ca:	681b      	ldr	r3, [r3, #0]
+ 80022cc:	2b00      	cmp	r3, #0
+ 80022ce:	d104      	bne.n	80022da <prvResetNextTaskUnblockTime+0x1a>
+	{
+		/* The new current delayed list is empty.  Set xNextTaskUnblockTime to
+		the maximum possible value so it is	extremely unlikely that the
+		if( xTickCount >= xNextTaskUnblockTime ) test will pass until
+		there is an item in the delayed list. */
+		xNextTaskUnblockTime = portMAX_DELAY;
+ 80022d0:	4b0a      	ldr	r3, [pc, #40]	@ (80022fc <prvResetNextTaskUnblockTime+0x3c>)
+ 80022d2:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
+ 80022d6:	601a      	str	r2, [r3, #0]
+		which the task at the head of the delayed list should be removed
+		from the Blocked state. */
+		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
+	}
+}
+ 80022d8:	e008      	b.n	80022ec <prvResetNextTaskUnblockTime+0x2c>
+		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+ 80022da:	4b07      	ldr	r3, [pc, #28]	@ (80022f8 <prvResetNextTaskUnblockTime+0x38>)
+ 80022dc:	681b      	ldr	r3, [r3, #0]
+ 80022de:	68db      	ldr	r3, [r3, #12]
+ 80022e0:	68db      	ldr	r3, [r3, #12]
+ 80022e2:	607b      	str	r3, [r7, #4]
+		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
+ 80022e4:	687b      	ldr	r3, [r7, #4]
+ 80022e6:	685b      	ldr	r3, [r3, #4]
+ 80022e8:	4a04      	ldr	r2, [pc, #16]	@ (80022fc <prvResetNextTaskUnblockTime+0x3c>)
+ 80022ea:	6013      	str	r3, [r2, #0]
+}
+ 80022ec:	bf00      	nop
+ 80022ee:	370c      	adds	r7, #12
+ 80022f0:	46bd      	mov	sp, r7
+ 80022f2:	f85d 7b04 	ldr.w	r7, [sp], #4
+ 80022f6:	4770      	bx	lr
+ 80022f8:	2000010c 	.word	0x2000010c
+ 80022fc:	20000128 	.word	0x20000128
+
+08002300 <SVC_Handler>:
+}
+/*-----------------------------------------------------------*/
+
+void vPortSVCHandler( void )
+{
+	__asm volatile (
+ 8002300:	4b07      	ldr	r3, [pc, #28]	@ (8002320 <pxCurrentTCBConst2>)
+ 8002302:	6819      	ldr	r1, [r3, #0]
+ 8002304:	6808      	ldr	r0, [r1, #0]
+ 8002306:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 800230a:	f380 8809 	msr	PSP, r0
+ 800230e:	f3bf 8f6f 	isb	sy
+ 8002312:	f04f 0000 	mov.w	r0, #0
+ 8002316:	f380 8811 	msr	BASEPRI, r0
+ 800231a:	4770      	bx	lr
+ 800231c:	f3af 8000 	nop.w
+
+08002320 <pxCurrentTCBConst2>:
+ 8002320:	2000007c 	.word	0x2000007c
+					"	bx r14							\n"
+					"									\n"
+					"	.align 4						\n"
+					"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
+				);
+}
+ 8002324:	bf00      	nop
+ 8002326:	bf00      	nop
+	...
+
+08002330 <PendSV_Handler>:
+
+void xPortPendSVHandler( void )
+{
+	/* This is a naked function. */
+
+	__asm volatile
+ 8002330:	f3ef 8009 	mrs	r0, PSP
+ 8002334:	f3bf 8f6f 	isb	sy
+ 8002338:	4b15      	ldr	r3, [pc, #84]	@ (8002390 <pxCurrentTCBConst>)
+ 800233a:	681a      	ldr	r2, [r3, #0]
+ 800233c:	f01e 0f10 	tst.w	lr, #16
+ 8002340:	bf08      	it	eq
+ 8002342:	ed20 8a10 	vstmdbeq	r0!, {s16-s31}
+ 8002346:	e920 4ff0 	stmdb	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 800234a:	6010      	str	r0, [r2, #0]
+ 800234c:	e92d 0009 	stmdb	sp!, {r0, r3}
+ 8002350:	f04f 0050 	mov.w	r0, #80	@ 0x50
+ 8002354:	f380 8811 	msr	BASEPRI, r0
+ 8002358:	f3bf 8f4f 	dsb	sy
+ 800235c:	f3bf 8f6f 	isb	sy
+ 8002360:	f7ff ff2c 	bl	80021bc <vTaskSwitchContext>
+ 8002364:	f04f 0000 	mov.w	r0, #0
+ 8002368:	f380 8811 	msr	BASEPRI, r0
+ 800236c:	bc09      	pop	{r0, r3}
+ 800236e:	6819      	ldr	r1, [r3, #0]
+ 8002370:	6808      	ldr	r0, [r1, #0]
+ 8002372:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
+ 8002376:	f01e 0f10 	tst.w	lr, #16
+ 800237a:	bf08      	it	eq
+ 800237c:	ecb0 8a10 	vldmiaeq	r0!, {s16-s31}
+ 8002380:	f380 8809 	msr	PSP, r0
+ 8002384:	f3bf 8f6f 	isb	sy
+ 8002388:	4770      	bx	lr
+ 800238a:	bf00      	nop
+ 800238c:	f3af 8000 	nop.w
+
+08002390 <pxCurrentTCBConst>:
+ 8002390:	2000007c 	.word	0x2000007c
+	"										\n"
+	"	.align 4							\n"
+	"pxCurrentTCBConst: .word pxCurrentTCB	\n"
+	::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
+	);
+}
+ 8002394:	bf00      	nop
+ 8002396:	bf00      	nop
+
+08002398 <SysTick_Handler>:
+/*-----------------------------------------------------------*/
+
+void xPortSysTickHandler( void )
+{
+ 8002398:	b580      	push	{r7, lr}
+ 800239a:	b082      	sub	sp, #8
+ 800239c:	af00      	add	r7, sp, #0
+	__asm volatile
+ 800239e:	f04f 0350 	mov.w	r3, #80	@ 0x50
+ 80023a2:	f383 8811 	msr	BASEPRI, r3
+ 80023a6:	f3bf 8f6f 	isb	sy
+ 80023aa:	f3bf 8f4f 	dsb	sy
+ 80023ae:	607b      	str	r3, [r7, #4]
+}
+ 80023b0:	bf00      	nop
+	save and then restore the interrupt mask value as its value is already
+	known. */
+	portDISABLE_INTERRUPTS();
+	{
+		/* Increment the RTOS tick. */
+		if( xTaskIncrementTick() != pdFALSE )
+ 80023b2:	f7ff fe49 	bl	8002048 <xTaskIncrementTick>
+ 80023b6:	4603      	mov	r3, r0
+ 80023b8:	2b00      	cmp	r3, #0
+ 80023ba:	d003      	beq.n	80023c4 <SysTick_Handler+0x2c>
+		{
+			/* A context switch is required.  Context switching is performed in
+			the PendSV interrupt.  Pend the PendSV interrupt. */
+			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
+ 80023bc:	4b06      	ldr	r3, [pc, #24]	@ (80023d8 <SysTick_Handler+0x40>)
+ 80023be:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
+ 80023c2:	601a      	str	r2, [r3, #0]
+ 80023c4:	2300      	movs	r3, #0
+ 80023c6:	603b      	str	r3, [r7, #0]
+}
+/*-----------------------------------------------------------*/
+
+portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
+{
+	__asm volatile
+ 80023c8:	683b      	ldr	r3, [r7, #0]
+ 80023ca:	f383 8811 	msr	BASEPRI, r3
+	(
+		"	msr basepri, %0	" :: "r" ( ulNewMaskValue ) : "memory"
+	);
+}
+ 80023ce:	bf00      	nop
+		}
+	}
+	portENABLE_INTERRUPTS();
+}
+ 80023d0:	bf00      	nop
+ 80023d2:	3708      	adds	r7, #8
+ 80023d4:	46bd      	mov	sp, r7
+ 80023d6:	bd80      	pop	{r7, pc}
+ 80023d8:	e000ed04 	.word	0xe000ed04
+
+080023dc <memset>:
+ 80023dc:	4402      	add	r2, r0
+ 80023de:	4603      	mov	r3, r0
+ 80023e0:	4293      	cmp	r3, r2
+ 80023e2:	d100      	bne.n	80023e6 <memset+0xa>
+ 80023e4:	4770      	bx	lr
+ 80023e6:	f803 1b01 	strb.w	r1, [r3], #1
+ 80023ea:	e7f9      	b.n	80023e0 <memset+0x4>
+
+080023ec <__libc_init_array>:
+ 80023ec:	b570      	push	{r4, r5, r6, lr}
+ 80023ee:	4d0d      	ldr	r5, [pc, #52]	@ (8002424 <__libc_init_array+0x38>)
+ 80023f0:	4c0d      	ldr	r4, [pc, #52]	@ (8002428 <__libc_init_array+0x3c>)
+ 80023f2:	1b64      	subs	r4, r4, r5
+ 80023f4:	10a4      	asrs	r4, r4, #2
+ 80023f6:	2600      	movs	r6, #0
+ 80023f8:	42a6      	cmp	r6, r4
+ 80023fa:	d109      	bne.n	8002410 <__libc_init_array+0x24>
+ 80023fc:	4d0b      	ldr	r5, [pc, #44]	@ (800242c <__libc_init_array+0x40>)
+ 80023fe:	4c0c      	ldr	r4, [pc, #48]	@ (8002430 <__libc_init_array+0x44>)
+ 8002400:	f000 f818 	bl	8002434 <_init>
+ 8002404:	1b64      	subs	r4, r4, r5
+ 8002406:	10a4      	asrs	r4, r4, #2
+ 8002408:	2600      	movs	r6, #0
+ 800240a:	42a6      	cmp	r6, r4
+ 800240c:	d105      	bne.n	800241a <__libc_init_array+0x2e>
+ 800240e:	bd70      	pop	{r4, r5, r6, pc}
+ 8002410:	f855 3b04 	ldr.w	r3, [r5], #4
+ 8002414:	4798      	blx	r3
+ 8002416:	3601      	adds	r6, #1
+ 8002418:	e7ee      	b.n	80023f8 <__libc_init_array+0xc>
+ 800241a:	f855 3b04 	ldr.w	r3, [r5], #4
+ 800241e:	4798      	blx	r3
+ 8002420:	3601      	adds	r6, #1
+ 8002422:	e7f2      	b.n	800240a <__libc_init_array+0x1e>
+ 8002424:	0800246c 	.word	0x0800246c
+ 8002428:	0800246c 	.word	0x0800246c
+ 800242c:	0800246c 	.word	0x0800246c
+ 8002430:	08002470 	.word	0x08002470
+
+08002434 <_init>:
+ 8002434:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 8002436:	bf00      	nop
+ 8002438:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 800243a:	bc08      	pop	{r3}
+ 800243c:	469e      	mov	lr, r3
+ 800243e:	4770      	bx	lr
+
+08002440 <_fini>:
+ 8002440:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 8002442:	bf00      	nop
+ 8002444:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 8002446:	bc08      	pop	{r3}
+ 8002448:	469e      	mov	lr, r3
+ 800244a:	4770      	bx	lr
diff --git a/TrafficLightsPlusPlus/Debug/TrafficLightsPlusPlus.map b/TrafficLightsPlusPlus/Debug/TrafficLightsPlusPlus.map
index aa4eeb9..c193fa0 100644
--- a/TrafficLightsPlusPlus/Debug/TrafficLightsPlusPlus.map
+++ b/TrafficLightsPlusPlus/Debug/TrafficLightsPlusPlus.map
@@ -284,7 +284,7 @@ Discarded input sections
  .text.HAL_CRC_MspDeInit
                 0x00000000       0x34 ./Core/Src/stm32f4xx_hal_msp.o
  .text.HAL_DMA2D_MspInit
-                0x00000000       0x50 ./Core/Src/stm32f4xx_hal_msp.o
+                0x00000000       0x44 ./Core/Src/stm32f4xx_hal_msp.o
  .text.HAL_DMA2D_MspDeInit
                 0x00000000       0x34 ./Core/Src/stm32f4xx_hal_msp.o
  .text.HAL_TIM_Base_MspDeInit
@@ -1387,6 +1387,12 @@ Discarded input sections
                 0x00000000       0x78 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
  .text.HAL_DMA2D_PollForTransfer
                 0x00000000      0x1d2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+ .text.HAL_DMA2D_IRQHandler
+                0x00000000      0x1f8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+ .text.HAL_DMA2D_LineEventCallback
+                0x00000000       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+ .text.HAL_DMA2D_CLUTLoadingCpltCallback
+                0x00000000       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
  .text.HAL_DMA2D_ConfigLayer
                 0x00000000      0x124 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
  .text.HAL_DMA2D_ConfigCLUT
@@ -1405,6 +1411,13 @@ Discarded input sections
                 0x00000000       0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
  .text.DMA2D_SetConfig
                 0x00000000      0x138 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+ .debug_info    0x00000000      0xe82 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+ .debug_abbrev  0x00000000      0x23e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+ .debug_aranges
+                0x00000000      0x118 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+ .debug_rnglists
+                0x00000000       0xdc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+ .debug_macro   0x00000000      0x1e7 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
  .debug_macro   0x00000000      0xad8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
  .debug_macro   0x00000000      0x2a1 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
  .debug_macro   0x00000000       0x2e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
@@ -1445,6 +1458,12 @@ Discarded input sections
  .debug_macro   0x00000000      0x8ed ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
  .debug_macro   0x00000000       0x4d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
  .debug_macro   0x00000000      0x134 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+ .debug_line    0x00000000     0x10cd ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+ .debug_str     0x00000000    0xd291e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+ .comment       0x00000000       0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+ .debug_frame   0x00000000      0x4e0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+ .ARM.attributes
+                0x00000000       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
  .group         0x00000000        0xc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o
  .group         0x00000000        0xc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o
  .group         0x00000000        0xc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o
@@ -4546,7 +4565,7 @@ LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externalto
                 0x08000000                g_pfnVectors
                 0x080001ac                        . = ALIGN (0x4)
 
-.text           0x080001b0     0x24dc
+.text           0x080001b0     0x229c
                 0x080001b0                        . = ALIGN (0x4)
  *(.text)
  .text          0x080001b0       0x40 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o
@@ -4609,317 +4628,305 @@ LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externalto
  .text.TIM6_DAC_IRQHandler
                 0x08000a88       0x14 ./Core/Src/stm32f4xx_it.o
                 0x08000a88                TIM6_DAC_IRQHandler
- .text.DMA2D_IRQHandler
-                0x08000a9c       0x14 ./Core/Src/stm32f4xx_it.o
-                0x08000a9c                DMA2D_IRQHandler
  .text.SystemInit
-                0x08000ab0       0x24 ./Core/Src/system_stm32f4xx.o
-                0x08000ab0                SystemInit
+                0x08000a9c       0x24 ./Core/Src/system_stm32f4xx.o
+                0x08000a9c                SystemInit
  .text.Reset_Handler
-                0x08000ad4       0x50 ./Core/Startup/startup_stm32f429zitx.o
-                0x08000ad4                Reset_Handler
+                0x08000ac0       0x50 ./Core/Startup/startup_stm32f429zitx.o
+                0x08000ac0                Reset_Handler
  .text.Default_Handler
-                0x08000b24        0x2 ./Core/Startup/startup_stm32f429zitx.o
-                0x08000b24                RTC_Alarm_IRQHandler
-                0x08000b24                HASH_RNG_IRQHandler
-                0x08000b24                EXTI2_IRQHandler
-                0x08000b24                TIM8_CC_IRQHandler
-                0x08000b24                UART8_IRQHandler
-                0x08000b24                SPI4_IRQHandler
-                0x08000b24                TIM1_CC_IRQHandler
-                0x08000b24                DMA2_Stream5_IRQHandler
-                0x08000b24                DMA1_Stream5_IRQHandler
-                0x08000b24                PVD_IRQHandler
-                0x08000b24                SDIO_IRQHandler
-                0x08000b24                TAMP_STAMP_IRQHandler
-                0x08000b24                CAN2_RX1_IRQHandler
-                0x08000b24                EXTI3_IRQHandler
-                0x08000b24                TIM8_TRG_COM_TIM14_IRQHandler
-                0x08000b24                TIM1_UP_TIM10_IRQHandler
-                0x08000b24                TIM8_UP_TIM13_IRQHandler
-                0x08000b24                I2C3_ER_IRQHandler
-                0x08000b24                EXTI0_IRQHandler
-                0x08000b24                I2C2_EV_IRQHandler
-                0x08000b24                DMA1_Stream2_IRQHandler
-                0x08000b24                CAN1_RX0_IRQHandler
-                0x08000b24                FPU_IRQHandler
-                0x08000b24                OTG_HS_WKUP_IRQHandler
-                0x08000b24                LTDC_ER_IRQHandler
-                0x08000b24                CAN2_SCE_IRQHandler
-                0x08000b24                DMA2_Stream2_IRQHandler
-                0x08000b24                SPI1_IRQHandler
-                0x08000b24                TIM1_BRK_TIM9_IRQHandler
-                0x08000b24                DCMI_IRQHandler
-                0x08000b24                CAN2_RX0_IRQHandler
-                0x08000b24                DMA2_Stream3_IRQHandler
-                0x08000b24                USART6_IRQHandler
-                0x08000b24                USART3_IRQHandler
-                0x08000b24                CAN1_RX1_IRQHandler
-                0x08000b24                UART5_IRQHandler
-                0x08000b24                DMA2_Stream0_IRQHandler
-                0x08000b24                TIM4_IRQHandler
-                0x08000b24                I2C1_EV_IRQHandler
-                0x08000b24                DMA1_Stream6_IRQHandler
-                0x08000b24                DMA1_Stream1_IRQHandler
-                0x08000b24                UART4_IRQHandler
-                0x08000b24                TIM3_IRQHandler
-                0x08000b24                RCC_IRQHandler
-                0x08000b24                TIM8_BRK_TIM12_IRQHandler
-                0x08000b24                Default_Handler
-                0x08000b24                ADC_IRQHandler
-                0x08000b24                DMA1_Stream7_IRQHandler
-                0x08000b24                SPI5_IRQHandler
-                0x08000b24                TIM7_IRQHandler
-                0x08000b24                CAN2_TX_IRQHandler
-                0x08000b24                TIM5_IRQHandler
-                0x08000b24                DMA2_Stream7_IRQHandler
-                0x08000b24                I2C3_EV_IRQHandler
-                0x08000b24                EXTI9_5_IRQHandler
-                0x08000b24                RTC_WKUP_IRQHandler
-                0x08000b24                LTDC_IRQHandler
-                0x08000b24                ETH_WKUP_IRQHandler
-                0x08000b24                SPI2_IRQHandler
-                0x08000b24                OTG_HS_EP1_IN_IRQHandler
-                0x08000b24                DMA1_Stream0_IRQHandler
-                0x08000b24                CAN1_TX_IRQHandler
-                0x08000b24                EXTI4_IRQHandler
-                0x08000b24                ETH_IRQHandler
-                0x08000b24                OTG_HS_EP1_OUT_IRQHandler
-                0x08000b24                WWDG_IRQHandler
-                0x08000b24                SPI6_IRQHandler
-                0x08000b24                TIM2_IRQHandler
-                0x08000b24                OTG_FS_WKUP_IRQHandler
-                0x08000b24                TIM1_TRG_COM_TIM11_IRQHandler
-                0x08000b24                OTG_HS_IRQHandler
-                0x08000b24                EXTI1_IRQHandler
-                0x08000b24                UART7_IRQHandler
-                0x08000b24                USART2_IRQHandler
-                0x08000b24                I2C2_ER_IRQHandler
-                0x08000b24                DMA2_Stream1_IRQHandler
-                0x08000b24                CAN1_SCE_IRQHandler
-                0x08000b24                FLASH_IRQHandler
-                0x08000b24                DMA2_Stream4_IRQHandler
-                0x08000b24                USART1_IRQHandler
-                0x08000b24                OTG_FS_IRQHandler
-                0x08000b24                SPI3_IRQHandler
-                0x08000b24                DMA1_Stream4_IRQHandler
-                0x08000b24                I2C1_ER_IRQHandler
-                0x08000b24                FMC_IRQHandler
-                0x08000b24                DMA2_Stream6_IRQHandler
-                0x08000b24                SAI1_IRQHandler
-                0x08000b24                DMA1_Stream3_IRQHandler
- *fill*         0x08000b26        0x2 
+                0x08000b10        0x2 ./Core/Startup/startup_stm32f429zitx.o
+                0x08000b10                RTC_Alarm_IRQHandler
+                0x08000b10                HASH_RNG_IRQHandler
+                0x08000b10                EXTI2_IRQHandler
+                0x08000b10                TIM8_CC_IRQHandler
+                0x08000b10                UART8_IRQHandler
+                0x08000b10                SPI4_IRQHandler
+                0x08000b10                TIM1_CC_IRQHandler
+                0x08000b10                DMA2_Stream5_IRQHandler
+                0x08000b10                DMA1_Stream5_IRQHandler
+                0x08000b10                PVD_IRQHandler
+                0x08000b10                SDIO_IRQHandler
+                0x08000b10                TAMP_STAMP_IRQHandler
+                0x08000b10                CAN2_RX1_IRQHandler
+                0x08000b10                EXTI3_IRQHandler
+                0x08000b10                TIM8_TRG_COM_TIM14_IRQHandler
+                0x08000b10                TIM1_UP_TIM10_IRQHandler
+                0x08000b10                TIM8_UP_TIM13_IRQHandler
+                0x08000b10                I2C3_ER_IRQHandler
+                0x08000b10                EXTI0_IRQHandler
+                0x08000b10                I2C2_EV_IRQHandler
+                0x08000b10                DMA1_Stream2_IRQHandler
+                0x08000b10                CAN1_RX0_IRQHandler
+                0x08000b10                FPU_IRQHandler
+                0x08000b10                OTG_HS_WKUP_IRQHandler
+                0x08000b10                LTDC_ER_IRQHandler
+                0x08000b10                CAN2_SCE_IRQHandler
+                0x08000b10                DMA2_Stream2_IRQHandler
+                0x08000b10                SPI1_IRQHandler
+                0x08000b10                TIM1_BRK_TIM9_IRQHandler
+                0x08000b10                DCMI_IRQHandler
+                0x08000b10                CAN2_RX0_IRQHandler
+                0x08000b10                DMA2_Stream3_IRQHandler
+                0x08000b10                USART6_IRQHandler
+                0x08000b10                USART3_IRQHandler
+                0x08000b10                CAN1_RX1_IRQHandler
+                0x08000b10                UART5_IRQHandler
+                0x08000b10                DMA2_Stream0_IRQHandler
+                0x08000b10                TIM4_IRQHandler
+                0x08000b10                I2C1_EV_IRQHandler
+                0x08000b10                DMA1_Stream6_IRQHandler
+                0x08000b10                DMA1_Stream1_IRQHandler
+                0x08000b10                UART4_IRQHandler
+                0x08000b10                TIM3_IRQHandler
+                0x08000b10                RCC_IRQHandler
+                0x08000b10                TIM8_BRK_TIM12_IRQHandler
+                0x08000b10                Default_Handler
+                0x08000b10                ADC_IRQHandler
+                0x08000b10                DMA1_Stream7_IRQHandler
+                0x08000b10                SPI5_IRQHandler
+                0x08000b10                TIM7_IRQHandler
+                0x08000b10                CAN2_TX_IRQHandler
+                0x08000b10                TIM5_IRQHandler
+                0x08000b10                DMA2_Stream7_IRQHandler
+                0x08000b10                I2C3_EV_IRQHandler
+                0x08000b10                EXTI9_5_IRQHandler
+                0x08000b10                RTC_WKUP_IRQHandler
+                0x08000b10                LTDC_IRQHandler
+                0x08000b10                ETH_WKUP_IRQHandler
+                0x08000b10                SPI2_IRQHandler
+                0x08000b10                OTG_HS_EP1_IN_IRQHandler
+                0x08000b10                DMA1_Stream0_IRQHandler
+                0x08000b10                CAN1_TX_IRQHandler
+                0x08000b10                EXTI4_IRQHandler
+                0x08000b10                ETH_IRQHandler
+                0x08000b10                OTG_HS_EP1_OUT_IRQHandler
+                0x08000b10                WWDG_IRQHandler
+                0x08000b10                SPI6_IRQHandler
+                0x08000b10                TIM2_IRQHandler
+                0x08000b10                OTG_FS_WKUP_IRQHandler
+                0x08000b10                TIM1_TRG_COM_TIM11_IRQHandler
+                0x08000b10                OTG_HS_IRQHandler
+                0x08000b10                DMA2D_IRQHandler
+                0x08000b10                EXTI1_IRQHandler
+                0x08000b10                UART7_IRQHandler
+                0x08000b10                USART2_IRQHandler
+                0x08000b10                I2C2_ER_IRQHandler
+                0x08000b10                DMA2_Stream1_IRQHandler
+                0x08000b10                CAN1_SCE_IRQHandler
+                0x08000b10                FLASH_IRQHandler
+                0x08000b10                DMA2_Stream4_IRQHandler
+                0x08000b10                USART1_IRQHandler
+                0x08000b10                OTG_FS_IRQHandler
+                0x08000b10                SPI3_IRQHandler
+                0x08000b10                DMA1_Stream4_IRQHandler
+                0x08000b10                I2C1_ER_IRQHandler
+                0x08000b10                FMC_IRQHandler
+                0x08000b10                DMA2_Stream6_IRQHandler
+                0x08000b10                SAI1_IRQHandler
+                0x08000b10                DMA1_Stream3_IRQHandler
+ *fill*         0x08000b12        0x2 
  .text.HAL_Init
-                0x08000b28       0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
-                0x08000b28                HAL_Init
+                0x08000b14       0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+                0x08000b14                HAL_Init
  .text.HAL_GetTick
-                0x08000b6c       0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
-                0x08000b6c                HAL_GetTick
+                0x08000b58       0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+                0x08000b58                HAL_GetTick
  .text.__NVIC_SetPriorityGrouping
-                0x08000b84       0x48 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+                0x08000b70       0x48 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
  .text.__NVIC_GetPriorityGrouping
-                0x08000bcc       0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+                0x08000bb8       0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
  .text.__NVIC_EnableIRQ
-                0x08000be8       0x3c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+                0x08000bd4       0x3c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
  .text.__NVIC_SetPriority
-                0x08000c24       0x54 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+                0x08000c10       0x54 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
  .text.NVIC_EncodePriority
-                0x08000c78       0x66 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+                0x08000c64       0x66 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
  .text.HAL_NVIC_SetPriorityGrouping
-                0x08000cde       0x16 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
-                0x08000cde                HAL_NVIC_SetPriorityGrouping
+                0x08000cca       0x16 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+                0x08000cca                HAL_NVIC_SetPriorityGrouping
  .text.HAL_NVIC_SetPriority
-                0x08000cf4       0x38 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
-                0x08000cf4                HAL_NVIC_SetPriority
+                0x08000ce0       0x38 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+                0x08000ce0                HAL_NVIC_SetPriority
  .text.HAL_NVIC_EnableIRQ
-                0x08000d2c       0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
-                0x08000d2c                HAL_NVIC_EnableIRQ
- .text.HAL_DMA2D_IRQHandler
-                0x08000d48      0x1f8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
-                0x08000d48                HAL_DMA2D_IRQHandler
- .text.HAL_DMA2D_LineEventCallback
-                0x08000f40       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
-                0x08000f40                HAL_DMA2D_LineEventCallback
- .text.HAL_DMA2D_CLUTLoadingCpltCallback
-                0x08000f54       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
-                0x08000f54                HAL_DMA2D_CLUTLoadingCpltCallback
+                0x08000d18       0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+                0x08000d18                HAL_NVIC_EnableIRQ
  .text.HAL_GPIO_Init
-                0x08000f68      0x358 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
-                0x08000f68                HAL_GPIO_Init
+                0x08000d34      0x358 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+                0x08000d34                HAL_GPIO_Init
  .text.HAL_GPIO_WritePin
-                0x080012c0       0x32 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
-                0x080012c0                HAL_GPIO_WritePin
- *fill*         0x080012f2        0x2 
+                0x0800108c       0x32 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+                0x0800108c                HAL_GPIO_WritePin
+ *fill*         0x080010be        0x2 
  .text.HAL_GPIO_EXTI_IRQHandler
-                0x080012f4       0x30 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
-                0x080012f4                HAL_GPIO_EXTI_IRQHandler
+                0x080010c0       0x30 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+                0x080010c0                HAL_GPIO_EXTI_IRQHandler
  .text.HAL_GPIO_EXTI_Callback
-                0x08001324       0x16 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
-                0x08001324                HAL_GPIO_EXTI_Callback
- *fill*         0x0800133a        0x2 
+                0x080010f0       0x16 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+                0x080010f0                HAL_GPIO_EXTI_Callback
+ *fill*         0x08001106        0x2 
  .text.HAL_RCC_OscConfig
-                0x0800133c      0x4f0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
-                0x0800133c                HAL_RCC_OscConfig
+                0x08001108      0x4f0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x08001108                HAL_RCC_OscConfig
  .text.HAL_RCC_ClockConfig
-                0x0800182c      0x1cc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
-                0x0800182c                HAL_RCC_ClockConfig
+                0x080015f8      0x1cc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x080015f8                HAL_RCC_ClockConfig
  .text.HAL_RCC_GetSysClockFreq
-                0x080019f8      0x20c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
-                0x080019f8                HAL_RCC_GetSysClockFreq
+                0x080017c4      0x20c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x080017c4                HAL_RCC_GetSysClockFreq
  .text.HAL_RCC_GetHCLKFreq
-                0x08001c04       0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
-                0x08001c04                HAL_RCC_GetHCLKFreq
+                0x080019d0       0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x080019d0                HAL_RCC_GetHCLKFreq
  .text.HAL_RCC_GetPCLK1Freq
-                0x08001c1c       0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
-                0x08001c1c                HAL_RCC_GetPCLK1Freq
+                0x080019e8       0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x080019e8                HAL_RCC_GetPCLK1Freq
  .text.HAL_RCC_GetClockConfig
-                0x08001c44       0x64 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
-                0x08001c44                HAL_RCC_GetClockConfig
+                0x08001a10       0x64 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x08001a10                HAL_RCC_GetClockConfig
  .text.HAL_TIM_Base_Init
-                0x08001ca8       0x9e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
-                0x08001ca8                HAL_TIM_Base_Init
- *fill*         0x08001d46        0x2 
+                0x08001a74       0x9e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x08001a74                HAL_TIM_Base_Init
+ *fill*         0x08001b12        0x2 
  .text.HAL_TIM_Base_Start_IT
-                0x08001d48       0xe0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
-                0x08001d48                HAL_TIM_Base_Start_IT
+                0x08001b14       0xe0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x08001b14                HAL_TIM_Base_Start_IT
  .text.HAL_TIM_IRQHandler
-                0x08001e28      0x1e0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
-                0x08001e28                HAL_TIM_IRQHandler
+                0x08001bf4      0x1e0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x08001bf4                HAL_TIM_IRQHandler
  .text.HAL_TIM_PeriodElapsedCallback
-                0x08002008       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
-                0x08002008                HAL_TIM_PeriodElapsedCallback
+                0x08001dd4       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x08001dd4                HAL_TIM_PeriodElapsedCallback
  .text.HAL_TIM_OC_DelayElapsedCallback
-                0x0800201c       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
-                0x0800201c                HAL_TIM_OC_DelayElapsedCallback
+                0x08001de8       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x08001de8                HAL_TIM_OC_DelayElapsedCallback
  .text.HAL_TIM_IC_CaptureCallback
-                0x08002030       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
-                0x08002030                HAL_TIM_IC_CaptureCallback
+                0x08001dfc       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x08001dfc                HAL_TIM_IC_CaptureCallback
  .text.HAL_TIM_PWM_PulseFinishedCallback
-                0x08002044       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
-                0x08002044                HAL_TIM_PWM_PulseFinishedCallback
+                0x08001e10       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x08001e10                HAL_TIM_PWM_PulseFinishedCallback
  .text.HAL_TIM_TriggerCallback
-                0x08002058       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
-                0x08002058                HAL_TIM_TriggerCallback
+                0x08001e24       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x08001e24                HAL_TIM_TriggerCallback
  .text.TIM_Base_SetConfig
-                0x0800206c      0x14c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
-                0x0800206c                TIM_Base_SetConfig
+                0x08001e38      0x14c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x08001e38                TIM_Base_SetConfig
  .text.HAL_TIMEx_CommutCallback
-                0x080021b8       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
-                0x080021b8                HAL_TIMEx_CommutCallback
+                0x08001f84       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+                0x08001f84                HAL_TIMEx_CommutCallback
  .text.HAL_TIMEx_BreakCallback
-                0x080021cc       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
-                0x080021cc                HAL_TIMEx_BreakCallback
+                0x08001f98       0x14 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+                0x08001f98                HAL_TIMEx_BreakCallback
  .text.vListInsertEnd
-                0x080021e0       0x48 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
-                0x080021e0                vListInsertEnd
+                0x08001fac       0x48 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+                0x08001fac                vListInsertEnd
  .text.uxListRemove
-                0x08002228       0x54 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
-                0x08002228                uxListRemove
+                0x08001ff4       0x54 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+                0x08001ff4                uxListRemove
  .text.xTaskIncrementTick
-                0x0800227c      0x174 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
-                0x0800227c                xTaskIncrementTick
+                0x08002048      0x174 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x08002048                xTaskIncrementTick
  .text.vTaskSwitchContext
-                0x080023f0      0x104 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
-                0x080023f0                vTaskSwitchContext
+                0x080021bc      0x104 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x080021bc                vTaskSwitchContext
  .text.prvResetNextTaskUnblockTime
-                0x080024f4       0x40 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- *fill*         0x08002534        0xc 
+                0x080022c0       0x40 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
  .text.SVC_Handler
-                0x08002540       0x28 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
-                0x08002540                SVC_Handler
- *fill*         0x08002568        0x8 
+                0x08002300       0x28 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
+                0x08002300                SVC_Handler
+ *fill*         0x08002328        0x8 
  .text.PendSV_Handler
-                0x08002570       0x68 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
-                0x08002570                PendSV_Handler
+                0x08002330       0x68 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
+                0x08002330                PendSV_Handler
  .text.SysTick_Handler
-                0x080025d8       0x44 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
-                0x080025d8                SysTick_Handler
- .text.memset   0x0800261c       0x10 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o)
-                0x0800261c                memset
+                0x08002398       0x44 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
+                0x08002398                SysTick_Handler
+ .text.memset   0x080023dc       0x10 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o)
+                0x080023dc                memset
  .text.__libc_init_array
-                0x0800262c       0x48 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o)
-                0x0800262c                __libc_init_array
+                0x080023ec       0x48 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o)
+                0x080023ec                __libc_init_array
  *(.glue_7)
- .glue_7        0x08002674        0x0 linker stubs
+ .glue_7        0x08002434        0x0 linker stubs
  *(.glue_7t)
- .glue_7t       0x08002674        0x0 linker stubs
+ .glue_7t       0x08002434        0x0 linker stubs
  *(.eh_frame)
- .eh_frame      0x08002674        0x0 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+ .eh_frame      0x08002434        0x0 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o
  *(.init)
- .init          0x08002674        0x4 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crti.o
-                0x08002674                _init
- .init          0x08002678        0x8 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtn.o
+ .init          0x08002434        0x4 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crti.o
+                0x08002434                _init
+ .init          0x08002438        0x8 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtn.o
  *(.fini)
- .fini          0x08002680        0x4 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crti.o
-                0x08002680                _fini
- .fini          0x08002684        0x8 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtn.o
-                0x0800268c                        . = ALIGN (0x4)
-                0x0800268c                        _etext = .
+ .fini          0x08002440        0x4 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crti.o
+                0x08002440                _fini
+ .fini          0x08002444        0x8 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtn.o
+                0x0800244c                        . = ALIGN (0x4)
+                0x0800244c                        _etext = .
 
-.vfp11_veneer   0x0800268c        0x0
- .vfp11_veneer  0x0800268c        0x0 linker stubs
+.vfp11_veneer   0x0800244c        0x0
+ .vfp11_veneer  0x0800244c        0x0 linker stubs
 
-.v4_bx          0x0800268c        0x0
- .v4_bx         0x0800268c        0x0 linker stubs
+.v4_bx          0x0800244c        0x0
+ .v4_bx         0x0800244c        0x0 linker stubs
 
-.iplt           0x0800268c        0x0
- .iplt          0x0800268c        0x0 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+.iplt           0x0800244c        0x0
+ .iplt          0x0800244c        0x0 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o
 
-.rodata         0x0800268c       0x18
-                0x0800268c                        . = ALIGN (0x4)
+.rodata         0x0800244c       0x18
+                0x0800244c                        . = ALIGN (0x4)
  *(.rodata)
  *(.rodata*)
  .rodata.AHBPrescTable
-                0x0800268c       0x10 ./Core/Src/system_stm32f4xx.o
-                0x0800268c                AHBPrescTable
+                0x0800244c       0x10 ./Core/Src/system_stm32f4xx.o
+                0x0800244c                AHBPrescTable
  .rodata.APBPrescTable
-                0x0800269c        0x8 ./Core/Src/system_stm32f4xx.o
-                0x0800269c                APBPrescTable
-                0x080026a4                        . = ALIGN (0x4)
+                0x0800245c        0x8 ./Core/Src/system_stm32f4xx.o
+                0x0800245c                APBPrescTable
+                0x08002464                        . = ALIGN (0x4)
 
-.ARM.extab      0x080026a4        0x0
-                0x080026a4                        . = ALIGN (0x4)
+.ARM.extab      0x08002464        0x0
+                0x08002464                        . = ALIGN (0x4)
  *(.ARM.extab* .gnu.linkonce.armextab.*)
-                0x080026a4                        . = ALIGN (0x4)
+                0x08002464                        . = ALIGN (0x4)
 
-.ARM            0x080026a4        0x8
-                0x080026a4                        . = ALIGN (0x4)
-                0x080026a4                        __exidx_start = .
+.ARM            0x08002464        0x8
+                0x08002464                        . = ALIGN (0x4)
+                0x08002464                        __exidx_start = .
  *(.ARM.exidx*)
- .ARM.exidx     0x080026a4        0x8 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o)
-                0x080026ac                        __exidx_end = .
-                0x080026ac                        . = ALIGN (0x4)
+ .ARM.exidx     0x08002464        0x8 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o)
+                0x0800246c                        __exidx_end = .
+                0x0800246c                        . = ALIGN (0x4)
 
-.preinit_array  0x080026ac        0x0
-                0x080026ac                        . = ALIGN (0x4)
-                0x080026ac                        PROVIDE (__preinit_array_start = .)
+.preinit_array  0x0800246c        0x0
+                0x0800246c                        . = ALIGN (0x4)
+                0x0800246c                        PROVIDE (__preinit_array_start = .)
  *(.preinit_array*)
-                0x080026ac                        PROVIDE (__preinit_array_end = .)
-                0x080026ac                        . = ALIGN (0x4)
+                0x0800246c                        PROVIDE (__preinit_array_end = .)
+                0x0800246c                        . = ALIGN (0x4)
 
-.init_array     0x080026ac        0x4
-                0x080026ac                        . = ALIGN (0x4)
-                0x080026ac                        PROVIDE (__init_array_start = .)
+.init_array     0x0800246c        0x4
+                0x0800246c                        . = ALIGN (0x4)
+                0x0800246c                        PROVIDE (__init_array_start = .)
  *(SORT_BY_NAME(.init_array.*))
  *(.init_array*)
- .init_array    0x080026ac        0x4 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o
-                0x080026b0                        PROVIDE (__init_array_end = .)
-                0x080026b0                        . = ALIGN (0x4)
+ .init_array    0x0800246c        0x4 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+                0x08002470                        PROVIDE (__init_array_end = .)
+                0x08002470                        . = ALIGN (0x4)
 
-.fini_array     0x080026b0        0x4
-                0x080026b0                        . = ALIGN (0x4)
+.fini_array     0x08002470        0x4
+                0x08002470                        . = ALIGN (0x4)
                 [!provide]                        PROVIDE (__fini_array_start = .)
  *(SORT_BY_NAME(.fini_array.*))
  *(.fini_array*)
- .fini_array    0x080026b0        0x4 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+ .fini_array    0x08002470        0x4 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o
                 [!provide]                        PROVIDE (__fini_array_end = .)
-                0x080026b4                        . = ALIGN (0x4)
-                0x080026b4                        _sidata = LOADADDR (.data)
+                0x08002474                        . = ALIGN (0x4)
+                0x08002474                        _sidata = LOADADDR (.data)
 
-.rel.dyn        0x080026b4        0x0
- .rel.iplt      0x080026b4        0x0 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o
+.rel.dyn        0x08002474        0x0
+ .rel.iplt      0x08002474        0x0 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o
 
-.data           0x20000000        0x8 load address 0x080026b4
+.data           0x20000000        0x8 load address 0x08002474
                 0x20000000                        . = ALIGN (0x4)
                 0x20000000                        _sdata = .
  *(.data)
@@ -4934,12 +4941,12 @@ LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externalto
  *(.RamFunc*)
                 0x20000008                        . = ALIGN (0x4)
                 0x20000008                        _edata = .
-                0x080026bc                        _siccmram = LOADADDR (.ccmram)
+                0x0800247c                        _siccmram = LOADADDR (.ccmram)
 
-.igot.plt       0x20000008        0x0 load address 0x080026bc
+.igot.plt       0x20000008        0x0 load address 0x0800247c
  .igot.plt      0x20000008        0x0 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtbegin.o
 
-.ccmram         0x10000000        0x0 load address 0x080026bc
+.ccmram         0x10000000        0x0 load address 0x0800247c
                 0x10000000                        . = ALIGN (0x4)
                 0x10000000                        _sccmram = .
  *(.ccmram)
@@ -5044,78 +5051,74 @@ LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externalto
  .ARM.attributes
                 0x000001e3       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
  .ARM.attributes
-                0x00000217       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+                0x00000217       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
  .ARM.attributes
-                0x0000024b       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+                0x0000024b       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
  .ARM.attributes
-                0x0000027f       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x0000027f       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
  .ARM.attributes
-                0x000002b3       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x000002b3       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
  .ARM.attributes
-                0x000002e7       0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+                0x000002e7       0x34 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
  .ARM.attributes
-                0x0000031b       0x34 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+                0x0000031b       0x34 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
  .ARM.attributes
-                0x0000034f       0x34 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+                0x0000034f       0x34 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
  .ARM.attributes
-                0x00000383       0x34 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
+                0x00000383       0x34 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o)
  .ARM.attributes
-                0x000003b7       0x34 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o)
+                0x000003b7       0x34 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o)
  .ARM.attributes
-                0x000003eb       0x34 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o)
+                0x000003eb       0x22 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o)
  .ARM.attributes
-                0x0000041f       0x22 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o)
+                0x0000040d       0x34 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o)
  .ARM.attributes
-                0x00000441       0x34 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o)
+                0x00000441       0x22 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o)
  .ARM.attributes
-                0x00000475       0x22 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o)
- .ARM.attributes
-                0x00000497       0x22 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtn.o
+                0x00000463       0x22 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/crtn.o
 OUTPUT(TrafficLightsPlusPlus.elf elf32-littlearm)
 LOAD linker stubs
 LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a
 LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libm.a
 LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a
 
-.debug_info     0x00000000     0xd46e
+.debug_info     0x00000000     0xc2af
  .debug_info    0x00000000      0x2f5 ./Core/Src/freertos.o
- .debug_info    0x000002f5      0xb58 ./Core/Src/main.o
- .debug_info    0x00000e4d      0xff1 ./Core/Src/stm32f4xx_hal_msp.o
- .debug_info    0x00001e3e      0xc40 ./Core/Src/stm32f4xx_hal_timebase_tim.o
- .debug_info    0x00002a7e      0x9f7 ./Core/Src/stm32f4xx_it.o
- .debug_info    0x00003475      0x52e ./Core/Src/system_stm32f4xx.o
- .debug_info    0x000039a3       0x30 ./Core/Startup/startup_stm32f429zitx.o
- .debug_info    0x000039d3      0x9ba ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
- .debug_info    0x0000438d      0xdc2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
- .debug_info    0x0000514f      0xe82 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
- .debug_info    0x00005fd1      0x6db ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
- .debug_info    0x000066ac      0x8db ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
- .debug_info    0x00006f87     0x299d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
- .debug_info    0x00009924     0x14db ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
- .debug_info    0x0000adff      0x2af ./Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_info    0x0000b0ae     0x1ee2 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_info    0x0000cf90      0x4de ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
+ .debug_info    0x000002f5      0xb4f ./Core/Src/main.o
+ .debug_info    0x00000e44      0xfd1 ./Core/Src/stm32f4xx_hal_msp.o
+ .debug_info    0x00001e15      0xc40 ./Core/Src/stm32f4xx_hal_timebase_tim.o
+ .debug_info    0x00002a55      0x6e3 ./Core/Src/stm32f4xx_it.o
+ .debug_info    0x00003138      0x52e ./Core/Src/system_stm32f4xx.o
+ .debug_info    0x00003666       0x30 ./Core/Startup/startup_stm32f429zitx.o
+ .debug_info    0x00003696      0x9ba ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+ .debug_info    0x00004050      0xdc2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+ .debug_info    0x00004e12      0x6db ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+ .debug_info    0x000054ed      0x8db ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+ .debug_info    0x00005dc8     0x299d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+ .debug_info    0x00008765     0x14db ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+ .debug_info    0x00009c40      0x2af ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_info    0x00009eef     0x1ee2 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_info    0x0000bdd1      0x4de ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
 
-.debug_abbrev   0x00000000     0x225c
+.debug_abbrev   0x00000000     0x1fa2
  .debug_abbrev  0x00000000       0xf6 ./Core/Src/freertos.o
- .debug_abbrev  0x000000f6      0x2d0 ./Core/Src/main.o
- .debug_abbrev  0x000003c6      0x1ee ./Core/Src/stm32f4xx_hal_msp.o
- .debug_abbrev  0x000005b4      0x1f4 ./Core/Src/stm32f4xx_hal_timebase_tim.o
- .debug_abbrev  0x000007a8      0x1b8 ./Core/Src/stm32f4xx_it.o
- .debug_abbrev  0x00000960      0x11a ./Core/Src/system_stm32f4xx.o
- .debug_abbrev  0x00000a7a       0x24 ./Core/Startup/startup_stm32f429zitx.o
- .debug_abbrev  0x00000a9e      0x214 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
- .debug_abbrev  0x00000cb2      0x31d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
- .debug_abbrev  0x00000fcf      0x23e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
- .debug_abbrev  0x0000120d      0x1d4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
- .debug_abbrev  0x000013e1      0x2b7 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
- .debug_abbrev  0x00001698      0x278 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
- .debug_abbrev  0x00001910      0x283 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
- .debug_abbrev  0x00001b93       0xf5 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_abbrev  0x00001c88      0x378 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_abbrev  0x00002000      0x25c ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
+ .debug_abbrev  0x000000f6      0x297 ./Core/Src/main.o
+ .debug_abbrev  0x0000038d      0x1cf ./Core/Src/stm32f4xx_hal_msp.o
+ .debug_abbrev  0x0000055c      0x1f4 ./Core/Src/stm32f4xx_hal_timebase_tim.o
+ .debug_abbrev  0x00000750      0x194 ./Core/Src/stm32f4xx_it.o
+ .debug_abbrev  0x000008e4      0x11a ./Core/Src/system_stm32f4xx.o
+ .debug_abbrev  0x000009fe       0x24 ./Core/Startup/startup_stm32f429zitx.o
+ .debug_abbrev  0x00000a22      0x214 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+ .debug_abbrev  0x00000c36      0x31d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+ .debug_abbrev  0x00000f53      0x1d4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+ .debug_abbrev  0x00001127      0x2b7 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+ .debug_abbrev  0x000013de      0x278 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+ .debug_abbrev  0x00001656      0x283 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+ .debug_abbrev  0x000018d9       0xf5 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_abbrev  0x000019ce      0x378 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_abbrev  0x00001d46      0x25c ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
 
-.debug_aranges  0x00000000      0xda8
+.debug_aranges  0x00000000      0xc88
  .debug_aranges
                 0x00000000       0x38 ./Core/Src/freertos.o
  .debug_aranges
@@ -5125,34 +5128,32 @@ LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externalto
  .debug_aranges
                 0x000000d0       0x30 ./Core/Src/stm32f4xx_hal_timebase_tim.o
  .debug_aranges
-                0x00000100       0x60 ./Core/Src/stm32f4xx_it.o
+                0x00000100       0x58 ./Core/Src/stm32f4xx_it.o
  .debug_aranges
-                0x00000160       0x28 ./Core/Src/system_stm32f4xx.o
+                0x00000158       0x28 ./Core/Src/system_stm32f4xx.o
  .debug_aranges
-                0x00000188       0x28 ./Core/Startup/startup_stm32f429zitx.o
+                0x00000180       0x28 ./Core/Startup/startup_stm32f429zitx.o
  .debug_aranges
-                0x000001b0      0x100 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+                0x000001a8      0x100 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
  .debug_aranges
-                0x000002b0      0x130 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+                0x000002a8      0x130 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
  .debug_aranges
-                0x000003e0      0x118 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+                0x000003d8       0x58 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
  .debug_aranges
-                0x000004f8       0x58 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+                0x00000430       0x88 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
  .debug_aranges
-                0x00000550       0x88 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x000004b8      0x3d0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
  .debug_aranges
-                0x000005d8      0x3d0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x00000888      0x168 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
  .debug_aranges
-                0x000009a8      0x168 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+                0x000009f0       0x40 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
  .debug_aranges
-                0x00000b10       0x40 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+                0x00000a30      0x1d8 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
  .debug_aranges
-                0x00000b50      0x1d8 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_aranges
-                0x00000d28       0x80 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
+                0x00000c08       0x80 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
 
 .debug_rnglists
-                0x00000000      0xa80
+                0x00000000      0x99e
  .debug_rnglists
                 0x00000000       0x25 ./Core/Src/freertos.o
  .debug_rnglists
@@ -5162,33 +5163,31 @@ LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externalto
  .debug_rnglists
                 0x00000090       0x20 ./Core/Src/stm32f4xx_hal_timebase_tim.o
  .debug_rnglists
-                0x000000b0       0x43 ./Core/Src/stm32f4xx_it.o
+                0x000000b0       0x3d ./Core/Src/stm32f4xx_it.o
  .debug_rnglists
-                0x000000f3       0x1a ./Core/Src/system_stm32f4xx.o
+                0x000000ed       0x1a ./Core/Src/system_stm32f4xx.o
  .debug_rnglists
-                0x0000010d       0x19 ./Core/Startup/startup_stm32f429zitx.o
+                0x00000107       0x19 ./Core/Startup/startup_stm32f429zitx.o
  .debug_rnglists
-                0x00000126       0xbb ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+                0x00000120       0xbb ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
  .debug_rnglists
-                0x000001e1       0xe0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+                0x000001db       0xe0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
  .debug_rnglists
-                0x000002c1       0xdc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+                0x000002bb       0x3f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
  .debug_rnglists
-                0x0000039d       0x3f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+                0x000002fa       0x66 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
  .debug_rnglists
-                0x000003dc       0x66 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+                0x00000360      0x31a ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
  .debug_rnglists
-                0x00000442      0x31a ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+                0x0000067a      0x125 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
  .debug_rnglists
-                0x0000075c      0x125 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+                0x0000079f       0x2b ./Middlewares/Third_Party/FreeRTOS/Source/list.o
  .debug_rnglists
-                0x00000881       0x2b ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+                0x000007ca      0x177 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
  .debug_rnglists
-                0x000008ac      0x177 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_rnglists
-                0x00000a23       0x5d ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
+                0x00000941       0x5d ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
 
-.debug_macro    0x00000000    0x24dae
+.debug_macro    0x00000000    0x24bc7
  .debug_macro   0x00000000      0x24f ./Core/Src/freertos.o
  .debug_macro   0x0000024f      0xad8 ./Core/Src/freertos.o
  .debug_macro   0x00000d27      0x190 ./Core/Src/freertos.o
@@ -5250,54 +5249,51 @@ LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externalto
  .debug_macro   0x000238ae      0x1d8 ./Core/Src/system_stm32f4xx.o
  .debug_macro   0x00023a86      0x238 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
  .debug_macro   0x00023cbe      0x1d8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
- .debug_macro   0x00023e96      0x1e7 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
- .debug_macro   0x0002407d      0x1de ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
- .debug_macro   0x0002425b      0x1fc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
- .debug_macro   0x00024457      0x1d9 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
- .debug_macro   0x00024630      0x1d8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
- .debug_macro   0x00024808      0x187 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_macro   0x0002498f      0x279 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x00024c08       0x10 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_macro   0x00024c18      0x196 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
+ .debug_macro   0x00023e96      0x1de ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+ .debug_macro   0x00024074      0x1fc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+ .debug_macro   0x00024270      0x1d9 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+ .debug_macro   0x00024449      0x1d8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+ .debug_macro   0x00024621      0x187 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_macro   0x000247a8      0x279 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x00024a21       0x10 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_macro   0x00024a31      0x196 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
 
-.debug_line     0x00000000     0xe56f
+.debug_line     0x00000000     0xd483
  .debug_line    0x00000000      0x7f0 ./Core/Src/freertos.o
- .debug_line    0x000007f0      0x875 ./Core/Src/main.o
- .debug_line    0x00001065      0x75f ./Core/Src/stm32f4xx_hal_msp.o
- .debug_line    0x000017c4      0x731 ./Core/Src/stm32f4xx_hal_timebase_tim.o
- .debug_line    0x00001ef5      0x76c ./Core/Src/stm32f4xx_it.o
- .debug_line    0x00002661      0x729 ./Core/Src/system_stm32f4xx.o
- .debug_line    0x00002d8a       0x7a ./Core/Startup/startup_stm32f429zitx.o
- .debug_line    0x00002e04      0x9db ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
- .debug_line    0x000037df      0xc75 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
- .debug_line    0x00004454     0x10cd ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
- .debug_line    0x00005521      0xb25 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
- .debug_line    0x00006046      0xdb4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
- .debug_line    0x00006dfa     0x371a ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
- .debug_line    0x0000a514     0x1905 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
- .debug_line    0x0000be19      0x6d5 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_line    0x0000c4ee     0x191b ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_line    0x0000de09      0x766 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
+ .debug_line    0x000007f0      0x871 ./Core/Src/main.o
+ .debug_line    0x00001061      0x75c ./Core/Src/stm32f4xx_hal_msp.o
+ .debug_line    0x000017bd      0x731 ./Core/Src/stm32f4xx_hal_timebase_tim.o
+ .debug_line    0x00001eee      0x754 ./Core/Src/stm32f4xx_it.o
+ .debug_line    0x00002642      0x729 ./Core/Src/system_stm32f4xx.o
+ .debug_line    0x00002d6b       0x7a ./Core/Startup/startup_stm32f429zitx.o
+ .debug_line    0x00002de5      0x9db ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+ .debug_line    0x000037c0      0xc75 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+ .debug_line    0x00004435      0xb25 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+ .debug_line    0x00004f5a      0xdb4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+ .debug_line    0x00005d0e     0x371a ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+ .debug_line    0x00009428     0x1905 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+ .debug_line    0x0000ad2d      0x6d5 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_line    0x0000b402     0x191b ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_line    0x0000cd1d      0x766 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
 
-.debug_str      0x00000000    0xdf784
- .debug_str     0x00000000    0xdf784 ./Core/Src/freertos.o
+.debug_str      0x00000000    0xdf3c5
+ .debug_str     0x00000000    0xdf3c5 ./Core/Src/freertos.o
                               0xd6231 (size before relaxing)
- .debug_str     0x000df784    0xd3337 ./Core/Src/main.o
- .debug_str     0x000df784    0xd3167 ./Core/Src/stm32f4xx_hal_msp.o
- .debug_str     0x000df784    0xd2e9d ./Core/Src/stm32f4xx_hal_timebase_tim.o
- .debug_str     0x000df784    0xd2a73 ./Core/Src/stm32f4xx_it.o
- .debug_str     0x000df784    0xd2342 ./Core/Src/system_stm32f4xx.o
- .debug_str     0x000df784       0x71 ./Core/Startup/startup_stm32f429zitx.o
- .debug_str     0x000df784    0xd2f65 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
- .debug_str     0x000df784    0xd2c93 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
- .debug_str     0x000df784    0xd291e ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
- .debug_str     0x000df784    0xd24bd ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
- .debug_str     0x000df784    0xd2776 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
- .debug_str     0x000df784    0xd36b9 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
- .debug_str     0x000df784    0xd2ec5 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
- .debug_str     0x000df784     0xac1b ./Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_str     0x000df784     0xd209 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_str     0x000df784     0x87bd ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
+ .debug_str     0x000df3c5    0xd3337 ./Core/Src/main.o
+ .debug_str     0x000df3c5    0xd3140 ./Core/Src/stm32f4xx_hal_msp.o
+ .debug_str     0x000df3c5    0xd2e9d ./Core/Src/stm32f4xx_hal_timebase_tim.o
+ .debug_str     0x000df3c5    0xd2882 ./Core/Src/stm32f4xx_it.o
+ .debug_str     0x000df3c5    0xd2342 ./Core/Src/system_stm32f4xx.o
+ .debug_str     0x000df3c5       0x71 ./Core/Startup/startup_stm32f429zitx.o
+ .debug_str     0x000df3c5    0xd2f65 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+ .debug_str     0x000df3c5    0xd2c93 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+ .debug_str     0x000df3c5    0xd24bd ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+ .debug_str     0x000df3c5    0xd2776 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+ .debug_str     0x000df3c5    0xd36b9 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+ .debug_str     0x000df3c5    0xd2ec5 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+ .debug_str     0x000df3c5     0xac1b ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_str     0x000df3c5     0xd209 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_str     0x000df3c5     0x87bd ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
 
 .comment        0x00000000       0x43
  .comment       0x00000000       0x43 ./Core/Src/freertos.o
@@ -5309,7 +5305,6 @@ LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externalto
  .comment       0x00000043       0x44 ./Core/Src/system_stm32f4xx.o
  .comment       0x00000043       0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
  .comment       0x00000043       0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
- .comment       0x00000043       0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
  .comment       0x00000043       0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
  .comment       0x00000043       0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
  .comment       0x00000043       0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
@@ -5318,27 +5313,26 @@ LOAD /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externalto
  .comment       0x00000043       0x44 ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
  .comment       0x00000043       0x44 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
 
-.debug_frame    0x00000000     0x3868
+.debug_frame    0x00000000     0x3374
  .debug_frame   0x00000000       0xa0 ./Core/Src/freertos.o
  .debug_frame   0x000000a0       0xd8 ./Core/Src/main.o
- .debug_frame   0x00000178      0x11c ./Core/Src/stm32f4xx_hal_msp.o
- .debug_frame   0x00000294       0x74 ./Core/Src/stm32f4xx_hal_timebase_tim.o
- .debug_frame   0x00000308       0xfc ./Core/Src/stm32f4xx_it.o
- .debug_frame   0x00000404       0x58 ./Core/Src/system_stm32f4xx.o
- .debug_frame   0x0000045c      0x3b4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
- .debug_frame   0x00000810      0x508 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
- .debug_frame   0x00000d18      0x4e0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
- .debug_frame   0x000011f8      0x14c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
- .debug_frame   0x00001344      0x1f4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
- .debug_frame   0x00001538     0x11c0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
- .debug_frame   0x000026f8      0x638 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
- .debug_frame   0x00002d30       0xd8 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
- .debug_frame   0x00002e08      0x80c ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
- .debug_frame   0x00003614      0x1a8 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
- .debug_frame   0x000037bc       0x20 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o)
- .debug_frame   0x000037dc       0x2c /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o)
- .debug_frame   0x00003808       0x2c /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o)
- .debug_frame   0x00003834       0x34 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o)
+ .debug_frame   0x00000178      0x124 ./Core/Src/stm32f4xx_hal_msp.o
+ .debug_frame   0x0000029c       0x74 ./Core/Src/stm32f4xx_hal_timebase_tim.o
+ .debug_frame   0x00000310       0xe0 ./Core/Src/stm32f4xx_it.o
+ .debug_frame   0x000003f0       0x58 ./Core/Src/system_stm32f4xx.o
+ .debug_frame   0x00000448      0x3b4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+ .debug_frame   0x000007fc      0x508 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+ .debug_frame   0x00000d04      0x14c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+ .debug_frame   0x00000e50      0x1f4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+ .debug_frame   0x00001044     0x11c0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o
+ .debug_frame   0x00002204      0x638 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o
+ .debug_frame   0x0000283c       0xd8 ./Middlewares/Third_Party/FreeRTOS/Source/list.o
+ .debug_frame   0x00002914      0x80c ./Middlewares/Third_Party/FreeRTOS/Source/tasks.o
+ .debug_frame   0x00003120      0x1a8 ./Middlewares/Third_Party/FreeRTOS/Source/portable/GCC/ARM_CM4F/port.o
+ .debug_frame   0x000032c8       0x20 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o)
+ .debug_frame   0x000032e8       0x2c /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o)
+ .debug_frame   0x00003314       0x2c /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o)
+ .debug_frame   0x00003340       0x34 /home/ja/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.13.3.rel1.linux64_1.0.0.202410170706/tools/bin/../lib/gcc/arm-none-eabi/13.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o)
 
 .debug_line_str
                 0x00000000       0x55
diff --git a/TrafficLightsPlusPlus/TrafficLightsPlusPlus.ioc b/TrafficLightsPlusPlus/TrafficLightsPlusPlus.ioc
index 836a0b5..96931fc 100644
--- a/TrafficLightsPlusPlus/TrafficLightsPlusPlus.ioc
+++ b/TrafficLightsPlusPlus/TrafficLightsPlusPlus.ioc
@@ -43,7 +43,6 @@ Mcu.UserName=STM32F429ZITx
 MxCube.Version=6.15.0
 MxDb.Version=DB.6.0.150
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
-NVIC.DMA2D_IRQn=true\:5\:0\:true\:false\:true\:true\:true\:true\:true
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.EXTI15_10_IRQn=true\:15\:0\:true\:false\:true\:true\:true\:true\:true
 NVIC.ForceEnableDMAVector=true