diff --git a/Core/Src/main.c b/Core/Src/main.c index e031da8..f1551fe 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -31,7 +31,7 @@ /* Private define ------------------------------------------------------------*/ /* USER CODE BEGIN PD */ - +//#define LED3 LED3 //missed this part of the lecture, this program can probably still be made without it though /* USER CODE END PD */ /* Private macro -------------------------------------------------------------*/ @@ -201,11 +201,24 @@ static void MX_GPIO_Init(void) } /* USER CODE BEGIN 4 */ -void doInterruptThingy() +int on = 0; +void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { - + if (GPIO_Pin == B1_Pin) + { + //do stuff + if (on == 1) + { + HAL_GPIO_WritePin(GPIOG, G1_Pin, 0); + on = 0; + } + else + { + HAL_GPIO_WritePin(GPIOG, G1_Pin, 1); + on = 1; + } + } } - /* USER CODE END 4 */ /** diff --git a/Debug/Core/Src/main.cyclo b/Debug/Core/Src/main.cyclo new file mode 100644 index 0000000..09dc913 --- /dev/null +++ b/Debug/Core/Src/main.cyclo @@ -0,0 +1,6 @@ +../Core/Src/main.c:65:5:main 1 +../Core/Src/main.c:112:6:SystemClock_Config 3 +../Core/Src/main.c:158:13:MX_NVIC_Init 1 +../Core/Src/main.c:170:13:MX_GPIO_Init 1 +../Core/Src/main.c:205:6:HAL_GPIO_EXTI_Callback 3 +../Core/Src/main.c:228:6:Error_Handler 1 diff --git a/Debug/Core/Src/main.d b/Debug/Core/Src/main.d new file mode 100644 index 0000000..6b7e0e7 --- /dev/null +++ b/Debug/Core/Src/main.d @@ -0,0 +1,52 @@ +Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Core/Inc/main.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Core/Src/main.o b/Debug/Core/Src/main.o new file mode 100644 index 0000000..c0377d5 Binary files /dev/null and b/Debug/Core/Src/main.o differ diff --git a/Debug/Core/Src/main.su b/Debug/Core/Src/main.su new file mode 100644 index 0000000..47ccde3 --- /dev/null +++ b/Debug/Core/Src/main.su @@ -0,0 +1,6 @@ +../Core/Src/main.c:65:5:main 8 static +../Core/Src/main.c:112:6:SystemClock_Config 88 static +../Core/Src/main.c:158:13:MX_NVIC_Init 8 static +../Core/Src/main.c:170:13:MX_GPIO_Init 40 static +../Core/Src/main.c:205:6:HAL_GPIO_EXTI_Callback 16 static +../Core/Src/main.c:228:6:Error_Handler 4 static,ignoring_inline_asm diff --git a/Debug/Core/Src/stm32f4xx_hal_msp.cyclo b/Debug/Core/Src/stm32f4xx_hal_msp.cyclo new file mode 100644 index 0000000..ae31cf9 --- /dev/null +++ b/Debug/Core/Src/stm32f4xx_hal_msp.cyclo @@ -0,0 +1 @@ +../Core/Src/stm32f4xx_hal_msp.c:63:6:HAL_MspInit 1 diff --git a/Debug/Core/Src/stm32f4xx_hal_msp.d b/Debug/Core/Src/stm32f4xx_hal_msp.d new file mode 100644 index 0000000..f8a21d8 --- /dev/null +++ b/Debug/Core/Src/stm32f4xx_hal_msp.d @@ -0,0 +1,52 @@ +Core/Src/stm32f4xx_hal_msp.o: ../Core/Src/stm32f4xx_hal_msp.c \ + ../Core/Inc/main.h ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Core/Inc/main.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Core/Src/stm32f4xx_hal_msp.o b/Debug/Core/Src/stm32f4xx_hal_msp.o new file mode 100644 index 0000000..790d81f Binary files /dev/null and b/Debug/Core/Src/stm32f4xx_hal_msp.o differ diff --git a/Debug/Core/Src/stm32f4xx_hal_msp.su b/Debug/Core/Src/stm32f4xx_hal_msp.su new file mode 100644 index 0000000..dbeb228 --- /dev/null +++ b/Debug/Core/Src/stm32f4xx_hal_msp.su @@ -0,0 +1 @@ +../Core/Src/stm32f4xx_hal_msp.c:63:6:HAL_MspInit 16 static diff --git a/Debug/Core/Src/stm32f4xx_it.cyclo b/Debug/Core/Src/stm32f4xx_it.cyclo new file mode 100644 index 0000000..e1f502c --- /dev/null +++ b/Debug/Core/Src/stm32f4xx_it.cyclo @@ -0,0 +1,10 @@ +../Core/Src/stm32f4xx_it.c:69:6:NMI_Handler 1 +../Core/Src/stm32f4xx_it.c:84:6:HardFault_Handler 1 +../Core/Src/stm32f4xx_it.c:99:6:MemManage_Handler 1 +../Core/Src/stm32f4xx_it.c:114:6:BusFault_Handler 1 +../Core/Src/stm32f4xx_it.c:129:6:UsageFault_Handler 1 +../Core/Src/stm32f4xx_it.c:144:6:SVC_Handler 1 +../Core/Src/stm32f4xx_it.c:157:6:DebugMon_Handler 1 +../Core/Src/stm32f4xx_it.c:170:6:PendSV_Handler 1 +../Core/Src/stm32f4xx_it.c:183:6:SysTick_Handler 1 +../Core/Src/stm32f4xx_it.c:204:6:EXTI0_IRQHandler 1 diff --git a/Debug/Core/Src/stm32f4xx_it.d b/Debug/Core/Src/stm32f4xx_it.d new file mode 100644 index 0000000..3d25c1f --- /dev/null +++ b/Debug/Core/Src/stm32f4xx_it.d @@ -0,0 +1,54 @@ +Core/Src/stm32f4xx_it.o: ../Core/Src/stm32f4xx_it.c ../Core/Inc/main.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \ + ../Core/Inc/stm32f4xx_it.h +../Core/Inc/main.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: +../Core/Inc/stm32f4xx_it.h: diff --git a/Debug/Core/Src/stm32f4xx_it.o b/Debug/Core/Src/stm32f4xx_it.o new file mode 100644 index 0000000..f02bc87 Binary files /dev/null and b/Debug/Core/Src/stm32f4xx_it.o differ diff --git a/Debug/Core/Src/stm32f4xx_it.su b/Debug/Core/Src/stm32f4xx_it.su new file mode 100644 index 0000000..28bcfdf --- /dev/null +++ b/Debug/Core/Src/stm32f4xx_it.su @@ -0,0 +1,10 @@ +../Core/Src/stm32f4xx_it.c:69:6:NMI_Handler 4 static +../Core/Src/stm32f4xx_it.c:84:6:HardFault_Handler 4 static +../Core/Src/stm32f4xx_it.c:99:6:MemManage_Handler 4 static +../Core/Src/stm32f4xx_it.c:114:6:BusFault_Handler 4 static +../Core/Src/stm32f4xx_it.c:129:6:UsageFault_Handler 4 static +../Core/Src/stm32f4xx_it.c:144:6:SVC_Handler 4 static +../Core/Src/stm32f4xx_it.c:157:6:DebugMon_Handler 4 static +../Core/Src/stm32f4xx_it.c:170:6:PendSV_Handler 4 static +../Core/Src/stm32f4xx_it.c:183:6:SysTick_Handler 8 static +../Core/Src/stm32f4xx_it.c:204:6:EXTI0_IRQHandler 8 static diff --git a/Debug/Core/Src/subdir.mk b/Debug/Core/Src/subdir.mk new file mode 100644 index 0000000..8721deb --- /dev/null +++ b/Debug/Core/Src/subdir.mk @@ -0,0 +1,42 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (14.3.rel1) +################################################################################ + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../Core/Src/main.c \ +../Core/Src/stm32f4xx_hal_msp.c \ +../Core/Src/stm32f4xx_it.c \ +../Core/Src/syscalls.c \ +../Core/Src/sysmem.c \ +../Core/Src/system_stm32f4xx.c + +OBJS += \ +./Core/Src/main.o \ +./Core/Src/stm32f4xx_hal_msp.o \ +./Core/Src/stm32f4xx_it.o \ +./Core/Src/syscalls.o \ +./Core/Src/sysmem.o \ +./Core/Src/system_stm32f4xx.o + +C_DEPS += \ +./Core/Src/main.d \ +./Core/Src/stm32f4xx_hal_msp.d \ +./Core/Src/stm32f4xx_it.d \ +./Core/Src/syscalls.d \ +./Core/Src/sysmem.d \ +./Core/Src/system_stm32f4xx.d + + +# Each subdirectory must supply rules for building sources it contributes +Core/Src/%.o Core/Src/%.su Core/Src/%.cyclo: ../Core/Src/%.c Core/Src/subdir.mk + arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" + +clean: clean-Core-2f-Src + +clean-Core-2f-Src: + -$(RM) ./Core/Src/main.cyclo ./Core/Src/main.d ./Core/Src/main.o ./Core/Src/main.su ./Core/Src/stm32f4xx_hal_msp.cyclo ./Core/Src/stm32f4xx_hal_msp.d ./Core/Src/stm32f4xx_hal_msp.o ./Core/Src/stm32f4xx_hal_msp.su ./Core/Src/stm32f4xx_it.cyclo ./Core/Src/stm32f4xx_it.d ./Core/Src/stm32f4xx_it.o ./Core/Src/stm32f4xx_it.su ./Core/Src/syscalls.cyclo ./Core/Src/syscalls.d ./Core/Src/syscalls.o ./Core/Src/syscalls.su ./Core/Src/sysmem.cyclo ./Core/Src/sysmem.d ./Core/Src/sysmem.o ./Core/Src/sysmem.su ./Core/Src/system_stm32f4xx.cyclo ./Core/Src/system_stm32f4xx.d ./Core/Src/system_stm32f4xx.o ./Core/Src/system_stm32f4xx.su + +.PHONY: clean-Core-2f-Src + diff --git a/Debug/Core/Src/syscalls.cyclo b/Debug/Core/Src/syscalls.cyclo new file mode 100644 index 0000000..6cbfdd0 --- /dev/null +++ b/Debug/Core/Src/syscalls.cyclo @@ -0,0 +1,18 @@ +../Core/Src/syscalls.c:44:6:initialise_monitor_handles 1 +../Core/Src/syscalls.c:48:5:_getpid 1 +../Core/Src/syscalls.c:53:5:_kill 1 +../Core/Src/syscalls.c:61:6:_exit 1 +../Core/Src/syscalls.c:67:27:_read 2 +../Core/Src/syscalls.c:80:27:_write 2 +../Core/Src/syscalls.c:92:5:_close 1 +../Core/Src/syscalls.c:99:5:_fstat 1 +../Core/Src/syscalls.c:106:5:_isatty 1 +../Core/Src/syscalls.c:112:5:_lseek 1 +../Core/Src/syscalls.c:120:5:_open 1 +../Core/Src/syscalls.c:128:5:_wait 1 +../Core/Src/syscalls.c:135:5:_unlink 1 +../Core/Src/syscalls.c:142:5:_times 1 +../Core/Src/syscalls.c:148:5:_stat 1 +../Core/Src/syscalls.c:155:5:_link 1 +../Core/Src/syscalls.c:163:5:_fork 1 +../Core/Src/syscalls.c:169:5:_execve 1 diff --git a/Debug/Core/Src/syscalls.d b/Debug/Core/Src/syscalls.d new file mode 100644 index 0000000..8667c70 --- /dev/null +++ b/Debug/Core/Src/syscalls.d @@ -0,0 +1 @@ +Core/Src/syscalls.o: ../Core/Src/syscalls.c diff --git a/Debug/Core/Src/syscalls.o b/Debug/Core/Src/syscalls.o new file mode 100644 index 0000000..4b70f88 Binary files /dev/null and b/Debug/Core/Src/syscalls.o differ diff --git a/Debug/Core/Src/syscalls.su b/Debug/Core/Src/syscalls.su new file mode 100644 index 0000000..50b547a --- /dev/null +++ b/Debug/Core/Src/syscalls.su @@ -0,0 +1,18 @@ +../Core/Src/syscalls.c:44:6:initialise_monitor_handles 4 static +../Core/Src/syscalls.c:48:5:_getpid 4 static +../Core/Src/syscalls.c:53:5:_kill 16 static +../Core/Src/syscalls.c:61:6:_exit 16 static +../Core/Src/syscalls.c:67:27:_read 32 static +../Core/Src/syscalls.c:80:27:_write 32 static +../Core/Src/syscalls.c:92:5:_close 16 static +../Core/Src/syscalls.c:99:5:_fstat 16 static +../Core/Src/syscalls.c:106:5:_isatty 16 static +../Core/Src/syscalls.c:112:5:_lseek 24 static +../Core/Src/syscalls.c:120:5:_open 12 static +../Core/Src/syscalls.c:128:5:_wait 16 static +../Core/Src/syscalls.c:135:5:_unlink 16 static +../Core/Src/syscalls.c:142:5:_times 16 static +../Core/Src/syscalls.c:148:5:_stat 16 static +../Core/Src/syscalls.c:155:5:_link 16 static +../Core/Src/syscalls.c:163:5:_fork 8 static +../Core/Src/syscalls.c:169:5:_execve 24 static diff --git a/Debug/Core/Src/sysmem.cyclo b/Debug/Core/Src/sysmem.cyclo new file mode 100644 index 0000000..0090c10 --- /dev/null +++ b/Debug/Core/Src/sysmem.cyclo @@ -0,0 +1 @@ +../Core/Src/sysmem.c:53:7:_sbrk 3 diff --git a/Debug/Core/Src/sysmem.d b/Debug/Core/Src/sysmem.d new file mode 100644 index 0000000..74fecf9 --- /dev/null +++ b/Debug/Core/Src/sysmem.d @@ -0,0 +1 @@ +Core/Src/sysmem.o: ../Core/Src/sysmem.c diff --git a/Debug/Core/Src/sysmem.o b/Debug/Core/Src/sysmem.o new file mode 100644 index 0000000..6824c48 Binary files /dev/null and b/Debug/Core/Src/sysmem.o differ diff --git a/Debug/Core/Src/sysmem.su b/Debug/Core/Src/sysmem.su new file mode 100644 index 0000000..12d5f17 --- /dev/null +++ b/Debug/Core/Src/sysmem.su @@ -0,0 +1 @@ +../Core/Src/sysmem.c:53:7:_sbrk 32 static diff --git a/Debug/Core/Src/system_stm32f4xx.cyclo b/Debug/Core/Src/system_stm32f4xx.cyclo new file mode 100644 index 0000000..4cc0df9 --- /dev/null +++ b/Debug/Core/Src/system_stm32f4xx.cyclo @@ -0,0 +1,2 @@ +../Core/Src/system_stm32f4xx.c:167:6:SystemInit 1 +../Core/Src/system_stm32f4xx.c:220:6:SystemCoreClockUpdate 6 diff --git a/Debug/Core/Src/system_stm32f4xx.d b/Debug/Core/Src/system_stm32f4xx.d new file mode 100644 index 0000000..99da140 --- /dev/null +++ b/Debug/Core/Src/system_stm32f4xx.d @@ -0,0 +1,51 @@ +Core/Src/system_stm32f4xx.o: ../Core/Src/system_stm32f4xx.c \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Core/Src/system_stm32f4xx.o b/Debug/Core/Src/system_stm32f4xx.o new file mode 100644 index 0000000..91e5c51 Binary files /dev/null and b/Debug/Core/Src/system_stm32f4xx.o differ diff --git a/Debug/Core/Src/system_stm32f4xx.su b/Debug/Core/Src/system_stm32f4xx.su new file mode 100644 index 0000000..96f1cd4 --- /dev/null +++ b/Debug/Core/Src/system_stm32f4xx.su @@ -0,0 +1,2 @@ +../Core/Src/system_stm32f4xx.c:167:6:SystemInit 4 static +../Core/Src/system_stm32f4xx.c:220:6:SystemCoreClockUpdate 32 static diff --git a/Debug/Core/Startup/startup_stm32f429zitx.d b/Debug/Core/Startup/startup_stm32f429zitx.d new file mode 100644 index 0000000..f57c7a7 --- /dev/null +++ b/Debug/Core/Startup/startup_stm32f429zitx.d @@ -0,0 +1,2 @@ +Core/Startup/startup_stm32f429zitx.o: \ + ../Core/Startup/startup_stm32f429zitx.s diff --git a/Debug/Core/Startup/startup_stm32f429zitx.o b/Debug/Core/Startup/startup_stm32f429zitx.o new file mode 100644 index 0000000..2575dea Binary files /dev/null and b/Debug/Core/Startup/startup_stm32f429zitx.o differ diff --git a/Debug/Core/Startup/subdir.mk b/Debug/Core/Startup/subdir.mk new file mode 100644 index 0000000..ce1799b --- /dev/null +++ b/Debug/Core/Startup/subdir.mk @@ -0,0 +1,27 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (14.3.rel1) +################################################################################ + +# Add inputs and outputs from these tool invocations to the build variables +S_SRCS += \ +../Core/Startup/startup_stm32f429zitx.s + +OBJS += \ +./Core/Startup/startup_stm32f429zitx.o + +S_DEPS += \ +./Core/Startup/startup_stm32f429zitx.d + + +# Each subdirectory must supply rules for building sources it contributes +Core/Startup/%.o: ../Core/Startup/%.s Core/Startup/subdir.mk + arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<" + +clean: clean-Core-2f-Startup + +clean-Core-2f-Startup: + -$(RM) ./Core/Startup/startup_stm32f429zitx.d ./Core/Startup/startup_stm32f429zitx.o + +.PHONY: clean-Core-2f-Startup + diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.cyclo b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.cyclo new file mode 100644 index 0000000..69e1650 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.cyclo @@ -0,0 +1,29 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:157:19:HAL_Init 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:190:19:HAL_DeInit 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:219:13:HAL_MspInit 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:230:13:HAL_MspDeInit 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:253:26:HAL_InitTick 3 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:312:13:HAL_IncTick 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:323:17:HAL_GetTick 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:332:10:HAL_GetTickPrio 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:341:19:HAL_SetTickFreq 3 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:374:21:HAL_GetTickFreq 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:390:13:HAL_Delay 3 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:416:13:HAL_SuspendTick 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:432:13:HAL_ResumeTick 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:442:10:HAL_GetHalVersion 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:451:10:HAL_GetREVID 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:460:10:HAL_GetDEVID 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:469:6:HAL_DBGMCU_EnableDBGSleepMode 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:478:6:HAL_DBGMCU_DisableDBGSleepMode 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:487:6:HAL_DBGMCU_EnableDBGStopMode 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:496:6:HAL_DBGMCU_DisableDBGStopMode 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:505:6:HAL_DBGMCU_EnableDBGStandbyMode 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:514:6:HAL_DBGMCU_DisableDBGStandbyMode 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:525:6:HAL_EnableCompensationCell 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:536:6:HAL_DisableCompensationCell 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:545:10:HAL_GetUIDw0 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:554:10:HAL_GetUIDw1 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:563:10:HAL_GetUIDw2 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:580:6:HAL_EnableMemorySwappingBank 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:595:6:HAL_DisableMemorySwappingBank 1 diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d new file mode 100644 index 0000000..293acbd --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d @@ -0,0 +1,52 @@ +Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o: \ + ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o new file mode 100644 index 0000000..1f73aac Binary files /dev/null and b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o differ diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.su b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.su new file mode 100644 index 0000000..04ee6eb --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.su @@ -0,0 +1,29 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:157:19:HAL_Init 8 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:190:19:HAL_DeInit 8 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:219:13:HAL_MspInit 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:230:13:HAL_MspDeInit 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:253:26:HAL_InitTick 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:312:13:HAL_IncTick 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:323:17:HAL_GetTick 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:332:10:HAL_GetTickPrio 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:341:19:HAL_SetTickFreq 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:374:21:HAL_GetTickFreq 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:390:13:HAL_Delay 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:416:13:HAL_SuspendTick 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:432:13:HAL_ResumeTick 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:442:10:HAL_GetHalVersion 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:451:10:HAL_GetREVID 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:460:10:HAL_GetDEVID 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:469:6:HAL_DBGMCU_EnableDBGSleepMode 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:478:6:HAL_DBGMCU_DisableDBGSleepMode 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:487:6:HAL_DBGMCU_EnableDBGStopMode 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:496:6:HAL_DBGMCU_DisableDBGStopMode 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:505:6:HAL_DBGMCU_EnableDBGStandbyMode 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:514:6:HAL_DBGMCU_DisableDBGStandbyMode 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:525:6:HAL_EnableCompensationCell 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:536:6:HAL_DisableCompensationCell 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:545:10:HAL_GetUIDw0 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:554:10:HAL_GetUIDw1 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:563:10:HAL_GetUIDw2 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:580:6:HAL_EnableMemorySwappingBank 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c:595:6:HAL_DisableMemorySwappingBank 4 static diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.cyclo b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.cyclo new file mode 100644 index 0000000..04f992f --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.cyclo @@ -0,0 +1,35 @@ +../Drivers/CMSIS/Include/core_cm4.h:1653:22:__NVIC_SetPriorityGrouping 1 +../Drivers/CMSIS/Include/core_cm4.h:1672:26:__NVIC_GetPriorityGrouping 1 +../Drivers/CMSIS/Include/core_cm4.h:1684:22:__NVIC_EnableIRQ 2 +../Drivers/CMSIS/Include/core_cm4.h:1722:22:__NVIC_DisableIRQ 2 +../Drivers/CMSIS/Include/core_cm4.h:1741:26:__NVIC_GetPendingIRQ 2 +../Drivers/CMSIS/Include/core_cm4.h:1760:22:__NVIC_SetPendingIRQ 2 +../Drivers/CMSIS/Include/core_cm4.h:1775:22:__NVIC_ClearPendingIRQ 2 +../Drivers/CMSIS/Include/core_cm4.h:1792:26:__NVIC_GetActive 2 +../Drivers/CMSIS/Include/core_cm4.h:1814:22:__NVIC_SetPriority 2 +../Drivers/CMSIS/Include/core_cm4.h:1836:26:__NVIC_GetPriority 2 +../Drivers/CMSIS/Include/core_cm4.h:1861:26:NVIC_EncodePriority 2 +../Drivers/CMSIS/Include/core_cm4.h:1888:22:NVIC_DecodePriority 2 +../Drivers/CMSIS/Include/core_cm4.h:1938:34:__NVIC_SystemReset 1 +../Drivers/CMSIS/Include/core_cm4.h:2022:26:SysTick_Config 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:141:6:HAL_NVIC_SetPriorityGrouping 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:163:6:HAL_NVIC_SetPriority 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:185:6:HAL_NVIC_EnableIRQ 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:201:6:HAL_NVIC_DisableIRQ 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:214:6:HAL_NVIC_SystemReset 0 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:227:10:HAL_SYSTICK_Config 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:256:6:HAL_MPU_Disable 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:279:6:HAL_MPU_Enable 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:296:6:HAL_MPU_EnableRegion 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:312:6:HAL_MPU_DisableRegion 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:330:6:HAL_MPU_ConfigRegion 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:368:6:HAL_CORTEX_ClearEvent 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:378:10:HAL_NVIC_GetPriorityGrouping 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:405:6:HAL_NVIC_GetPriority 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:420:6:HAL_NVIC_SetPendingIRQ 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:438:10:HAL_NVIC_GetPendingIRQ 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:454:6:HAL_NVIC_ClearPendingIRQ 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:471:10:HAL_NVIC_GetActive 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:488:6:HAL_SYSTICK_CLKSourceConfig 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:506:6:HAL_SYSTICK_IRQHandler 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:515:13:HAL_SYSTICK_Callback 1 diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.d b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.d new file mode 100644 index 0000000..9432aa4 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.d @@ -0,0 +1,52 @@ +Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o: \ + ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o new file mode 100644 index 0000000..e91f1c5 Binary files /dev/null and b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o differ diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.su b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.su new file mode 100644 index 0000000..985c480 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.su @@ -0,0 +1,35 @@ +../Drivers/CMSIS/Include/core_cm4.h:1653:22:__NVIC_SetPriorityGrouping 24 static +../Drivers/CMSIS/Include/core_cm4.h:1672:26:__NVIC_GetPriorityGrouping 4 static +../Drivers/CMSIS/Include/core_cm4.h:1684:22:__NVIC_EnableIRQ 16 static,ignoring_inline_asm +../Drivers/CMSIS/Include/core_cm4.h:1722:22:__NVIC_DisableIRQ 16 static,ignoring_inline_asm +../Drivers/CMSIS/Include/core_cm4.h:1741:26:__NVIC_GetPendingIRQ 16 static +../Drivers/CMSIS/Include/core_cm4.h:1760:22:__NVIC_SetPendingIRQ 16 static +../Drivers/CMSIS/Include/core_cm4.h:1775:22:__NVIC_ClearPendingIRQ 16 static +../Drivers/CMSIS/Include/core_cm4.h:1792:26:__NVIC_GetActive 16 static +../Drivers/CMSIS/Include/core_cm4.h:1814:22:__NVIC_SetPriority 16 static +../Drivers/CMSIS/Include/core_cm4.h:1836:26:__NVIC_GetPriority 16 static +../Drivers/CMSIS/Include/core_cm4.h:1861:26:NVIC_EncodePriority 40 static +../Drivers/CMSIS/Include/core_cm4.h:1888:22:NVIC_DecodePriority 40 static +../Drivers/CMSIS/Include/core_cm4.h:1938:34:__NVIC_SystemReset 4 static,ignoring_inline_asm +../Drivers/CMSIS/Include/core_cm4.h:2022:26:SysTick_Config 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:141:6:HAL_NVIC_SetPriorityGrouping 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:163:6:HAL_NVIC_SetPriority 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:185:6:HAL_NVIC_EnableIRQ 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:201:6:HAL_NVIC_DisableIRQ 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:214:6:HAL_NVIC_SystemReset 8 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:227:10:HAL_SYSTICK_Config 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:256:6:HAL_MPU_Disable 4 static,ignoring_inline_asm +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:279:6:HAL_MPU_Enable 16 static,ignoring_inline_asm +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:296:6:HAL_MPU_EnableRegion 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:312:6:HAL_MPU_DisableRegion 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:330:6:HAL_MPU_ConfigRegion 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:368:6:HAL_CORTEX_ClearEvent 4 static,ignoring_inline_asm +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:378:10:HAL_NVIC_GetPriorityGrouping 8 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:405:6:HAL_NVIC_GetPriority 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:420:6:HAL_NVIC_SetPendingIRQ 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:438:10:HAL_NVIC_GetPendingIRQ 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:454:6:HAL_NVIC_ClearPendingIRQ 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:471:10:HAL_NVIC_GetActive 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:488:6:HAL_SYSTICK_CLKSourceConfig 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:506:6:HAL_SYSTICK_IRQHandler 8 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c:515:13:HAL_SYSTICK_Callback 4 static diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.cyclo b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.cyclo new file mode 100644 index 0000000..29a68e4 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.cyclo @@ -0,0 +1,15 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:170:19:HAL_DMA_Init 8 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:309:19:HAL_DMA_DeInit 3 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:407:19:HAL_DMA_Start 3 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:451:19:HAL_DMA_Start_IT 4 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:513:19:HAL_DMA_Abort 6 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:580:19:HAL_DMA_Abort_IT 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:610:19:HAL_DMA_PollForTransfer 15 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:746:6:HAL_DMA_IRQHandler 32 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:967:19:HAL_DMA_RegisterCallback 9 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1029:19:HAL_DMA_UnRegisterCallback 10 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1114:22:HAL_DMA_GetState 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1125:10:HAL_DMA_GetError 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1151:13:DMA_SetConfig 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1185:17:DMA_CalcBaseAndBitshift 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1213:26:DMA_CheckFifoParam 15 diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.d b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.d new file mode 100644 index 0000000..d385100 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.d @@ -0,0 +1,52 @@ +Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o: \ + ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o new file mode 100644 index 0000000..bc78179 Binary files /dev/null and b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o differ diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.su b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.su new file mode 100644 index 0000000..6c24b90 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.su @@ -0,0 +1,15 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:170:19:HAL_DMA_Init 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:309:19:HAL_DMA_DeInit 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:407:19:HAL_DMA_Start 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:451:19:HAL_DMA_Start_IT 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:513:19:HAL_DMA_Abort 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:580:19:HAL_DMA_Abort_IT 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:610:19:HAL_DMA_PollForTransfer 48 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:746:6:HAL_DMA_IRQHandler 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:967:19:HAL_DMA_RegisterCallback 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1029:19:HAL_DMA_UnRegisterCallback 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1114:22:HAL_DMA_GetState 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1125:10:HAL_DMA_GetError 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1151:13:DMA_SetConfig 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1185:17:DMA_CalcBaseAndBitshift 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c:1213:26:DMA_CheckFifoParam 24 static diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.cyclo b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.cyclo new file mode 100644 index 0000000..8080a4a --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.cyclo @@ -0,0 +1,4 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:100:19:HAL_DMAEx_MultiBufferStart 4 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:154:19:HAL_DMAEx_MultiBufferStart_IT 264 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:239:19:HAL_DMAEx_ChangeMemory 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:276:13:DMA_MultiBufferSetConfig 2 diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.d b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.d new file mode 100644 index 0000000..dad7b5f --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.d @@ -0,0 +1,52 @@ +Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o: \ + ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o new file mode 100644 index 0000000..719dff6 Binary files /dev/null and b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o differ diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.su b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.su new file mode 100644 index 0000000..9b2268b --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.su @@ -0,0 +1,4 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:100:19:HAL_DMAEx_MultiBufferStart 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:154:19:HAL_DMAEx_MultiBufferStart_IT 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:239:19:HAL_DMAEx_ChangeMemory 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c:276:13:DMA_MultiBufferSetConfig 24 static diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.cyclo b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.cyclo new file mode 100644 index 0000000..65258b1 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.cyclo @@ -0,0 +1,9 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:142:19:HAL_EXTI_SetConfigLine 9 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:237:19:HAL_EXTI_GetConfigLine 9 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:316:19:HAL_EXTI_ClearConfigLine 4 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:369:19:HAL_EXTI_RegisterCallback 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:394:19:HAL_EXTI_GetHandle 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:434:6:HAL_EXTI_IRQHandler 3 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:466:10:HAL_EXTI_GetPending 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:498:6:HAL_EXTI_ClearPending 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:522:6:HAL_EXTI_GenerateSWI 1 diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.d b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.d new file mode 100644 index 0000000..db7729d --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.d @@ -0,0 +1,52 @@ +Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o: \ + ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o new file mode 100644 index 0000000..8719270 Binary files /dev/null and b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o differ diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.su b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.su new file mode 100644 index 0000000..8a14ca5 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.su @@ -0,0 +1,9 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:142:19:HAL_EXTI_SetConfigLine 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:237:19:HAL_EXTI_GetConfigLine 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:316:19:HAL_EXTI_ClearConfigLine 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:369:19:HAL_EXTI_RegisterCallback 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:394:19:HAL_EXTI_GetHandle 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:434:6:HAL_EXTI_IRQHandler 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:466:10:HAL_EXTI_GetPending 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:498:6:HAL_EXTI_ClearPending 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c:522:6:HAL_EXTI_GenerateSWI 24 static diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.cyclo b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.cyclo new file mode 100644 index 0000000..3035a46 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.cyclo @@ -0,0 +1,17 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:161:19:HAL_FLASH_Program 6 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:219:19:HAL_FLASH_Program_IT 4 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:263:6:HAL_FLASH_IRQHandler 9 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:383:13:HAL_FLASH_EndOfOperationCallback 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:400:13:HAL_FLASH_OperationErrorCallback 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:432:19:HAL_FLASH_Unlock 3 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:456:19:HAL_FLASH_Lock 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:468:19:HAL_FLASH_OB_Unlock 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:488:19:HAL_FLASH_OB_Lock 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:500:19:HAL_FLASH_OB_Launch 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:537:10:HAL_FLASH_GetError 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:551:19:FLASH_WaitForLastOperation 7 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:611:13:FLASH_Program_DoubleWord 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:645:13:FLASH_Program_Word 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:670:13:FLASH_Program_HalfWord 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:695:13:FLASH_Program_Byte 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:712:13:FLASH_SetErrorCode 7 diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.d b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.d new file mode 100644 index 0000000..38bc054 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.d @@ -0,0 +1,52 @@ +Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o: \ + ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o new file mode 100644 index 0000000..ac12800 Binary files /dev/null and b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o differ diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.su b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.su new file mode 100644 index 0000000..3f33f48 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.su @@ -0,0 +1,17 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:161:19:HAL_FLASH_Program 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:219:19:HAL_FLASH_Program_IT 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:263:6:HAL_FLASH_IRQHandler 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:383:13:HAL_FLASH_EndOfOperationCallback 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:400:13:HAL_FLASH_OperationErrorCallback 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:432:19:HAL_FLASH_Unlock 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:456:19:HAL_FLASH_Lock 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:468:19:HAL_FLASH_OB_Unlock 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:488:19:HAL_FLASH_OB_Lock 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:500:19:HAL_FLASH_OB_Launch 8 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:537:10:HAL_FLASH_GetError 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:551:19:FLASH_WaitForLastOperation 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:611:13:FLASH_Program_DoubleWord 24 static,ignoring_inline_asm +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:645:13:FLASH_Program_Word 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:670:13:FLASH_Program_HalfWord 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:695:13:FLASH_Program_Byte 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c:712:13:FLASH_SetErrorCode 4 static diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.cyclo b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.cyclo new file mode 100644 index 0000000..f648a19 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.cyclo @@ -0,0 +1,24 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:160:19:HAL_FLASHEx_Erase 6 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:231:19:HAL_FLASHEx_Erase_IT 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:281:19:HAL_FLASHEx_OBProgram 7 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:340:6:HAL_FLASHEx_OBGetConfig 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:369:19:HAL_FLASHEx_AdvOBProgram 4 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:425:6:HAL_FLASHEx_AdvOBGetConfig 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:457:19:HAL_FLASHEx_OB_SelectPCROP 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:482:19:HAL_FLASHEx_OB_DeSelectPCROP 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:504:10:HAL_FLASHEx_OB_GetBank2WRP 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:537:13:FLASH_MassErase 3 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:581:6:FLASH_Erase_Sector 5 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:641:26:FLASH_OB_EnableWRP 10 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:712:26:FLASH_OB_DisableWRP 10 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:773:26:FLASH_OB_BootConfig 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:813:26:FLASH_OB_EnablePCROP 6 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:877:26:FLASH_OB_DisablePCROP 6 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1157:26:FLASH_OB_RDP_LevelConfig 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1191:26:FLASH_OB_UserConfig 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1226:26:FLASH_OB_BOR_LevelConfig 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1244:16:FLASH_OB_GetUser 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1254:17:FLASH_OB_GetWRP 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1268:16:FLASH_OB_GetRDP 3 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1296:16:FLASH_OB_GetBOR 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1306:6:FLASH_FlushCaches 3 diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.d b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.d new file mode 100644 index 0000000..b95135a --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.d @@ -0,0 +1,52 @@ +Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o: \ + ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o new file mode 100644 index 0000000..4b8b93d Binary files /dev/null and b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o differ diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.su b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.su new file mode 100644 index 0000000..2ef74b6 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.su @@ -0,0 +1,24 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:160:19:HAL_FLASHEx_Erase 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:231:19:HAL_FLASHEx_Erase_IT 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:281:19:HAL_FLASHEx_OBProgram 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:340:6:HAL_FLASHEx_OBGetConfig 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:369:19:HAL_FLASHEx_AdvOBProgram 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:425:6:HAL_FLASHEx_AdvOBGetConfig 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:457:19:HAL_FLASHEx_OB_SelectPCROP 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:482:19:HAL_FLASHEx_OB_DeSelectPCROP 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:504:10:HAL_FLASHEx_OB_GetBank2WRP 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:537:13:FLASH_MassErase 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:581:6:FLASH_Erase_Sector 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:641:26:FLASH_OB_EnableWRP 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:712:26:FLASH_OB_DisableWRP 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:773:26:FLASH_OB_BootConfig 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:813:26:FLASH_OB_EnablePCROP 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:877:26:FLASH_OB_DisablePCROP 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1157:26:FLASH_OB_RDP_LevelConfig 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1191:26:FLASH_OB_UserConfig 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1226:26:FLASH_OB_BOR_LevelConfig 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1244:16:FLASH_OB_GetUser 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1254:17:FLASH_OB_GetWRP 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1268:16:FLASH_OB_GetRDP 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1296:16:FLASH_OB_GetBOR 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c:1306:6:FLASH_FlushCaches 4 static diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.cyclo b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.cyclo new file mode 100644 index 0000000..e69de29 diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.d b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.d new file mode 100644 index 0000000..7a4ea09 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.d @@ -0,0 +1,52 @@ +Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o: \ + ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o new file mode 100644 index 0000000..4b4ca6b Binary files /dev/null and b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o differ diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.su b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.su new file mode 100644 index 0000000..e69de29 diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.cyclo b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.cyclo new file mode 100644 index 0000000..3263b38 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.cyclo @@ -0,0 +1,8 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:164:6:HAL_GPIO_Init 22 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:294:6:HAL_GPIO_DeInit 14 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:375:15:HAL_GPIO_ReadPin 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:410:6:HAL_GPIO_WritePin 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:433:6:HAL_GPIO_TogglePin 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:458:19:HAL_GPIO_LockPin 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:492:6:HAL_GPIO_EXTI_IRQHandler 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:507:13:HAL_GPIO_EXTI_Callback 1 diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.d b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.d new file mode 100644 index 0000000..87a390a --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.d @@ -0,0 +1,52 @@ +Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o: \ + ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o new file mode 100644 index 0000000..77150b8 Binary files /dev/null and b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o differ diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.su b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.su new file mode 100644 index 0000000..2ae1321 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.su @@ -0,0 +1,8 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:164:6:HAL_GPIO_Init 40 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:294:6:HAL_GPIO_DeInit 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:375:15:HAL_GPIO_ReadPin 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:410:6:HAL_GPIO_WritePin 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:433:6:HAL_GPIO_TogglePin 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:458:19:HAL_GPIO_LockPin 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:492:6:HAL_GPIO_EXTI_IRQHandler 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c:507:13:HAL_GPIO_EXTI_Callback 16 static diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.cyclo b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.cyclo new file mode 100644 index 0000000..fcef845 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.cyclo @@ -0,0 +1,17 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:90:6:HAL_PWR_DeInit 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:108:6:HAL_PWR_EnableBkUpAccess 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:128:6:HAL_PWR_DisableBkUpAccess 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:275:6:HAL_PWR_ConfigPVD 5 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:318:6:HAL_PWR_EnablePVD 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:327:6:HAL_PWR_DisablePVD 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:341:6:HAL_PWR_EnableWakeUpPin 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:359:6:HAL_PWR_DisableWakeUpPin 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:391:6:HAL_PWR_EnterSLEEPMode 3 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:445:6:HAL_PWR_EnterSTOPMode 3 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:488:6:HAL_PWR_EnterSTANDBYMode 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:509:6:HAL_PWR_PVD_IRQHandler 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:526:13:HAL_PWR_PVDCallback 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:541:6:HAL_PWR_EnableSleepOnExit 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:553:6:HAL_PWR_DisableSleepOnExit 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:565:6:HAL_PWR_EnableSEVOnPend 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:577:6:HAL_PWR_DisableSEVOnPend 1 diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.d b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.d new file mode 100644 index 0000000..20cd38f --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.d @@ -0,0 +1,52 @@ +Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o: \ + ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o new file mode 100644 index 0000000..fdea841 Binary files /dev/null and b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o differ diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.su b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.su new file mode 100644 index 0000000..4eb40e8 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.su @@ -0,0 +1,17 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:90:6:HAL_PWR_DeInit 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:108:6:HAL_PWR_EnableBkUpAccess 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:128:6:HAL_PWR_DisableBkUpAccess 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:275:6:HAL_PWR_ConfigPVD 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:318:6:HAL_PWR_EnablePVD 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:327:6:HAL_PWR_DisablePVD 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:341:6:HAL_PWR_EnableWakeUpPin 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:359:6:HAL_PWR_DisableWakeUpPin 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:391:6:HAL_PWR_EnterSLEEPMode 16 static,ignoring_inline_asm +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:445:6:HAL_PWR_EnterSTOPMode 16 static,ignoring_inline_asm +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:488:6:HAL_PWR_EnterSTANDBYMode 4 static,ignoring_inline_asm +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:509:6:HAL_PWR_PVD_IRQHandler 8 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:526:13:HAL_PWR_PVDCallback 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:541:6:HAL_PWR_EnableSleepOnExit 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:553:6:HAL_PWR_DisableSleepOnExit 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:565:6:HAL_PWR_EnableSEVOnPend 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c:577:6:HAL_PWR_DisableSEVOnPend 4 static diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.cyclo b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.cyclo new file mode 100644 index 0000000..970ac44 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.cyclo @@ -0,0 +1,9 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:141:19:HAL_PWREx_EnableBkUpReg 3 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:165:19:HAL_PWREx_DisableBkUpReg 3 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:189:6:HAL_PWREx_EnableFlashPowerDown 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:198:6:HAL_PWREx_DisableFlashPowerDown 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:211:10:HAL_PWREx_GetVoltageRange 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:288:19:HAL_PWREx_ControlVoltageScaling 8 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:413:19:HAL_PWREx_EnableOverDrive 5 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:460:19:HAL_PWREx_DisableOverDrive 5 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:536:19:HAL_PWREx_EnterUnderDriveSTOPMode 2 diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.d b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.d new file mode 100644 index 0000000..472d841 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.d @@ -0,0 +1,52 @@ +Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o: \ + ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o new file mode 100644 index 0000000..d483b43 Binary files /dev/null and b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o differ diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.su b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.su new file mode 100644 index 0000000..afdd077 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.su @@ -0,0 +1,9 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:141:19:HAL_PWREx_EnableBkUpReg 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:165:19:HAL_PWREx_DisableBkUpReg 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:189:6:HAL_PWREx_EnableFlashPowerDown 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:198:6:HAL_PWREx_DisableFlashPowerDown 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:211:10:HAL_PWREx_GetVoltageRange 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:288:19:HAL_PWREx_ControlVoltageScaling 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:413:19:HAL_PWREx_EnableOverDrive 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:460:19:HAL_PWREx_DisableOverDrive 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c:536:19:HAL_PWREx_EnterUnderDriveSTOPMode 24 static,ignoring_inline_asm diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.cyclo b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.cyclo new file mode 100644 index 0000000..8c1483e --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.cyclo @@ -0,0 +1,14 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:200:26:HAL_RCC_DeInit 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:219:26:HAL_RCC_OscConfig 61 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:591:19:HAL_RCC_ClockConfig 20 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:775:6:HAL_RCC_MCOConfig 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:841:6:HAL_RCC_EnableCSS 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:850:6:HAL_RCC_DisableCSS 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:885:17:HAL_RCC_GetSysClockFreq 6 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:943:10:HAL_RCC_GetHCLKFreq 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:954:10:HAL_RCC_GetPCLK1Freq 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:966:10:HAL_RCC_GetPCLK2Freq 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:979:13:HAL_RCC_GetOscConfig 8 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:1058:6:HAL_RCC_GetClockConfig 1 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:1084:6:HAL_RCC_NMI_IRQHandler 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:1101:13:HAL_RCC_CSSCallback 1 diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.d b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.d new file mode 100644 index 0000000..63297d5 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.d @@ -0,0 +1,52 @@ +Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o: \ + ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o new file mode 100644 index 0000000..e8f9cca Binary files /dev/null and b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o differ diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.su b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.su new file mode 100644 index 0000000..7b24009 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.su @@ -0,0 +1,14 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:200:26:HAL_RCC_DeInit 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:219:26:HAL_RCC_OscConfig 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:591:19:HAL_RCC_ClockConfig 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:775:6:HAL_RCC_MCOConfig 56 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:841:6:HAL_RCC_EnableCSS 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:850:6:HAL_RCC_DisableCSS 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:885:17:HAL_RCC_GetSysClockFreq 112 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:943:10:HAL_RCC_GetHCLKFreq 4 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:954:10:HAL_RCC_GetPCLK1Freq 8 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:966:10:HAL_RCC_GetPCLK2Freq 8 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:979:13:HAL_RCC_GetOscConfig 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:1058:6:HAL_RCC_GetClockConfig 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:1084:6:HAL_RCC_NMI_IRQHandler 8 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c:1101:13:HAL_RCC_CSSCallback 4 static diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.cyclo b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.cyclo new file mode 100644 index 0000000..3e19eaa --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.cyclo @@ -0,0 +1,8 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2196:19:HAL_RCCEx_PeriphCLKConfig 29 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2432:6:HAL_RCCEx_GetPeriphCLKConfig 2 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2473:10:HAL_RCCEx_GetPeriphCLKFreq 5 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2846:19:HAL_RCCEx_EnablePLLI2S 5 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2929:19:HAL_RCCEx_DisablePLLI2S 3 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2959:19:HAL_RCCEx_EnablePLLSAI 5 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:3033:19:HAL_RCCEx_DisablePLLSAI 3 +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:3186:19:HAL_RCC_DeInit 14 diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.d b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.d new file mode 100644 index 0000000..dae0f37 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.d @@ -0,0 +1,52 @@ +Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o: \ + ../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \ + ../Core/Inc/stm32f4xx_hal_conf.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h \ + ../Drivers/CMSIS/Include/core_cm4.h \ + ../Drivers/CMSIS/Include/cmsis_version.h \ + ../Drivers/CMSIS/Include/cmsis_compiler.h \ + ../Drivers/CMSIS/Include/cmsis_gcc.h \ + ../Drivers/CMSIS/Include/mpu_armv7.h \ + ../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \ + ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h: +../Core/Inc/stm32f4xx_hal_conf.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f429xx.h: +../Drivers/CMSIS/Include/core_cm4.h: +../Drivers/CMSIS/Include/cmsis_version.h: +../Drivers/CMSIS/Include/cmsis_compiler.h: +../Drivers/CMSIS/Include/cmsis_gcc.h: +../Drivers/CMSIS/Include/mpu_armv7.h: +../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h: +../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h: diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o new file mode 100644 index 0000000..387e46a Binary files /dev/null and b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o differ diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.su b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.su new file mode 100644 index 0000000..3c0d23e --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.su @@ -0,0 +1,8 @@ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2196:19:HAL_RCCEx_PeriphCLKConfig 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2432:6:HAL_RCCEx_GetPeriphCLKConfig 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2473:10:HAL_RCCEx_GetPeriphCLKFreq 32 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2846:19:HAL_RCCEx_EnablePLLI2S 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2929:19:HAL_RCCEx_DisablePLLI2S 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:2959:19:HAL_RCCEx_EnablePLLSAI 24 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:3033:19:HAL_RCCEx_DisablePLLSAI 16 static +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c:3186:19:HAL_RCC_DeInit 16 static diff --git a/Debug/Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk new file mode 100644 index 0000000..98a1c78 --- /dev/null +++ b/Debug/Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk @@ -0,0 +1,63 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (14.3.rel1) +################################################################################ + +# Add inputs and outputs from these tool invocations to the build variables +C_SRCS += \ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c \ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c \ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c \ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c \ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c \ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c \ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c \ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c \ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c \ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c \ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c \ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c \ +../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c + +OBJS += \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o + +C_DEPS += \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.d \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.d \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.d \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.d \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.d \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.d \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.d \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.d \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.d \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.d \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.d \ +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.d + + +# Each subdirectory must supply rules for building sources it contributes +Drivers/STM32F4xx_HAL_Driver/Src/%.o Drivers/STM32F4xx_HAL_Driver/Src/%.su Drivers/STM32F4xx_HAL_Driver/Src/%.cyclo: ../Drivers/STM32F4xx_HAL_Driver/Src/%.c Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk + arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DUSE_HAL_DRIVER -DSTM32F429xx -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" + +clean: clean-Drivers-2f-STM32F4xx_HAL_Driver-2f-Src + +clean-Drivers-2f-STM32F4xx_HAL_Driver-2f-Src: + -$(RM) ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.su ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.cyclo ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.su + +.PHONY: clean-Drivers-2f-STM32F4xx_HAL_Driver-2f-Src + diff --git a/Debug/lab1_test_project.elf b/Debug/lab1_test_project.elf new file mode 100755 index 0000000..0e7a48d Binary files /dev/null and b/Debug/lab1_test_project.elf differ diff --git a/Debug/lab1_test_project.list b/Debug/lab1_test_project.list new file mode 100644 index 0000000..cdbc7a9 --- /dev/null +++ b/Debug/lab1_test_project.list @@ -0,0 +1,3851 @@ + +lab1_test_project.elf: file format elf32-littlearm + +Sections: +Idx Name Size VMA LMA File off Algn + 0 .isr_vector 000001ac 08000000 08000000 00001000 2**0 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 1 .text 000016c4 080001ac 080001ac 000011ac 2**2 + CONTENTS, ALLOC, LOAD, READONLY, CODE + 2 .rodata 00000010 08001870 08001870 00002870 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 3 .ARM.extab 00000000 08001880 08001880 0000300c 2**0 + CONTENTS, READONLY + 4 .ARM 00000008 08001880 08001880 00002880 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 5 .preinit_array 00000000 08001888 08001888 0000300c 2**0 + CONTENTS, ALLOC, LOAD, DATA + 6 .init_array 00000004 08001888 08001888 00002888 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 7 .fini_array 00000004 0800188c 0800188c 0000288c 2**2 + CONTENTS, ALLOC, LOAD, READONLY, DATA + 8 .data 0000000c 20000000 08001890 00003000 2**2 + CONTENTS, ALLOC, LOAD, DATA + 9 .ccmram 00000000 10000000 10000000 0000300c 2**0 + CONTENTS + 10 .bss 00000024 2000000c 2000000c 0000300c 2**2 + ALLOC + 11 ._user_heap_stack 00000600 20000030 20000030 0000300c 2**0 + ALLOC + 12 .ARM.attributes 00000030 00000000 00000000 0000300c 2**0 + CONTENTS, READONLY + 13 .debug_info 000039c7 00000000 00000000 0000303c 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 14 .debug_abbrev 00000ecb 00000000 00000000 00006a03 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 15 .debug_aranges 00000430 00000000 00000000 000078d0 2**3 + CONTENTS, READONLY, DEBUGGING, OCTETS + 16 .debug_rnglists 00000302 00000000 00000000 00007d00 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 17 .debug_macro 000215be 00000000 00000000 00008002 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 18 .debug_line 00004a35 00000000 00000000 000295c0 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 19 .debug_str 000cb530 00000000 00000000 0002dff5 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + 20 .comment 00000043 00000000 00000000 000f9525 2**0 + CONTENTS, READONLY + 21 .debug_frame 00000e24 00000000 00000000 000f9568 2**2 + CONTENTS, READONLY, DEBUGGING, OCTETS + 22 .debug_line_str 00000062 00000000 00000000 000fa38c 2**0 + CONTENTS, READONLY, DEBUGGING, OCTETS + +Disassembly of section .text: + +080001ac <__do_global_dtors_aux>: + 80001ac: b510 push {r4, lr} + 80001ae: 4c05 ldr r4, [pc, #20] @ (80001c4 <__do_global_dtors_aux+0x18>) + 80001b0: 7823 ldrb r3, [r4, #0] + 80001b2: b933 cbnz r3, 80001c2 <__do_global_dtors_aux+0x16> + 80001b4: 4b04 ldr r3, [pc, #16] @ (80001c8 <__do_global_dtors_aux+0x1c>) + 80001b6: b113 cbz r3, 80001be <__do_global_dtors_aux+0x12> + 80001b8: 4804 ldr r0, [pc, #16] @ (80001cc <__do_global_dtors_aux+0x20>) + 80001ba: f3af 8000 nop.w + 80001be: 2301 movs r3, #1 + 80001c0: 7023 strb r3, [r4, #0] + 80001c2: bd10 pop {r4, pc} + 80001c4: 2000000c .word 0x2000000c + 80001c8: 00000000 .word 0x00000000 + 80001cc: 08001858 .word 0x08001858 + +080001d0 : + 80001d0: b508 push {r3, lr} + 80001d2: 4b03 ldr r3, [pc, #12] @ (80001e0 ) + 80001d4: b11b cbz r3, 80001de + 80001d6: 4903 ldr r1, [pc, #12] @ (80001e4 ) + 80001d8: 4803 ldr r0, [pc, #12] @ (80001e8 ) + 80001da: f3af 8000 nop.w + 80001de: bd08 pop {r3, pc} + 80001e0: 00000000 .word 0x00000000 + 80001e4: 20000010 .word 0x20000010 + 80001e8: 08001858 .word 0x08001858 + +080001ec <__aeabi_uldivmod>: + 80001ec: b953 cbnz r3, 8000204 <__aeabi_uldivmod+0x18> + 80001ee: b94a cbnz r2, 8000204 <__aeabi_uldivmod+0x18> + 80001f0: 2900 cmp r1, #0 + 80001f2: bf08 it eq + 80001f4: 2800 cmpeq r0, #0 + 80001f6: bf1c itt ne + 80001f8: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff + 80001fc: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff + 8000200: f000 b988 b.w 8000514 <__aeabi_idiv0> + 8000204: f1ad 0c08 sub.w ip, sp, #8 + 8000208: e96d ce04 strd ip, lr, [sp, #-16]! + 800020c: f000 f806 bl 800021c <__udivmoddi4> + 8000210: f8dd e004 ldr.w lr, [sp, #4] + 8000214: e9dd 2302 ldrd r2, r3, [sp, #8] + 8000218: b004 add sp, #16 + 800021a: 4770 bx lr + +0800021c <__udivmoddi4>: + 800021c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} + 8000220: 9d08 ldr r5, [sp, #32] + 8000222: 460f mov r7, r1 + 8000224: 4604 mov r4, r0 + 8000226: 468c mov ip, r1 + 8000228: 2b00 cmp r3, #0 + 800022a: d148 bne.n 80002be <__udivmoddi4+0xa2> + 800022c: 428a cmp r2, r1 + 800022e: 4616 mov r6, r2 + 8000230: d961 bls.n 80002f6 <__udivmoddi4+0xda> + 8000232: fab2 f382 clz r3, r2 + 8000236: b14b cbz r3, 800024c <__udivmoddi4+0x30> + 8000238: f1c3 0220 rsb r2, r3, #32 + 800023c: fa01 fc03 lsl.w ip, r1, r3 + 8000240: fa20 f202 lsr.w r2, r0, r2 + 8000244: 409e lsls r6, r3 + 8000246: ea42 0c0c orr.w ip, r2, ip + 800024a: 409c lsls r4, r3 + 800024c: ea4f 4e16 mov.w lr, r6, lsr #16 + 8000250: b2b7 uxth r7, r6 + 8000252: fbbc f1fe udiv r1, ip, lr + 8000256: 0c22 lsrs r2, r4, #16 + 8000258: fb0e cc11 mls ip, lr, r1, ip + 800025c: ea42 420c orr.w r2, r2, ip, lsl #16 + 8000260: fb01 f007 mul.w r0, r1, r7 + 8000264: 4290 cmp r0, r2 + 8000266: d909 bls.n 800027c <__udivmoddi4+0x60> + 8000268: 18b2 adds r2, r6, r2 + 800026a: f101 3cff add.w ip, r1, #4294967295 @ 0xffffffff + 800026e: f080 80ee bcs.w 800044e <__udivmoddi4+0x232> + 8000272: 4290 cmp r0, r2 + 8000274: f240 80eb bls.w 800044e <__udivmoddi4+0x232> + 8000278: 3902 subs r1, #2 + 800027a: 4432 add r2, r6 + 800027c: 1a12 subs r2, r2, r0 + 800027e: b2a4 uxth r4, r4 + 8000280: fbb2 f0fe udiv r0, r2, lr + 8000284: fb0e 2210 mls r2, lr, r0, r2 + 8000288: ea44 4402 orr.w r4, r4, r2, lsl #16 + 800028c: fb00 f707 mul.w r7, r0, r7 + 8000290: 42a7 cmp r7, r4 + 8000292: d909 bls.n 80002a8 <__udivmoddi4+0x8c> + 8000294: 1934 adds r4, r6, r4 + 8000296: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff + 800029a: f080 80da bcs.w 8000452 <__udivmoddi4+0x236> + 800029e: 42a7 cmp r7, r4 + 80002a0: f240 80d7 bls.w 8000452 <__udivmoddi4+0x236> + 80002a4: 4434 add r4, r6 + 80002a6: 3802 subs r0, #2 + 80002a8: ea40 4001 orr.w r0, r0, r1, lsl #16 + 80002ac: 1be4 subs r4, r4, r7 + 80002ae: 2100 movs r1, #0 + 80002b0: b11d cbz r5, 80002ba <__udivmoddi4+0x9e> + 80002b2: 40dc lsrs r4, r3 + 80002b4: 2300 movs r3, #0 + 80002b6: e9c5 4300 strd r4, r3, [r5] + 80002ba: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 80002be: 428b cmp r3, r1 + 80002c0: d906 bls.n 80002d0 <__udivmoddi4+0xb4> + 80002c2: b10d cbz r5, 80002c8 <__udivmoddi4+0xac> + 80002c4: e9c5 0100 strd r0, r1, [r5] + 80002c8: 2100 movs r1, #0 + 80002ca: 4608 mov r0, r1 + 80002cc: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} + 80002d0: fab3 f183 clz r1, r3 + 80002d4: 2900 cmp r1, #0 + 80002d6: d148 bne.n 800036a <__udivmoddi4+0x14e> + 80002d8: 42bb cmp r3, r7 + 80002da: d302 bcc.n 80002e2 <__udivmoddi4+0xc6> + 80002dc: 4282 cmp r2, r0 + 80002de: f200 8107 bhi.w 80004f0 <__udivmoddi4+0x2d4> + 80002e2: 1a84 subs r4, r0, r2 + 80002e4: eb67 0203 sbc.w r2, r7, r3 + 80002e8: 2001 movs r0, #1 + 80002ea: 4694 mov ip, r2 + 80002ec: 2d00 cmp r5, #0 + 80002ee: d0e4 beq.n 80002ba <__udivmoddi4+0x9e> + 80002f0: e9c5 4c00 strd r4, ip, [r5] + 80002f4: e7e1 b.n 80002ba <__udivmoddi4+0x9e> + 80002f6: 2a00 cmp r2, #0 + 80002f8: f000 8092 beq.w 8000420 <__udivmoddi4+0x204> + 80002fc: fab2 f382 clz r3, r2 + 8000300: 2b00 cmp r3, #0 + 8000302: f040 80a8 bne.w 8000456 <__udivmoddi4+0x23a> + 8000306: 1a8a subs r2, r1, r2 + 8000308: ea4f 4e16 mov.w lr, r6, lsr #16 + 800030c: fa1f fc86 uxth.w ip, r6 + 8000310: 2101 movs r1, #1 + 8000312: 0c20 lsrs r0, r4, #16 + 8000314: fbb2 f7fe udiv r7, r2, lr + 8000318: fb0e 2217 mls r2, lr, r7, r2 + 800031c: ea40 4202 orr.w r2, r0, r2, lsl #16 + 8000320: fb0c f007 mul.w r0, ip, r7 + 8000324: 4290 cmp r0, r2 + 8000326: d907 bls.n 8000338 <__udivmoddi4+0x11c> + 8000328: 18b2 adds r2, r6, r2 + 800032a: f107 38ff add.w r8, r7, #4294967295 @ 0xffffffff + 800032e: d202 bcs.n 8000336 <__udivmoddi4+0x11a> + 8000330: 4290 cmp r0, r2 + 8000332: f200 80e2 bhi.w 80004fa <__udivmoddi4+0x2de> + 8000336: 4647 mov r7, r8 + 8000338: 1a12 subs r2, r2, r0 + 800033a: b2a4 uxth r4, r4 + 800033c: fbb2 f0fe udiv r0, r2, lr + 8000340: fb0e 2210 mls r2, lr, r0, r2 + 8000344: ea44 4402 orr.w r4, r4, r2, lsl #16 + 8000348: fb0c fc00 mul.w ip, ip, r0 + 800034c: 45a4 cmp ip, r4 + 800034e: d907 bls.n 8000360 <__udivmoddi4+0x144> + 8000350: 1934 adds r4, r6, r4 + 8000352: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff + 8000356: d202 bcs.n 800035e <__udivmoddi4+0x142> + 8000358: 45a4 cmp ip, r4 + 800035a: f200 80cb bhi.w 80004f4 <__udivmoddi4+0x2d8> + 800035e: 4610 mov r0, r2 + 8000360: eba4 040c sub.w r4, r4, ip + 8000364: ea40 4007 orr.w r0, r0, r7, lsl #16 + 8000368: e7a2 b.n 80002b0 <__udivmoddi4+0x94> + 800036a: f1c1 0620 rsb r6, r1, #32 + 800036e: 408b lsls r3, r1 + 8000370: fa22 fc06 lsr.w ip, r2, r6 + 8000374: ea4c 0c03 orr.w ip, ip, r3 + 8000378: fa07 f401 lsl.w r4, r7, r1 + 800037c: fa20 f306 lsr.w r3, r0, r6 + 8000380: 40f7 lsrs r7, r6 + 8000382: ea4f 491c mov.w r9, ip, lsr #16 + 8000386: 4323 orrs r3, r4 + 8000388: fa00 f801 lsl.w r8, r0, r1 + 800038c: fa1f fe8c uxth.w lr, ip + 8000390: fbb7 f0f9 udiv r0, r7, r9 + 8000394: 0c1c lsrs r4, r3, #16 + 8000396: fb09 7710 mls r7, r9, r0, r7 + 800039a: ea44 4407 orr.w r4, r4, r7, lsl #16 + 800039e: fb00 f70e mul.w r7, r0, lr + 80003a2: 42a7 cmp r7, r4 + 80003a4: fa02 f201 lsl.w r2, r2, r1 + 80003a8: d90a bls.n 80003c0 <__udivmoddi4+0x1a4> + 80003aa: eb1c 0404 adds.w r4, ip, r4 + 80003ae: f100 3aff add.w sl, r0, #4294967295 @ 0xffffffff + 80003b2: f080 809b bcs.w 80004ec <__udivmoddi4+0x2d0> + 80003b6: 42a7 cmp r7, r4 + 80003b8: f240 8098 bls.w 80004ec <__udivmoddi4+0x2d0> + 80003bc: 3802 subs r0, #2 + 80003be: 4464 add r4, ip + 80003c0: 1be4 subs r4, r4, r7 + 80003c2: b29f uxth r7, r3 + 80003c4: fbb4 f3f9 udiv r3, r4, r9 + 80003c8: fb09 4413 mls r4, r9, r3, r4 + 80003cc: ea47 4404 orr.w r4, r7, r4, lsl #16 + 80003d0: fb03 fe0e mul.w lr, r3, lr + 80003d4: 45a6 cmp lr, r4 + 80003d6: d909 bls.n 80003ec <__udivmoddi4+0x1d0> + 80003d8: eb1c 0404 adds.w r4, ip, r4 + 80003dc: f103 37ff add.w r7, r3, #4294967295 @ 0xffffffff + 80003e0: f080 8082 bcs.w 80004e8 <__udivmoddi4+0x2cc> + 80003e4: 45a6 cmp lr, r4 + 80003e6: d97f bls.n 80004e8 <__udivmoddi4+0x2cc> + 80003e8: 3b02 subs r3, #2 + 80003ea: 4464 add r4, ip + 80003ec: ea43 4000 orr.w r0, r3, r0, lsl #16 + 80003f0: eba4 040e sub.w r4, r4, lr + 80003f4: fba0 e702 umull lr, r7, r0, r2 + 80003f8: 42bc cmp r4, r7 + 80003fa: 4673 mov r3, lr + 80003fc: 46b9 mov r9, r7 + 80003fe: d363 bcc.n 80004c8 <__udivmoddi4+0x2ac> + 8000400: d060 beq.n 80004c4 <__udivmoddi4+0x2a8> + 8000402: b15d cbz r5, 800041c <__udivmoddi4+0x200> + 8000404: ebb8 0203 subs.w r2, r8, r3 + 8000408: eb64 0409 sbc.w r4, r4, r9 + 800040c: fa04 f606 lsl.w r6, r4, r6 + 8000410: fa22 f301 lsr.w r3, r2, r1 + 8000414: 431e orrs r6, r3 + 8000416: 40cc lsrs r4, r1 + 8000418: e9c5 6400 strd r6, r4, [r5] + 800041c: 2100 movs r1, #0 + 800041e: e74c b.n 80002ba <__udivmoddi4+0x9e> + 8000420: 0862 lsrs r2, r4, #1 + 8000422: 0848 lsrs r0, r1, #1 + 8000424: ea42 71c1 orr.w r1, r2, r1, lsl #31 + 8000428: 0c0b lsrs r3, r1, #16 + 800042a: ea43 4300 orr.w r3, r3, r0, lsl #16 + 800042e: b28a uxth r2, r1 + 8000430: ea42 4203 orr.w r2, r2, r3, lsl #16 + 8000434: fbb3 f1f6 udiv r1, r3, r6 + 8000438: 07e4 lsls r4, r4, #31 + 800043a: 46b4 mov ip, r6 + 800043c: 4637 mov r7, r6 + 800043e: 46b6 mov lr, r6 + 8000440: 231f movs r3, #31 + 8000442: fbb0 f0f6 udiv r0, r0, r6 + 8000446: 1bd2 subs r2, r2, r7 + 8000448: ea41 4100 orr.w r1, r1, r0, lsl #16 + 800044c: e761 b.n 8000312 <__udivmoddi4+0xf6> + 800044e: 4661 mov r1, ip + 8000450: e714 b.n 800027c <__udivmoddi4+0x60> + 8000452: 4610 mov r0, r2 + 8000454: e728 b.n 80002a8 <__udivmoddi4+0x8c> + 8000456: f1c3 0120 rsb r1, r3, #32 + 800045a: fa20 f201 lsr.w r2, r0, r1 + 800045e: 409e lsls r6, r3 + 8000460: fa27 f101 lsr.w r1, r7, r1 + 8000464: 409f lsls r7, r3 + 8000466: 433a orrs r2, r7 + 8000468: ea4f 4e16 mov.w lr, r6, lsr #16 + 800046c: fa1f fc86 uxth.w ip, r6 + 8000470: fbb1 f7fe udiv r7, r1, lr + 8000474: fb0e 1017 mls r0, lr, r7, r1 + 8000478: 0c11 lsrs r1, r2, #16 + 800047a: ea41 4100 orr.w r1, r1, r0, lsl #16 + 800047e: fb07 f80c mul.w r8, r7, ip + 8000482: 4588 cmp r8, r1 + 8000484: fa04 f403 lsl.w r4, r4, r3 + 8000488: d93a bls.n 8000500 <__udivmoddi4+0x2e4> + 800048a: 1871 adds r1, r6, r1 + 800048c: f107 30ff add.w r0, r7, #4294967295 @ 0xffffffff + 8000490: d201 bcs.n 8000496 <__udivmoddi4+0x27a> + 8000492: 4588 cmp r8, r1 + 8000494: d81f bhi.n 80004d6 <__udivmoddi4+0x2ba> + 8000496: eba1 0108 sub.w r1, r1, r8 + 800049a: fbb1 f8fe udiv r8, r1, lr + 800049e: fb08 f70c mul.w r7, r8, ip + 80004a2: fb0e 1118 mls r1, lr, r8, r1 + 80004a6: b292 uxth r2, r2 + 80004a8: ea42 4201 orr.w r2, r2, r1, lsl #16 + 80004ac: 42ba cmp r2, r7 + 80004ae: d22f bcs.n 8000510 <__udivmoddi4+0x2f4> + 80004b0: 18b2 adds r2, r6, r2 + 80004b2: f108 31ff add.w r1, r8, #4294967295 @ 0xffffffff + 80004b6: d2c6 bcs.n 8000446 <__udivmoddi4+0x22a> + 80004b8: 42ba cmp r2, r7 + 80004ba: d2c4 bcs.n 8000446 <__udivmoddi4+0x22a> + 80004bc: f1a8 0102 sub.w r1, r8, #2 + 80004c0: 4432 add r2, r6 + 80004c2: e7c0 b.n 8000446 <__udivmoddi4+0x22a> + 80004c4: 45f0 cmp r8, lr + 80004c6: d29c bcs.n 8000402 <__udivmoddi4+0x1e6> + 80004c8: ebbe 0302 subs.w r3, lr, r2 + 80004cc: eb67 070c sbc.w r7, r7, ip + 80004d0: 3801 subs r0, #1 + 80004d2: 46b9 mov r9, r7 + 80004d4: e795 b.n 8000402 <__udivmoddi4+0x1e6> + 80004d6: eba6 0808 sub.w r8, r6, r8 + 80004da: 4441 add r1, r8 + 80004dc: 1eb8 subs r0, r7, #2 + 80004de: fbb1 f8fe udiv r8, r1, lr + 80004e2: fb08 f70c mul.w r7, r8, ip + 80004e6: e7dc b.n 80004a2 <__udivmoddi4+0x286> + 80004e8: 463b mov r3, r7 + 80004ea: e77f b.n 80003ec <__udivmoddi4+0x1d0> + 80004ec: 4650 mov r0, sl + 80004ee: e767 b.n 80003c0 <__udivmoddi4+0x1a4> + 80004f0: 4608 mov r0, r1 + 80004f2: e6fb b.n 80002ec <__udivmoddi4+0xd0> + 80004f4: 4434 add r4, r6 + 80004f6: 3802 subs r0, #2 + 80004f8: e732 b.n 8000360 <__udivmoddi4+0x144> + 80004fa: 3f02 subs r7, #2 + 80004fc: 4432 add r2, r6 + 80004fe: e71b b.n 8000338 <__udivmoddi4+0x11c> + 8000500: eba1 0108 sub.w r1, r1, r8 + 8000504: 4638 mov r0, r7 + 8000506: fbb1 f8fe udiv r8, r1, lr + 800050a: fb08 f70c mul.w r7, r8, ip + 800050e: e7c8 b.n 80004a2 <__udivmoddi4+0x286> + 8000510: 4641 mov r1, r8 + 8000512: e798 b.n 8000446 <__udivmoddi4+0x22a> + +08000514 <__aeabi_idiv0>: + 8000514: 4770 bx lr + 8000516: bf00 nop + +08000518
: +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + 8000518: b580 push {r7, lr} + 800051a: af00 add r7, sp, #0 + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + 800051c: f000 f9aa bl 8000874 + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + 8000520: f000 f806 bl 8000530 + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + 8000524: f000 f87c bl 8000620 + + /* Initialize interrupts */ + MX_NVIC_Init(); + 8000528: f000 f86e bl 8000608 + + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) + 800052c: bf00 nop + 800052e: e7fd b.n 800052c + +08000530 : +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + 8000530: b580 push {r7, lr} + 8000532: b094 sub sp, #80 @ 0x50 + 8000534: af00 add r7, sp, #0 + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 8000536: f107 0320 add.w r3, r7, #32 + 800053a: 2230 movs r2, #48 @ 0x30 + 800053c: 2100 movs r1, #0 + 800053e: 4618 mov r0, r3 + 8000540: f001 f95e bl 8001800 + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 8000544: f107 030c add.w r3, r7, #12 + 8000548: 2200 movs r2, #0 + 800054a: 601a str r2, [r3, #0] + 800054c: 605a str r2, [r3, #4] + 800054e: 609a str r2, [r3, #8] + 8000550: 60da str r2, [r3, #12] + 8000552: 611a str r2, [r3, #16] + + /** Configure the main internal regulator output voltage + */ + __HAL_RCC_PWR_CLK_ENABLE(); + 8000554: 2300 movs r3, #0 + 8000556: 60bb str r3, [r7, #8] + 8000558: 4b29 ldr r3, [pc, #164] @ (8000600 ) + 800055a: 6c1b ldr r3, [r3, #64] @ 0x40 + 800055c: 4a28 ldr r2, [pc, #160] @ (8000600 ) + 800055e: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 8000562: 6413 str r3, [r2, #64] @ 0x40 + 8000564: 4b26 ldr r3, [pc, #152] @ (8000600 ) + 8000566: 6c1b ldr r3, [r3, #64] @ 0x40 + 8000568: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 800056c: 60bb str r3, [r7, #8] + 800056e: 68bb ldr r3, [r7, #8] + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3); + 8000570: 2300 movs r3, #0 + 8000572: 607b str r3, [r7, #4] + 8000574: 4b23 ldr r3, [pc, #140] @ (8000604 ) + 8000576: 681b ldr r3, [r3, #0] + 8000578: f423 4340 bic.w r3, r3, #49152 @ 0xc000 + 800057c: 4a21 ldr r2, [pc, #132] @ (8000604 ) + 800057e: f443 4380 orr.w r3, r3, #16384 @ 0x4000 + 8000582: 6013 str r3, [r2, #0] + 8000584: 4b1f ldr r3, [pc, #124] @ (8000604 ) + 8000586: 681b ldr r3, [r3, #0] + 8000588: f403 4340 and.w r3, r3, #49152 @ 0xc000 + 800058c: 607b str r3, [r7, #4] + 800058e: 687b ldr r3, [r7, #4] + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + 8000590: 2302 movs r3, #2 + 8000592: 623b str r3, [r7, #32] + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 8000594: 2301 movs r3, #1 + 8000596: 62fb str r3, [r7, #44] @ 0x2c + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 8000598: 2310 movs r3, #16 + 800059a: 633b str r3, [r7, #48] @ 0x30 + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 800059c: 2302 movs r3, #2 + 800059e: 63bb str r3, [r7, #56] @ 0x38 + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + 80005a0: 2300 movs r3, #0 + 80005a2: 63fb str r3, [r7, #60] @ 0x3c + RCC_OscInitStruct.PLL.PLLM = 8; + 80005a4: 2308 movs r3, #8 + 80005a6: 643b str r3, [r7, #64] @ 0x40 + RCC_OscInitStruct.PLL.PLLN = 72; + 80005a8: 2348 movs r3, #72 @ 0x48 + 80005aa: 647b str r3, [r7, #68] @ 0x44 + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 80005ac: 2302 movs r3, #2 + 80005ae: 64bb str r3, [r7, #72] @ 0x48 + RCC_OscInitStruct.PLL.PLLQ = 3; + 80005b0: 2303 movs r3, #3 + 80005b2: 64fb str r3, [r7, #76] @ 0x4c + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 80005b4: f107 0320 add.w r3, r7, #32 + 80005b8: 4618 mov r0, r3 + 80005ba: f000 fcbd bl 8000f38 + 80005be: 4603 mov r3, r0 + 80005c0: 2b00 cmp r3, #0 + 80005c2: d001 beq.n 80005c8 + { + Error_Handler(); + 80005c4: f000 f8b6 bl 8000734 + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + 80005c8: 230f movs r3, #15 + 80005ca: 60fb str r3, [r7, #12] + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + 80005cc: 2302 movs r3, #2 + 80005ce: 613b str r3, [r7, #16] + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 80005d0: 2300 movs r3, #0 + 80005d2: 617b str r3, [r7, #20] + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + 80005d4: f44f 5380 mov.w r3, #4096 @ 0x1000 + 80005d8: 61bb str r3, [r7, #24] + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 80005da: f44f 5380 mov.w r3, #4096 @ 0x1000 + 80005de: 61fb str r3, [r7, #28] + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) + 80005e0: f107 030c add.w r3, r7, #12 + 80005e4: 2102 movs r1, #2 + 80005e6: 4618 mov r0, r3 + 80005e8: f000 ff1e bl 8001428 + 80005ec: 4603 mov r3, r0 + 80005ee: 2b00 cmp r3, #0 + 80005f0: d001 beq.n 80005f6 + { + Error_Handler(); + 80005f2: f000 f89f bl 8000734 + } +} + 80005f6: bf00 nop + 80005f8: 3750 adds r7, #80 @ 0x50 + 80005fa: 46bd mov sp, r7 + 80005fc: bd80 pop {r7, pc} + 80005fe: bf00 nop + 8000600: 40023800 .word 0x40023800 + 8000604: 40007000 .word 0x40007000 + +08000608 : +/** + * @brief NVIC Configuration. + * @retval None + */ +static void MX_NVIC_Init(void) +{ + 8000608: b580 push {r7, lr} + 800060a: af00 add r7, sp, #0 + /* EXTI0_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(EXTI0_IRQn, 0, 0); + 800060c: 2200 movs r2, #0 + 800060e: 2100 movs r1, #0 + 8000610: 2006 movs r0, #6 + 8000612: f000 fa7c bl 8000b0e + HAL_NVIC_EnableIRQ(EXTI0_IRQn); + 8000616: 2006 movs r0, #6 + 8000618: f000 fa95 bl 8000b46 +} + 800061c: bf00 nop + 800061e: bd80 pop {r7, pc} + +08000620 : + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + 8000620: b580 push {r7, lr} + 8000622: b088 sub sp, #32 + 8000624: af00 add r7, sp, #0 + GPIO_InitTypeDef GPIO_InitStruct = {0}; + 8000626: f107 030c add.w r3, r7, #12 + 800062a: 2200 movs r2, #0 + 800062c: 601a str r2, [r3, #0] + 800062e: 605a str r2, [r3, #4] + 8000630: 609a str r2, [r3, #8] + 8000632: 60da str r2, [r3, #12] + 8000634: 611a str r2, [r3, #16] + /* USER CODE BEGIN MX_GPIO_Init_1 */ + + /* USER CODE END MX_GPIO_Init_1 */ + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOH_CLK_ENABLE(); + 8000636: 2300 movs r3, #0 + 8000638: 60bb str r3, [r7, #8] + 800063a: 4b27 ldr r3, [pc, #156] @ (80006d8 ) + 800063c: 6b1b ldr r3, [r3, #48] @ 0x30 + 800063e: 4a26 ldr r2, [pc, #152] @ (80006d8 ) + 8000640: f043 0380 orr.w r3, r3, #128 @ 0x80 + 8000644: 6313 str r3, [r2, #48] @ 0x30 + 8000646: 4b24 ldr r3, [pc, #144] @ (80006d8 ) + 8000648: 6b1b ldr r3, [r3, #48] @ 0x30 + 800064a: f003 0380 and.w r3, r3, #128 @ 0x80 + 800064e: 60bb str r3, [r7, #8] + 8000650: 68bb ldr r3, [r7, #8] + __HAL_RCC_GPIOA_CLK_ENABLE(); + 8000652: 2300 movs r3, #0 + 8000654: 607b str r3, [r7, #4] + 8000656: 4b20 ldr r3, [pc, #128] @ (80006d8 ) + 8000658: 6b1b ldr r3, [r3, #48] @ 0x30 + 800065a: 4a1f ldr r2, [pc, #124] @ (80006d8 ) + 800065c: f043 0301 orr.w r3, r3, #1 + 8000660: 6313 str r3, [r2, #48] @ 0x30 + 8000662: 4b1d ldr r3, [pc, #116] @ (80006d8 ) + 8000664: 6b1b ldr r3, [r3, #48] @ 0x30 + 8000666: f003 0301 and.w r3, r3, #1 + 800066a: 607b str r3, [r7, #4] + 800066c: 687b ldr r3, [r7, #4] + __HAL_RCC_GPIOG_CLK_ENABLE(); + 800066e: 2300 movs r3, #0 + 8000670: 603b str r3, [r7, #0] + 8000672: 4b19 ldr r3, [pc, #100] @ (80006d8 ) + 8000674: 6b1b ldr r3, [r3, #48] @ 0x30 + 8000676: 4a18 ldr r2, [pc, #96] @ (80006d8 ) + 8000678: f043 0340 orr.w r3, r3, #64 @ 0x40 + 800067c: 6313 str r3, [r2, #48] @ 0x30 + 800067e: 4b16 ldr r3, [pc, #88] @ (80006d8 ) + 8000680: 6b1b ldr r3, [r3, #48] @ 0x30 + 8000682: f003 0340 and.w r3, r3, #64 @ 0x40 + 8000686: 603b str r3, [r7, #0] + 8000688: 683b ldr r3, [r7, #0] + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(G1_GPIO_Port, G1_Pin, GPIO_PIN_RESET); + 800068a: 2200 movs r2, #0 + 800068c: f44f 5100 mov.w r1, #8192 @ 0x2000 + 8000690: 4812 ldr r0, [pc, #72] @ (80006dc ) + 8000692: f000 fc1f bl 8000ed4 + + /*Configure GPIO pin : B1_Pin */ + GPIO_InitStruct.Pin = B1_Pin; + 8000696: 2301 movs r3, #1 + 8000698: 60fb str r3, [r7, #12] + GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; + 800069a: f44f 1388 mov.w r3, #1114112 @ 0x110000 + 800069e: 613b str r3, [r7, #16] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 80006a0: 2300 movs r3, #0 + 80006a2: 617b str r3, [r7, #20] + HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct); + 80006a4: f107 030c add.w r3, r7, #12 + 80006a8: 4619 mov r1, r3 + 80006aa: 480d ldr r0, [pc, #52] @ (80006e0 ) + 80006ac: f000 fa66 bl 8000b7c + + /*Configure GPIO pin : G1_Pin */ + GPIO_InitStruct.Pin = G1_Pin; + 80006b0: f44f 5300 mov.w r3, #8192 @ 0x2000 + 80006b4: 60fb str r3, [r7, #12] + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 80006b6: 2301 movs r3, #1 + 80006b8: 613b str r3, [r7, #16] + GPIO_InitStruct.Pull = GPIO_NOPULL; + 80006ba: 2300 movs r3, #0 + 80006bc: 617b str r3, [r7, #20] + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 80006be: 2300 movs r3, #0 + 80006c0: 61bb str r3, [r7, #24] + HAL_GPIO_Init(G1_GPIO_Port, &GPIO_InitStruct); + 80006c2: f107 030c add.w r3, r7, #12 + 80006c6: 4619 mov r1, r3 + 80006c8: 4804 ldr r0, [pc, #16] @ (80006dc ) + 80006ca: f000 fa57 bl 8000b7c + + /* USER CODE BEGIN MX_GPIO_Init_2 */ + + /* USER CODE END MX_GPIO_Init_2 */ +} + 80006ce: bf00 nop + 80006d0: 3720 adds r7, #32 + 80006d2: 46bd mov sp, r7 + 80006d4: bd80 pop {r7, pc} + 80006d6: bf00 nop + 80006d8: 40023800 .word 0x40023800 + 80006dc: 40021800 .word 0x40021800 + 80006e0: 40020000 .word 0x40020000 + +080006e4 : + +/* USER CODE BEGIN 4 */ +int on = 0; +void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) +{ + 80006e4: b580 push {r7, lr} + 80006e6: b082 sub sp, #8 + 80006e8: af00 add r7, sp, #0 + 80006ea: 4603 mov r3, r0 + 80006ec: 80fb strh r3, [r7, #6] + if (GPIO_Pin == B1_Pin) + 80006ee: 88fb ldrh r3, [r7, #6] + 80006f0: 2b01 cmp r3, #1 + 80006f2: d116 bne.n 8000722 + { + //do stuff + if (on == 1) + 80006f4: 4b0d ldr r3, [pc, #52] @ (800072c ) + 80006f6: 681b ldr r3, [r3, #0] + 80006f8: 2b01 cmp r3, #1 + 80006fa: d109 bne.n 8000710 + { + HAL_GPIO_WritePin(GPIOG, G1_Pin, 0); + 80006fc: 2200 movs r2, #0 + 80006fe: f44f 5100 mov.w r1, #8192 @ 0x2000 + 8000702: 480b ldr r0, [pc, #44] @ (8000730 ) + 8000704: f000 fbe6 bl 8000ed4 + on = 0; + 8000708: 4b08 ldr r3, [pc, #32] @ (800072c ) + 800070a: 2200 movs r2, #0 + 800070c: 601a str r2, [r3, #0] + { + HAL_GPIO_WritePin(GPIOG, G1_Pin, 1); + on = 1; + } + } +} + 800070e: e008 b.n 8000722 + HAL_GPIO_WritePin(GPIOG, G1_Pin, 1); + 8000710: 2201 movs r2, #1 + 8000712: f44f 5100 mov.w r1, #8192 @ 0x2000 + 8000716: 4806 ldr r0, [pc, #24] @ (8000730 ) + 8000718: f000 fbdc bl 8000ed4 + on = 1; + 800071c: 4b03 ldr r3, [pc, #12] @ (800072c ) + 800071e: 2201 movs r2, #1 + 8000720: 601a str r2, [r3, #0] +} + 8000722: bf00 nop + 8000724: 3708 adds r7, #8 + 8000726: 46bd mov sp, r7 + 8000728: bd80 pop {r7, pc} + 800072a: bf00 nop + 800072c: 20000028 .word 0x20000028 + 8000730: 40021800 .word 0x40021800 + +08000734 : +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + 8000734: b480 push {r7} + 8000736: af00 add r7, sp, #0 + \details Disables IRQ interrupts by setting special-purpose register PRIMASK. + Can only be executed in Privileged modes. + */ +__STATIC_FORCEINLINE void __disable_irq(void) +{ + __ASM volatile ("cpsid i" : : : "memory"); + 8000738: b672 cpsid i +} + 800073a: bf00 nop + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + __disable_irq(); + while (1) + 800073c: bf00 nop + 800073e: e7fd b.n 800073c + +08000740 : +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + 8000740: b480 push {r7} + 8000742: b083 sub sp, #12 + 8000744: af00 add r7, sp, #0 + + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + 8000746: 2300 movs r3, #0 + 8000748: 607b str r3, [r7, #4] + 800074a: 4b10 ldr r3, [pc, #64] @ (800078c ) + 800074c: 6c5b ldr r3, [r3, #68] @ 0x44 + 800074e: 4a0f ldr r2, [pc, #60] @ (800078c ) + 8000750: f443 4380 orr.w r3, r3, #16384 @ 0x4000 + 8000754: 6453 str r3, [r2, #68] @ 0x44 + 8000756: 4b0d ldr r3, [pc, #52] @ (800078c ) + 8000758: 6c5b ldr r3, [r3, #68] @ 0x44 + 800075a: f403 4380 and.w r3, r3, #16384 @ 0x4000 + 800075e: 607b str r3, [r7, #4] + 8000760: 687b ldr r3, [r7, #4] + __HAL_RCC_PWR_CLK_ENABLE(); + 8000762: 2300 movs r3, #0 + 8000764: 603b str r3, [r7, #0] + 8000766: 4b09 ldr r3, [pc, #36] @ (800078c ) + 8000768: 6c1b ldr r3, [r3, #64] @ 0x40 + 800076a: 4a08 ldr r2, [pc, #32] @ (800078c ) + 800076c: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 8000770: 6413 str r3, [r2, #64] @ 0x40 + 8000772: 4b06 ldr r3, [pc, #24] @ (800078c ) + 8000774: 6c1b ldr r3, [r3, #64] @ 0x40 + 8000776: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 800077a: 603b str r3, [r7, #0] + 800077c: 683b ldr r3, [r7, #0] + /* System interrupt init*/ + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + 800077e: bf00 nop + 8000780: 370c adds r7, #12 + 8000782: 46bd mov sp, r7 + 8000784: f85d 7b04 ldr.w r7, [sp], #4 + 8000788: 4770 bx lr + 800078a: bf00 nop + 800078c: 40023800 .word 0x40023800 + +08000790 : +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + 8000790: b480 push {r7} + 8000792: af00 add r7, sp, #0 + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + while (1) + 8000794: bf00 nop + 8000796: e7fd b.n 8000794 + +08000798 : + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + 8000798: b480 push {r7} + 800079a: af00 add r7, sp, #0 + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + 800079c: bf00 nop + 800079e: e7fd b.n 800079c + +080007a0 : + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + 80007a0: b480 push {r7} + 80007a2: af00 add r7, sp, #0 + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + 80007a4: bf00 nop + 80007a6: e7fd b.n 80007a4 + +080007a8 : + +/** + * @brief This function handles Pre-fetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + 80007a8: b480 push {r7} + 80007aa: af00 add r7, sp, #0 + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + 80007ac: bf00 nop + 80007ae: e7fd b.n 80007ac + +080007b0 : + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + 80007b0: b480 push {r7} + 80007b2: af00 add r7, sp, #0 + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + 80007b4: bf00 nop + 80007b6: e7fd b.n 80007b4 + +080007b8 : + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + 80007b8: b480 push {r7} + 80007ba: af00 add r7, sp, #0 + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + 80007bc: bf00 nop + 80007be: 46bd mov sp, r7 + 80007c0: f85d 7b04 ldr.w r7, [sp], #4 + 80007c4: 4770 bx lr + +080007c6 : + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + 80007c6: b480 push {r7} + 80007c8: af00 add r7, sp, #0 + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + 80007ca: bf00 nop + 80007cc: 46bd mov sp, r7 + 80007ce: f85d 7b04 ldr.w r7, [sp], #4 + 80007d2: 4770 bx lr + +080007d4 : + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + 80007d4: b480 push {r7} + 80007d6: af00 add r7, sp, #0 + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + 80007d8: bf00 nop + 80007da: 46bd mov sp, r7 + 80007dc: f85d 7b04 ldr.w r7, [sp], #4 + 80007e0: 4770 bx lr + +080007e2 : + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + 80007e2: b580 push {r7, lr} + 80007e4: af00 add r7, sp, #0 + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + 80007e6: f000 f897 bl 8000918 + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + 80007ea: bf00 nop + 80007ec: bd80 pop {r7, pc} + +080007ee : + +/** + * @brief This function handles EXTI line0 interrupt. + */ +void EXTI0_IRQHandler(void) +{ + 80007ee: b580 push {r7, lr} + 80007f0: af00 add r7, sp, #0 + /* USER CODE BEGIN EXTI0_IRQn 0 */ + + /* USER CODE END EXTI0_IRQn 0 */ + HAL_GPIO_EXTI_IRQHandler(B1_Pin); + 80007f2: 2001 movs r0, #1 + 80007f4: f000 fb88 bl 8000f08 + /* USER CODE BEGIN EXTI0_IRQn 1 */ + + /* USER CODE END EXTI0_IRQn 1 */ +} + 80007f8: bf00 nop + 80007fa: bd80 pop {r7, pc} + +080007fc : + * configuration. + * @param None + * @retval None + */ +void SystemInit(void) +{ + 80007fc: b480 push {r7} + 80007fe: af00 add r7, sp, #0 + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + 8000800: 4b06 ldr r3, [pc, #24] @ (800081c ) + 8000802: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 + 8000806: 4a05 ldr r2, [pc, #20] @ (800081c ) + 8000808: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000 + 800080c: f8c2 3088 str.w r3, [r2, #136] @ 0x88 + + /* Configure the Vector Table location -------------------------------------*/ +#if defined(USER_VECT_TAB_ADDRESS) + SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#endif /* USER_VECT_TAB_ADDRESS */ +} + 8000810: bf00 nop + 8000812: 46bd mov sp, r7 + 8000814: f85d 7b04 ldr.w r7, [sp], #4 + 8000818: 4770 bx lr + 800081a: bf00 nop + 800081c: e000ed00 .word 0xe000ed00 + +08000820 : + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + 8000820: f8df d034 ldr.w sp, [pc, #52] @ 8000858 + +/* Call the clock system initialization function.*/ + bl SystemInit + 8000824: f7ff ffea bl 80007fc + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + 8000828: 480c ldr r0, [pc, #48] @ (800085c ) + ldr r1, =_edata + 800082a: 490d ldr r1, [pc, #52] @ (8000860 ) + ldr r2, =_sidata + 800082c: 4a0d ldr r2, [pc, #52] @ (8000864 ) + movs r3, #0 + 800082e: 2300 movs r3, #0 + b LoopCopyDataInit + 8000830: e002 b.n 8000838 + +08000832 : + +CopyDataInit: + ldr r4, [r2, r3] + 8000832: 58d4 ldr r4, [r2, r3] + str r4, [r0, r3] + 8000834: 50c4 str r4, [r0, r3] + adds r3, r3, #4 + 8000836: 3304 adds r3, #4 + +08000838 : + +LoopCopyDataInit: + adds r4, r0, r3 + 8000838: 18c4 adds r4, r0, r3 + cmp r4, r1 + 800083a: 428c cmp r4, r1 + bcc CopyDataInit + 800083c: d3f9 bcc.n 8000832 + +/* Zero fill the bss segment. */ + ldr r2, =_sbss + 800083e: 4a0a ldr r2, [pc, #40] @ (8000868 ) + ldr r4, =_ebss + 8000840: 4c0a ldr r4, [pc, #40] @ (800086c ) + movs r3, #0 + 8000842: 2300 movs r3, #0 + b LoopFillZerobss + 8000844: e001 b.n 800084a + +08000846 : + +FillZerobss: + str r3, [r2] + 8000846: 6013 str r3, [r2, #0] + adds r2, r2, #4 + 8000848: 3204 adds r2, #4 + +0800084a : + +LoopFillZerobss: + cmp r2, r4 + 800084a: 42a2 cmp r2, r4 + bcc FillZerobss + 800084c: d3fb bcc.n 8000846 + +/* Call static constructors */ + bl __libc_init_array + 800084e: f000 ffdf bl 8001810 <__libc_init_array> +/* Call the application's entry point.*/ + bl main + 8000852: f7ff fe61 bl 8000518
+ bx lr + 8000856: 4770 bx lr + ldr sp, =_estack /* set stack pointer */ + 8000858: 20030000 .word 0x20030000 + ldr r0, =_sdata + 800085c: 20000000 .word 0x20000000 + ldr r1, =_edata + 8000860: 2000000c .word 0x2000000c + ldr r2, =_sidata + 8000864: 08001890 .word 0x08001890 + ldr r2, =_sbss + 8000868: 2000000c .word 0x2000000c + ldr r4, =_ebss + 800086c: 20000030 .word 0x20000030 + +08000870 : + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + 8000870: e7fe b.n 8000870 + ... + +08000874 : + * need to ensure that the SysTick time base is always set to 1 millisecond + * to have correct HAL operation. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_Init(void) +{ + 8000874: b580 push {r7, lr} + 8000876: af00 add r7, sp, #0 + /* Configure Flash prefetch, Instruction cache, Data cache */ +#if (INSTRUCTION_CACHE_ENABLE != 0U) + __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); + 8000878: 4b0e ldr r3, [pc, #56] @ (80008b4 ) + 800087a: 681b ldr r3, [r3, #0] + 800087c: 4a0d ldr r2, [pc, #52] @ (80008b4 ) + 800087e: f443 7300 orr.w r3, r3, #512 @ 0x200 + 8000882: 6013 str r3, [r2, #0] +#endif /* INSTRUCTION_CACHE_ENABLE */ + +#if (DATA_CACHE_ENABLE != 0U) + __HAL_FLASH_DATA_CACHE_ENABLE(); + 8000884: 4b0b ldr r3, [pc, #44] @ (80008b4 ) + 8000886: 681b ldr r3, [r3, #0] + 8000888: 4a0a ldr r2, [pc, #40] @ (80008b4 ) + 800088a: f443 6380 orr.w r3, r3, #1024 @ 0x400 + 800088e: 6013 str r3, [r2, #0] +#endif /* DATA_CACHE_ENABLE */ + +#if (PREFETCH_ENABLE != 0U) + __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); + 8000890: 4b08 ldr r3, [pc, #32] @ (80008b4 ) + 8000892: 681b ldr r3, [r3, #0] + 8000894: 4a07 ldr r2, [pc, #28] @ (80008b4 ) + 8000896: f443 7380 orr.w r3, r3, #256 @ 0x100 + 800089a: 6013 str r3, [r2, #0] +#endif /* PREFETCH_ENABLE */ + + /* Set Interrupt Group Priority */ + HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); + 800089c: 2003 movs r0, #3 + 800089e: f000 f92b bl 8000af8 + + /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ + HAL_InitTick(TICK_INT_PRIORITY); + 80008a2: 200f movs r0, #15 + 80008a4: f000 f808 bl 80008b8 + + /* Init the low level hardware */ + HAL_MspInit(); + 80008a8: f7ff ff4a bl 8000740 + + /* Return function status */ + return HAL_OK; + 80008ac: 2300 movs r3, #0 +} + 80008ae: 4618 mov r0, r3 + 80008b0: bd80 pop {r7, pc} + 80008b2: bf00 nop + 80008b4: 40023c00 .word 0x40023c00 + +080008b8 : + * implementation in user file. + * @param TickPriority Tick interrupt priority. + * @retval HAL status + */ +__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) +{ + 80008b8: b580 push {r7, lr} + 80008ba: b082 sub sp, #8 + 80008bc: af00 add r7, sp, #0 + 80008be: 6078 str r0, [r7, #4] + /* Configure the SysTick to have interrupt in 1ms time basis*/ + if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) + 80008c0: 4b12 ldr r3, [pc, #72] @ (800090c ) + 80008c2: 681a ldr r2, [r3, #0] + 80008c4: 4b12 ldr r3, [pc, #72] @ (8000910 ) + 80008c6: 781b ldrb r3, [r3, #0] + 80008c8: 4619 mov r1, r3 + 80008ca: f44f 737a mov.w r3, #1000 @ 0x3e8 + 80008ce: fbb3 f3f1 udiv r3, r3, r1 + 80008d2: fbb2 f3f3 udiv r3, r2, r3 + 80008d6: 4618 mov r0, r3 + 80008d8: f000 f943 bl 8000b62 + 80008dc: 4603 mov r3, r0 + 80008de: 2b00 cmp r3, #0 + 80008e0: d001 beq.n 80008e6 + { + return HAL_ERROR; + 80008e2: 2301 movs r3, #1 + 80008e4: e00e b.n 8000904 + } + + /* Configure the SysTick IRQ priority */ + if (TickPriority < (1UL << __NVIC_PRIO_BITS)) + 80008e6: 687b ldr r3, [r7, #4] + 80008e8: 2b0f cmp r3, #15 + 80008ea: d80a bhi.n 8000902 + { + HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); + 80008ec: 2200 movs r2, #0 + 80008ee: 6879 ldr r1, [r7, #4] + 80008f0: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff + 80008f4: f000 f90b bl 8000b0e + uwTickPrio = TickPriority; + 80008f8: 4a06 ldr r2, [pc, #24] @ (8000914 ) + 80008fa: 687b ldr r3, [r7, #4] + 80008fc: 6013 str r3, [r2, #0] + { + return HAL_ERROR; + } + + /* Return function status */ + return HAL_OK; + 80008fe: 2300 movs r3, #0 + 8000900: e000 b.n 8000904 + return HAL_ERROR; + 8000902: 2301 movs r3, #1 +} + 8000904: 4618 mov r0, r3 + 8000906: 3708 adds r7, #8 + 8000908: 46bd mov sp, r7 + 800090a: bd80 pop {r7, pc} + 800090c: 20000000 .word 0x20000000 + 8000910: 20000008 .word 0x20000008 + 8000914: 20000004 .word 0x20000004 + +08000918 : + * @note This function is declared as __weak to be overwritten in case of other + * implementations in user file. + * @retval None + */ +__weak void HAL_IncTick(void) +{ + 8000918: b480 push {r7} + 800091a: af00 add r7, sp, #0 + uwTick += uwTickFreq; + 800091c: 4b06 ldr r3, [pc, #24] @ (8000938 ) + 800091e: 781b ldrb r3, [r3, #0] + 8000920: 461a mov r2, r3 + 8000922: 4b06 ldr r3, [pc, #24] @ (800093c ) + 8000924: 681b ldr r3, [r3, #0] + 8000926: 4413 add r3, r2 + 8000928: 4a04 ldr r2, [pc, #16] @ (800093c ) + 800092a: 6013 str r3, [r2, #0] +} + 800092c: bf00 nop + 800092e: 46bd mov sp, r7 + 8000930: f85d 7b04 ldr.w r7, [sp], #4 + 8000934: 4770 bx lr + 8000936: bf00 nop + 8000938: 20000008 .word 0x20000008 + 800093c: 2000002c .word 0x2000002c + +08000940 : + * @note This function is declared as __weak to be overwritten in case of other + * implementations in user file. + * @retval tick value + */ +__weak uint32_t HAL_GetTick(void) +{ + 8000940: b480 push {r7} + 8000942: af00 add r7, sp, #0 + return uwTick; + 8000944: 4b03 ldr r3, [pc, #12] @ (8000954 ) + 8000946: 681b ldr r3, [r3, #0] +} + 8000948: 4618 mov r0, r3 + 800094a: 46bd mov sp, r7 + 800094c: f85d 7b04 ldr.w r7, [sp], #4 + 8000950: 4770 bx lr + 8000952: bf00 nop + 8000954: 2000002c .word 0x2000002c + +08000958 <__NVIC_SetPriorityGrouping>: + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + 8000958: b480 push {r7} + 800095a: b085 sub sp, #20 + 800095c: af00 add r7, sp, #0 + 800095e: 6078 str r0, [r7, #4] + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + 8000960: 687b ldr r3, [r7, #4] + 8000962: f003 0307 and.w r3, r3, #7 + 8000966: 60fb str r3, [r7, #12] + + reg_value = SCB->AIRCR; /* read old register configuration */ + 8000968: 4b0c ldr r3, [pc, #48] @ (800099c <__NVIC_SetPriorityGrouping+0x44>) + 800096a: 68db ldr r3, [r3, #12] + 800096c: 60bb str r3, [r7, #8] + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + 800096e: 68ba ldr r2, [r7, #8] + 8000970: f64f 03ff movw r3, #63743 @ 0xf8ff + 8000974: 4013 ands r3, r2 + 8000976: 60bb str r3, [r7, #8] + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + 8000978: 68fb ldr r3, [r7, #12] + 800097a: 021a lsls r2, r3, #8 + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + 800097c: 68bb ldr r3, [r7, #8] + 800097e: 4313 orrs r3, r2 + reg_value = (reg_value | + 8000980: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 + 8000984: f443 3300 orr.w r3, r3, #131072 @ 0x20000 + 8000988: 60bb str r3, [r7, #8] + SCB->AIRCR = reg_value; + 800098a: 4a04 ldr r2, [pc, #16] @ (800099c <__NVIC_SetPriorityGrouping+0x44>) + 800098c: 68bb ldr r3, [r7, #8] + 800098e: 60d3 str r3, [r2, #12] +} + 8000990: bf00 nop + 8000992: 3714 adds r7, #20 + 8000994: 46bd mov sp, r7 + 8000996: f85d 7b04 ldr.w r7, [sp], #4 + 800099a: 4770 bx lr + 800099c: e000ed00 .word 0xe000ed00 + +080009a0 <__NVIC_GetPriorityGrouping>: + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + 80009a0: b480 push {r7} + 80009a2: af00 add r7, sp, #0 + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); + 80009a4: 4b04 ldr r3, [pc, #16] @ (80009b8 <__NVIC_GetPriorityGrouping+0x18>) + 80009a6: 68db ldr r3, [r3, #12] + 80009a8: 0a1b lsrs r3, r3, #8 + 80009aa: f003 0307 and.w r3, r3, #7 +} + 80009ae: 4618 mov r0, r3 + 80009b0: 46bd mov sp, r7 + 80009b2: f85d 7b04 ldr.w r7, [sp], #4 + 80009b6: 4770 bx lr + 80009b8: e000ed00 .word 0xe000ed00 + +080009bc <__NVIC_EnableIRQ>: + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + 80009bc: b480 push {r7} + 80009be: b083 sub sp, #12 + 80009c0: af00 add r7, sp, #0 + 80009c2: 4603 mov r3, r0 + 80009c4: 71fb strb r3, [r7, #7] + if ((int32_t)(IRQn) >= 0) + 80009c6: f997 3007 ldrsb.w r3, [r7, #7] + 80009ca: 2b00 cmp r3, #0 + 80009cc: db0b blt.n 80009e6 <__NVIC_EnableIRQ+0x2a> + { + __COMPILER_BARRIER(); + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 80009ce: 79fb ldrb r3, [r7, #7] + 80009d0: f003 021f and.w r2, r3, #31 + 80009d4: 4907 ldr r1, [pc, #28] @ (80009f4 <__NVIC_EnableIRQ+0x38>) + 80009d6: f997 3007 ldrsb.w r3, [r7, #7] + 80009da: 095b lsrs r3, r3, #5 + 80009dc: 2001 movs r0, #1 + 80009de: fa00 f202 lsl.w r2, r0, r2 + 80009e2: f841 2023 str.w r2, [r1, r3, lsl #2] + __COMPILER_BARRIER(); + } +} + 80009e6: bf00 nop + 80009e8: 370c adds r7, #12 + 80009ea: 46bd mov sp, r7 + 80009ec: f85d 7b04 ldr.w r7, [sp], #4 + 80009f0: 4770 bx lr + 80009f2: bf00 nop + 80009f4: e000e100 .word 0xe000e100 + +080009f8 <__NVIC_SetPriority>: + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + 80009f8: b480 push {r7} + 80009fa: b083 sub sp, #12 + 80009fc: af00 add r7, sp, #0 + 80009fe: 4603 mov r3, r0 + 8000a00: 6039 str r1, [r7, #0] + 8000a02: 71fb strb r3, [r7, #7] + if ((int32_t)(IRQn) >= 0) + 8000a04: f997 3007 ldrsb.w r3, [r7, #7] + 8000a08: 2b00 cmp r3, #0 + 8000a0a: db0a blt.n 8000a22 <__NVIC_SetPriority+0x2a> + { + NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + 8000a0c: 683b ldr r3, [r7, #0] + 8000a0e: b2da uxtb r2, r3 + 8000a10: 490c ldr r1, [pc, #48] @ (8000a44 <__NVIC_SetPriority+0x4c>) + 8000a12: f997 3007 ldrsb.w r3, [r7, #7] + 8000a16: 0112 lsls r2, r2, #4 + 8000a18: b2d2 uxtb r2, r2 + 8000a1a: 440b add r3, r1 + 8000a1c: f883 2300 strb.w r2, [r3, #768] @ 0x300 + } + else + { + SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + 8000a20: e00a b.n 8000a38 <__NVIC_SetPriority+0x40> + SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + 8000a22: 683b ldr r3, [r7, #0] + 8000a24: b2da uxtb r2, r3 + 8000a26: 4908 ldr r1, [pc, #32] @ (8000a48 <__NVIC_SetPriority+0x50>) + 8000a28: 79fb ldrb r3, [r7, #7] + 8000a2a: f003 030f and.w r3, r3, #15 + 8000a2e: 3b04 subs r3, #4 + 8000a30: 0112 lsls r2, r2, #4 + 8000a32: b2d2 uxtb r2, r2 + 8000a34: 440b add r3, r1 + 8000a36: 761a strb r2, [r3, #24] +} + 8000a38: bf00 nop + 8000a3a: 370c adds r7, #12 + 8000a3c: 46bd mov sp, r7 + 8000a3e: f85d 7b04 ldr.w r7, [sp], #4 + 8000a42: 4770 bx lr + 8000a44: e000e100 .word 0xe000e100 + 8000a48: e000ed00 .word 0xe000ed00 + +08000a4c : + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + 8000a4c: b480 push {r7} + 8000a4e: b089 sub sp, #36 @ 0x24 + 8000a50: af00 add r7, sp, #0 + 8000a52: 60f8 str r0, [r7, #12] + 8000a54: 60b9 str r1, [r7, #8] + 8000a56: 607a str r2, [r7, #4] + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + 8000a58: 68fb ldr r3, [r7, #12] + 8000a5a: f003 0307 and.w r3, r3, #7 + 8000a5e: 61fb str r3, [r7, #28] + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + 8000a60: 69fb ldr r3, [r7, #28] + 8000a62: f1c3 0307 rsb r3, r3, #7 + 8000a66: 2b04 cmp r3, #4 + 8000a68: bf28 it cs + 8000a6a: 2304 movcs r3, #4 + 8000a6c: 61bb str r3, [r7, #24] + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + 8000a6e: 69fb ldr r3, [r7, #28] + 8000a70: 3304 adds r3, #4 + 8000a72: 2b06 cmp r3, #6 + 8000a74: d902 bls.n 8000a7c + 8000a76: 69fb ldr r3, [r7, #28] + 8000a78: 3b03 subs r3, #3 + 8000a7a: e000 b.n 8000a7e + 8000a7c: 2300 movs r3, #0 + 8000a7e: 617b str r3, [r7, #20] + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + 8000a80: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff + 8000a84: 69bb ldr r3, [r7, #24] + 8000a86: fa02 f303 lsl.w r3, r2, r3 + 8000a8a: 43da mvns r2, r3 + 8000a8c: 68bb ldr r3, [r7, #8] + 8000a8e: 401a ands r2, r3 + 8000a90: 697b ldr r3, [r7, #20] + 8000a92: 409a lsls r2, r3 + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + 8000a94: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff + 8000a98: 697b ldr r3, [r7, #20] + 8000a9a: fa01 f303 lsl.w r3, r1, r3 + 8000a9e: 43d9 mvns r1, r3 + 8000aa0: 687b ldr r3, [r7, #4] + 8000aa2: 400b ands r3, r1 + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + 8000aa4: 4313 orrs r3, r2 + ); +} + 8000aa6: 4618 mov r0, r3 + 8000aa8: 3724 adds r7, #36 @ 0x24 + 8000aaa: 46bd mov sp, r7 + 8000aac: f85d 7b04 ldr.w r7, [sp], #4 + 8000ab0: 4770 bx lr + ... + +08000ab4 : + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + 8000ab4: b580 push {r7, lr} + 8000ab6: b082 sub sp, #8 + 8000ab8: af00 add r7, sp, #0 + 8000aba: 6078 str r0, [r7, #4] + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + 8000abc: 687b ldr r3, [r7, #4] + 8000abe: 3b01 subs r3, #1 + 8000ac0: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 + 8000ac4: d301 bcc.n 8000aca + { + return (1UL); /* Reload value impossible */ + 8000ac6: 2301 movs r3, #1 + 8000ac8: e00f b.n 8000aea + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + 8000aca: 4a0a ldr r2, [pc, #40] @ (8000af4 ) + 8000acc: 687b ldr r3, [r7, #4] + 8000ace: 3b01 subs r3, #1 + 8000ad0: 6053 str r3, [r2, #4] + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + 8000ad2: 210f movs r1, #15 + 8000ad4: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff + 8000ad8: f7ff ff8e bl 80009f8 <__NVIC_SetPriority> + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + 8000adc: 4b05 ldr r3, [pc, #20] @ (8000af4 ) + 8000ade: 2200 movs r2, #0 + 8000ae0: 609a str r2, [r3, #8] + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + 8000ae2: 4b04 ldr r3, [pc, #16] @ (8000af4 ) + 8000ae4: 2207 movs r2, #7 + 8000ae6: 601a str r2, [r3, #0] + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ + 8000ae8: 2300 movs r3, #0 +} + 8000aea: 4618 mov r0, r3 + 8000aec: 3708 adds r7, #8 + 8000aee: 46bd mov sp, r7 + 8000af0: bd80 pop {r7, pc} + 8000af2: bf00 nop + 8000af4: e000e010 .word 0xe000e010 + +08000af8 : + * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. + * The pending IRQ priority will be managed only by the subpriority. + * @retval None + */ +void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + 8000af8: b580 push {r7, lr} + 8000afa: b082 sub sp, #8 + 8000afc: af00 add r7, sp, #0 + 8000afe: 6078 str r0, [r7, #4] + /* Check the parameters */ + assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); + + /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ + NVIC_SetPriorityGrouping(PriorityGroup); + 8000b00: 6878 ldr r0, [r7, #4] + 8000b02: f7ff ff29 bl 8000958 <__NVIC_SetPriorityGrouping> +} + 8000b06: bf00 nop + 8000b08: 3708 adds r7, #8 + 8000b0a: 46bd mov sp, r7 + 8000b0c: bd80 pop {r7, pc} + +08000b0e : + * This parameter can be a value between 0 and 15 + * A lower priority value indicates a higher priority. + * @retval None + */ +void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) +{ + 8000b0e: b580 push {r7, lr} + 8000b10: b086 sub sp, #24 + 8000b12: af00 add r7, sp, #0 + 8000b14: 4603 mov r3, r0 + 8000b16: 60b9 str r1, [r7, #8] + 8000b18: 607a str r2, [r7, #4] + 8000b1a: 73fb strb r3, [r7, #15] + uint32_t prioritygroup = 0x00U; + 8000b1c: 2300 movs r3, #0 + 8000b1e: 617b str r3, [r7, #20] + + /* Check the parameters */ + assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); + assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); + + prioritygroup = NVIC_GetPriorityGrouping(); + 8000b20: f7ff ff3e bl 80009a0 <__NVIC_GetPriorityGrouping> + 8000b24: 6178 str r0, [r7, #20] + + NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); + 8000b26: 687a ldr r2, [r7, #4] + 8000b28: 68b9 ldr r1, [r7, #8] + 8000b2a: 6978 ldr r0, [r7, #20] + 8000b2c: f7ff ff8e bl 8000a4c + 8000b30: 4602 mov r2, r0 + 8000b32: f997 300f ldrsb.w r3, [r7, #15] + 8000b36: 4611 mov r1, r2 + 8000b38: 4618 mov r0, r3 + 8000b3a: f7ff ff5d bl 80009f8 <__NVIC_SetPriority> +} + 8000b3e: bf00 nop + 8000b40: 3718 adds r7, #24 + 8000b42: 46bd mov sp, r7 + 8000b44: bd80 pop {r7, pc} + +08000b46 : + * This parameter can be an enumerator of IRQn_Type enumeration + * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h)) + * @retval None + */ +void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) +{ + 8000b46: b580 push {r7, lr} + 8000b48: b082 sub sp, #8 + 8000b4a: af00 add r7, sp, #0 + 8000b4c: 4603 mov r3, r0 + 8000b4e: 71fb strb r3, [r7, #7] + /* Check the parameters */ + assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + + /* Enable interrupt */ + NVIC_EnableIRQ(IRQn); + 8000b50: f997 3007 ldrsb.w r3, [r7, #7] + 8000b54: 4618 mov r0, r3 + 8000b56: f7ff ff31 bl 80009bc <__NVIC_EnableIRQ> +} + 8000b5a: bf00 nop + 8000b5c: 3708 adds r7, #8 + 8000b5e: 46bd mov sp, r7 + 8000b60: bd80 pop {r7, pc} + +08000b62 : + * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. + * @retval status: - 0 Function succeeded. + * - 1 Function failed. + */ +uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) +{ + 8000b62: b580 push {r7, lr} + 8000b64: b082 sub sp, #8 + 8000b66: af00 add r7, sp, #0 + 8000b68: 6078 str r0, [r7, #4] + return SysTick_Config(TicksNumb); + 8000b6a: 6878 ldr r0, [r7, #4] + 8000b6c: f7ff ffa2 bl 8000ab4 + 8000b70: 4603 mov r3, r0 +} + 8000b72: 4618 mov r0, r3 + 8000b74: 3708 adds r7, #8 + 8000b76: 46bd mov sp, r7 + 8000b78: bd80 pop {r7, pc} + ... + +08000b7c : + * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains + * the configuration information for the specified GPIO peripheral. + * @retval None + */ +void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) +{ + 8000b7c: b480 push {r7} + 8000b7e: b089 sub sp, #36 @ 0x24 + 8000b80: af00 add r7, sp, #0 + 8000b82: 6078 str r0, [r7, #4] + 8000b84: 6039 str r1, [r7, #0] + uint32_t position; + uint32_t ioposition = 0x00U; + 8000b86: 2300 movs r3, #0 + 8000b88: 617b str r3, [r7, #20] + uint32_t iocurrent = 0x00U; + 8000b8a: 2300 movs r3, #0 + 8000b8c: 613b str r3, [r7, #16] + uint32_t temp = 0x00U; + 8000b8e: 2300 movs r3, #0 + 8000b90: 61bb str r3, [r7, #24] + assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); + assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); + + /* Configure the port pins */ + for(position = 0U; position < GPIO_NUMBER; position++) + 8000b92: 2300 movs r3, #0 + 8000b94: 61fb str r3, [r7, #28] + 8000b96: e177 b.n 8000e88 + { + /* Get the IO position */ + ioposition = 0x01U << position; + 8000b98: 2201 movs r2, #1 + 8000b9a: 69fb ldr r3, [r7, #28] + 8000b9c: fa02 f303 lsl.w r3, r2, r3 + 8000ba0: 617b str r3, [r7, #20] + /* Get the current IO position */ + iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; + 8000ba2: 683b ldr r3, [r7, #0] + 8000ba4: 681b ldr r3, [r3, #0] + 8000ba6: 697a ldr r2, [r7, #20] + 8000ba8: 4013 ands r3, r2 + 8000baa: 613b str r3, [r7, #16] + + if(iocurrent == ioposition) + 8000bac: 693a ldr r2, [r7, #16] + 8000bae: 697b ldr r3, [r7, #20] + 8000bb0: 429a cmp r2, r3 + 8000bb2: f040 8166 bne.w 8000e82 + { + /*--------------------- GPIO Mode Configuration ------------------------*/ + /* In case of Output or Alternate function mode selection */ + if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ + 8000bb6: 683b ldr r3, [r7, #0] + 8000bb8: 685b ldr r3, [r3, #4] + 8000bba: f003 0303 and.w r3, r3, #3 + 8000bbe: 2b01 cmp r3, #1 + 8000bc0: d005 beq.n 8000bce + (GPIO_Init->Mode & GPIO_MODE) == MODE_AF) + 8000bc2: 683b ldr r3, [r7, #0] + 8000bc4: 685b ldr r3, [r3, #4] + 8000bc6: f003 0303 and.w r3, r3, #3 + if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ + 8000bca: 2b02 cmp r3, #2 + 8000bcc: d130 bne.n 8000c30 + { + /* Check the Speed parameter */ + assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); + /* Configure the IO Speed */ + temp = GPIOx->OSPEEDR; + 8000bce: 687b ldr r3, [r7, #4] + 8000bd0: 689b ldr r3, [r3, #8] + 8000bd2: 61bb str r3, [r7, #24] + temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U)); + 8000bd4: 69fb ldr r3, [r7, #28] + 8000bd6: 005b lsls r3, r3, #1 + 8000bd8: 2203 movs r2, #3 + 8000bda: fa02 f303 lsl.w r3, r2, r3 + 8000bde: 43db mvns r3, r3 + 8000be0: 69ba ldr r2, [r7, #24] + 8000be2: 4013 ands r3, r2 + 8000be4: 61bb str r3, [r7, #24] + temp |= (GPIO_Init->Speed << (position * 2U)); + 8000be6: 683b ldr r3, [r7, #0] + 8000be8: 68da ldr r2, [r3, #12] + 8000bea: 69fb ldr r3, [r7, #28] + 8000bec: 005b lsls r3, r3, #1 + 8000bee: fa02 f303 lsl.w r3, r2, r3 + 8000bf2: 69ba ldr r2, [r7, #24] + 8000bf4: 4313 orrs r3, r2 + 8000bf6: 61bb str r3, [r7, #24] + GPIOx->OSPEEDR = temp; + 8000bf8: 687b ldr r3, [r7, #4] + 8000bfa: 69ba ldr r2, [r7, #24] + 8000bfc: 609a str r2, [r3, #8] + + /* Configure the IO Output Type */ + temp = GPIOx->OTYPER; + 8000bfe: 687b ldr r3, [r7, #4] + 8000c00: 685b ldr r3, [r3, #4] + 8000c02: 61bb str r3, [r7, #24] + temp &= ~(GPIO_OTYPER_OT_0 << position) ; + 8000c04: 2201 movs r2, #1 + 8000c06: 69fb ldr r3, [r7, #28] + 8000c08: fa02 f303 lsl.w r3, r2, r3 + 8000c0c: 43db mvns r3, r3 + 8000c0e: 69ba ldr r2, [r7, #24] + 8000c10: 4013 ands r3, r2 + 8000c12: 61bb str r3, [r7, #24] + temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); + 8000c14: 683b ldr r3, [r7, #0] + 8000c16: 685b ldr r3, [r3, #4] + 8000c18: 091b lsrs r3, r3, #4 + 8000c1a: f003 0201 and.w r2, r3, #1 + 8000c1e: 69fb ldr r3, [r7, #28] + 8000c20: fa02 f303 lsl.w r3, r2, r3 + 8000c24: 69ba ldr r2, [r7, #24] + 8000c26: 4313 orrs r3, r2 + 8000c28: 61bb str r3, [r7, #24] + GPIOx->OTYPER = temp; + 8000c2a: 687b ldr r3, [r7, #4] + 8000c2c: 69ba ldr r2, [r7, #24] + 8000c2e: 605a str r2, [r3, #4] + } + + if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) + 8000c30: 683b ldr r3, [r7, #0] + 8000c32: 685b ldr r3, [r3, #4] + 8000c34: f003 0303 and.w r3, r3, #3 + 8000c38: 2b03 cmp r3, #3 + 8000c3a: d017 beq.n 8000c6c + { + /* Check the parameters */ + assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); + + /* Activate the Pull-up or Pull down resistor for the current IO */ + temp = GPIOx->PUPDR; + 8000c3c: 687b ldr r3, [r7, #4] + 8000c3e: 68db ldr r3, [r3, #12] + 8000c40: 61bb str r3, [r7, #24] + temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U)); + 8000c42: 69fb ldr r3, [r7, #28] + 8000c44: 005b lsls r3, r3, #1 + 8000c46: 2203 movs r2, #3 + 8000c48: fa02 f303 lsl.w r3, r2, r3 + 8000c4c: 43db mvns r3, r3 + 8000c4e: 69ba ldr r2, [r7, #24] + 8000c50: 4013 ands r3, r2 + 8000c52: 61bb str r3, [r7, #24] + temp |= ((GPIO_Init->Pull) << (position * 2U)); + 8000c54: 683b ldr r3, [r7, #0] + 8000c56: 689a ldr r2, [r3, #8] + 8000c58: 69fb ldr r3, [r7, #28] + 8000c5a: 005b lsls r3, r3, #1 + 8000c5c: fa02 f303 lsl.w r3, r2, r3 + 8000c60: 69ba ldr r2, [r7, #24] + 8000c62: 4313 orrs r3, r2 + 8000c64: 61bb str r3, [r7, #24] + GPIOx->PUPDR = temp; + 8000c66: 687b ldr r3, [r7, #4] + 8000c68: 69ba ldr r2, [r7, #24] + 8000c6a: 60da str r2, [r3, #12] + } + + /* In case of Alternate function mode selection */ + if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) + 8000c6c: 683b ldr r3, [r7, #0] + 8000c6e: 685b ldr r3, [r3, #4] + 8000c70: f003 0303 and.w r3, r3, #3 + 8000c74: 2b02 cmp r3, #2 + 8000c76: d123 bne.n 8000cc0 + { + /* Check the Alternate function parameter */ + assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); + /* Configure Alternate function mapped with the current IO */ + temp = GPIOx->AFR[position >> 3U]; + 8000c78: 69fb ldr r3, [r7, #28] + 8000c7a: 08da lsrs r2, r3, #3 + 8000c7c: 687b ldr r3, [r7, #4] + 8000c7e: 3208 adds r2, #8 + 8000c80: f853 3022 ldr.w r3, [r3, r2, lsl #2] + 8000c84: 61bb str r3, [r7, #24] + temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ; + 8000c86: 69fb ldr r3, [r7, #28] + 8000c88: f003 0307 and.w r3, r3, #7 + 8000c8c: 009b lsls r3, r3, #2 + 8000c8e: 220f movs r2, #15 + 8000c90: fa02 f303 lsl.w r3, r2, r3 + 8000c94: 43db mvns r3, r3 + 8000c96: 69ba ldr r2, [r7, #24] + 8000c98: 4013 ands r3, r2 + 8000c9a: 61bb str r3, [r7, #24] + temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U)); + 8000c9c: 683b ldr r3, [r7, #0] + 8000c9e: 691a ldr r2, [r3, #16] + 8000ca0: 69fb ldr r3, [r7, #28] + 8000ca2: f003 0307 and.w r3, r3, #7 + 8000ca6: 009b lsls r3, r3, #2 + 8000ca8: fa02 f303 lsl.w r3, r2, r3 + 8000cac: 69ba ldr r2, [r7, #24] + 8000cae: 4313 orrs r3, r2 + 8000cb0: 61bb str r3, [r7, #24] + GPIOx->AFR[position >> 3U] = temp; + 8000cb2: 69fb ldr r3, [r7, #28] + 8000cb4: 08da lsrs r2, r3, #3 + 8000cb6: 687b ldr r3, [r7, #4] + 8000cb8: 3208 adds r2, #8 + 8000cba: 69b9 ldr r1, [r7, #24] + 8000cbc: f843 1022 str.w r1, [r3, r2, lsl #2] + } + + /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ + temp = GPIOx->MODER; + 8000cc0: 687b ldr r3, [r7, #4] + 8000cc2: 681b ldr r3, [r3, #0] + 8000cc4: 61bb str r3, [r7, #24] + temp &= ~(GPIO_MODER_MODER0 << (position * 2U)); + 8000cc6: 69fb ldr r3, [r7, #28] + 8000cc8: 005b lsls r3, r3, #1 + 8000cca: 2203 movs r2, #3 + 8000ccc: fa02 f303 lsl.w r3, r2, r3 + 8000cd0: 43db mvns r3, r3 + 8000cd2: 69ba ldr r2, [r7, #24] + 8000cd4: 4013 ands r3, r2 + 8000cd6: 61bb str r3, [r7, #24] + temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); + 8000cd8: 683b ldr r3, [r7, #0] + 8000cda: 685b ldr r3, [r3, #4] + 8000cdc: f003 0203 and.w r2, r3, #3 + 8000ce0: 69fb ldr r3, [r7, #28] + 8000ce2: 005b lsls r3, r3, #1 + 8000ce4: fa02 f303 lsl.w r3, r2, r3 + 8000ce8: 69ba ldr r2, [r7, #24] + 8000cea: 4313 orrs r3, r2 + 8000cec: 61bb str r3, [r7, #24] + GPIOx->MODER = temp; + 8000cee: 687b ldr r3, [r7, #4] + 8000cf0: 69ba ldr r2, [r7, #24] + 8000cf2: 601a str r2, [r3, #0] + + /*--------------------- EXTI Mode Configuration ------------------------*/ + /* Configure the External Interrupt or event for the current IO */ + if((GPIO_Init->Mode & EXTI_MODE) != 0x00U) + 8000cf4: 683b ldr r3, [r7, #0] + 8000cf6: 685b ldr r3, [r3, #4] + 8000cf8: f403 3340 and.w r3, r3, #196608 @ 0x30000 + 8000cfc: 2b00 cmp r3, #0 + 8000cfe: f000 80c0 beq.w 8000e82 + { + /* Enable SYSCFG Clock */ + __HAL_RCC_SYSCFG_CLK_ENABLE(); + 8000d02: 2300 movs r3, #0 + 8000d04: 60fb str r3, [r7, #12] + 8000d06: 4b66 ldr r3, [pc, #408] @ (8000ea0 ) + 8000d08: 6c5b ldr r3, [r3, #68] @ 0x44 + 8000d0a: 4a65 ldr r2, [pc, #404] @ (8000ea0 ) + 8000d0c: f443 4380 orr.w r3, r3, #16384 @ 0x4000 + 8000d10: 6453 str r3, [r2, #68] @ 0x44 + 8000d12: 4b63 ldr r3, [pc, #396] @ (8000ea0 ) + 8000d14: 6c5b ldr r3, [r3, #68] @ 0x44 + 8000d16: f403 4380 and.w r3, r3, #16384 @ 0x4000 + 8000d1a: 60fb str r3, [r7, #12] + 8000d1c: 68fb ldr r3, [r7, #12] + + temp = SYSCFG->EXTICR[position >> 2U]; + 8000d1e: 4a61 ldr r2, [pc, #388] @ (8000ea4 ) + 8000d20: 69fb ldr r3, [r7, #28] + 8000d22: 089b lsrs r3, r3, #2 + 8000d24: 3302 adds r3, #2 + 8000d26: f852 3023 ldr.w r3, [r2, r3, lsl #2] + 8000d2a: 61bb str r3, [r7, #24] + temp &= ~(0x0FU << (4U * (position & 0x03U))); + 8000d2c: 69fb ldr r3, [r7, #28] + 8000d2e: f003 0303 and.w r3, r3, #3 + 8000d32: 009b lsls r3, r3, #2 + 8000d34: 220f movs r2, #15 + 8000d36: fa02 f303 lsl.w r3, r2, r3 + 8000d3a: 43db mvns r3, r3 + 8000d3c: 69ba ldr r2, [r7, #24] + 8000d3e: 4013 ands r3, r2 + 8000d40: 61bb str r3, [r7, #24] + temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); + 8000d42: 687b ldr r3, [r7, #4] + 8000d44: 4a58 ldr r2, [pc, #352] @ (8000ea8 ) + 8000d46: 4293 cmp r3, r2 + 8000d48: d037 beq.n 8000dba + 8000d4a: 687b ldr r3, [r7, #4] + 8000d4c: 4a57 ldr r2, [pc, #348] @ (8000eac ) + 8000d4e: 4293 cmp r3, r2 + 8000d50: d031 beq.n 8000db6 + 8000d52: 687b ldr r3, [r7, #4] + 8000d54: 4a56 ldr r2, [pc, #344] @ (8000eb0 ) + 8000d56: 4293 cmp r3, r2 + 8000d58: d02b beq.n 8000db2 + 8000d5a: 687b ldr r3, [r7, #4] + 8000d5c: 4a55 ldr r2, [pc, #340] @ (8000eb4 ) + 8000d5e: 4293 cmp r3, r2 + 8000d60: d025 beq.n 8000dae + 8000d62: 687b ldr r3, [r7, #4] + 8000d64: 4a54 ldr r2, [pc, #336] @ (8000eb8 ) + 8000d66: 4293 cmp r3, r2 + 8000d68: d01f beq.n 8000daa + 8000d6a: 687b ldr r3, [r7, #4] + 8000d6c: 4a53 ldr r2, [pc, #332] @ (8000ebc ) + 8000d6e: 4293 cmp r3, r2 + 8000d70: d019 beq.n 8000da6 + 8000d72: 687b ldr r3, [r7, #4] + 8000d74: 4a52 ldr r2, [pc, #328] @ (8000ec0 ) + 8000d76: 4293 cmp r3, r2 + 8000d78: d013 beq.n 8000da2 + 8000d7a: 687b ldr r3, [r7, #4] + 8000d7c: 4a51 ldr r2, [pc, #324] @ (8000ec4 ) + 8000d7e: 4293 cmp r3, r2 + 8000d80: d00d beq.n 8000d9e + 8000d82: 687b ldr r3, [r7, #4] + 8000d84: 4a50 ldr r2, [pc, #320] @ (8000ec8 ) + 8000d86: 4293 cmp r3, r2 + 8000d88: d007 beq.n 8000d9a + 8000d8a: 687b ldr r3, [r7, #4] + 8000d8c: 4a4f ldr r2, [pc, #316] @ (8000ecc ) + 8000d8e: 4293 cmp r3, r2 + 8000d90: d101 bne.n 8000d96 + 8000d92: 2309 movs r3, #9 + 8000d94: e012 b.n 8000dbc + 8000d96: 230a movs r3, #10 + 8000d98: e010 b.n 8000dbc + 8000d9a: 2308 movs r3, #8 + 8000d9c: e00e b.n 8000dbc + 8000d9e: 2307 movs r3, #7 + 8000da0: e00c b.n 8000dbc + 8000da2: 2306 movs r3, #6 + 8000da4: e00a b.n 8000dbc + 8000da6: 2305 movs r3, #5 + 8000da8: e008 b.n 8000dbc + 8000daa: 2304 movs r3, #4 + 8000dac: e006 b.n 8000dbc + 8000dae: 2303 movs r3, #3 + 8000db0: e004 b.n 8000dbc + 8000db2: 2302 movs r3, #2 + 8000db4: e002 b.n 8000dbc + 8000db6: 2301 movs r3, #1 + 8000db8: e000 b.n 8000dbc + 8000dba: 2300 movs r3, #0 + 8000dbc: 69fa ldr r2, [r7, #28] + 8000dbe: f002 0203 and.w r2, r2, #3 + 8000dc2: 0092 lsls r2, r2, #2 + 8000dc4: 4093 lsls r3, r2 + 8000dc6: 69ba ldr r2, [r7, #24] + 8000dc8: 4313 orrs r3, r2 + 8000dca: 61bb str r3, [r7, #24] + SYSCFG->EXTICR[position >> 2U] = temp; + 8000dcc: 4935 ldr r1, [pc, #212] @ (8000ea4 ) + 8000dce: 69fb ldr r3, [r7, #28] + 8000dd0: 089b lsrs r3, r3, #2 + 8000dd2: 3302 adds r3, #2 + 8000dd4: 69ba ldr r2, [r7, #24] + 8000dd6: f841 2023 str.w r2, [r1, r3, lsl #2] + + /* Clear Rising Falling edge configuration */ + temp = EXTI->RTSR; + 8000dda: 4b3d ldr r3, [pc, #244] @ (8000ed0 ) + 8000ddc: 689b ldr r3, [r3, #8] + 8000dde: 61bb str r3, [r7, #24] + temp &= ~((uint32_t)iocurrent); + 8000de0: 693b ldr r3, [r7, #16] + 8000de2: 43db mvns r3, r3 + 8000de4: 69ba ldr r2, [r7, #24] + 8000de6: 4013 ands r3, r2 + 8000de8: 61bb str r3, [r7, #24] + if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U) + 8000dea: 683b ldr r3, [r7, #0] + 8000dec: 685b ldr r3, [r3, #4] + 8000dee: f403 1380 and.w r3, r3, #1048576 @ 0x100000 + 8000df2: 2b00 cmp r3, #0 + 8000df4: d003 beq.n 8000dfe + { + temp |= iocurrent; + 8000df6: 69ba ldr r2, [r7, #24] + 8000df8: 693b ldr r3, [r7, #16] + 8000dfa: 4313 orrs r3, r2 + 8000dfc: 61bb str r3, [r7, #24] + } + EXTI->RTSR = temp; + 8000dfe: 4a34 ldr r2, [pc, #208] @ (8000ed0 ) + 8000e00: 69bb ldr r3, [r7, #24] + 8000e02: 6093 str r3, [r2, #8] + + temp = EXTI->FTSR; + 8000e04: 4b32 ldr r3, [pc, #200] @ (8000ed0 ) + 8000e06: 68db ldr r3, [r3, #12] + 8000e08: 61bb str r3, [r7, #24] + temp &= ~((uint32_t)iocurrent); + 8000e0a: 693b ldr r3, [r7, #16] + 8000e0c: 43db mvns r3, r3 + 8000e0e: 69ba ldr r2, [r7, #24] + 8000e10: 4013 ands r3, r2 + 8000e12: 61bb str r3, [r7, #24] + if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U) + 8000e14: 683b ldr r3, [r7, #0] + 8000e16: 685b ldr r3, [r3, #4] + 8000e18: f403 1300 and.w r3, r3, #2097152 @ 0x200000 + 8000e1c: 2b00 cmp r3, #0 + 8000e1e: d003 beq.n 8000e28 + { + temp |= iocurrent; + 8000e20: 69ba ldr r2, [r7, #24] + 8000e22: 693b ldr r3, [r7, #16] + 8000e24: 4313 orrs r3, r2 + 8000e26: 61bb str r3, [r7, #24] + } + EXTI->FTSR = temp; + 8000e28: 4a29 ldr r2, [pc, #164] @ (8000ed0 ) + 8000e2a: 69bb ldr r3, [r7, #24] + 8000e2c: 60d3 str r3, [r2, #12] + + temp = EXTI->EMR; + 8000e2e: 4b28 ldr r3, [pc, #160] @ (8000ed0 ) + 8000e30: 685b ldr r3, [r3, #4] + 8000e32: 61bb str r3, [r7, #24] + temp &= ~((uint32_t)iocurrent); + 8000e34: 693b ldr r3, [r7, #16] + 8000e36: 43db mvns r3, r3 + 8000e38: 69ba ldr r2, [r7, #24] + 8000e3a: 4013 ands r3, r2 + 8000e3c: 61bb str r3, [r7, #24] + if((GPIO_Init->Mode & EXTI_EVT) != 0x00U) + 8000e3e: 683b ldr r3, [r7, #0] + 8000e40: 685b ldr r3, [r3, #4] + 8000e42: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8000e46: 2b00 cmp r3, #0 + 8000e48: d003 beq.n 8000e52 + { + temp |= iocurrent; + 8000e4a: 69ba ldr r2, [r7, #24] + 8000e4c: 693b ldr r3, [r7, #16] + 8000e4e: 4313 orrs r3, r2 + 8000e50: 61bb str r3, [r7, #24] + } + EXTI->EMR = temp; + 8000e52: 4a1f ldr r2, [pc, #124] @ (8000ed0 ) + 8000e54: 69bb ldr r3, [r7, #24] + 8000e56: 6053 str r3, [r2, #4] + + /* Clear EXTI line configuration */ + temp = EXTI->IMR; + 8000e58: 4b1d ldr r3, [pc, #116] @ (8000ed0 ) + 8000e5a: 681b ldr r3, [r3, #0] + 8000e5c: 61bb str r3, [r7, #24] + temp &= ~((uint32_t)iocurrent); + 8000e5e: 693b ldr r3, [r7, #16] + 8000e60: 43db mvns r3, r3 + 8000e62: 69ba ldr r2, [r7, #24] + 8000e64: 4013 ands r3, r2 + 8000e66: 61bb str r3, [r7, #24] + if((GPIO_Init->Mode & EXTI_IT) != 0x00U) + 8000e68: 683b ldr r3, [r7, #0] + 8000e6a: 685b ldr r3, [r3, #4] + 8000e6c: f403 3380 and.w r3, r3, #65536 @ 0x10000 + 8000e70: 2b00 cmp r3, #0 + 8000e72: d003 beq.n 8000e7c + { + temp |= iocurrent; + 8000e74: 69ba ldr r2, [r7, #24] + 8000e76: 693b ldr r3, [r7, #16] + 8000e78: 4313 orrs r3, r2 + 8000e7a: 61bb str r3, [r7, #24] + } + EXTI->IMR = temp; + 8000e7c: 4a14 ldr r2, [pc, #80] @ (8000ed0 ) + 8000e7e: 69bb ldr r3, [r7, #24] + 8000e80: 6013 str r3, [r2, #0] + for(position = 0U; position < GPIO_NUMBER; position++) + 8000e82: 69fb ldr r3, [r7, #28] + 8000e84: 3301 adds r3, #1 + 8000e86: 61fb str r3, [r7, #28] + 8000e88: 69fb ldr r3, [r7, #28] + 8000e8a: 2b0f cmp r3, #15 + 8000e8c: f67f ae84 bls.w 8000b98 + } + } + } +} + 8000e90: bf00 nop + 8000e92: bf00 nop + 8000e94: 3724 adds r7, #36 @ 0x24 + 8000e96: 46bd mov sp, r7 + 8000e98: f85d 7b04 ldr.w r7, [sp], #4 + 8000e9c: 4770 bx lr + 8000e9e: bf00 nop + 8000ea0: 40023800 .word 0x40023800 + 8000ea4: 40013800 .word 0x40013800 + 8000ea8: 40020000 .word 0x40020000 + 8000eac: 40020400 .word 0x40020400 + 8000eb0: 40020800 .word 0x40020800 + 8000eb4: 40020c00 .word 0x40020c00 + 8000eb8: 40021000 .word 0x40021000 + 8000ebc: 40021400 .word 0x40021400 + 8000ec0: 40021800 .word 0x40021800 + 8000ec4: 40021c00 .word 0x40021c00 + 8000ec8: 40022000 .word 0x40022000 + 8000ecc: 40022400 .word 0x40022400 + 8000ed0: 40013c00 .word 0x40013c00 + +08000ed4 : + * @arg GPIO_PIN_RESET: to clear the port pin + * @arg GPIO_PIN_SET: to set the port pin + * @retval None + */ +void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) +{ + 8000ed4: b480 push {r7} + 8000ed6: b083 sub sp, #12 + 8000ed8: af00 add r7, sp, #0 + 8000eda: 6078 str r0, [r7, #4] + 8000edc: 460b mov r3, r1 + 8000ede: 807b strh r3, [r7, #2] + 8000ee0: 4613 mov r3, r2 + 8000ee2: 707b strb r3, [r7, #1] + /* Check the parameters */ + assert_param(IS_GPIO_PIN(GPIO_Pin)); + assert_param(IS_GPIO_PIN_ACTION(PinState)); + + if(PinState != GPIO_PIN_RESET) + 8000ee4: 787b ldrb r3, [r7, #1] + 8000ee6: 2b00 cmp r3, #0 + 8000ee8: d003 beq.n 8000ef2 + { + GPIOx->BSRR = GPIO_Pin; + 8000eea: 887a ldrh r2, [r7, #2] + 8000eec: 687b ldr r3, [r7, #4] + 8000eee: 619a str r2, [r3, #24] + } + else + { + GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; + } +} + 8000ef0: e003 b.n 8000efa + GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; + 8000ef2: 887b ldrh r3, [r7, #2] + 8000ef4: 041a lsls r2, r3, #16 + 8000ef6: 687b ldr r3, [r7, #4] + 8000ef8: 619a str r2, [r3, #24] +} + 8000efa: bf00 nop + 8000efc: 370c adds r7, #12 + 8000efe: 46bd mov sp, r7 + 8000f00: f85d 7b04 ldr.w r7, [sp], #4 + 8000f04: 4770 bx lr + ... + +08000f08 : + * @brief This function handles EXTI interrupt request. + * @param GPIO_Pin Specifies the pins connected EXTI line + * @retval None + */ +void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) +{ + 8000f08: b580 push {r7, lr} + 8000f0a: b082 sub sp, #8 + 8000f0c: af00 add r7, sp, #0 + 8000f0e: 4603 mov r3, r0 + 8000f10: 80fb strh r3, [r7, #6] + /* EXTI line interrupt detected */ + if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) + 8000f12: 4b08 ldr r3, [pc, #32] @ (8000f34 ) + 8000f14: 695a ldr r2, [r3, #20] + 8000f16: 88fb ldrh r3, [r7, #6] + 8000f18: 4013 ands r3, r2 + 8000f1a: 2b00 cmp r3, #0 + 8000f1c: d006 beq.n 8000f2c + { + __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); + 8000f1e: 4a05 ldr r2, [pc, #20] @ (8000f34 ) + 8000f20: 88fb ldrh r3, [r7, #6] + 8000f22: 6153 str r3, [r2, #20] + HAL_GPIO_EXTI_Callback(GPIO_Pin); + 8000f24: 88fb ldrh r3, [r7, #6] + 8000f26: 4618 mov r0, r3 + 8000f28: f7ff fbdc bl 80006e4 + } +} + 8000f2c: bf00 nop + 8000f2e: 3708 adds r7, #8 + 8000f30: 46bd mov sp, r7 + 8000f32: bd80 pop {r7, pc} + 8000f34: 40013c00 .word 0x40013c00 + +08000f38 : + * supported by this API. User should request a transition to HSE Off + * first and then HSE On or HSE Bypass. + * @retval HAL status + */ +__weak HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct) +{ + 8000f38: b580 push {r7, lr} + 8000f3a: b086 sub sp, #24 + 8000f3c: af00 add r7, sp, #0 + 8000f3e: 6078 str r0, [r7, #4] + uint32_t tickstart; + uint32_t pll_config; + /* Check Null pointer */ + if (RCC_OscInitStruct == NULL) + 8000f40: 687b ldr r3, [r7, #4] + 8000f42: 2b00 cmp r3, #0 + 8000f44: d101 bne.n 8000f4a + { + return HAL_ERROR; + 8000f46: 2301 movs r3, #1 + 8000f48: e267 b.n 800141a + } + + /* Check the parameters */ + assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); + /*------------------------------- HSE Configuration ------------------------*/ + if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) + 8000f4a: 687b ldr r3, [r7, #4] + 8000f4c: 681b ldr r3, [r3, #0] + 8000f4e: f003 0301 and.w r3, r3, #1 + 8000f52: 2b00 cmp r3, #0 + 8000f54: d075 beq.n 8001042 + { + /* Check the parameters */ + assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); + /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */ + if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || \ + 8000f56: 4b88 ldr r3, [pc, #544] @ (8001178 ) + 8000f58: 689b ldr r3, [r3, #8] + 8000f5a: f003 030c and.w r3, r3, #12 + 8000f5e: 2b04 cmp r3, #4 + 8000f60: d00c beq.n 8000f7c + ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) + 8000f62: 4b85 ldr r3, [pc, #532] @ (8001178 ) + 8000f64: 689b ldr r3, [r3, #8] + 8000f66: f003 030c and.w r3, r3, #12 + if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || \ + 8000f6a: 2b08 cmp r3, #8 + 8000f6c: d112 bne.n 8000f94 + ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) + 8000f6e: 4b82 ldr r3, [pc, #520] @ (8001178 ) + 8000f70: 685b ldr r3, [r3, #4] + 8000f72: f403 0380 and.w r3, r3, #4194304 @ 0x400000 + 8000f76: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 + 8000f7a: d10b bne.n 8000f94 + { + if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) + 8000f7c: 4b7e ldr r3, [pc, #504] @ (8001178 ) + 8000f7e: 681b ldr r3, [r3, #0] + 8000f80: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8000f84: 2b00 cmp r3, #0 + 8000f86: d05b beq.n 8001040 + 8000f88: 687b ldr r3, [r7, #4] + 8000f8a: 685b ldr r3, [r3, #4] + 8000f8c: 2b00 cmp r3, #0 + 8000f8e: d157 bne.n 8001040 + { + return HAL_ERROR; + 8000f90: 2301 movs r3, #1 + 8000f92: e242 b.n 800141a + } + } + else + { + /* Set the new HSE configuration ---------------------------------------*/ + __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); + 8000f94: 687b ldr r3, [r7, #4] + 8000f96: 685b ldr r3, [r3, #4] + 8000f98: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 + 8000f9c: d106 bne.n 8000fac + 8000f9e: 4b76 ldr r3, [pc, #472] @ (8001178 ) + 8000fa0: 681b ldr r3, [r3, #0] + 8000fa2: 4a75 ldr r2, [pc, #468] @ (8001178 ) + 8000fa4: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 8000fa8: 6013 str r3, [r2, #0] + 8000faa: e01d b.n 8000fe8 + 8000fac: 687b ldr r3, [r7, #4] + 8000fae: 685b ldr r3, [r3, #4] + 8000fb0: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 + 8000fb4: d10c bne.n 8000fd0 + 8000fb6: 4b70 ldr r3, [pc, #448] @ (8001178 ) + 8000fb8: 681b ldr r3, [r3, #0] + 8000fba: 4a6f ldr r2, [pc, #444] @ (8001178 ) + 8000fbc: f443 2380 orr.w r3, r3, #262144 @ 0x40000 + 8000fc0: 6013 str r3, [r2, #0] + 8000fc2: 4b6d ldr r3, [pc, #436] @ (8001178 ) + 8000fc4: 681b ldr r3, [r3, #0] + 8000fc6: 4a6c ldr r2, [pc, #432] @ (8001178 ) + 8000fc8: f443 3380 orr.w r3, r3, #65536 @ 0x10000 + 8000fcc: 6013 str r3, [r2, #0] + 8000fce: e00b b.n 8000fe8 + 8000fd0: 4b69 ldr r3, [pc, #420] @ (8001178 ) + 8000fd2: 681b ldr r3, [r3, #0] + 8000fd4: 4a68 ldr r2, [pc, #416] @ (8001178 ) + 8000fd6: f423 3380 bic.w r3, r3, #65536 @ 0x10000 + 8000fda: 6013 str r3, [r2, #0] + 8000fdc: 4b66 ldr r3, [pc, #408] @ (8001178 ) + 8000fde: 681b ldr r3, [r3, #0] + 8000fe0: 4a65 ldr r2, [pc, #404] @ (8001178 ) + 8000fe2: f423 2380 bic.w r3, r3, #262144 @ 0x40000 + 8000fe6: 6013 str r3, [r2, #0] + + /* Check the HSE State */ + if ((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF) + 8000fe8: 687b ldr r3, [r7, #4] + 8000fea: 685b ldr r3, [r3, #4] + 8000fec: 2b00 cmp r3, #0 + 8000fee: d013 beq.n 8001018 + { + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8000ff0: f7ff fca6 bl 8000940 + 8000ff4: 6138 str r0, [r7, #16] + + /* Wait till HSE is ready */ + while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 8000ff6: e008 b.n 800100a + { + if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) + 8000ff8: f7ff fca2 bl 8000940 + 8000ffc: 4602 mov r2, r0 + 8000ffe: 693b ldr r3, [r7, #16] + 8001000: 1ad3 subs r3, r2, r3 + 8001002: 2b64 cmp r3, #100 @ 0x64 + 8001004: d901 bls.n 800100a + { + return HAL_TIMEOUT; + 8001006: 2303 movs r3, #3 + 8001008: e207 b.n 800141a + while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 800100a: 4b5b ldr r3, [pc, #364] @ (8001178 ) + 800100c: 681b ldr r3, [r3, #0] + 800100e: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 8001012: 2b00 cmp r3, #0 + 8001014: d0f0 beq.n 8000ff8 + 8001016: e014 b.n 8001042 + } + } + else + { + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8001018: f7ff fc92 bl 8000940 + 800101c: 6138 str r0, [r7, #16] + + /* Wait till HSE is bypassed or disabled */ + while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) + 800101e: e008 b.n 8001032 + { + if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) + 8001020: f7ff fc8e bl 8000940 + 8001024: 4602 mov r2, r0 + 8001026: 693b ldr r3, [r7, #16] + 8001028: 1ad3 subs r3, r2, r3 + 800102a: 2b64 cmp r3, #100 @ 0x64 + 800102c: d901 bls.n 8001032 + { + return HAL_TIMEOUT; + 800102e: 2303 movs r3, #3 + 8001030: e1f3 b.n 800141a + while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) + 8001032: 4b51 ldr r3, [pc, #324] @ (8001178 ) + 8001034: 681b ldr r3, [r3, #0] + 8001036: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 800103a: 2b00 cmp r3, #0 + 800103c: d1f0 bne.n 8001020 + 800103e: e000 b.n 8001042 + if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) + 8001040: bf00 nop + } + } + } + } + /*----------------------------- HSI Configuration --------------------------*/ + if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) + 8001042: 687b ldr r3, [r7, #4] + 8001044: 681b ldr r3, [r3, #0] + 8001046: f003 0302 and.w r3, r3, #2 + 800104a: 2b00 cmp r3, #0 + 800104c: d063 beq.n 8001116 + /* Check the parameters */ + assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); + assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); + + /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ + if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || \ + 800104e: 4b4a ldr r3, [pc, #296] @ (8001178 ) + 8001050: 689b ldr r3, [r3, #8] + 8001052: f003 030c and.w r3, r3, #12 + 8001056: 2b00 cmp r3, #0 + 8001058: d00b beq.n 8001072 + ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) + 800105a: 4b47 ldr r3, [pc, #284] @ (8001178 ) + 800105c: 689b ldr r3, [r3, #8] + 800105e: f003 030c and.w r3, r3, #12 + if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || \ + 8001062: 2b08 cmp r3, #8 + 8001064: d11c bne.n 80010a0 + ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) + 8001066: 4b44 ldr r3, [pc, #272] @ (8001178 ) + 8001068: 685b ldr r3, [r3, #4] + 800106a: f403 0380 and.w r3, r3, #4194304 @ 0x400000 + 800106e: 2b00 cmp r3, #0 + 8001070: d116 bne.n 80010a0 + { + /* When HSI is used as system clock it will not disabled */ + if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) + 8001072: 4b41 ldr r3, [pc, #260] @ (8001178 ) + 8001074: 681b ldr r3, [r3, #0] + 8001076: f003 0302 and.w r3, r3, #2 + 800107a: 2b00 cmp r3, #0 + 800107c: d005 beq.n 800108a + 800107e: 687b ldr r3, [r7, #4] + 8001080: 68db ldr r3, [r3, #12] + 8001082: 2b01 cmp r3, #1 + 8001084: d001 beq.n 800108a + { + return HAL_ERROR; + 8001086: 2301 movs r3, #1 + 8001088: e1c7 b.n 800141a + } + /* Otherwise, just the calibration is allowed */ + else + { + /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ + __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 800108a: 4b3b ldr r3, [pc, #236] @ (8001178 ) + 800108c: 681b ldr r3, [r3, #0] + 800108e: f023 02f8 bic.w r2, r3, #248 @ 0xf8 + 8001092: 687b ldr r3, [r7, #4] + 8001094: 691b ldr r3, [r3, #16] + 8001096: 00db lsls r3, r3, #3 + 8001098: 4937 ldr r1, [pc, #220] @ (8001178 ) + 800109a: 4313 orrs r3, r2 + 800109c: 600b str r3, [r1, #0] + if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) + 800109e: e03a b.n 8001116 + } + } + else + { + /* Check the HSI State */ + if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF) + 80010a0: 687b ldr r3, [r7, #4] + 80010a2: 68db ldr r3, [r3, #12] + 80010a4: 2b00 cmp r3, #0 + 80010a6: d020 beq.n 80010ea + { + /* Enable the Internal High Speed oscillator (HSI). */ + __HAL_RCC_HSI_ENABLE(); + 80010a8: 4b34 ldr r3, [pc, #208] @ (800117c ) + 80010aa: 2201 movs r2, #1 + 80010ac: 601a str r2, [r3, #0] + + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 80010ae: f7ff fc47 bl 8000940 + 80010b2: 6138 str r0, [r7, #16] + + /* Wait till HSI is ready */ + while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 80010b4: e008 b.n 80010c8 + { + if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) + 80010b6: f7ff fc43 bl 8000940 + 80010ba: 4602 mov r2, r0 + 80010bc: 693b ldr r3, [r7, #16] + 80010be: 1ad3 subs r3, r2, r3 + 80010c0: 2b02 cmp r3, #2 + 80010c2: d901 bls.n 80010c8 + { + return HAL_TIMEOUT; + 80010c4: 2303 movs r3, #3 + 80010c6: e1a8 b.n 800141a + while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 80010c8: 4b2b ldr r3, [pc, #172] @ (8001178 ) + 80010ca: 681b ldr r3, [r3, #0] + 80010cc: f003 0302 and.w r3, r3, #2 + 80010d0: 2b00 cmp r3, #0 + 80010d2: d0f0 beq.n 80010b6 + } + } + + /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */ + __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 80010d4: 4b28 ldr r3, [pc, #160] @ (8001178 ) + 80010d6: 681b ldr r3, [r3, #0] + 80010d8: f023 02f8 bic.w r2, r3, #248 @ 0xf8 + 80010dc: 687b ldr r3, [r7, #4] + 80010de: 691b ldr r3, [r3, #16] + 80010e0: 00db lsls r3, r3, #3 + 80010e2: 4925 ldr r1, [pc, #148] @ (8001178 ) + 80010e4: 4313 orrs r3, r2 + 80010e6: 600b str r3, [r1, #0] + 80010e8: e015 b.n 8001116 + } + else + { + /* Disable the Internal High Speed oscillator (HSI). */ + __HAL_RCC_HSI_DISABLE(); + 80010ea: 4b24 ldr r3, [pc, #144] @ (800117c ) + 80010ec: 2200 movs r2, #0 + 80010ee: 601a str r2, [r3, #0] + + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 80010f0: f7ff fc26 bl 8000940 + 80010f4: 6138 str r0, [r7, #16] + + /* Wait till HSI is ready */ + while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) + 80010f6: e008 b.n 800110a + { + if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) + 80010f8: f7ff fc22 bl 8000940 + 80010fc: 4602 mov r2, r0 + 80010fe: 693b ldr r3, [r7, #16] + 8001100: 1ad3 subs r3, r2, r3 + 8001102: 2b02 cmp r3, #2 + 8001104: d901 bls.n 800110a + { + return HAL_TIMEOUT; + 8001106: 2303 movs r3, #3 + 8001108: e187 b.n 800141a + while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) + 800110a: 4b1b ldr r3, [pc, #108] @ (8001178 ) + 800110c: 681b ldr r3, [r3, #0] + 800110e: f003 0302 and.w r3, r3, #2 + 8001112: 2b00 cmp r3, #0 + 8001114: d1f0 bne.n 80010f8 + } + } + } + } + /*------------------------------ LSI Configuration -------------------------*/ + if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) + 8001116: 687b ldr r3, [r7, #4] + 8001118: 681b ldr r3, [r3, #0] + 800111a: f003 0308 and.w r3, r3, #8 + 800111e: 2b00 cmp r3, #0 + 8001120: d036 beq.n 8001190 + { + /* Check the parameters */ + assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); + + /* Check the LSI State */ + if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF) + 8001122: 687b ldr r3, [r7, #4] + 8001124: 695b ldr r3, [r3, #20] + 8001126: 2b00 cmp r3, #0 + 8001128: d016 beq.n 8001158 + { + /* Enable the Internal Low Speed oscillator (LSI). */ + __HAL_RCC_LSI_ENABLE(); + 800112a: 4b15 ldr r3, [pc, #84] @ (8001180 ) + 800112c: 2201 movs r2, #1 + 800112e: 601a str r2, [r3, #0] + + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 8001130: f7ff fc06 bl 8000940 + 8001134: 6138 str r0, [r7, #16] + + /* Wait till LSI is ready */ + while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) + 8001136: e008 b.n 800114a + { + if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) + 8001138: f7ff fc02 bl 8000940 + 800113c: 4602 mov r2, r0 + 800113e: 693b ldr r3, [r7, #16] + 8001140: 1ad3 subs r3, r2, r3 + 8001142: 2b02 cmp r3, #2 + 8001144: d901 bls.n 800114a + { + return HAL_TIMEOUT; + 8001146: 2303 movs r3, #3 + 8001148: e167 b.n 800141a + while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) + 800114a: 4b0b ldr r3, [pc, #44] @ (8001178 ) + 800114c: 6f5b ldr r3, [r3, #116] @ 0x74 + 800114e: f003 0302 and.w r3, r3, #2 + 8001152: 2b00 cmp r3, #0 + 8001154: d0f0 beq.n 8001138 + 8001156: e01b b.n 8001190 + } + } + else + { + /* Disable the Internal Low Speed oscillator (LSI). */ + __HAL_RCC_LSI_DISABLE(); + 8001158: 4b09 ldr r3, [pc, #36] @ (8001180 ) + 800115a: 2200 movs r2, #0 + 800115c: 601a str r2, [r3, #0] + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 800115e: f7ff fbef bl 8000940 + 8001162: 6138 str r0, [r7, #16] + + /* Wait till LSI is ready */ + while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) + 8001164: e00e b.n 8001184 + { + if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) + 8001166: f7ff fbeb bl 8000940 + 800116a: 4602 mov r2, r0 + 800116c: 693b ldr r3, [r7, #16] + 800116e: 1ad3 subs r3, r2, r3 + 8001170: 2b02 cmp r3, #2 + 8001172: d907 bls.n 8001184 + { + return HAL_TIMEOUT; + 8001174: 2303 movs r3, #3 + 8001176: e150 b.n 800141a + 8001178: 40023800 .word 0x40023800 + 800117c: 42470000 .word 0x42470000 + 8001180: 42470e80 .word 0x42470e80 + while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) + 8001184: 4b88 ldr r3, [pc, #544] @ (80013a8 ) + 8001186: 6f5b ldr r3, [r3, #116] @ 0x74 + 8001188: f003 0302 and.w r3, r3, #2 + 800118c: 2b00 cmp r3, #0 + 800118e: d1ea bne.n 8001166 + } + } + } + } + /*------------------------------ LSE Configuration -------------------------*/ + if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) + 8001190: 687b ldr r3, [r7, #4] + 8001192: 681b ldr r3, [r3, #0] + 8001194: f003 0304 and.w r3, r3, #4 + 8001198: 2b00 cmp r3, #0 + 800119a: f000 8097 beq.w 80012cc + { + FlagStatus pwrclkchanged = RESET; + 800119e: 2300 movs r3, #0 + 80011a0: 75fb strb r3, [r7, #23] + /* Check the parameters */ + assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); + + /* Update LSE configuration in Backup Domain control register */ + /* Requires to enable write access to Backup Domain of necessary */ + if (__HAL_RCC_PWR_IS_CLK_DISABLED()) + 80011a2: 4b81 ldr r3, [pc, #516] @ (80013a8 ) + 80011a4: 6c1b ldr r3, [r3, #64] @ 0x40 + 80011a6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80011aa: 2b00 cmp r3, #0 + 80011ac: d10f bne.n 80011ce + { + __HAL_RCC_PWR_CLK_ENABLE(); + 80011ae: 2300 movs r3, #0 + 80011b0: 60bb str r3, [r7, #8] + 80011b2: 4b7d ldr r3, [pc, #500] @ (80013a8 ) + 80011b4: 6c1b ldr r3, [r3, #64] @ 0x40 + 80011b6: 4a7c ldr r2, [pc, #496] @ (80013a8 ) + 80011b8: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 + 80011bc: 6413 str r3, [r2, #64] @ 0x40 + 80011be: 4b7a ldr r3, [pc, #488] @ (80013a8 ) + 80011c0: 6c1b ldr r3, [r3, #64] @ 0x40 + 80011c2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 + 80011c6: 60bb str r3, [r7, #8] + 80011c8: 68bb ldr r3, [r7, #8] + pwrclkchanged = SET; + 80011ca: 2301 movs r3, #1 + 80011cc: 75fb strb r3, [r7, #23] + } + + if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 80011ce: 4b77 ldr r3, [pc, #476] @ (80013ac ) + 80011d0: 681b ldr r3, [r3, #0] + 80011d2: f403 7380 and.w r3, r3, #256 @ 0x100 + 80011d6: 2b00 cmp r3, #0 + 80011d8: d118 bne.n 800120c + { + /* Enable write access to Backup domain */ + SET_BIT(PWR->CR, PWR_CR_DBP); + 80011da: 4b74 ldr r3, [pc, #464] @ (80013ac ) + 80011dc: 681b ldr r3, [r3, #0] + 80011de: 4a73 ldr r2, [pc, #460] @ (80013ac ) + 80011e0: f443 7380 orr.w r3, r3, #256 @ 0x100 + 80011e4: 6013 str r3, [r2, #0] + + /* Wait for Backup domain Write protection disable */ + tickstart = HAL_GetTick(); + 80011e6: f7ff fbab bl 8000940 + 80011ea: 6138 str r0, [r7, #16] + + while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 80011ec: e008 b.n 8001200 + { + if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) + 80011ee: f7ff fba7 bl 8000940 + 80011f2: 4602 mov r2, r0 + 80011f4: 693b ldr r3, [r7, #16] + 80011f6: 1ad3 subs r3, r2, r3 + 80011f8: 2b02 cmp r3, #2 + 80011fa: d901 bls.n 8001200 + { + return HAL_TIMEOUT; + 80011fc: 2303 movs r3, #3 + 80011fe: e10c b.n 800141a + while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 8001200: 4b6a ldr r3, [pc, #424] @ (80013ac ) + 8001202: 681b ldr r3, [r3, #0] + 8001204: f403 7380 and.w r3, r3, #256 @ 0x100 + 8001208: 2b00 cmp r3, #0 + 800120a: d0f0 beq.n 80011ee + } + } + } + + /* Set the new LSE configuration -----------------------------------------*/ + __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); + 800120c: 687b ldr r3, [r7, #4] + 800120e: 689b ldr r3, [r3, #8] + 8001210: 2b01 cmp r3, #1 + 8001212: d106 bne.n 8001222 + 8001214: 4b64 ldr r3, [pc, #400] @ (80013a8 ) + 8001216: 6f1b ldr r3, [r3, #112] @ 0x70 + 8001218: 4a63 ldr r2, [pc, #396] @ (80013a8 ) + 800121a: f043 0301 orr.w r3, r3, #1 + 800121e: 6713 str r3, [r2, #112] @ 0x70 + 8001220: e01c b.n 800125c + 8001222: 687b ldr r3, [r7, #4] + 8001224: 689b ldr r3, [r3, #8] + 8001226: 2b05 cmp r3, #5 + 8001228: d10c bne.n 8001244 + 800122a: 4b5f ldr r3, [pc, #380] @ (80013a8 ) + 800122c: 6f1b ldr r3, [r3, #112] @ 0x70 + 800122e: 4a5e ldr r2, [pc, #376] @ (80013a8 ) + 8001230: f043 0304 orr.w r3, r3, #4 + 8001234: 6713 str r3, [r2, #112] @ 0x70 + 8001236: 4b5c ldr r3, [pc, #368] @ (80013a8 ) + 8001238: 6f1b ldr r3, [r3, #112] @ 0x70 + 800123a: 4a5b ldr r2, [pc, #364] @ (80013a8 ) + 800123c: f043 0301 orr.w r3, r3, #1 + 8001240: 6713 str r3, [r2, #112] @ 0x70 + 8001242: e00b b.n 800125c + 8001244: 4b58 ldr r3, [pc, #352] @ (80013a8 ) + 8001246: 6f1b ldr r3, [r3, #112] @ 0x70 + 8001248: 4a57 ldr r2, [pc, #348] @ (80013a8 ) + 800124a: f023 0301 bic.w r3, r3, #1 + 800124e: 6713 str r3, [r2, #112] @ 0x70 + 8001250: 4b55 ldr r3, [pc, #340] @ (80013a8 ) + 8001252: 6f1b ldr r3, [r3, #112] @ 0x70 + 8001254: 4a54 ldr r2, [pc, #336] @ (80013a8 ) + 8001256: f023 0304 bic.w r3, r3, #4 + 800125a: 6713 str r3, [r2, #112] @ 0x70 + /* Check the LSE State */ + if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) + 800125c: 687b ldr r3, [r7, #4] + 800125e: 689b ldr r3, [r3, #8] + 8001260: 2b00 cmp r3, #0 + 8001262: d015 beq.n 8001290 + { + /* Get Start Tick*/ + tickstart = HAL_GetTick(); + 8001264: f7ff fb6c bl 8000940 + 8001268: 6138 str r0, [r7, #16] + + /* Wait till LSE is ready */ + while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 800126a: e00a b.n 8001282 + { + if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) + 800126c: f7ff fb68 bl 8000940 + 8001270: 4602 mov r2, r0 + 8001272: 693b ldr r3, [r7, #16] + 8001274: 1ad3 subs r3, r2, r3 + 8001276: f241 3288 movw r2, #5000 @ 0x1388 + 800127a: 4293 cmp r3, r2 + 800127c: d901 bls.n 8001282 + { + return HAL_TIMEOUT; + 800127e: 2303 movs r3, #3 + 8001280: e0cb b.n 800141a + while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 8001282: 4b49 ldr r3, [pc, #292] @ (80013a8 ) + 8001284: 6f1b ldr r3, [r3, #112] @ 0x70 + 8001286: f003 0302 and.w r3, r3, #2 + 800128a: 2b00 cmp r3, #0 + 800128c: d0ee beq.n 800126c + 800128e: e014 b.n 80012ba + } + } + else + { + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8001290: f7ff fb56 bl 8000940 + 8001294: 6138 str r0, [r7, #16] + + /* Wait till LSE is ready */ + while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) + 8001296: e00a b.n 80012ae + { + if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) + 8001298: f7ff fb52 bl 8000940 + 800129c: 4602 mov r2, r0 + 800129e: 693b ldr r3, [r7, #16] + 80012a0: 1ad3 subs r3, r2, r3 + 80012a2: f241 3288 movw r2, #5000 @ 0x1388 + 80012a6: 4293 cmp r3, r2 + 80012a8: d901 bls.n 80012ae + { + return HAL_TIMEOUT; + 80012aa: 2303 movs r3, #3 + 80012ac: e0b5 b.n 800141a + while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) + 80012ae: 4b3e ldr r3, [pc, #248] @ (80013a8 ) + 80012b0: 6f1b ldr r3, [r3, #112] @ 0x70 + 80012b2: f003 0302 and.w r3, r3, #2 + 80012b6: 2b00 cmp r3, #0 + 80012b8: d1ee bne.n 8001298 + } + } + } + + /* Restore clock configuration if changed */ + if (pwrclkchanged == SET) + 80012ba: 7dfb ldrb r3, [r7, #23] + 80012bc: 2b01 cmp r3, #1 + 80012be: d105 bne.n 80012cc + { + __HAL_RCC_PWR_CLK_DISABLE(); + 80012c0: 4b39 ldr r3, [pc, #228] @ (80013a8 ) + 80012c2: 6c1b ldr r3, [r3, #64] @ 0x40 + 80012c4: 4a38 ldr r2, [pc, #224] @ (80013a8 ) + 80012c6: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 + 80012ca: 6413 str r3, [r2, #64] @ 0x40 + } + } + /*-------------------------------- PLL Configuration -----------------------*/ + /* Check the parameters */ + assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); + if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) + 80012cc: 687b ldr r3, [r7, #4] + 80012ce: 699b ldr r3, [r3, #24] + 80012d0: 2b00 cmp r3, #0 + 80012d2: f000 80a1 beq.w 8001418 + { + /* Check if the PLL is used as system clock or not */ + if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) + 80012d6: 4b34 ldr r3, [pc, #208] @ (80013a8 ) + 80012d8: 689b ldr r3, [r3, #8] + 80012da: f003 030c and.w r3, r3, #12 + 80012de: 2b08 cmp r3, #8 + 80012e0: d05c beq.n 800139c + { + if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) + 80012e2: 687b ldr r3, [r7, #4] + 80012e4: 699b ldr r3, [r3, #24] + 80012e6: 2b02 cmp r3, #2 + 80012e8: d141 bne.n 800136e + assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN)); + assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); + assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); + + /* Disable the main PLL. */ + __HAL_RCC_PLL_DISABLE(); + 80012ea: 4b31 ldr r3, [pc, #196] @ (80013b0 ) + 80012ec: 2200 movs r2, #0 + 80012ee: 601a str r2, [r3, #0] + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 80012f0: f7ff fb26 bl 8000940 + 80012f4: 6138 str r0, [r7, #16] + + /* Wait till PLL is disabled */ + while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 80012f6: e008 b.n 800130a + { + if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) + 80012f8: f7ff fb22 bl 8000940 + 80012fc: 4602 mov r2, r0 + 80012fe: 693b ldr r3, [r7, #16] + 8001300: 1ad3 subs r3, r2, r3 + 8001302: 2b02 cmp r3, #2 + 8001304: d901 bls.n 800130a + { + return HAL_TIMEOUT; + 8001306: 2303 movs r3, #3 + 8001308: e087 b.n 800141a + while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 800130a: 4b27 ldr r3, [pc, #156] @ (80013a8 ) + 800130c: 681b ldr r3, [r3, #0] + 800130e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8001312: 2b00 cmp r3, #0 + 8001314: d1f0 bne.n 80012f8 + } + } + + /* Configure the main PLL clock source, multiplication and division factors. */ + WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \ + 8001316: 687b ldr r3, [r7, #4] + 8001318: 69da ldr r2, [r3, #28] + 800131a: 687b ldr r3, [r7, #4] + 800131c: 6a1b ldr r3, [r3, #32] + 800131e: 431a orrs r2, r3 + 8001320: 687b ldr r3, [r7, #4] + 8001322: 6a5b ldr r3, [r3, #36] @ 0x24 + 8001324: 019b lsls r3, r3, #6 + 8001326: 431a orrs r2, r3 + 8001328: 687b ldr r3, [r7, #4] + 800132a: 6a9b ldr r3, [r3, #40] @ 0x28 + 800132c: 085b lsrs r3, r3, #1 + 800132e: 3b01 subs r3, #1 + 8001330: 041b lsls r3, r3, #16 + 8001332: 431a orrs r2, r3 + 8001334: 687b ldr r3, [r7, #4] + 8001336: 6adb ldr r3, [r3, #44] @ 0x2c + 8001338: 061b lsls r3, r3, #24 + 800133a: 491b ldr r1, [pc, #108] @ (80013a8 ) + 800133c: 4313 orrs r3, r2 + 800133e: 604b str r3, [r1, #4] + RCC_OscInitStruct->PLL.PLLM | \ + (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \ + (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \ + (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))); + /* Enable the main PLL. */ + __HAL_RCC_PLL_ENABLE(); + 8001340: 4b1b ldr r3, [pc, #108] @ (80013b0 ) + 8001342: 2201 movs r2, #1 + 8001344: 601a str r2, [r3, #0] + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8001346: f7ff fafb bl 8000940 + 800134a: 6138 str r0, [r7, #16] + + /* Wait till PLL is ready */ + while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 800134c: e008 b.n 8001360 + { + if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) + 800134e: f7ff faf7 bl 8000940 + 8001352: 4602 mov r2, r0 + 8001354: 693b ldr r3, [r7, #16] + 8001356: 1ad3 subs r3, r2, r3 + 8001358: 2b02 cmp r3, #2 + 800135a: d901 bls.n 8001360 + { + return HAL_TIMEOUT; + 800135c: 2303 movs r3, #3 + 800135e: e05c b.n 800141a + while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 8001360: 4b11 ldr r3, [pc, #68] @ (80013a8 ) + 8001362: 681b ldr r3, [r3, #0] + 8001364: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8001368: 2b00 cmp r3, #0 + 800136a: d0f0 beq.n 800134e + 800136c: e054 b.n 8001418 + } + } + else + { + /* Disable the main PLL. */ + __HAL_RCC_PLL_DISABLE(); + 800136e: 4b10 ldr r3, [pc, #64] @ (80013b0 ) + 8001370: 2200 movs r2, #0 + 8001372: 601a str r2, [r3, #0] + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8001374: f7ff fae4 bl 8000940 + 8001378: 6138 str r0, [r7, #16] + + /* Wait till PLL is disabled */ + while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 800137a: e008 b.n 800138e + { + if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) + 800137c: f7ff fae0 bl 8000940 + 8001380: 4602 mov r2, r0 + 8001382: 693b ldr r3, [r7, #16] + 8001384: 1ad3 subs r3, r2, r3 + 8001386: 2b02 cmp r3, #2 + 8001388: d901 bls.n 800138e + { + return HAL_TIMEOUT; + 800138a: 2303 movs r3, #3 + 800138c: e045 b.n 800141a + while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 800138e: 4b06 ldr r3, [pc, #24] @ (80013a8 ) + 8001390: 681b ldr r3, [r3, #0] + 8001392: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 8001396: 2b00 cmp r3, #0 + 8001398: d1f0 bne.n 800137c + 800139a: e03d b.n 8001418 + } + } + else + { + /* Check if there is a request to disable the PLL used as System clock source */ + if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) + 800139c: 687b ldr r3, [r7, #4] + 800139e: 699b ldr r3, [r3, #24] + 80013a0: 2b01 cmp r3, #1 + 80013a2: d107 bne.n 80013b4 + { + return HAL_ERROR; + 80013a4: 2301 movs r3, #1 + 80013a6: e038 b.n 800141a + 80013a8: 40023800 .word 0x40023800 + 80013ac: 40007000 .word 0x40007000 + 80013b0: 42470060 .word 0x42470060 + } + else + { + /* Do not return HAL_ERROR if request repeats the current configuration */ + pll_config = RCC->PLLCFGR; + 80013b4: 4b1b ldr r3, [pc, #108] @ (8001424 ) + 80013b6: 685b ldr r3, [r3, #4] + 80013b8: 60fb str r3, [r7, #12] + (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || + (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || + (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) || + (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos))) +#else + if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || + 80013ba: 687b ldr r3, [r7, #4] + 80013bc: 699b ldr r3, [r3, #24] + 80013be: 2b01 cmp r3, #1 + 80013c0: d028 beq.n 8001414 + (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 80013c2: 68fb ldr r3, [r7, #12] + 80013c4: f403 0280 and.w r2, r3, #4194304 @ 0x400000 + 80013c8: 687b ldr r3, [r7, #4] + 80013ca: 69db ldr r3, [r3, #28] + if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || + 80013cc: 429a cmp r2, r3 + 80013ce: d121 bne.n 8001414 + (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || + 80013d0: 68fb ldr r3, [r7, #12] + 80013d2: f003 023f and.w r2, r3, #63 @ 0x3f + 80013d6: 687b ldr r3, [r7, #4] + 80013d8: 6a1b ldr r3, [r3, #32] + (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 80013da: 429a cmp r2, r3 + 80013dc: d11a bne.n 8001414 + (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || + 80013de: 68fa ldr r2, [r7, #12] + 80013e0: f647 73c0 movw r3, #32704 @ 0x7fc0 + 80013e4: 4013 ands r3, r2 + 80013e6: 687a ldr r2, [r7, #4] + 80013e8: 6a52 ldr r2, [r2, #36] @ 0x24 + 80013ea: 0192 lsls r2, r2, #6 + (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || + 80013ec: 4293 cmp r3, r2 + 80013ee: d111 bne.n 8001414 + (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || + 80013f0: 68fb ldr r3, [r7, #12] + 80013f2: f403 3240 and.w r2, r3, #196608 @ 0x30000 + 80013f6: 687b ldr r3, [r7, #4] + 80013f8: 6a9b ldr r3, [r3, #40] @ 0x28 + 80013fa: 085b lsrs r3, r3, #1 + 80013fc: 3b01 subs r3, #1 + 80013fe: 041b lsls r3, r3, #16 + (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || + 8001400: 429a cmp r2, r3 + 8001402: d107 bne.n 8001414 + (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))) + 8001404: 68fb ldr r3, [r7, #12] + 8001406: f003 6270 and.w r2, r3, #251658240 @ 0xf000000 + 800140a: 687b ldr r3, [r7, #4] + 800140c: 6adb ldr r3, [r3, #44] @ 0x2c + 800140e: 061b lsls r3, r3, #24 + (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || + 8001410: 429a cmp r2, r3 + 8001412: d001 beq.n 8001418 +#endif /* RCC_PLLCFGR_PLLR */ + { + return HAL_ERROR; + 8001414: 2301 movs r3, #1 + 8001416: e000 b.n 800141a + } + } + } + } + return HAL_OK; + 8001418: 2300 movs r3, #0 +} + 800141a: 4618 mov r0, r3 + 800141c: 3718 adds r7, #24 + 800141e: 46bd mov sp, r7 + 8001420: bd80 pop {r7, pc} + 8001422: bf00 nop + 8001424: 40023800 .word 0x40023800 + +08001428 : + * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency + * (for more details refer to section above "Initialization/de-initialization functions") + * @retval None + */ +HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) +{ + 8001428: b580 push {r7, lr} + 800142a: b084 sub sp, #16 + 800142c: af00 add r7, sp, #0 + 800142e: 6078 str r0, [r7, #4] + 8001430: 6039 str r1, [r7, #0] + uint32_t tickstart; + + /* Check Null pointer */ + if (RCC_ClkInitStruct == NULL) + 8001432: 687b ldr r3, [r7, #4] + 8001434: 2b00 cmp r3, #0 + 8001436: d101 bne.n 800143c + { + return HAL_ERROR; + 8001438: 2301 movs r3, #1 + 800143a: e0cc b.n 80015d6 + /* To correctly read data from FLASH memory, the number of wait states (LATENCY) + must be correctly programmed according to the frequency of the CPU clock + (HCLK) and the supply voltage of the device. */ + + /* Increasing the number of wait states because of higher CPU frequency */ + if (FLatency > __HAL_FLASH_GET_LATENCY()) + 800143c: 4b68 ldr r3, [pc, #416] @ (80015e0 ) + 800143e: 681b ldr r3, [r3, #0] + 8001440: f003 030f and.w r3, r3, #15 + 8001444: 683a ldr r2, [r7, #0] + 8001446: 429a cmp r2, r3 + 8001448: d90c bls.n 8001464 + { + /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + __HAL_FLASH_SET_LATENCY(FLatency); + 800144a: 4b65 ldr r3, [pc, #404] @ (80015e0 ) + 800144c: 683a ldr r2, [r7, #0] + 800144e: b2d2 uxtb r2, r2 + 8001450: 701a strb r2, [r3, #0] + + /* Check that the new number of wait states is taken into account to access the Flash + memory by reading the FLASH_ACR register */ + if (__HAL_FLASH_GET_LATENCY() != FLatency) + 8001452: 4b63 ldr r3, [pc, #396] @ (80015e0 ) + 8001454: 681b ldr r3, [r3, #0] + 8001456: f003 030f and.w r3, r3, #15 + 800145a: 683a ldr r2, [r7, #0] + 800145c: 429a cmp r2, r3 + 800145e: d001 beq.n 8001464 + { + return HAL_ERROR; + 8001460: 2301 movs r3, #1 + 8001462: e0b8 b.n 80015d6 + } + } + + /*-------------------------- HCLK Configuration --------------------------*/ + if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) + 8001464: 687b ldr r3, [r7, #4] + 8001466: 681b ldr r3, [r3, #0] + 8001468: f003 0302 and.w r3, r3, #2 + 800146c: 2b00 cmp r3, #0 + 800146e: d020 beq.n 80014b2 + { + /* Set the highest APBx dividers in order to ensure that we do not go through + a non-spec phase whatever we decrease or increase HCLK. */ + if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) + 8001470: 687b ldr r3, [r7, #4] + 8001472: 681b ldr r3, [r3, #0] + 8001474: f003 0304 and.w r3, r3, #4 + 8001478: 2b00 cmp r3, #0 + 800147a: d005 beq.n 8001488 + { + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); + 800147c: 4b59 ldr r3, [pc, #356] @ (80015e4 ) + 800147e: 689b ldr r3, [r3, #8] + 8001480: 4a58 ldr r2, [pc, #352] @ (80015e4 ) + 8001482: f443 53e0 orr.w r3, r3, #7168 @ 0x1c00 + 8001486: 6093 str r3, [r2, #8] + } + + if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) + 8001488: 687b ldr r3, [r7, #4] + 800148a: 681b ldr r3, [r3, #0] + 800148c: f003 0308 and.w r3, r3, #8 + 8001490: 2b00 cmp r3, #0 + 8001492: d005 beq.n 80014a0 + { + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); + 8001494: 4b53 ldr r3, [pc, #332] @ (80015e4 ) + 8001496: 689b ldr r3, [r3, #8] + 8001498: 4a52 ldr r2, [pc, #328] @ (80015e4 ) + 800149a: f443 4360 orr.w r3, r3, #57344 @ 0xe000 + 800149e: 6093 str r3, [r2, #8] + } + + assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); + MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); + 80014a0: 4b50 ldr r3, [pc, #320] @ (80015e4 ) + 80014a2: 689b ldr r3, [r3, #8] + 80014a4: f023 02f0 bic.w r2, r3, #240 @ 0xf0 + 80014a8: 687b ldr r3, [r7, #4] + 80014aa: 689b ldr r3, [r3, #8] + 80014ac: 494d ldr r1, [pc, #308] @ (80015e4 ) + 80014ae: 4313 orrs r3, r2 + 80014b0: 608b str r3, [r1, #8] + } + + /*------------------------- SYSCLK Configuration ---------------------------*/ + if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) + 80014b2: 687b ldr r3, [r7, #4] + 80014b4: 681b ldr r3, [r3, #0] + 80014b6: f003 0301 and.w r3, r3, #1 + 80014ba: 2b00 cmp r3, #0 + 80014bc: d044 beq.n 8001548 + { + assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); + + /* HSE is selected as System Clock Source */ + if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) + 80014be: 687b ldr r3, [r7, #4] + 80014c0: 685b ldr r3, [r3, #4] + 80014c2: 2b01 cmp r3, #1 + 80014c4: d107 bne.n 80014d6 + { + /* Check the HSE ready flag */ + if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 80014c6: 4b47 ldr r3, [pc, #284] @ (80015e4 ) + 80014c8: 681b ldr r3, [r3, #0] + 80014ca: f403 3300 and.w r3, r3, #131072 @ 0x20000 + 80014ce: 2b00 cmp r3, #0 + 80014d0: d119 bne.n 8001506 + { + return HAL_ERROR; + 80014d2: 2301 movs r3, #1 + 80014d4: e07f b.n 80015d6 + } + } + /* PLL is selected as System Clock Source */ + else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || + 80014d6: 687b ldr r3, [r7, #4] + 80014d8: 685b ldr r3, [r3, #4] + 80014da: 2b02 cmp r3, #2 + 80014dc: d003 beq.n 80014e6 + (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) + 80014de: 687b ldr r3, [r7, #4] + 80014e0: 685b ldr r3, [r3, #4] + else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || + 80014e2: 2b03 cmp r3, #3 + 80014e4: d107 bne.n 80014f6 + { + /* Check the PLL ready flag */ + if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 80014e6: 4b3f ldr r3, [pc, #252] @ (80015e4 ) + 80014e8: 681b ldr r3, [r3, #0] + 80014ea: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 + 80014ee: 2b00 cmp r3, #0 + 80014f0: d109 bne.n 8001506 + { + return HAL_ERROR; + 80014f2: 2301 movs r3, #1 + 80014f4: e06f b.n 80015d6 + } + /* HSI is selected as System Clock Source */ + else + { + /* Check the HSI ready flag */ + if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 80014f6: 4b3b ldr r3, [pc, #236] @ (80015e4 ) + 80014f8: 681b ldr r3, [r3, #0] + 80014fa: f003 0302 and.w r3, r3, #2 + 80014fe: 2b00 cmp r3, #0 + 8001500: d101 bne.n 8001506 + { + return HAL_ERROR; + 8001502: 2301 movs r3, #1 + 8001504: e067 b.n 80015d6 + } + } + + __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); + 8001506: 4b37 ldr r3, [pc, #220] @ (80015e4 ) + 8001508: 689b ldr r3, [r3, #8] + 800150a: f023 0203 bic.w r2, r3, #3 + 800150e: 687b ldr r3, [r7, #4] + 8001510: 685b ldr r3, [r3, #4] + 8001512: 4934 ldr r1, [pc, #208] @ (80015e4 ) + 8001514: 4313 orrs r3, r2 + 8001516: 608b str r3, [r1, #8] + + /* Get Start Tick */ + tickstart = HAL_GetTick(); + 8001518: f7ff fa12 bl 8000940 + 800151c: 60f8 str r0, [r7, #12] + + while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) + 800151e: e00a b.n 8001536 + { + if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) + 8001520: f7ff fa0e bl 8000940 + 8001524: 4602 mov r2, r0 + 8001526: 68fb ldr r3, [r7, #12] + 8001528: 1ad3 subs r3, r2, r3 + 800152a: f241 3288 movw r2, #5000 @ 0x1388 + 800152e: 4293 cmp r3, r2 + 8001530: d901 bls.n 8001536 + { + return HAL_TIMEOUT; + 8001532: 2303 movs r3, #3 + 8001534: e04f b.n 80015d6 + while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) + 8001536: 4b2b ldr r3, [pc, #172] @ (80015e4 ) + 8001538: 689b ldr r3, [r3, #8] + 800153a: f003 020c and.w r2, r3, #12 + 800153e: 687b ldr r3, [r7, #4] + 8001540: 685b ldr r3, [r3, #4] + 8001542: 009b lsls r3, r3, #2 + 8001544: 429a cmp r2, r3 + 8001546: d1eb bne.n 8001520 + } + } + } + + /* Decreasing the number of wait states because of lower CPU frequency */ + if (FLatency < __HAL_FLASH_GET_LATENCY()) + 8001548: 4b25 ldr r3, [pc, #148] @ (80015e0 ) + 800154a: 681b ldr r3, [r3, #0] + 800154c: f003 030f and.w r3, r3, #15 + 8001550: 683a ldr r2, [r7, #0] + 8001552: 429a cmp r2, r3 + 8001554: d20c bcs.n 8001570 + { + /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + __HAL_FLASH_SET_LATENCY(FLatency); + 8001556: 4b22 ldr r3, [pc, #136] @ (80015e0 ) + 8001558: 683a ldr r2, [r7, #0] + 800155a: b2d2 uxtb r2, r2 + 800155c: 701a strb r2, [r3, #0] + + /* Check that the new number of wait states is taken into account to access the Flash + memory by reading the FLASH_ACR register */ + if (__HAL_FLASH_GET_LATENCY() != FLatency) + 800155e: 4b20 ldr r3, [pc, #128] @ (80015e0 ) + 8001560: 681b ldr r3, [r3, #0] + 8001562: f003 030f and.w r3, r3, #15 + 8001566: 683a ldr r2, [r7, #0] + 8001568: 429a cmp r2, r3 + 800156a: d001 beq.n 8001570 + { + return HAL_ERROR; + 800156c: 2301 movs r3, #1 + 800156e: e032 b.n 80015d6 + } + } + + /*-------------------------- PCLK1 Configuration ---------------------------*/ + if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) + 8001570: 687b ldr r3, [r7, #4] + 8001572: 681b ldr r3, [r3, #0] + 8001574: f003 0304 and.w r3, r3, #4 + 8001578: 2b00 cmp r3, #0 + 800157a: d008 beq.n 800158e + { + assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); + 800157c: 4b19 ldr r3, [pc, #100] @ (80015e4 ) + 800157e: 689b ldr r3, [r3, #8] + 8001580: f423 52e0 bic.w r2, r3, #7168 @ 0x1c00 + 8001584: 687b ldr r3, [r7, #4] + 8001586: 68db ldr r3, [r3, #12] + 8001588: 4916 ldr r1, [pc, #88] @ (80015e4 ) + 800158a: 4313 orrs r3, r2 + 800158c: 608b str r3, [r1, #8] + } + + /*-------------------------- PCLK2 Configuration ---------------------------*/ + if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) + 800158e: 687b ldr r3, [r7, #4] + 8001590: 681b ldr r3, [r3, #0] + 8001592: f003 0308 and.w r3, r3, #8 + 8001596: 2b00 cmp r3, #0 + 8001598: d009 beq.n 80015ae + { + assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); + MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); + 800159a: 4b12 ldr r3, [pc, #72] @ (80015e4 ) + 800159c: 689b ldr r3, [r3, #8] + 800159e: f423 4260 bic.w r2, r3, #57344 @ 0xe000 + 80015a2: 687b ldr r3, [r7, #4] + 80015a4: 691b ldr r3, [r3, #16] + 80015a6: 00db lsls r3, r3, #3 + 80015a8: 490e ldr r1, [pc, #56] @ (80015e4 ) + 80015aa: 4313 orrs r3, r2 + 80015ac: 608b str r3, [r1, #8] + } + + /* Update the SystemCoreClock global variable */ + SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; + 80015ae: f000 f821 bl 80015f4 + 80015b2: 4602 mov r2, r0 + 80015b4: 4b0b ldr r3, [pc, #44] @ (80015e4 ) + 80015b6: 689b ldr r3, [r3, #8] + 80015b8: 091b lsrs r3, r3, #4 + 80015ba: f003 030f and.w r3, r3, #15 + 80015be: 490a ldr r1, [pc, #40] @ (80015e8 ) + 80015c0: 5ccb ldrb r3, [r1, r3] + 80015c2: fa22 f303 lsr.w r3, r2, r3 + 80015c6: 4a09 ldr r2, [pc, #36] @ (80015ec ) + 80015c8: 6013 str r3, [r2, #0] + + /* Configure the source of time base considering new system clocks settings */ + HAL_InitTick(uwTickPrio); + 80015ca: 4b09 ldr r3, [pc, #36] @ (80015f0 ) + 80015cc: 681b ldr r3, [r3, #0] + 80015ce: 4618 mov r0, r3 + 80015d0: f7ff f972 bl 80008b8 + + return HAL_OK; + 80015d4: 2300 movs r3, #0 +} + 80015d6: 4618 mov r0, r3 + 80015d8: 3710 adds r7, #16 + 80015da: 46bd mov sp, r7 + 80015dc: bd80 pop {r7, pc} + 80015de: bf00 nop + 80015e0: 40023c00 .word 0x40023c00 + 80015e4: 40023800 .word 0x40023800 + 80015e8: 08001870 .word 0x08001870 + 80015ec: 20000000 .word 0x20000000 + 80015f0: 20000004 .word 0x20000004 + +080015f4 : + * + * + * @retval SYSCLK frequency + */ +__weak uint32_t HAL_RCC_GetSysClockFreq(void) +{ + 80015f4: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} + 80015f8: b094 sub sp, #80 @ 0x50 + 80015fa: af00 add r7, sp, #0 + uint32_t pllm = 0U; + 80015fc: 2300 movs r3, #0 + 80015fe: 647b str r3, [r7, #68] @ 0x44 + uint32_t pllvco = 0U; + 8001600: 2300 movs r3, #0 + 8001602: 64fb str r3, [r7, #76] @ 0x4c + uint32_t pllp = 0U; + 8001604: 2300 movs r3, #0 + 8001606: 643b str r3, [r7, #64] @ 0x40 + uint32_t sysclockfreq = 0U; + 8001608: 2300 movs r3, #0 + 800160a: 64bb str r3, [r7, #72] @ 0x48 + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + 800160c: 4b79 ldr r3, [pc, #484] @ (80017f4 ) + 800160e: 689b ldr r3, [r3, #8] + 8001610: f003 030c and.w r3, r3, #12 + 8001614: 2b08 cmp r3, #8 + 8001616: d00d beq.n 8001634 + 8001618: 2b08 cmp r3, #8 + 800161a: f200 80e1 bhi.w 80017e0 + 800161e: 2b00 cmp r3, #0 + 8001620: d002 beq.n 8001628 + 8001622: 2b04 cmp r3, #4 + 8001624: d003 beq.n 800162e + 8001626: e0db b.n 80017e0 + { + case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ + { + sysclockfreq = HSI_VALUE; + 8001628: 4b73 ldr r3, [pc, #460] @ (80017f8 ) + 800162a: 64bb str r3, [r7, #72] @ 0x48 + break; + 800162c: e0db b.n 80017e6 + } + case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ + { + sysclockfreq = HSE_VALUE; + 800162e: 4b73 ldr r3, [pc, #460] @ (80017fc ) + 8001630: 64bb str r3, [r7, #72] @ 0x48 + break; + 8001632: e0d8 b.n 80017e6 + } + case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */ + { + /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN + SYSCLK = PLL_VCO / PLLP */ + pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; + 8001634: 4b6f ldr r3, [pc, #444] @ (80017f4 ) + 8001636: 685b ldr r3, [r3, #4] + 8001638: f003 033f and.w r3, r3, #63 @ 0x3f + 800163c: 647b str r3, [r7, #68] @ 0x44 + if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) + 800163e: 4b6d ldr r3, [pc, #436] @ (80017f4 ) + 8001640: 685b ldr r3, [r3, #4] + 8001642: f403 0380 and.w r3, r3, #4194304 @ 0x400000 + 8001646: 2b00 cmp r3, #0 + 8001648: d063 beq.n 8001712 + { + /* HSE used as PLL clock source */ + pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); + 800164a: 4b6a ldr r3, [pc, #424] @ (80017f4 ) + 800164c: 685b ldr r3, [r3, #4] + 800164e: 099b lsrs r3, r3, #6 + 8001650: 2200 movs r2, #0 + 8001652: 63bb str r3, [r7, #56] @ 0x38 + 8001654: 63fa str r2, [r7, #60] @ 0x3c + 8001656: 6bbb ldr r3, [r7, #56] @ 0x38 + 8001658: f3c3 0308 ubfx r3, r3, #0, #9 + 800165c: 633b str r3, [r7, #48] @ 0x30 + 800165e: 2300 movs r3, #0 + 8001660: 637b str r3, [r7, #52] @ 0x34 + 8001662: e9d7 450c ldrd r4, r5, [r7, #48] @ 0x30 + 8001666: 4622 mov r2, r4 + 8001668: 462b mov r3, r5 + 800166a: f04f 0000 mov.w r0, #0 + 800166e: f04f 0100 mov.w r1, #0 + 8001672: 0159 lsls r1, r3, #5 + 8001674: ea41 61d2 orr.w r1, r1, r2, lsr #27 + 8001678: 0150 lsls r0, r2, #5 + 800167a: 4602 mov r2, r0 + 800167c: 460b mov r3, r1 + 800167e: 4621 mov r1, r4 + 8001680: 1a51 subs r1, r2, r1 + 8001682: 6139 str r1, [r7, #16] + 8001684: 4629 mov r1, r5 + 8001686: eb63 0301 sbc.w r3, r3, r1 + 800168a: 617b str r3, [r7, #20] + 800168c: f04f 0200 mov.w r2, #0 + 8001690: f04f 0300 mov.w r3, #0 + 8001694: e9d7 ab04 ldrd sl, fp, [r7, #16] + 8001698: 4659 mov r1, fp + 800169a: 018b lsls r3, r1, #6 + 800169c: 4651 mov r1, sl + 800169e: ea43 6391 orr.w r3, r3, r1, lsr #26 + 80016a2: 4651 mov r1, sl + 80016a4: 018a lsls r2, r1, #6 + 80016a6: 4651 mov r1, sl + 80016a8: ebb2 0801 subs.w r8, r2, r1 + 80016ac: 4659 mov r1, fp + 80016ae: eb63 0901 sbc.w r9, r3, r1 + 80016b2: f04f 0200 mov.w r2, #0 + 80016b6: f04f 0300 mov.w r3, #0 + 80016ba: ea4f 03c9 mov.w r3, r9, lsl #3 + 80016be: ea43 7358 orr.w r3, r3, r8, lsr #29 + 80016c2: ea4f 02c8 mov.w r2, r8, lsl #3 + 80016c6: 4690 mov r8, r2 + 80016c8: 4699 mov r9, r3 + 80016ca: 4623 mov r3, r4 + 80016cc: eb18 0303 adds.w r3, r8, r3 + 80016d0: 60bb str r3, [r7, #8] + 80016d2: 462b mov r3, r5 + 80016d4: eb49 0303 adc.w r3, r9, r3 + 80016d8: 60fb str r3, [r7, #12] + 80016da: f04f 0200 mov.w r2, #0 + 80016de: f04f 0300 mov.w r3, #0 + 80016e2: e9d7 4502 ldrd r4, r5, [r7, #8] + 80016e6: 4629 mov r1, r5 + 80016e8: 024b lsls r3, r1, #9 + 80016ea: 4621 mov r1, r4 + 80016ec: ea43 53d1 orr.w r3, r3, r1, lsr #23 + 80016f0: 4621 mov r1, r4 + 80016f2: 024a lsls r2, r1, #9 + 80016f4: 4610 mov r0, r2 + 80016f6: 4619 mov r1, r3 + 80016f8: 6c7b ldr r3, [r7, #68] @ 0x44 + 80016fa: 2200 movs r2, #0 + 80016fc: 62bb str r3, [r7, #40] @ 0x28 + 80016fe: 62fa str r2, [r7, #44] @ 0x2c + 8001700: e9d7 230a ldrd r2, r3, [r7, #40] @ 0x28 + 8001704: f7fe fd72 bl 80001ec <__aeabi_uldivmod> + 8001708: 4602 mov r2, r0 + 800170a: 460b mov r3, r1 + 800170c: 4613 mov r3, r2 + 800170e: 64fb str r3, [r7, #76] @ 0x4c + 8001710: e058 b.n 80017c4 + } + else + { + /* HSI used as PLL clock source */ + pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); + 8001712: 4b38 ldr r3, [pc, #224] @ (80017f4 ) + 8001714: 685b ldr r3, [r3, #4] + 8001716: 099b lsrs r3, r3, #6 + 8001718: 2200 movs r2, #0 + 800171a: 4618 mov r0, r3 + 800171c: 4611 mov r1, r2 + 800171e: f3c0 0308 ubfx r3, r0, #0, #9 + 8001722: 623b str r3, [r7, #32] + 8001724: 2300 movs r3, #0 + 8001726: 627b str r3, [r7, #36] @ 0x24 + 8001728: e9d7 8908 ldrd r8, r9, [r7, #32] + 800172c: 4642 mov r2, r8 + 800172e: 464b mov r3, r9 + 8001730: f04f 0000 mov.w r0, #0 + 8001734: f04f 0100 mov.w r1, #0 + 8001738: 0159 lsls r1, r3, #5 + 800173a: ea41 61d2 orr.w r1, r1, r2, lsr #27 + 800173e: 0150 lsls r0, r2, #5 + 8001740: 4602 mov r2, r0 + 8001742: 460b mov r3, r1 + 8001744: 4641 mov r1, r8 + 8001746: ebb2 0a01 subs.w sl, r2, r1 + 800174a: 4649 mov r1, r9 + 800174c: eb63 0b01 sbc.w fp, r3, r1 + 8001750: f04f 0200 mov.w r2, #0 + 8001754: f04f 0300 mov.w r3, #0 + 8001758: ea4f 138b mov.w r3, fp, lsl #6 + 800175c: ea43 639a orr.w r3, r3, sl, lsr #26 + 8001760: ea4f 128a mov.w r2, sl, lsl #6 + 8001764: ebb2 040a subs.w r4, r2, sl + 8001768: eb63 050b sbc.w r5, r3, fp + 800176c: f04f 0200 mov.w r2, #0 + 8001770: f04f 0300 mov.w r3, #0 + 8001774: 00eb lsls r3, r5, #3 + 8001776: ea43 7354 orr.w r3, r3, r4, lsr #29 + 800177a: 00e2 lsls r2, r4, #3 + 800177c: 4614 mov r4, r2 + 800177e: 461d mov r5, r3 + 8001780: 4643 mov r3, r8 + 8001782: 18e3 adds r3, r4, r3 + 8001784: 603b str r3, [r7, #0] + 8001786: 464b mov r3, r9 + 8001788: eb45 0303 adc.w r3, r5, r3 + 800178c: 607b str r3, [r7, #4] + 800178e: f04f 0200 mov.w r2, #0 + 8001792: f04f 0300 mov.w r3, #0 + 8001796: e9d7 4500 ldrd r4, r5, [r7] + 800179a: 4629 mov r1, r5 + 800179c: 028b lsls r3, r1, #10 + 800179e: 4621 mov r1, r4 + 80017a0: ea43 5391 orr.w r3, r3, r1, lsr #22 + 80017a4: 4621 mov r1, r4 + 80017a6: 028a lsls r2, r1, #10 + 80017a8: 4610 mov r0, r2 + 80017aa: 4619 mov r1, r3 + 80017ac: 6c7b ldr r3, [r7, #68] @ 0x44 + 80017ae: 2200 movs r2, #0 + 80017b0: 61bb str r3, [r7, #24] + 80017b2: 61fa str r2, [r7, #28] + 80017b4: e9d7 2306 ldrd r2, r3, [r7, #24] + 80017b8: f7fe fd18 bl 80001ec <__aeabi_uldivmod> + 80017bc: 4602 mov r2, r0 + 80017be: 460b mov r3, r1 + 80017c0: 4613 mov r3, r2 + 80017c2: 64fb str r3, [r7, #76] @ 0x4c + } + pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) * 2U); + 80017c4: 4b0b ldr r3, [pc, #44] @ (80017f4 ) + 80017c6: 685b ldr r3, [r3, #4] + 80017c8: 0c1b lsrs r3, r3, #16 + 80017ca: f003 0303 and.w r3, r3, #3 + 80017ce: 3301 adds r3, #1 + 80017d0: 005b lsls r3, r3, #1 + 80017d2: 643b str r3, [r7, #64] @ 0x40 + + sysclockfreq = pllvco / pllp; + 80017d4: 6cfa ldr r2, [r7, #76] @ 0x4c + 80017d6: 6c3b ldr r3, [r7, #64] @ 0x40 + 80017d8: fbb2 f3f3 udiv r3, r2, r3 + 80017dc: 64bb str r3, [r7, #72] @ 0x48 + break; + 80017de: e002 b.n 80017e6 + } + default: + { + sysclockfreq = HSI_VALUE; + 80017e0: 4b05 ldr r3, [pc, #20] @ (80017f8 ) + 80017e2: 64bb str r3, [r7, #72] @ 0x48 + break; + 80017e4: bf00 nop + } + } + return sysclockfreq; + 80017e6: 6cbb ldr r3, [r7, #72] @ 0x48 +} + 80017e8: 4618 mov r0, r3 + 80017ea: 3750 adds r7, #80 @ 0x50 + 80017ec: 46bd mov sp, r7 + 80017ee: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} + 80017f2: bf00 nop + 80017f4: 40023800 .word 0x40023800 + 80017f8: 00f42400 .word 0x00f42400 + 80017fc: 007a1200 .word 0x007a1200 + +08001800 : + 8001800: 4402 add r2, r0 + 8001802: 4603 mov r3, r0 + 8001804: 4293 cmp r3, r2 + 8001806: d100 bne.n 800180a + 8001808: 4770 bx lr + 800180a: f803 1b01 strb.w r1, [r3], #1 + 800180e: e7f9 b.n 8001804 + +08001810 <__libc_init_array>: + 8001810: b570 push {r4, r5, r6, lr} + 8001812: 4b0d ldr r3, [pc, #52] @ (8001848 <__libc_init_array+0x38>) + 8001814: 4d0d ldr r5, [pc, #52] @ (800184c <__libc_init_array+0x3c>) + 8001816: 1b5b subs r3, r3, r5 + 8001818: 109c asrs r4, r3, #2 + 800181a: 2600 movs r6, #0 + 800181c: 42a6 cmp r6, r4 + 800181e: d109 bne.n 8001834 <__libc_init_array+0x24> + 8001820: f000 f81a bl 8001858 <_init> + 8001824: 4d0a ldr r5, [pc, #40] @ (8001850 <__libc_init_array+0x40>) + 8001826: 4b0b ldr r3, [pc, #44] @ (8001854 <__libc_init_array+0x44>) + 8001828: 1b5b subs r3, r3, r5 + 800182a: 109c asrs r4, r3, #2 + 800182c: 2600 movs r6, #0 + 800182e: 42a6 cmp r6, r4 + 8001830: d105 bne.n 800183e <__libc_init_array+0x2e> + 8001832: bd70 pop {r4, r5, r6, pc} + 8001834: f855 3b04 ldr.w r3, [r5], #4 + 8001838: 4798 blx r3 + 800183a: 3601 adds r6, #1 + 800183c: e7ee b.n 800181c <__libc_init_array+0xc> + 800183e: f855 3b04 ldr.w r3, [r5], #4 + 8001842: 4798 blx r3 + 8001844: 3601 adds r6, #1 + 8001846: e7f2 b.n 800182e <__libc_init_array+0x1e> + 8001848: 08001888 .word 0x08001888 + 800184c: 08001888 .word 0x08001888 + 8001850: 08001888 .word 0x08001888 + 8001854: 0800188c .word 0x0800188c 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/home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-sbrkr.o) + .data 0x00000000 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-sbrkr.o) + .bss 0x00000000 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-sbrkr.o) + .text._sbrk_r 0x00000000 0x20 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-sbrkr.o) + .debug_frame 0x00000000 0x2c /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-sbrkr.o) + .ARM.attributes + 0x00000000 0x34 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-sbrkr.o) + .data 0x00000000 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) + .bss 0x00000000 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) + .data 0x00000000 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + .bss 0x00000000 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + .ARM.extab 0x00000000 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + .data 0x00000000 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) + .bss 0x00000000 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) + .text 0x00000000 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtend.o + .data 0x00000000 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtend.o + .bss 0x00000000 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtend.o + .rodata 0x00000000 0x24 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtend.o + .eh_frame 0x00000000 0x4 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtend.o + .ARM.attributes + 0x00000000 0x34 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtend.o + .text 0x00000000 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtn.o + .data 0x00000000 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtn.o + .bss 0x00000000 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtn.o + +Memory Configuration + +Name Origin Length Attributes +CCMRAM 0x10000000 0x00010000 xrw +RAM 0x20000000 0x00030000 xrw +FLASH 0x08000000 0x00200000 xr +*default* 0x00000000 0xffffffff + +Linker script and memory map + +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crti.o +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtbegin.o +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o +LOAD ./Core/Src/main.o +LOAD ./Core/Src/stm32f4xx_hal_msp.o +LOAD ./Core/Src/stm32f4xx_it.o +LOAD ./Core/Src/syscalls.o +LOAD ./Core/Src/sysmem.o +LOAD ./Core/Src/system_stm32f4xx.o +LOAD ./Core/Startup/startup_stm32f429zitx.o +LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o +LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o +LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o +LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o +LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o +LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o +LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o +LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o +LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o +LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o +LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o +LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o +LOAD ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o +START GROUP +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libm.a +END GROUP +START GROUP +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a +END GROUP +START GROUP +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libnosys.a +END GROUP +START GROUP +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libnosys.a +END GROUP +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtend.o +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtn.o + 0x20030000 _estack = (ORIGIN (RAM) + LENGTH (RAM)) + 0x00000200 _Min_Heap_Size = 0x200 + 0x00000400 _Min_Stack_Size = 0x400 + +.isr_vector 0x08000000 0x1ac + 0x08000000 . = ALIGN (0x4) + *(.isr_vector) + .isr_vector 0x08000000 0x1ac ./Core/Startup/startup_stm32f429zitx.o + 0x08000000 g_pfnVectors + 0x080001ac . = ALIGN (0x4) + +.text 0x080001ac 0x16c4 + 0x080001ac . = ALIGN (0x4) + *(.text) + .text 0x080001ac 0x40 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtbegin.o + .text 0x080001ec 0x30 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) + 0x080001ec __aeabi_uldivmod + .text 0x0800021c 0x2f8 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + 0x0800021c __udivmoddi4 + .text 0x08000514 0x4 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) + 0x08000514 __aeabi_ldiv0 + 0x08000514 __aeabi_idiv0 + *(.text*) + .text.main 0x08000518 0x18 ./Core/Src/main.o + 0x08000518 main + .text.SystemClock_Config + 0x08000530 0xd8 ./Core/Src/main.o + 0x08000530 SystemClock_Config + .text.MX_NVIC_Init + 0x08000608 0x18 ./Core/Src/main.o + .text.MX_GPIO_Init + 0x08000620 0xc4 ./Core/Src/main.o + .text.HAL_GPIO_EXTI_Callback + 0x080006e4 0x50 ./Core/Src/main.o + 0x080006e4 HAL_GPIO_EXTI_Callback + .text.Error_Handler + 0x08000734 0xc ./Core/Src/main.o + 0x08000734 Error_Handler + .text.HAL_MspInit + 0x08000740 0x50 ./Core/Src/stm32f4xx_hal_msp.o + 0x08000740 HAL_MspInit + .text.NMI_Handler + 0x08000790 0x8 ./Core/Src/stm32f4xx_it.o + 0x08000790 NMI_Handler + .text.HardFault_Handler + 0x08000798 0x8 ./Core/Src/stm32f4xx_it.o + 0x08000798 HardFault_Handler + .text.MemManage_Handler + 0x080007a0 0x8 ./Core/Src/stm32f4xx_it.o + 0x080007a0 MemManage_Handler + .text.BusFault_Handler + 0x080007a8 0x8 ./Core/Src/stm32f4xx_it.o + 0x080007a8 BusFault_Handler + .text.UsageFault_Handler + 0x080007b0 0x8 ./Core/Src/stm32f4xx_it.o + 0x080007b0 UsageFault_Handler + .text.SVC_Handler + 0x080007b8 0xe ./Core/Src/stm32f4xx_it.o + 0x080007b8 SVC_Handler + .text.DebugMon_Handler + 0x080007c6 0xe ./Core/Src/stm32f4xx_it.o + 0x080007c6 DebugMon_Handler + .text.PendSV_Handler + 0x080007d4 0xe ./Core/Src/stm32f4xx_it.o + 0x080007d4 PendSV_Handler + .text.SysTick_Handler + 0x080007e2 0xc ./Core/Src/stm32f4xx_it.o + 0x080007e2 SysTick_Handler + .text.EXTI0_IRQHandler + 0x080007ee 0xe ./Core/Src/stm32f4xx_it.o + 0x080007ee EXTI0_IRQHandler + .text.SystemInit + 0x080007fc 0x24 ./Core/Src/system_stm32f4xx.o + 0x080007fc SystemInit + .text.Reset_Handler + 0x08000820 0x50 ./Core/Startup/startup_stm32f429zitx.o + 0x08000820 Reset_Handler + .text.Default_Handler + 0x08000870 0x2 ./Core/Startup/startup_stm32f429zitx.o + 0x08000870 RTC_Alarm_IRQHandler + 0x08000870 HASH_RNG_IRQHandler + 0x08000870 EXTI2_IRQHandler + 0x08000870 TIM8_CC_IRQHandler + 0x08000870 UART8_IRQHandler + 0x08000870 SPI4_IRQHandler + 0x08000870 TIM1_CC_IRQHandler + 0x08000870 DMA2_Stream5_IRQHandler + 0x08000870 DMA1_Stream5_IRQHandler + 0x08000870 PVD_IRQHandler + 0x08000870 SDIO_IRQHandler + 0x08000870 TAMP_STAMP_IRQHandler + 0x08000870 CAN2_RX1_IRQHandler + 0x08000870 EXTI3_IRQHandler + 0x08000870 TIM8_TRG_COM_TIM14_IRQHandler + 0x08000870 TIM1_UP_TIM10_IRQHandler + 0x08000870 TIM8_UP_TIM13_IRQHandler + 0x08000870 I2C3_ER_IRQHandler + 0x08000870 I2C2_EV_IRQHandler + 0x08000870 DMA1_Stream2_IRQHandler + 0x08000870 CAN1_RX0_IRQHandler + 0x08000870 FPU_IRQHandler + 0x08000870 OTG_HS_WKUP_IRQHandler + 0x08000870 LTDC_ER_IRQHandler + 0x08000870 CAN2_SCE_IRQHandler + 0x08000870 DMA2_Stream2_IRQHandler + 0x08000870 SPI1_IRQHandler + 0x08000870 TIM6_DAC_IRQHandler + 0x08000870 TIM1_BRK_TIM9_IRQHandler + 0x08000870 DCMI_IRQHandler + 0x08000870 CAN2_RX0_IRQHandler + 0x08000870 DMA2_Stream3_IRQHandler + 0x08000870 USART6_IRQHandler + 0x08000870 USART3_IRQHandler + 0x08000870 CAN1_RX1_IRQHandler + 0x08000870 UART5_IRQHandler + 0x08000870 DMA2_Stream0_IRQHandler + 0x08000870 TIM4_IRQHandler + 0x08000870 I2C1_EV_IRQHandler + 0x08000870 DMA1_Stream6_IRQHandler + 0x08000870 DMA1_Stream1_IRQHandler + 0x08000870 UART4_IRQHandler + 0x08000870 TIM3_IRQHandler + 0x08000870 RCC_IRQHandler + 0x08000870 TIM8_BRK_TIM12_IRQHandler + 0x08000870 Default_Handler + 0x08000870 EXTI15_10_IRQHandler + 0x08000870 ADC_IRQHandler + 0x08000870 DMA1_Stream7_IRQHandler + 0x08000870 SPI5_IRQHandler + 0x08000870 TIM7_IRQHandler + 0x08000870 CAN2_TX_IRQHandler + 0x08000870 TIM5_IRQHandler + 0x08000870 DMA2_Stream7_IRQHandler + 0x08000870 I2C3_EV_IRQHandler + 0x08000870 EXTI9_5_IRQHandler + 0x08000870 RTC_WKUP_IRQHandler + 0x08000870 LTDC_IRQHandler + 0x08000870 ETH_WKUP_IRQHandler + 0x08000870 SPI2_IRQHandler + 0x08000870 OTG_HS_EP1_IN_IRQHandler + 0x08000870 DMA1_Stream0_IRQHandler + 0x08000870 CAN1_TX_IRQHandler + 0x08000870 EXTI4_IRQHandler + 0x08000870 ETH_IRQHandler + 0x08000870 OTG_HS_EP1_OUT_IRQHandler + 0x08000870 WWDG_IRQHandler + 0x08000870 SPI6_IRQHandler + 0x08000870 TIM2_IRQHandler + 0x08000870 OTG_FS_WKUP_IRQHandler + 0x08000870 TIM1_TRG_COM_TIM11_IRQHandler + 0x08000870 OTG_HS_IRQHandler + 0x08000870 DMA2D_IRQHandler + 0x08000870 EXTI1_IRQHandler + 0x08000870 UART7_IRQHandler + 0x08000870 USART2_IRQHandler + 0x08000870 I2C2_ER_IRQHandler + 0x08000870 DMA2_Stream1_IRQHandler + 0x08000870 CAN1_SCE_IRQHandler + 0x08000870 FLASH_IRQHandler + 0x08000870 DMA2_Stream4_IRQHandler + 0x08000870 USART1_IRQHandler + 0x08000870 OTG_FS_IRQHandler + 0x08000870 SPI3_IRQHandler + 0x08000870 DMA1_Stream4_IRQHandler + 0x08000870 I2C1_ER_IRQHandler + 0x08000870 FMC_IRQHandler + 0x08000870 DMA2_Stream6_IRQHandler + 0x08000870 SAI1_IRQHandler + 0x08000870 DMA1_Stream3_IRQHandler + *fill* 0x08000872 0x2 + .text.HAL_Init + 0x08000874 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x08000874 HAL_Init + .text.HAL_InitTick + 0x080008b8 0x60 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x080008b8 HAL_InitTick + .text.HAL_IncTick + 0x08000918 0x28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x08000918 HAL_IncTick + .text.HAL_GetTick + 0x08000940 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x08000940 HAL_GetTick + .text.__NVIC_SetPriorityGrouping + 0x08000958 0x48 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .text.__NVIC_GetPriorityGrouping + 0x080009a0 0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .text.__NVIC_EnableIRQ + 0x080009bc 0x3c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .text.__NVIC_SetPriority + 0x080009f8 0x54 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .text.NVIC_EncodePriority + 0x08000a4c 0x66 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + *fill* 0x08000ab2 0x2 + .text.SysTick_Config + 0x08000ab4 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .text.HAL_NVIC_SetPriorityGrouping + 0x08000af8 0x16 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x08000af8 HAL_NVIC_SetPriorityGrouping + .text.HAL_NVIC_SetPriority + 0x08000b0e 0x38 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x08000b0e HAL_NVIC_SetPriority + .text.HAL_NVIC_EnableIRQ + 0x08000b46 0x1c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x08000b46 HAL_NVIC_EnableIRQ + .text.HAL_SYSTICK_Config + 0x08000b62 0x18 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + 0x08000b62 HAL_SYSTICK_Config + *fill* 0x08000b7a 0x2 + .text.HAL_GPIO_Init + 0x08000b7c 0x358 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x08000b7c HAL_GPIO_Init + .text.HAL_GPIO_WritePin + 0x08000ed4 0x32 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x08000ed4 HAL_GPIO_WritePin + *fill* 0x08000f06 0x2 + .text.HAL_GPIO_EXTI_IRQHandler + 0x08000f08 0x30 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + 0x08000f08 HAL_GPIO_EXTI_IRQHandler + .text.HAL_RCC_OscConfig + 0x08000f38 0x4f0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x08000f38 HAL_RCC_OscConfig + .text.HAL_RCC_ClockConfig + 0x08001428 0x1cc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x08001428 HAL_RCC_ClockConfig + .text.HAL_RCC_GetSysClockFreq + 0x080015f4 0x20c ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + 0x080015f4 HAL_RCC_GetSysClockFreq + .text.memset 0x08001800 0x10 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) + 0x08001800 memset + .text.__libc_init_array + 0x08001810 0x48 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) + 0x08001810 __libc_init_array + *(.glue_7) + .glue_7 0x08001858 0x0 linker stubs + *(.glue_7t) + .glue_7t 0x08001858 0x0 linker stubs + *(.eh_frame) + .eh_frame 0x08001858 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtbegin.o + *(.init) + .init 0x08001858 0x4 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crti.o + 0x08001858 _init + .init 0x0800185c 0x8 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtn.o + *(.fini) + .fini 0x08001864 0x4 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crti.o + 0x08001864 _fini + .fini 0x08001868 0x8 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtn.o + 0x08001870 . = ALIGN (0x4) + 0x08001870 _etext = . + +.vfp11_veneer 0x08001870 0x0 + .vfp11_veneer 0x08001870 0x0 linker stubs + +.v4_bx 0x08001870 0x0 + .v4_bx 0x08001870 0x0 linker stubs + +.iplt 0x08001870 0x0 + .iplt 0x08001870 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtbegin.o + +.rodata 0x08001870 0x10 + 0x08001870 . = ALIGN (0x4) + *(.rodata) + *(.rodata*) + .rodata.AHBPrescTable + 0x08001870 0x10 ./Core/Src/system_stm32f4xx.o + 0x08001870 AHBPrescTable + 0x08001880 . = ALIGN (0x4) + +.ARM.extab 0x08001880 0x0 + 0x08001880 . = ALIGN (0x4) + *(.ARM.extab* .gnu.linkonce.armextab.*) + 0x08001880 . = ALIGN (0x4) + +.ARM 0x08001880 0x8 + 0x08001880 . = ALIGN (0x4) + 0x08001880 __exidx_start = . + *(.ARM.exidx*) + .ARM.exidx 0x08001880 0x8 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + 0x08001888 __exidx_end = . + 0x08001888 . = ALIGN (0x4) + +.preinit_array 0x08001888 0x0 + 0x08001888 . = ALIGN (0x4) + 0x08001888 PROVIDE (__preinit_array_start = .) + *(.preinit_array*) + 0x08001888 PROVIDE (__preinit_array_end = .) + 0x08001888 . = ALIGN (0x4) + +.init_array 0x08001888 0x4 + 0x08001888 . = ALIGN (0x4) + 0x08001888 PROVIDE (__init_array_start = .) + *(SORT_BY_NAME(.init_array.*)) + *(.init_array*) + .init_array 0x08001888 0x4 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x0800188c PROVIDE (__init_array_end = .) + 0x0800188c . = ALIGN (0x4) + +.fini_array 0x0800188c 0x4 + 0x0800188c . = ALIGN (0x4) + [!provide] PROVIDE (__fini_array_start = .) + *(SORT_BY_NAME(.fini_array.*)) + *(.fini_array*) + .fini_array 0x0800188c 0x4 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtbegin.o + [!provide] PROVIDE (__fini_array_end = .) + 0x08001890 . = ALIGN (0x4) + 0x08001890 _sidata = LOADADDR (.data) + +.rel.dyn 0x08001890 0x0 + .rel.iplt 0x08001890 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtbegin.o + +.data 0x20000000 0xc load address 0x08001890 + 0x20000000 . = ALIGN (0x4) + 0x20000000 _sdata = . + *(.data) + *(.data*) + .data.SystemCoreClock + 0x20000000 0x4 ./Core/Src/system_stm32f4xx.o + 0x20000000 SystemCoreClock + .data.uwTickPrio + 0x20000004 0x4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x20000004 uwTickPrio + .data.uwTickFreq + 0x20000008 0x1 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x20000008 uwTickFreq + *(.RamFunc) + *(.RamFunc*) + 0x2000000c . = ALIGN (0x4) + *fill* 0x20000009 0x3 + 0x2000000c _edata = . + 0x0800189c _siccmram = LOADADDR (.ccmram) + +.igot.plt 0x2000000c 0x0 load address 0x0800189c + .igot.plt 0x2000000c 0x0 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtbegin.o + +.ccmram 0x10000000 0x0 load address 0x0800189c + 0x10000000 . = ALIGN (0x4) + 0x10000000 _sccmram = . + *(.ccmram) + *(.ccmram*) + 0x10000000 . = ALIGN (0x4) + 0x10000000 _eccmram = . + 0x10000000 . = ALIGN (0x4) + +.bss 0x2000000c 0x24 + 0x2000000c _sbss = . + 0x2000000c __bss_start__ = _sbss + *(.bss) + .bss 0x2000000c 0x1c /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtbegin.o + *(.bss*) + .bss.on 0x20000028 0x4 ./Core/Src/main.o + 0x20000028 on + .bss.uwTick 0x2000002c 0x4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + 0x2000002c uwTick + *(COMMON) + 0x20000030 . = ALIGN (0x4) + 0x20000030 _ebss = . + 0x20000030 __bss_end__ = _ebss + +._user_heap_stack + 0x20000030 0x600 + 0x20000030 . = ALIGN (0x8) + [!provide] PROVIDE (end = .) + 0x20000030 PROVIDE (_end = .) + 0x20000230 . = (. + _Min_Heap_Size) + *fill* 0x20000030 0x200 + 0x20000630 . = (. + _Min_Stack_Size) + *fill* 0x20000230 0x400 + 0x20000630 . = ALIGN (0x8) + +/DISCARD/ + libc.a(*) + libm.a(*) + libgcc.a(*) + +.ARM.attributes + 0x00000000 0x30 + *(.ARM.attributes) + .ARM.attributes + 0x00000000 0x22 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crti.o + .ARM.attributes + 0x00000022 0x34 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtbegin.o + .ARM.attributes + 0x00000056 0x34 ./Core/Src/main.o + .ARM.attributes + 0x0000008a 0x34 ./Core/Src/stm32f4xx_hal_msp.o + .ARM.attributes + 0x000000be 0x34 ./Core/Src/stm32f4xx_it.o + .ARM.attributes + 0x000000f2 0x34 ./Core/Src/system_stm32f4xx.o + .ARM.attributes + 0x00000126 0x21 ./Core/Startup/startup_stm32f429zitx.o + .ARM.attributes + 0x00000147 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .ARM.attributes + 0x0000017b 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .ARM.attributes + 0x000001af 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .ARM.attributes + 0x000001e3 0x34 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .ARM.attributes + 0x00000217 0x34 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) + .ARM.attributes + 0x0000024b 0x34 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) + .ARM.attributes + 0x0000027f 0x22 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) + .ARM.attributes + 0x000002a1 0x34 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + .ARM.attributes + 0x000002d5 0x22 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_dvmd_tls.o) + .ARM.attributes + 0x000002f7 0x22 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/crtn.o +OUTPUT(lab1_test_project.elf elf32-littlearm) +LOAD linker stubs +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libm.a +LOAD /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a + +.debug_info 0x00000000 0x39c7 + .debug_info 0x00000000 0x96c ./Core/Src/main.o + .debug_info 0x0000096c 0x281 ./Core/Src/stm32f4xx_hal_msp.o + .debug_info 0x00000bed 0x14a ./Core/Src/stm32f4xx_it.o + .debug_info 0x00000d37 0x52e ./Core/Src/system_stm32f4xx.o + .debug_info 0x00001265 0x30 ./Core/Startup/startup_stm32f429zitx.o + .debug_info 0x00001295 0x9ba ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_info 0x00001c4f 0xdc2 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_info 0x00002a11 0x6db ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_info 0x000030ec 0x8db ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + +.debug_abbrev 0x00000000 0xecb + .debug_abbrev 0x00000000 0x259 ./Core/Src/main.o + .debug_abbrev 0x00000259 0xd8 ./Core/Src/stm32f4xx_hal_msp.o + .debug_abbrev 0x00000331 0xa0 ./Core/Src/stm32f4xx_it.o + .debug_abbrev 0x000003d1 0x11a ./Core/Src/system_stm32f4xx.o + .debug_abbrev 0x000004eb 0x24 ./Core/Startup/startup_stm32f429zitx.o + .debug_abbrev 0x0000050f 0x214 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_abbrev 0x00000723 0x31d ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_abbrev 0x00000a40 0x1d4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_abbrev 0x00000c14 0x2b7 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + +.debug_aranges 0x00000000 0x430 + .debug_aranges + 0x00000000 0x48 ./Core/Src/main.o + .debug_aranges + 0x00000048 0x20 ./Core/Src/stm32f4xx_hal_msp.o + .debug_aranges + 0x00000068 0x68 ./Core/Src/stm32f4xx_it.o + .debug_aranges + 0x000000d0 0x28 ./Core/Src/system_stm32f4xx.o + .debug_aranges + 0x000000f8 0x28 ./Core/Startup/startup_stm32f429zitx.o + .debug_aranges + 0x00000120 0x100 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_aranges + 0x00000220 0x130 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_aranges + 0x00000350 0x58 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_aranges + 0x000003a8 0x88 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + +.debug_rnglists + 0x00000000 0x302 + .debug_rnglists + 0x00000000 0x33 ./Core/Src/main.o + .debug_rnglists + 0x00000033 0x13 ./Core/Src/stm32f4xx_hal_msp.o + .debug_rnglists + 0x00000046 0x49 ./Core/Src/stm32f4xx_it.o + .debug_rnglists + 0x0000008f 0x1a ./Core/Src/system_stm32f4xx.o + .debug_rnglists + 0x000000a9 0x19 ./Core/Startup/startup_stm32f429zitx.o + .debug_rnglists + 0x000000c2 0xbb ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_rnglists + 0x0000017d 0xe0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_rnglists + 0x0000025d 0x3f ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_rnglists + 0x0000029c 0x66 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + +.debug_macro 0x00000000 0x215be + .debug_macro 0x00000000 0x1bf ./Core/Src/main.o + .debug_macro 0x000001bf 0xad8 ./Core/Src/main.o + .debug_macro 0x00000c97 0x28f ./Core/Src/main.o + .debug_macro 0x00000f26 0x2e ./Core/Src/main.o + .debug_macro 0x00000f54 0x28 ./Core/Src/main.o + .debug_macro 0x00000f7c 0x22 ./Core/Src/main.o + .debug_macro 0x00000f9e 0x8e ./Core/Src/main.o + .debug_macro 0x0000102c 0x51 ./Core/Src/main.o + .debug_macro 0x0000107d 0x103 ./Core/Src/main.o + .debug_macro 0x00001180 0x6a ./Core/Src/main.o + .debug_macro 0x000011ea 0x1df ./Core/Src/main.o + .debug_macro 0x000013c9 0x1c ./Core/Src/main.o + .debug_macro 0x000013e5 0x22 ./Core/Src/main.o + .debug_macro 0x00001407 0xfb ./Core/Src/main.o + .debug_macro 0x00001502 0x1011 ./Core/Src/main.o + .debug_macro 0x00002513 0x11f ./Core/Src/main.o + .debug_macro 0x00002632 0x17ff1 ./Core/Src/main.o + .debug_macro 0x0001a623 0x6d ./Core/Src/main.o + .debug_macro 0x0001a690 0x370a ./Core/Src/main.o + .debug_macro 0x0001dd9a 0x190 ./Core/Src/main.o + .debug_macro 0x0001df2a 0x5c ./Core/Src/main.o + .debug_macro 0x0001df86 0xcba ./Core/Src/main.o + .debug_macro 0x0001ec40 0x9e9 ./Core/Src/main.o + .debug_macro 0x0001f629 0x115 ./Core/Src/main.o + .debug_macro 0x0001f73e 0x156 ./Core/Src/main.o + .debug_macro 0x0001f894 0xa5 ./Core/Src/main.o + .debug_macro 0x0001f939 0x182 ./Core/Src/main.o + .debug_macro 0x0001fabb 0x287 ./Core/Src/main.o + .debug_macro 0x0001fd42 0x5f ./Core/Src/main.o + .debug_macro 0x0001fda1 0x236 ./Core/Src/main.o + .debug_macro 0x0001ffd7 0x132 ./Core/Src/main.o + .debug_macro 0x00020109 0x41d ./Core/Src/main.o + .debug_macro 0x00020526 0x2e ./Core/Src/main.o + .debug_macro 0x00020554 0x127 ./Core/Src/main.o + .debug_macro 0x0002067b 0xe2 ./Core/Src/main.o + .debug_macro 0x0002075d 0x89 ./Core/Src/main.o + .debug_macro 0x000207e6 0x134 ./Core/Src/main.o + .debug_macro 0x0002091a 0x22 ./Core/Src/main.o + .debug_macro 0x0002093c 0x1bf ./Core/Src/stm32f4xx_hal_msp.o + .debug_macro 0x00020afb 0x1c9 ./Core/Src/stm32f4xx_it.o + .debug_macro 0x00020cc4 0x1b0 ./Core/Src/system_stm32f4xx.o + .debug_macro 0x00020e74 0x210 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_macro 0x00021084 0x1b0 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_macro 0x00021234 0x1b6 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_macro 0x000213ea 0x1d4 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + +.debug_line 0x00000000 0x4a35 + .debug_line 0x00000000 0x757 ./Core/Src/main.o + .debug_line 0x00000757 0x666 ./Core/Src/stm32f4xx_hal_msp.o + .debug_line 0x00000dbd 0x72d ./Core/Src/stm32f4xx_it.o + .debug_line 0x000014ea 0x6dc ./Core/Src/system_stm32f4xx.o + .debug_line 0x00001bc6 0x7a ./Core/Startup/startup_stm32f429zitx.o + .debug_line 0x00001c40 0x991 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_line 0x000025d1 0xc28 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_line 0x000031f9 0xad5 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_line 0x00003cce 0xd67 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + +.debug_str 0x00000000 0xcb530 + .debug_str 0x00000000 0xcb530 ./Core/Src/main.o + 0xca883 (size before relaxing) + .debug_str 0x000cb530 0xca04c ./Core/Src/stm32f4xx_hal_msp.o + .debug_str 0x000cb530 0xc9ffd ./Core/Src/stm32f4xx_it.o + .debug_str 0x000cb530 0xca099 ./Core/Src/system_stm32f4xx.o + .debug_str 0x000cb530 0x7e ./Core/Startup/startup_stm32f429zitx.o + .debug_str 0x000cb530 0xcacbc ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_str 0x000cb530 0xca9ea ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_str 0x000cb530 0xca214 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_str 0x000cb530 0xca4cd ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + +.comment 0x00000000 0x43 + .comment 0x00000000 0x43 ./Core/Src/main.o + 0x44 (size before relaxing) + .comment 0x00000043 0x44 ./Core/Src/stm32f4xx_hal_msp.o + .comment 0x00000043 0x44 ./Core/Src/stm32f4xx_it.o + .comment 0x00000043 0x44 ./Core/Src/system_stm32f4xx.o + .comment 0x00000043 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .comment 0x00000043 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .comment 0x00000043 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .comment 0x00000043 0x44 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + +.debug_frame 0x00000000 0xe24 + .debug_frame 0x00000000 0xcc ./Core/Src/main.o + .debug_frame 0x000000cc 0x34 ./Core/Src/stm32f4xx_hal_msp.o + .debug_frame 0x00000100 0x114 ./Core/Src/stm32f4xx_it.o + .debug_frame 0x00000214 0x50 ./Core/Src/system_stm32f4xx.o + .debug_frame 0x00000264 0x354 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o + .debug_frame 0x000005b8 0x4b8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o + .debug_frame 0x00000a70 0x130 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o + .debug_frame 0x00000ba0 0x1d8 ./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o + .debug_frame 0x00000d78 0x20 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-memset.o) + .debug_frame 0x00000d98 0x2c /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o) + .debug_frame 0x00000dc4 0x2c /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) + .debug_frame 0x00000df0 0x34 /home/scott/st/stm32cubeide_1.19.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.linux64_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + +.debug_line_str + 0x00000000 0x62 + .debug_line_str + 0x00000000 0x62 ./Core/Startup/startup_stm32f429zitx.o diff --git a/Debug/makefile b/Debug/makefile new file mode 100644 index 0000000..1fdf657 --- /dev/null +++ b/Debug/makefile @@ -0,0 +1,94 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (14.3.rel1) +################################################################################ + +-include ../makefile.init + +RM := rm -rf + +# All of the sources participating in the build are defined here +-include sources.mk +-include Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk +-include Core/Startup/subdir.mk +-include Core/Src/subdir.mk +-include objects.mk + +ifneq ($(MAKECMDGOALS),clean) +ifneq ($(strip $(S_DEPS)),) +-include $(S_DEPS) +endif +ifneq ($(strip $(S_UPPER_DEPS)),) +-include $(S_UPPER_DEPS) +endif +ifneq ($(strip $(C_DEPS)),) +-include $(C_DEPS) +endif +endif + +-include ../makefile.defs + +OPTIONAL_TOOL_DEPS := \ +$(wildcard ../makefile.defs) \ +$(wildcard ../makefile.init) \ +$(wildcard ../makefile.targets) \ + + +BUILD_ARTIFACT_NAME := lab1_test_project +BUILD_ARTIFACT_EXTENSION := elf +BUILD_ARTIFACT_PREFIX := +BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME)$(if $(BUILD_ARTIFACT_EXTENSION),.$(BUILD_ARTIFACT_EXTENSION),) + +# Add inputs and outputs from these tool invocations to the build variables +EXECUTABLES += \ +lab1_test_project.elf \ + +MAP_FILES += \ +lab1_test_project.map \ + +SIZE_OUTPUT += \ +default.size.stdout \ + +OBJDUMP_LIST += \ +lab1_test_project.list \ + + +# All Target +all: main-build + +# Main-build Target +main-build: lab1_test_project.elf secondary-outputs + +# Tool invocations +lab1_test_project.elf lab1_test_project.map: $(OBJS) $(USER_OBJS) /home/scott/Documents/class\ notes/lab1_test_project/STM32F429ZITX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-gcc -o "lab1_test_project.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"/home/scott/Documents/class notes/lab1_test_project/STM32F429ZITX_FLASH.ld" --specs=nosys.specs -Wl,-Map="lab1_test_project.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group + @echo 'Finished building target: $@' + @echo ' ' + +default.size.stdout: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-size $(EXECUTABLES) + @echo 'Finished building: $@' + @echo ' ' + +lab1_test_project.list: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS) + arm-none-eabi-objdump -h -S $(EXECUTABLES) > "lab1_test_project.list" + @echo 'Finished building: $@' + @echo ' ' + +# Other Targets +clean: + -$(RM) default.size.stdout lab1_test_project.elf lab1_test_project.list lab1_test_project.map + -@echo ' ' + +secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST) + +fail-specified-linker-script-missing: + @echo 'Error: Cannot find the specified linker script. Check the linker settings in the build configuration.' + @exit 2 + +warn-no-linker-script-specified: + @echo 'Warning: No linker script specified. Check the linker settings in the build configuration.' + +.PHONY: all clean dependents main-build fail-specified-linker-script-missing warn-no-linker-script-specified + +-include ../makefile.targets diff --git a/Debug/objects.list b/Debug/objects.list new file mode 100644 index 0000000..932d242 --- /dev/null +++ b/Debug/objects.list @@ -0,0 +1,20 @@ +"./Core/Src/main.o" +"./Core/Src/stm32f4xx_hal_msp.o" +"./Core/Src/stm32f4xx_it.o" +"./Core/Src/syscalls.o" +"./Core/Src/sysmem.o" +"./Core/Src/system_stm32f4xx.o" +"./Core/Startup/startup_stm32f429zitx.o" +"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o" +"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o" +"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o" +"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o" +"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o" +"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o" +"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o" +"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o" +"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o" +"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o" +"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o" +"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o" +"./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o" diff --git a/Debug/objects.mk b/Debug/objects.mk new file mode 100644 index 0000000..281954c --- /dev/null +++ b/Debug/objects.mk @@ -0,0 +1,9 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (14.3.rel1) +################################################################################ + +USER_OBJS := + +LIBS := + diff --git a/Debug/sources.mk b/Debug/sources.mk new file mode 100644 index 0000000..98bd58b --- /dev/null +++ b/Debug/sources.mk @@ -0,0 +1,28 @@ +################################################################################ +# Automatically-generated file. Do not edit! +# Toolchain: GNU Tools for STM32 (14.3.rel1) +################################################################################ + +ELF_SRCS := +OBJ_SRCS := +S_SRCS := +C_SRCS := +S_UPPER_SRCS := +O_SRCS := +CYCLO_FILES := +SIZE_OUTPUT := +OBJDUMP_LIST := +SU_FILES := +EXECUTABLES := +OBJS := +MAP_FILES := +S_DEPS := +S_UPPER_DEPS := +C_DEPS := + +# Every subdirectory with source files must be described here +SUBDIRS := \ +Core/Src \ +Core/Startup \ +Drivers/STM32F4xx_HAL_Driver/Src \ + diff --git a/lab1_test_project Debug.launch b/lab1_test_project Debug.launch new file mode 100644 index 0000000..8891e9b --- /dev/null +++ b/lab1_test_project Debug.launch @@ -0,0 +1,89 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +